A multi-circuit parallel synchronization method and system for high-power wind power converter

Abstract

The invention discloses a multi-circuit parallel synchronization method and system for a high-power wind power converter, wherein the multi-circuit parallel synchronization method for a high-power wind power converter comprises: a main controller generates a synchronization source according to a control timing; a Manchester code encoder is used to encode the synchronization source to generate a synchronization message; the synchronization message is sent to a slave controller through an optical fiber transceiver, and a slave in the slave controller generates a control interrupt, sampling and pulse carrier signal of the slave controller, thereby completing the synchronization of the main controller and the slave controller; the invention realizes the multi-circuit parallel connection of a high-power wind power converter by designing a main machine and a slave machine, and designs a Manchester code encoder to realize sampling, control and pulse carrier synchronization of the converter multi-circuit, thereby solving the problems of harmonic circulation when multiple circuits are connected in parallel, and improving the reliability and anti-interference of the multi-circuit parallel connection of the high-power wind power converter.

Description

Technical Field

[0001] The present invention relates to the technical field of wind power converter control, and in particular to a multi-circuit parallel synchronization method and system for a high-power wind power converter. Background Art

[0002] At present, the global economic development and population growth are constantly expanding the demand for energy, and traditional energy is becoming increasingly exhausted. The development of clean and renewable energy has become the only way to support the sustainable development of mankind. The transformation from an energy system dominated by fossil energy to a renewable energy system dominated by clean and low-carbon energy is becoming the core strategy for energy development in various countries. As an important renewable energy, wind energy is being developed and applied in large quantities around the world. With the continuous development of high-power offshore wind power technology, the continuous improvement of power generation efficiency, and the reduction of construction and maintenance costs, high-power wind turbines will gradually become an important direction for the development of offshore wind power in my country in the future.

[0003] Wind power converter is a key electrical equipment for wind turbine grid connection safety, and is a power conversion device with specific functions. High-power wind power converter generally consists of multiple circuits, each of which has exactly the same components, including mechanical cabinet, main circuit, control system, cooling system, power supply system, auxiliary system, etc.

[0004] The input of each circuit of the full-power converter is connected to the stator side of the wind turbine generator, and the output is connected to the same box-type transformer. The output end of each circuit is directly short-circuited. The input end can be connected to the same winding or multiple windings according to the generator winding. The pulse carrier between each circuit of the full-power converter needs to be synchronized to solve the problem of harmonic circulation between circuits. The commonly used synchronization method between each circuit is non-coding method or single-channel custom coding. The non-coding method is easily interfered, resulting in erroneous synchronization signals. Single-channel custom coding is prone to packet loss, etc., and the reliability of converter operation is low when multiple circuits of the unit are connected in parallel. Summary of the invention

[0005] The purpose of this section is to summarize some aspects of embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the specification abstract and the invention title of this application to avoid blurring the purpose of this section, the specification abstract and the invention title, and such simplifications or omissions cannot be used to limit the scope of the present invention.

[0006] In view of the above existing problems, the present invention is proposed.

[0007] Therefore, the present invention provides a multi-circuit parallel synchronization method for a high-power wind power converter, which can avoid problems such as current imbalance and resonance when multiple circuits are connected in parallel, ensure reliable synchronization when multiple circuits are connected in parallel, and improve anti-interference performance.

[0008] In order to solve the above technical problems, the present invention provides the following technical solutions: including, a main controller generates a synchronization source according to a control timing; encoding the synchronization source through a Manchester code encoder to generate a synchronization message; sending the synchronization message to a slave controller through an optical fiber transceiver, and generating a control interrupt, sampling and pulse carrier signal of the slave controller through a slave machine in the slave controller, thereby completing the synchronization of the main controller and the slave controller.

[0009] As a preferred solution of the multi-circuit parallel synchronization method of a high-power wind power converter described in the present invention, wherein: the main controller includes a central processing unit and a host; the host includes a main FPGA device and a PI controller; the control timing is calculated by the central processing unit, and the main FPGA device generates a synchronization source according to the control timing; wherein the transfer function G(s) of the PI controller is:

[0010]

[0011] The sampling time function T is:

[0012] T=2τK

[0013] Among them, τ is the delay time, s is the input, U is the active power of the PI controller, L1 is the incoming line inductance, L2 is the synchronous inductance, and K is the adjustment coefficient of the PI controller.

[0014] As a preferred solution of the multi-circuit parallel synchronization method of a high-power wind power converter described in the present invention, wherein: the adjustment coefficient K includes:

[0015]

[0016] Among them, T i is the sampling time constant.

[0017] As a preferred solution of the multi-circuit parallel synchronization method of a high-power wind power converter described in the present invention, wherein: the Manchester code encoder includes a clock unit, a data selector, a serial-to-parallel converter, and a frequency divider; the clock cycle clk and the state count state are set by the clock unit, the clock cycle clk is set to clk=500MHz, and the state count state is set to state=4; the synchronization source corresponding to the set clock cycle and state count is input into the data selector, and is divided into high-level and low-level signals by the data selector, and is selected according to the high-level and low-level signals, and the selected signal is sent to the serial-to-parallel converter; the serial-to-parallel converter is used to perform serial-to-parallel conversion on the selected signal; the serial-to-parallel conversion result is divided by the frequency divider to generate the synchronization message.

[0018] As a preferred solution of the multi-circuit parallel synchronization method of a high-power wind power converter described in the present invention, wherein: the slave machine includes a slave FPGA device and a balancing unit.

[0019] As a preferred solution of the multi-circuit parallel synchronization method of a high-power wind power converter described in the present invention, the balancing unit includes a phase detector, a mixer, a filter and an oscillator; the phase detector performs phase detection through Clark transformation and Park transformation; the function expression of the oscillator is:

[0020]

[0021] Where w(t) is the output oscillation frequency, w p is the output frequency of the filter, and t is the time; the filter uses the PI controller to filter out harmonic components.

[0022] As a preferred solution of the multi-circuit parallel synchronization system of a high-power wind power converter described in the present invention, it includes: a main controller, which generates a synchronization source according to a control timing; a Manchester code encoder, which is connected to the main controller and is used to encode the synchronization source and generate a synchronization message; an optical fiber transceiver, which is connected to the Manchester code encoder and the slave controller and is used to send the synchronization message to the slave controller; and a slave controller, which is connected to the optical fiber transceiver and generates a control interrupt, sampling and pulse carrier signal of the slave controller through a slave machine in the slave controller, thereby completing the synchronization of the main controller and the slave controller.

[0023] As a preferred solution of the multi-circuit parallel synchronization system of the high-power wind power converter described in the present invention, wherein: the main controller includes a central processing unit and a host; the control timing is calculated by the central processing unit, and the host generates a synchronization source according to the control timing; wherein the host includes a main FPGA device and a PI controller.

[0024] As a preferred solution of the multi-circuit parallel synchronization system of a high-power wind power converter described in the present invention, the Manchester code encoder includes a clock unit, a data selector, a serial-to-parallel converter, and a frequency divider; the clock unit is used to set the clock cycle clk and the state count state, wherein the clock cycle clk=500MHz, and the state count state=4; the data selector is connected to the clock unit, and is used to divide the synchronization source corresponding to the set clock cycle and state count into high-level and low-level signals, and select signals according to the high-level and low-level signals; the serial-to-parallel converter is connected to the data selector, and is used to perform serial-to-parallel conversion on the signal selected by the data selector; the frequency divider is connected to the serial-to-parallel converter, and is used to divide the serial-to-parallel conversion result to generate the synchronization message.

[0025] As a preferred solution of the multi-circuit parallel synchronization system of the high-power wind power converter described in the present invention, wherein: the slave includes a slave FPGA device and a balancing unit; the balancing unit includes a phase detector, a mixer, a filter and an oscillator; the phase detector is connected to the filter, the filter is connected to the oscillator, and the oscillator is connected to the mixer; wherein the filter uses the PI controller to filter out harmonic components.

[0026] Beneficial effects of the present invention: The present invention realizes multi-circuit parallel connection of a high-power wind power converter by designing a host and a slave, and designs a Manchester code encoder to realize sampling, control and pulse carrier synchronization of the converter multi-circuit, thereby solving problems such as harmonic circulating current when multiple circuits are connected in parallel, and improving the reliability and anti-interference of multi-circuit parallel connection of a high-power wind power converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor. Among them:

[0028] Figure 1 It is a schematic flow chart of a multi-circuit parallel synchronization method for a high-power wind power converter according to the first embodiment of the present invention;

[0029] Figure 2 This is a schematic structural diagram of a multi-circuit parallel synchronization system for a high-power wind power converter according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in the art without creative work should fall within the scope of protection of the present invention.

[0031] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0032] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive with other embodiments.

[0033] The present invention is described in detail with reference to schematic diagrams. When describing the embodiments of the present invention, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0034] At the same time, in the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "upper, lower, inner and outer" are based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first, second or third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0035] In the present invention, unless otherwise clearly specified and limited, the terms "install, connect, connect" should be understood in a broad sense, for example: it can be a fixed connection, a detachable connection or an integral connection; it can also be a mechanical connection, an electrical connection or a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] Example 1

[0037] Reference Figure 1 , which is the first embodiment of the present invention, and provides a multi-circuit parallel synchronization method for a high-power wind power converter, comprising:

[0038] S1: The main controller 100 generates a synchronization source according to the control timing;

[0039] It should be noted that each converter includes a master controller and multiple slave controllers.

[0040] The main controller 100 includes a central processor 101 and a host 102; the host 102 includes a main FPGA device 102a and a PI controller 102b; the central processor 101 calculates the control timing, and the FPGA device 102a generates a synchronization source according to the control timing;

[0041] This embodiment optimizes the PI controller to achieve accurate control of the FPGA device 102a. The traditional PI controller is optimized by combining the current inner loop of the FPGA device 102a and the design adjustment coefficient K. The transfer function G(s) of the PI controller 102b is:

[0042]

[0043] The sampling time function T is:

[0044] T=2τK

[0045] Wherein, τ is the delay time, s is the input, U is the active power of the PI controller 102 b , L1 is the incoming line inductance, L2 is the synchronous inductance, and K is the adjustment coefficient of the PI controller 102 b .

[0046] Design adjustment coefficient K:

[0047]

[0048] Among them, T i is the sampling time constant. In this embodiment, the sampling time constant is set to 100 ms.

[0049] S2: Encode the synchronization source through the Manchester code encoder 200 to generate a synchronization message;

[0050] The Manchester code encoder 200 includes a clock unit 201, a data selector 202, a serial-to-parallel converter 203, and a frequency divider 204;

[0051] The specific encoding process is as follows: (1) setting the clock cycle clk and the state count state through the clock unit 201, the clock cycle clk is set to clk=500MHz, and the state count state is set to state=4;

[0052] (2) Inputting the synchronization source corresponding to the set clock cycle and state count into the data selector 202, dividing it into high-level and low-level signals through the data selector 202, and selecting according to the high-level and low-level signals, and then sending the selected signal to the serial-to-parallel converter 203;

[0053] The data selector 202 is a four-input data selector. The data selector 202 selects 0001, 0010, 0100, and 1000 signals and sends them to the serial-to-parallel converter 203 according to dividing the corresponding synchronization source into 1 and 0 respectively.

[0054] (3) using the serial-to-parallel converter 203 to perform serial-to-parallel conversion on the selected signal;

[0055] (4) The frequency divider 204 divides the serial-to-parallel conversion result to generate a synchronization message.

[0056] The frequency divider 204 adds or subtracts the signal through a step counter, and the divider generates a prefabricated signal according to the result generated by the counter, and obtains a synchronization message in combination with the pulse signal.

[0057] S3: Send the synchronization message to the slave controller 400 through the optical fiber transceiver 300, and generate the control interrupt, sampling and pulse carrier signal of the converter through the slave machine 401 in the slave controller 400, thereby completing the synchronization between the master controller 100 and the slave controller 400.

[0058] Preferably, the optical fiber transceiver 300 of this embodiment is a 1000M optical fiber transceiver, so as to achieve low latency transmission.

[0059] The slave 401 includes a slave FPGA device 401 a and a balancing unit 401 b . The embodiment designs the balancing unit 401 b to remove unbalanced current and harmonic voltage between loops.

[0060] Specifically, the balancing unit 401b includes a phase detector, a mixer, a filter and an oscillator; the phase detector performs phase detection through Clark transform and Park transform;

[0061] The function expression of the oscillator is:

[0062]

[0063] Where w(t) is the output oscillation frequency, w p is the output frequency of the filter, and t is the time; the filter adopts a PI controller 102b to filter out harmonic components.

[0064] Finally, the oscillation frequency output by the oscillator is linearly shifted in spectrum through a mixer, thereby effectively suppressing the harmonic circulation problem.

[0065] Example 2

[0066] The technical effects adopted in this method are verified and explained. Different methods selected in this embodiment are compared with this method for testing, and the test results are compared by means of scientific demonstration to verify the real effect of this method.

[0067] (1) In this embodiment, a strong interference experiment is performed by using a bit error meter to compare the bit error rates of the traditional Manchester code encoding method and the Manchester code encoder 200 designed by this method, so as to verify that the Manchester code encoder 200 designed by this method has high anti-interference performance.

[0068] A strong interference signal is added 3 seconds before and after the transmission, and the bit error rate at different times is measured by a bit error meter. The Manchester code encoder 200 generates 3000 code elements per second. The results are shown in the following table.

[0069] Table 1: Test bit error rate under interference signal.

[0070] Testing time Traditional Manchester code encoding method This method 200s 0.0786％ 0.0126％

[0071] When a strong interference signal is added, the bit error rate of the method is lower than that of the traditional Manchester code encoding method, and the anti-interference ability of the method is stronger than that of the traditional Manchester code encoding method.

[0072] (2) The real-time simulation debugging of the converter is performed using Signal Tap II Logic Analyzer to compare the converter synchronization performance of the traditional synchronization method and the method proposed, where the control coefficient K is set to 0.02. The results are shown in the following table:

[0073] Table 2: Synchronization performance comparison.

[0074] Traditional synchronization method This method Synchronization accuracy Within 1us Within 100ns

[0075] It can be seen from Table 2 that compared with the traditional synchronization method, the synchronization reliability of the converter is improved by this method.

[0076] Example 3

[0077] Reference Figure 2 , which is the third embodiment of the present invention. This embodiment is different from the first embodiment in that it provides a multi-circuit parallel synchronization system for a high-power wind power converter, including:

[0078] It should be noted that each converter includes a master controller and multiple slave controllers.

[0079] The main controller 100 generates a synchronization source according to the control timing; specifically, the main controller 100 includes a central processing unit 101 and a host 102; the control timing is calculated by the central processing unit 101, and the host 102 generates a synchronization source according to the control timing; wherein the host 102 includes a main FPGA device 102a and a PI controller 102b.

[0080] The Manchester code encoder 200 is connected to the main controller 100 and is used to encode the synchronization source and generate a synchronization message. Specifically, the Manchester code encoder 200 includes a clock unit 201, a data selector 202, a serial-to-parallel converter 203, and a frequency divider 204. The clock unit 201 is used to set the clock cycle clk and the state count state, wherein the clock cycle clk=500MHz and the state count state=4. The data selector 202 is connected to the clock unit 201 and is used to divide the synchronization source corresponding to the set clock cycle and state count into high-level and low-level signals. The serial-to-parallel converter 203 is connected to the data selector 202 and is used to perform serial-to-parallel conversion on the high-level and low-level signals. The frequency divider 204 is connected to the serial-to-parallel converter 203 and is used to divide the serial-to-parallel conversion result to generate a synchronization message.

[0081] The optical fiber transceiver 300 is connected to the Manchester code encoder 200 and the slave controller 400, and is used to send the synchronization message to the slave controller 400;

[0082] The slave controller 400 is connected to the optical fiber transceiver 300, and generates control interrupt, sampling and pulse carrier signals of the slave controller 400 through the slave machine 401 in the slave controller 400, thereby completing the synchronization of the master controller 100 and the slave controller 400; specifically, the slave machine 401 includes a slave FPGA device 401a and a balancing unit 401b; the balancing unit 401b includes a phase detector, an amplifier, a mixer, a filter and an oscillator; the balancing unit 401b includes a phase detector, a mixer, a filter and an oscillator; the phase detector is connected to the filter, the filter is connected to the oscillator, and the oscillator is connected to the mixer; wherein the filter adopts a PI controller 102b to filter out harmonic components.

[0083] The optical fiber transceiver 300 of this embodiment can use a 1000M optical fiber transceiver to achieve low transmission delay.

[0084] It should be appreciated that embodiments of the present invention may be implemented or enforced by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer-readable memory. The method may be implemented in a computer program using standard programming techniques - including a non-transitory computer-readable storage medium configured with a computer program, wherein the storage medium so configured causes the computer to operate in a specific and predefined manner - according to the methods and drawings described in the specific embodiments. Each program may be implemented in a high-level procedural or object-oriented programming language to communicate with a computer system. However, if desired, the program may be implemented in an assembly or machine language. In any case, the language may be a compiled or interpreted language. In addition, the program may be run on a programmed ASIC for this purpose.

[0085] Furthermore, the operations of the processes described herein may be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and / or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) that is executed collectively on one or more processors, by hardware, or a combination thereof. The computer program includes a plurality of instructions that may be executed by one or more processors.

[0086] Further, the method can be implemented in any type of computing platform that is operably connected to a suitable computer, including but not limited to a personal computer, a minicomputer, a mainframe, a workstation, a network or distributed computing environment, a separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, etc. Aspects of the present invention can be implemented in machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, an optical read and / or write storage medium, a RAM, a ROM, etc., so that it can be read by a programmable computer, and when the storage medium or device is read by the computer, it can be used to configure and operate the computer to perform the process described herein. In addition, the machine-readable code, or part thereof, can be transmitted via a wired or wireless network. When such media includes instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor, the invention described herein includes these and other different types of non-transitory computer-readable storage media. When programmed according to the methods and techniques described in the present invention, the present invention also includes the computer itself. The computer program can be applied to input data to perform the functions described herein, thereby converting the input data to generate output data stored in a non-volatile memory. The output information can also be applied to one or more output devices such as a display. In a preferred embodiment of the present invention, the converted data represents a physical and tangible object, including a specific visual depiction of the physical and tangible object produced on a display.

[0087] As used in this application, the terms "component", "module", "system", etc. are intended to refer to a computer-related entity, which can be hardware, firmware, a combination of hardware and software, software, or software in operation. For example, a component can be, but is not limited to: a process running on a processor, a processor, an object, an executable file, a thread in execution, a program, and / or a computer. As an example, an application running on a computing device and the computing device can both be components. One or more components can exist in a process and / or thread in execution, and a component can be located in a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures thereon. These components can communicate in a local and / or remote process manner, such as according to a signal having one or more data packets (e.g., data from a component that interacts with another component in a local system, a distributed system, and / or interacts with other systems in a signal manner through a network such as the Internet).

[0088] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A multi-circuit parallel synchronization method for a high-power wind power converter, characterized in that: include, The main controller (100) generates a synchronization source according to the control timing; Encoding the synchronization source by a Manchester code encoder (200) to generate a synchronization message; The synchronization message is sent to the slave controller (400) through the optical fiber transceiver (300), and the control interrupt, sampling and pulse carrier signal of the slave controller (400) are generated by the slave machine (401) in the slave controller (400), thereby completing the synchronization of the master controller (100) and the slave controller (400); The main controller (100) includes a central processing unit (101) and a host (102); The host (102) includes a main FPGA device (102a) and a PI controller (102b); The control timing is calculated by the central processor (101), and the main FPGA device (102a) generates a synchronization source according to the control timing; Wherein, the transfer function G(s) of the PI controller (102b) is: The sampling time function T is: T=2τK Wherein, τ is the delay time, s is the input, U is the active power of the PI controller (102b), L1 is the incoming line inductance, L2 is the synchronous inductance, and K is the adjustment coefficient of the PI controller (102b); The adjustment coefficient K includes, Among them, T i is the sampling time constant.

2. The high-power wind power converter multi-circuit parallel synchronization method according to claim 1, characterized in that: The Manchester code encoder (200) comprises a clock unit (201), a data selector (202), a serial-to-parallel converter (203), and a frequency divider (204); Setting a clock cycle clk and a state count state through the clock unit (201), wherein the clock cycle clk is set to clk=500 MHz, and the state count state is set to state=4; Inputting the synchronization source corresponding to the set clock cycle and state count into the data selector (202), dividing it into high-level and low-level signals through the data selector (202), and selecting according to the high-level and low-level signals, and sending the selected signal to the serial-to-parallel converter (203); Utilizing the serial-to-parallel converter (203) to perform serial-to-parallel conversion on the selected signal; The frequency divider (204) is used to divide the serial-to-parallel conversion result to generate the synchronization message.

3. The high-power wind power converter multi-circuit parallel synchronization method according to claim 2, characterized in that: The slave device (401) includes a slave FPGA device (401a) and a balancing unit (401b).

4. The high-power wind power converter multi-circuit parallel synchronization method according to claim 3, characterized in that: The balancing unit (401b) comprises a phase detector, a mixer, a filter and an oscillator; The phase detector performs phase detection by Clark transform and Park transform; The function expression of the oscillator is: Where w(t) is the output oscillation frequency, w p is the output frequency of the filter, and t is time; the filter adopts a PI controller (102b) to filter out harmonic components.

5. A multi-circuit parallel synchronization system for high-power wind power converters, characterized in that: include, A main controller (100) generates a synchronization source according to a control timing sequence; A Manchester code encoder (200), connected to the main controller (100), for encoding the synchronization source to generate a synchronization message; An optical fiber transceiver (300), connected to the Manchester code encoder (200) and the slave controller (400), and used for sending the synchronization message to the slave controller (400); A slave controller (400) is connected to the optical fiber transceiver (300), and generates control interrupt, sampling and pulse carrier signals of the slave controller (400) through a slave machine (401) in the slave controller (400), thereby completing synchronization between the master controller (100) and the slave controller (400); The Manchester code encoder (200) comprises a clock unit (201), a data selector (202), a serial-to-parallel converter (203), and a frequency divider (204); A clock unit (201), used for setting a clock cycle clk and a state count state, wherein the clock cycle clk=500 MHz, and the state count state=4; A data selector (202), connected to the clock unit (201), is used to divide the synchronization source corresponding to the set clock cycle and state count into high-level signals and low-level signals, and perform signal selection according to the high-level signals and low-level signals; A serial-to-parallel converter (203), connected to the data selector (202), and used for performing serial-to-parallel conversion on the signal selected by the data selector (202); The frequency divider (204) is connected to the serial-to-parallel converter (203) and is used to perform frequency division on the serial-to-parallel conversion result to generate the synchronization message.

6. The high-power wind power converter multi-circuit parallel synchronization system according to claim 5, characterized in that: The main controller (100) comprises a central processing unit (101) and a host (102); The control timing is calculated by the central processor (101), and the host (102) generates a synchronization source according to the control timing; The host (102) includes a main FPGA device (102a) and a PI controller (102b).

7. The high-power wind power converter multi-circuit parallel synchronization system according to claim 6, characterized in that: The slave (401) comprises a slave FPGA device (401a) and a balancing unit (401b); the balancing unit (401b) comprises a phase detector, a mixer, a filter and an oscillator; the phase detector is connected to the filter, the filter is connected to the oscillator, and the oscillator is connected to the mixer; The filter uses a PI controller (102b) to filter out harmonic components.

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