Electronic component module and silicon nitride circuit substrate

Abstract

An electronic component module, comprising: a silicon nitride circuit substrate; an electronic component mounted on the silicon nitride circuit substrate; and a sealing resin portion that seals all or part of the silicon nitride circuit substrate and the electronic component, wherein the linear expansion coefficient of the heat sink is set to α H ( / ℃), let the Young's modulus of the above heat sink be E H (GPa), the linear expansion coefficient of the sealing resin portion is α R ( / °C), the Young's modulus of the sealing resin portion is defined as E R (GPa), S1 calculated by the specific formula (1) is greater than -0.38 (GPa) and less than -0.23 (GPa), and S2 calculated by the specific formula (2) is greater than -0.028 (GPa) and less than 0.019 (GPa).

Description

Technical Field

[0001] The present invention relates to an electronic component module and a silicon nitride circuit substrate. Background Art

[0002] In power modules, etc., circuit substrates using ceramic substrates such as alumina, beryllium oxide, silicon nitride, and aluminum nitride are used from the perspectives of thermal conductivity, cost, safety, etc. These ceramic substrates are used as circuit substrates by joining metal circuit layers such as copper and aluminum and heat dissipation layers. They have excellent insulation and heat dissipation properties compared to resin substrates and metal substrates with resin layers as insulating materials, and are therefore used as substrates for mounting electronic components with high heat dissipation properties.

[0003] In power module applications such as elevators, vehicles, and hybrid vehicles, a ceramic circuit substrate is used in which a metal circuit board is bonded to the surface of a ceramic substrate with solder, and a semiconductor element is mounted at a predetermined position on the metal circuit board. In recent years, in response to the increase in heat dissipation from semiconductor elements associated with the high integration, high frequency, and high output of semiconductor elements, ceramic substrates of aluminum nitride sintered bodies and silicon nitride sintered bodies with high thermal conductivity are used. Among them, silicon nitride substrates, which require high mechanical reliability and excellent mechanical strength and toughness, are particularly popular as ceramic substrates for mounting electronic components.

[0004] Furthermore, in electronic component modules, since the electronic component modules are repeatedly subjected to thermal stress, if they cannot withstand the thermal stress, micro cracks may occur on the ceramic substrate, or peeling may occur between the components constituting the electronic component modules, resulting in poor bonding strength or poor thermal resistance, thereby causing problems such as reduced operational reliability and yield of the electronic equipment.

[0005] Therefore, for example, Patent Document 1 describes a method for manufacturing a resin-sealed power module in which a power module is sealed with a molding resin, the power module comprising: a power module substrate having a circuit layer formed on one surface of a ceramic substrate containing silicon nitride; and a semiconductor element mounted on the circuit layer of the power module substrate. In addition, Patent Document 1 describes that according to the manufacturing method, the bonding reliability between the semiconductor element and the power module substrate can be improved by including a step of adjusting the surface roughness of the ceramic substrate in contact with the molding resin to a specific range.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Publication No. 2018-46192

[0009] However, in electronic component modules, etc., there is a tendency for the thermal stress repeatedly applied to the electronic component modules to further increase as the output and integration thereof are developed. In the prior art, ceramic substrates cannot withstand the thermal stress. For example, there is a situation where peeling or micro cracks occur between the components constituting the electronic component module, resulting in poor bonding strength or poor thermal resistance. The reliability of electronic component modules in which electronic components such as semiconductor elements are mounted on such ceramic circuit substrates is insufficient. Summary of the invention

[0010] Problems to be solved by the invention

[0011] In view of the above problems, an object of the present invention is to obtain an electronic component module with high reliability and high yield, and a silicon nitride circuit substrate capable of producing an electronic component module with high reliability and high yield.

[0012] Means for solving problems

[0013] According to the present invention, there are provided the electronic component module and the silicon nitride circuit board shown below.

[0014] That is, according to the present invention, there is provided an electronic component module comprising:

[0015] Silicon nitride circuit substrate;

[0016] An electronic component mounted on the aforementioned silicon nitride circuit substrate; and

[0017] a sealing resin portion that seals all or part of the silicon nitride circuit substrate and the electronic component;

[0018] The silicon nitride circuit substrate comprises:

[0019] Silicon nitride substrate;

[0020] a first copper layer disposed on one side of the silicon nitride substrate; and

[0021] A second copper layer is disposed on the other side of the silicon nitride substrate.

[0022] The surface of the second copper layer opposite to the surface on which the silicon nitride substrate is provided is bonded to the heat sink directly or via a bonding material layer.

[0023] When the linear expansion coefficient of the above heat sink is set to α H ( / ℃), let the Young's modulus of the above heat sink be E H (GPa), the linear expansion coefficient of the sealing resin portion is α R ( / °C), the Young's modulus of the sealing resin portion is defined as E R (GPa),

[0024] S1 calculated by the following formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less,

[0025] S2 calculated by the following formula (2) is not less than -0.028 (GPa) and not more than 0.019 (GPa).

[0026] Formula (1): S1 = (α BC -α H )×E H ×(290-25)

[0027] [where α BC is an approximate value of the linear expansion coefficient of the composite laminate of the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α BC It is calculated by the following formula (3).

[0028] Formula (3): α BC =((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E B ×T B )+(E C ×T C ))]

[0029] Formula (2): S2 = (α ABC -α R )×E R ×(290-25)

[0030] [where α ABC is an approximate value of the linear expansion coefficient of the composite laminate of the first copper layer, the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the first copper layer is set to α A ( / °C), the Young's modulus of the first copper layer is set to E A (GPa), the thickness of the first copper layer is set to T A (mm), the linear expansion coefficient of the silicon nitride substrate is αB ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is α C ( / ℃), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α ABC It is calculated by the following formula (4).

[0031] Formula (4): α ABC =((α A ×E A ×T A )+((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E A ×T A )+(E B ×T B )+(E C ×T C ))]

[0032] In addition, according to the present invention, there is provided a silicon nitride circuit substrate comprising:

[0033] Silicon nitride substrate;

[0034] a first copper layer disposed on one side of the silicon nitride substrate; and

[0035] A second copper layer is disposed on the other side of the silicon nitride substrate.

[0036] The silicon nitride circuit substrate is used in the following forms:

[0037] All or part of it is sealed by a sealing resin portion, and

[0038] The surface of the second copper layer opposite to the surface on which the silicon nitride substrate is provided is bonded to the heat sink directly or through a bonding material layer.

[0039] When the linear expansion coefficient of the above heat sink is set to α H ( / ℃), let the Young's modulus of the above heat sink be E H (GPa), the linear expansion coefficient of the sealing resin portion is α R ( / °C), the Young's modulus of the sealing resin portion is defined as E R (GPa),

[0040] S1 calculated by the following formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less,

[0041] S2 calculated by the following formula (2) is not less than -0.028 (GPa) and not more than 0.019 (GPa).

[0042] Formula (1): S1 = (α BC -α H )×E H ×(290-25)

[0043] [where α BC is an approximate value of the linear expansion coefficient of the composite laminate of the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α BC It is calculated by the following formula (3).

[0044] Formula (3): α BC =((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E B ×T B )+(E C ×T C ))]

[0045] Formula (2): S2 = (α ABC -α R )×E R ×(290-25)

[0046] [where α ABC is an approximate value of the linear expansion coefficient of the composite laminate of the first copper layer, the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the first copper layer is set to α A ( / °C), the Young's modulus of the first copper layer is set to E A (GPa), the thickness of the first copper layer is set to T A(mm), the linear expansion coefficient of the silicon nitride substrate is α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is α C ( / ℃), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α ABC It is calculated by the following formula (4).

[0047] Formula (4): α ABC =((α A ×E A ×T A )+((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E A ×T A )+(E B ×T B )+(E C ×T C ))]

[0048] Effects of the Invention

[0049] Since the electronic component module and the silicon nitride circuit board of the present invention are configured as described above, it is possible to manufacture an electronic component module with high reliability and high yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] [ Figure 1 ] is a top view of the silicon nitride circuit substrate involved in this embodiment.

[0051] [ Figure 2 ] is a cross-sectional view of the silicon nitride circuit substrate involved in this embodiment.

[0052] [ Figure 3 ] is a cross-sectional view of the electronic component module involved in this embodiment.

[0053] [ Figure 4 ] is an enlarged cross-sectional view of a portion of the electronic component module involved in this embodiment. DETAILED DESCRIPTION

[0054] Hereinafter, the embodiments of the present invention will be described using the accompanying drawings. It should be noted that in all the accompanying drawings, the same components are marked with the same reference numerals, and the description is appropriately omitted. In addition, the drawings are schematic diagrams and do not correspond to the actual size ratios.

[0055] Hereinafter, the configuration of the electronic component module 200 according to the present embodiment will be described.

[0056] <Configuration of Electronic Component Module According to the Present Embodiment>

[0057] The electronic component module 200 according to the present embodiment includes a silicon nitride circuit substrate 100 , an electronic component 40 mounted on the silicon nitride circuit substrate 100 , and a sealing resin portion 50 that seals all or part of the silicon nitride circuit substrate 100 and the electronic component 40 .

[0058] First, use Figure 1 ,and Figure 2 The silicon nitride circuit substrate 100 according to the present embodiment will be described. Figure 1 is a top view of the silicon nitride circuit substrate according to the present embodiment, and Figure 2 It is a cross-sectional view of the silicon nitride circuit substrate according to the present embodiment.

[0059] like Figure 2 As shown, the silicon nitride circuit substrate 100 according to the present embodiment includes a silicon nitride substrate 10, a first copper layer 30, and a second copper layer 20. In addition, the silicon nitride substrate 10 and the second copper layer 20 may be stacked with the solder layer 12 sandwiched therebetween, and the silicon nitride substrate 10 and the first copper layer 30 may be stacked with the solder layer 13 sandwiched therebetween.

[0060] It should be noted that in the present embodiment, the "silicon nitride-copper composite" refers to a state where the silicon nitride substrate 10, the first copper layer 30, the solder layer 13, the silicon nitride substrate 10, the solder layer 12, and the second copper layer 20 are stacked, and refers to a state before a circuit pattern is formed. In addition, the "silicon nitride circuit substrate" refers to a state where a circuit pattern is formed on the "silicon nitride-copper composite", and may be a state where electronic components such as the electronic component 40 are mounted on a portion of the copper layer where the circuit pattern is formed.

[0061] Next, use Figure 3 and Figure 4 The electronic component module according to this embodiment will be further described. Figure 3 is a cross-sectional view of the electronic component module according to this embodiment. Figure 4 This is an enlarged cross-sectional view of a portion of the electronic component module according to the present embodiment.

[0062] like Figure 3As shown, in this embodiment, the surface of the second copper layer 20 opposite to the surface on which the silicon nitride substrate 10 is provided is bonded to the heat sink 60 directly or via a bonding material layer. Figure 3 In the example of the present embodiment shown, the second copper layer 20 is bonded to the heat sink 60 via the bonding material layer 21. In the present embodiment, all or part of the silicon nitride circuit board 100 and the electronic component 40 are sealed by the sealing resin portion 50.

[0063] In the electronic component module according to the present embodiment, the linear expansion coefficient of the heat sink 60 is α H ( / °C), the Young's modulus of the heat sink 60 is set to E H (GPa), the linear expansion coefficient of the sealing resin portion 50 is α R ( / °C), the Young's modulus of the sealing resin portion 50 is defined as E R (GPa), S1 calculated by the following formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less, and S2 calculated by the following formula (2) is -0.028 (GPa) or more and 0.019 (GPa) or less.

[0064] Formula (1): S1 = (α BC -α H )×E H ×(290-25)

[0065] Formula (2): S2 = (α ABC -α R )×E R ×(290-25)

[0066] Among them, α BC ( / °C) represents the approximate value of the linear expansion coefficient of the composite laminate formed by the silicon nitride substrate and the second copper layer, α ABC ( / °C) represents the approximate value α of the linear expansion coefficient of the composite laminate formed by the first copper layer, the silicon nitride substrate and the second copper layer ABC ( / ℃).

[0067] According to the present invention, in the electronic component module having the above configuration, by setting S1 calculated by the above formula (1) and S2 calculated by the above formula (2) to specific numerical ranges, an electronic component module with high reliability and yield can be manufactured.

[0068] That is, the electronic component module and the silicon nitride circuit substrate constituting the electronic component module are manufactured by combining and bonding materials having different linear expansion coefficients, and there are many options for the material, physical property, and shape of each component, and the number of combinations thereof. The inventors of the present application have conducted in-depth research and found that the reliability and yield of the electronic component module can be improved by defining the following parameters: parameters related to the residual stress accumulated between the composite laminate formed by two layers close to the heat sink, such as the silicon nitride substrate and the second copper layer, and the heat sink; and parameters related to the residual stress accumulated between the composite laminate (silicon nitride circuit substrate) formed by three layers, such as the first copper layer, the silicon nitride substrate, and the second copper layer, and the sealing resin portion, thereby completing the present invention.

[0069] S1 calculated by the above formula (1), that is, the residual stress accumulated between the composite laminate formed of two layers such as the silicon nitride substrate and the second copper layer and the heat sink is greater than -0.38 GPa and less than 0.23 GPa, preferably greater than -0.36 GPa and less than 0.24 GPa, and more preferably greater than -0.34 GPa and less than 0.25 GPa.

[0070] S2 calculated by the above formula (2), that is, the residual stress accumulated between the composite laminate formed by the three layers of the first copper layer, the silicon nitride substrate and the second copper layer and the sealing resin portion is greater than -0.028 GPa and less than 0.019 GPa, preferably greater than -0.020 GPa and less than 0.015 GPa, and more preferably greater than -0.015 GPa and less than 0.010 GPa.

[0071] S1 represented by the formula (1) and S2 represented by the formula (2) can be adjusted by appropriately selecting the type, physical properties, shape, etc. of the material of each constituent component used in the electronic component module.

[0072] The approximate value α of the linear expansion coefficient of the composite laminate composed of the silicon nitride substrate and the second copper layer is BC ( / °C), when the linear expansion coefficient of the silicon nitride substrate is set to α B ( / ℃), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is set to α C ( / ℃), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α BC ( / °C) is calculated by the following formula (3).

[0073] Formula (3): α BC=((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E B ×T B )+(E C ×T C ))

[0074] α BC ( / ℃) is preferably 1.0×10 -6 / ℃ or above 3.0×10 -5 / °C or less, more preferably 3.0×10 -6 / ℃ or above 2.0×10 -5 / ℃ below.

[0075] In addition, the approximate value α of the linear expansion coefficient of the composite laminate composed of three layers, namely the first copper layer, the silicon nitride substrate, and the second copper layer, is ABC ( / °C), when the linear expansion coefficient of the first copper layer is set to α A ( / °C), the Young's modulus of the first copper layer is set to E A (GPa), the thickness of the first copper layer is set as T A (mm), the linear expansion coefficient of the aforementioned silicon nitride substrate is α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is α C ( / ℃), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α ABC ( / °C) is calculated by the following formula (4).

[0076] Formula (4): α ABC =((α A ×E A ×T A )+((α B ×E B ×T B )+(α C ×E C ×T C )) / ((E A ×T A )+(E B ×T B )+(E C ×TC ))

[0077] α ABC ( / ℃) is preferably 1.0×10 -6 / ℃ or above 3.0×10 -5 / °C or less, more preferably 5.0×10 -6 / ℃ or above 2.0×10 -5 / ℃ below.

[0078] α BC ( / ℃), and α ABC ( / °C) is within the above numerical range, thereby further improving the reliability of the electronic component module.

[0079] The silicon nitride circuit substrate 100 according to the present invention represents the silicon nitride circuit substrate 100 in the electronic component module 200 according to the present embodiment. That is, the silicon nitride circuit substrate 100 according to the present invention is entirely or partially sealed by the sealing resin portion 50, and is used in a manner in which the surface of the second copper layer 20 opposite to the surface on which the silicon nitride substrate 10 is provided is bonded to the heat sink directly or via the bonding material layer 21.

[0080] In the present embodiment, the first copper layer 30 is made into a copper layer formed into a circuit pattern. It should be noted that the electronic component 40 is bonded to the first copper layer 30 via the solder layer 31, and the first copper layer 30, the electronic component 40 and the external connection terminal 70 are connected through the lead frame and the wire bonding wire 71 for external connection. In the present embodiment, as an example, an example of connecting to the external connection terminal 70 through the wire bonding wire 71 is shown. In addition, the external connection terminal 70 may also be directly connected to the substrate without the wire bonding wire 71. In this case, the external connection terminal 70 can be bonded, for example, by soldering or ultrasonic bonding.

[0081] It should be noted that the electronic component 40 is an electronic component such as a semiconductor element, and various semiconductor elements such as IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Semiconductor Field Effect Transistor), FWD (Free Wheeling Diode) etc. can be selected according to the desired function.

[0082] The solder layer 31 joining the electronic component 40 may be made of, for example, Sn—Sb, Sn—Ag, Sn—Cu, Sn—In, or Sn—Ag—Cu solder material (so-called lead-free solder material).

[0083] The external connection terminals 70 are formed of, for example, copper or a copper alloy, and the wire bonding wires 71 are formed of, for example, copper, a copper alloy, aluminum, gold, or the like.

[0084] In addition, in the present embodiment, the second copper layer 20 is used as a heat sink bonding copper layer.

[0085] In the present embodiment, the second copper layer 20 is bonded to the heat sink 60 via the bonding material layer 21 .

[0086] As described above, in the present embodiment, all or part of the silicon nitride circuit board 100 and the electronic component 40 are sealed by the sealing resin portion 50 .

[0087] Among them, the surface of the second copper layer 20 opposite to the surface provided with the silicon nitride substrate 10, that is, the second copper layer lower surface 22, preferably has an uncovered area not covered by the sealing resin portion 50. In other words, it is preferred that a part or all of the second copper layer lower surface 22 is not covered by the sealing resin portion 50.

[0088] In the electronic component module according to the present embodiment, it is preferable that the surface of the second copper layer 20 opposite to the surface on which the silicon nitride substrate 10 is provided (i.e., the second copper layer lower surface 22) protrudes further than the sealing resin portion 50 in the direction away from the silicon nitride substrate 10. Figure 4 As shown, when the surface of the sealing resin portion 50 facing the heat sink 60 is set as the sealing resin portion lower surface 51, and the surface of the second copper layer 20 facing the heat sink 60 is set as the second copper layer lower surface 22, it is designed that there is a step difference between the sealing resin portion lower surface 51 and the bonding material layer 21, and the second copper layer lower surface 22 protrudes relative to the sealing resin portion lower surface 51. With such a design, in the process of bonding the silicon nitride circuit substrate 100 to the heat sink 60, that is, in the process of bonding the exposed second copper layer lower surface 22 (uncovered area not covered by the sealing resin portion 50) of the second copper layer 20 to the heat sink 60, when the silicon nitride circuit substrate 100 and the heat sink 60 are brought into contact, the second copper layer lower surface 22 first contacts the heat sink 60, so that the second copper layer lower surface 22 can be smoothly bonded to the heat sink 60 without the sealing resin portion 50 interfering with the bonding, and the reliability of the bonding between the second copper layer 20 and the heat sink 60 can be improved.

[0089] Hereinafter, each structure of the silicon nitride circuit substrate 100 according to the present embodiment will be described in more detail.

[0090] <Silicon nitride substrate>

[0091] The silicon nitride substrate 10 according to the present embodiment has the function of supporting the first copper layer 30 and the second copper layer 20. The silicon nitride substrate is rectangular when viewed from the thickness direction. B It is preferably in the range of 0.2 mm to 1.5 mm, more preferably 0.2 mm to 0.8 mm, and in the present embodiment, 0.32 mm. It should be noted that the shape of the silicon nitride substrate 10 is an example in the present embodiment, and may be different from the present embodiment as long as the function of the present invention can be exerted.

[0092] For the silicon nitride substrate 10 according to the present embodiment, its Young's modulus E B It is preferably 250 GPa to 320 GPa, and more preferably 260 GPa to 310 GPa.

[0093] In addition, for the silicon nitride substrate 10 according to the present embodiment, its linear expansion coefficient α is B Preferably 1.5×10 -6 / ℃ or above 4.0×10 -6 / °C or less, more preferably 1.8×10 -6 / ℃ or above and less than 3.0×10 -6 / ℃.

[0094] By adjusting the physical properties of the silicon nitride substrate 10 as described above, S1 and S2 can be easily adjusted to fall within the above numerical ranges, and the reliability and yield rate of the electronic component module can be further improved.

[0095] It should be noted that the Young's modulus E of the silicon nitride substrate 10 is B , linear expansion coefficient α B Such physical properties can be adjusted by controlling the manufacturing method of the silicon nitride substrate 10 (specifically, the formulation of raw materials, calcination conditions, etc.).

[0096] <First copper layer>

[0097] The first copper layer 30 is polygonal when viewed from its thickness direction. The thickness of the first copper layer 30 is preferably set in the range of 0.10 mm to 1.50 mm, more preferably 0.15 mm to 1.40 mm, and further preferably 0.20 mm to 1.20 mm. In the present embodiment, as an example, it is set to 0.30 mm. It should be noted that the shape of the first copper layer 30 is an example in the present embodiment, and if the function of the present invention can be exerted, it may be different from the situation in the present embodiment.

[0098] The linear expansion coefficient of the first copper layer 30 according to the present embodiment can be preferably set to 16×10-6 / ℃ or above 19×10 -6 / °C or less, more preferably 17×10 -6 / ℃ or above 18×10 -6 / ℃ below.

[0099] The Young's modulus of the first copper layer 30 is preferably 90 GPa to 150 GPa, more preferably 100 GPa to 140 GPa, and even more preferably 110 GPa to 130 GPa.

[0100] By adjusting the physical properties of the first copper layer 30 and the second copper layer 20 as described above, S2 can be easily adjusted to fall within the above numerical range, and the reliability and yield rate of the electronic component module can be further improved.

[0101] The average crystal grain size of the copper crystals in the first copper layer 30 is preferably 50 μm or more and 500 μm or less, and more preferably 100 μm or more and 300 μm or less.

[0102] In the electronic component module according to the present embodiment, the electronic component 40 is mounted on the first copper layer 30 via a bonding layer such as a solder layer 31 and is covered by a sealing resin portion 50. Therefore, the first copper layer 30 is sandwiched by the sealing resin portion 50, the first copper layer 30 of the solder layer, the electronic component 40, and the silicon nitride substrate 10. Although residual stress and thermal stress are applied between these materials, poor bonding strength or poor thermal resistance can be further reduced by setting the average crystal grain size of the copper crystals in the first copper layer 30 within the above numerical range. The above mechanism is not clear, but it is speculated that by setting the average crystal grain size of the copper crystals in the first copper layer 30 within the above numerical range, the copper crystals in the first copper layer 30 appropriately undergo grain boundary sliding, etc., so that the stress is appropriately relaxed.

[0103] <Second copper layer>

[0104] The second copper layer 20 is polygonal when viewed from its thickness direction. The thickness of the second copper layer 20 is preferably set in the range of 0.10 mm to 1.50 mm, more preferably 0.15 mm to 1.40 mm, and further preferably 0.20 mm to 1.20 mm. In the present embodiment, as an example, it is set to 0.30 mm. It should be noted that the shape of the second copper layer 20 is an example in the present embodiment, and as long as the function of the present invention can be exerted, it may be different from the case of the present embodiment.

[0105] The linear expansion coefficient of the second copper layer 20 according to the present embodiment can be preferably set to 16×10 -6 / ℃ or above 19×10 -6 / °C or less, more preferably 17×10-6 / ℃ or above 18×10 -6 / ℃ below.

[0106] By adjusting the physical properties of the second copper layer 20 as described above, S1 and S2 can be easily adjusted to fall within the above numerical ranges, and the reliability and yield of the electronic component module can be further improved.

[0107] The average crystal grain size of the copper crystals in the second copper layer 20 is preferably 50 μm or more and 500 μm or less, and more preferably 100 μm or more and 300 μm or less.

[0108] As described later, when the silicon nitride circuit substrate 100 involved in the present embodiment is used as an electronic component module, the second copper layer 20 is bonded to the heat sink via the bonding material layer 21 such as a solder layer, and the second copper layer 20 is sandwiched by the bonding material layer 21 such as a solder layer and the heat sink 60, and the silicon nitride substrate 10, etc. Although residual stress and thermal stress are applied between these different materials, by setting the average crystal grain size of the copper crystals in the second copper layer 20 within the above numerical range, poor bonding strength or poor thermal resistance can be further reduced. The above mechanism is not clear, but it is speculated that by setting the average crystal grain size of the copper crystals in the second copper layer 20 within the above numerical range, the copper crystals in the second copper layer 20 appropriately undergo grain boundary sliding, etc., so that the stress is appropriately relaxed.

[0109] The Young's modulus of the second copper layer 20 is preferably 90 GPa to 150 GPa, more preferably 100 GPa to 140 GPa, and even more preferably 110 GPa to 130 GPa.

[0110] It should be noted that the linear expansion coefficient, Young's modulus and average crystal grain size of the copper crystals in the first copper layer 30 and the second copper layer 20 can be adjusted by appropriately selecting the copper plates constituting the first copper layer 30 and the second copper layer 20 and controlling the manufacturing conditions when brazing the first copper layer 30 and the second copper layer 20 on the silicon nitride substrate 10.

[0111] In addition, the average crystal grain size of the copper crystals in the first copper layer 30 and the second copper layer 20 can be obtained by the method described in the Examples.

[0112] <Brazing filler metal layer>

[0113] The brazing material layer 12 and the brazing material layer 13 according to the present embodiment can be respectively arranged between the silicon nitride substrate 10 and the first copper layer 30, and between the silicon nitride substrate 10 and the second copper layer 20, so as to bond the first copper layer 30 or the second copper layer 20 to the silicon nitride substrate 10. Typically, the thickness of the brazing material layer 12 and the brazing material layer 13 is set in the range of 3 μm to 40 μm, and more preferably 4 μm to 25 μm.

[0114] It should be noted that the silicon nitride circuit substrate 100 according to the present embodiment may have a plating layer on the first copper layer 30 and the second copper layer 20. The plating layer may be formed of a known material, such as Ag or Ni-P.

[0115] For the composition of the solder layers 12 and 13, it can be composed of a silver-copper solder containing at least one active metal selected from titanium, zirconium, hafnium, niobium, tantalum, vanadium, aluminum, and tin. The preferred proportion of Ag to Cu, Sn, or In is as follows: Ag: 85.0 to 95.0 parts by mass, Cu: 5.0 to 13.0 parts by mass, Sn or In: 0.4 to 3.5 parts by mass. By setting it within the above numerical range, the melting temperature of the solder can be prevented from rising excessively, the bonding can be performed at a moderate temperature, the thermal stress from the difference in thermal expansion coefficient during bonding can be reduced, and the heat cycle resistance can be improved.

[0116] The amount of active metal such as titanium added can be set to, for example, 1.5 to 5.0 parts by mass relative to 100 parts by mass of the total of Ag, Cu, and Sn or In. By appropriately adjusting the amount of active metal added, wettability relative to the ceramic plate can be further improved, and the occurrence of poor bonding can be further suppressed.

[0117] <Sealing resin section>

[0118] In this embodiment, the linear expansion coefficient of the sealing resin portion 50 can be preferably set to 5×10 -6 / ℃ or above 30×10 -6 / °C or less, more preferably 6×10 -6 / ℃ or above 20×10 -6 / °C or less, and can be more preferably set to 6×10 -6 / ℃ or above 15×10 -6 / °C or less. For example, epoxy resin containing SiO2 filler can be used for the sealing resin portion 50.

[0119] The Young's modulus of the sealing resin portion 50 is preferably 50 GPa to 80 GPa, more preferably 10 GPa to 60 GPa, and further preferably 15 GPa to 40 GPa.

[0120] The sealing resin portion 50 can be formed by curing a sealing resin portion forming resin composition.

[0121] The type of the sealing resin portion forming resin composition is not particularly limited, and a resin composition commonly used in the technical field, such as a transfer molding resin composition, a compression molding resin composition, and a liquid sealing material, can be used.

[0122] The sealing resin portion-forming resin composition preferably contains a thermosetting resin, preferably contains one or more selected from epoxy resins, phenolic resins, cyanate resins, bismaleimide triazine resins, acrylic resins, and silicone resins, and more preferably contains at least epoxy resin.

[0123] The sealing resin portion forming resin composition may further contain a curing agent, a filler, and the like.

[0124] Examples of fillers include powders of fused silica (spherical silica), crystalline silica, alumina, silicon carbide, silicon nitride, aluminum nitride, boron nitride, beryllium oxide, zirconium oxide, or spherical beads thereof, glass fiber, aramid fiber, carbon fiber, etc. The filler may be used alone or in combination of two or more.

[0125] <Radiator>

[0126] The heat sink 60 is formed of a material having high thermal conductivity, such as aluminum, copper, or an alloy thereof, and is preferably formed of aluminum or an aluminum alloy.

[0127] The linear expansion coefficient of the heat sink is preferably 20×10 -6 / ℃ or above 30×10 -6 / °C or less, more preferably 22×10 -6 / ℃ or above 28×10 -6 / ℃ below.

[0128] The Young's modulus of the heat sink 60 is preferably 40 GPa to 110 GPa, more preferably 50 GPa to 100 GPa, and even more preferably 60 GPa to 90 GPa.

[0129] The linear expansion coefficient of each constituent material can be determined, for example, using a thermomechanical analyzer (TMA) based on JIS R 1618. In the present invention, the linear expansion coefficient is the linear expansion coefficient (linear expansion coefficient) of each constituent material at 25 to 400°C.

[0130] In addition, the Young's modulus of each constituent material can be measured by a static flexure method based on JIS R1602.

[0131] <Method for manufacturing silicon nitride circuit substrate>

[0132] The electronic component module 200 according to the present embodiment can be manufactured by the following method. First, a method for manufacturing the silicon nitride circuit substrate 100 according to the present embodiment will be described.

[0133] First, prepare a silicon nitride substrate 10 having desired physical properties. The silicon nitride substrate 10 can be obtained by the following manufacturing method. That is, a raw material powder containing silicon nitride powder, Y2O3, MgO and other sintering aids, an organic solvent, and an organic binder, a plasticizer, etc. as required are uniformly mixed using a ball mill to form a raw material slurry. After the obtained raw material slurry is defoamed and thickened, it is formed into a sheet using a scraper method to obtain a molded body. After the obtained sheet-like molded body is cut, it is degreased at 400-800°C, and further calcined in a calcination furnace at 1700-1900°C in a nitrogen atmosphere for 1 to 10 hours, thereby obtaining the silicon nitride substrate 10.

[0134] Next, an Ag-Cu alloy paste, for example, to which Ti as an active metal is added, is printed on both sides of the silicon nitride substrate 10 as a brazing material containing an active metal, and a rectangular copper plate substantially the same as the silicon nitride substrate 10 is heated and bonded to both sides at a temperature of 600°C to 900°C. As the copper plate, an oxygen-free copper plate is preferably used. In addition, as the copper plate, a rolled copper plate is more preferably used. The copper plate is bonded to both sides of the silicon nitride substrate 10 via the brazing material, thereby obtaining a silicon nitride-copper composite.

[0135] Next, the first copper layer 30 is etched to form a circuit pattern. A photoresist (not shown) is laminated on the upper surface of the first copper layer 30. In this case, a liquid photoresist may be applied.

[0136] Next, in order to form a circuit pattern using the photoresist, pattern exposure based on the circuit pattern is performed. In this case, the film on which the negative image of the circuit pattern is formed can be closely attached to the photoresist, and the photoresist can be exposed by so-called collective exposure, or the photoresist can be exposed using a so-called direct-drawing exposure device (not using the above film).

[0137] Next, the exposed photoresist is etched based on the circuit pattern.

[0138] Next, the remaining photoresist is removed.

[0139] At this time, the second copper layer 20 may not be subjected to etching, and may be patterned in the same manner. In addition, the second copper layer 20 and the first copper layer 30 after the circuit pattern is formed may be plated.

[0140] Thus, the silicon nitride circuit substrate 100 having a circuit pattern formed thereon is manufactured.

[0141] The silicon nitride circuit substrate 100 according to the present embodiment comprises a silicon nitride substrate 10, a first copper layer 30 provided on one surface of the silicon nitride substrate, and a second copper layer 20 provided on the other surface of the silicon nitride substrate. The silicon nitride circuit substrate 100 is sealed with a sealing resin portion 50 in whole or in part, and the surface of the second copper layer 20 opposite to the surface on which the silicon nitride substrate 10 is provided is used in a manner of being bonded to a heat sink 60 directly or via a bonding material layer 21. When the linear expansion coefficient of the heat sink 60 is set to α H ( / °C), the Young's modulus of the heat sink 60 is set to E H (GPa), the linear expansion coefficient of the sealing resin portion 50 is α R ( / °C), the Young's modulus of the sealing resin portion 50 is E R (GPa), S1 calculated by the above formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less, and S2 calculated by the above formula (1) is -0.028 (GPa) or more and 0.019 (GPa) or less.

[0142] Next, the electronic component 40 is mounted on the first copper layer 30 via the solder layer 31. In this embodiment, the first copper layer 30 and the electronic component 40 are soldered together using a Sn-Sb-based, Sn-Ag-based, Sn-In-based, or Sn-Ag-Cu-based solder material.

[0143] Next, the electronic component 40 and the like are resin-sealed using a sealing resin to form a sealing resin portion 50. Resin sealing can be performed using a known method, for example, resin sealing can be performed using transfer molding. In addition, in the resin sealing process, for example, by performing resin sealing on the lower surface 22 of the second copper layer of the electronic component module in a state where the lower surface 22 is previously in contact with a plastic material, an uncovered area that is not covered by the sealing resin portion 50 can remain on the surface of the second copper layer 20 that is opposite to the surface on which the silicon nitride substrate 10 is provided (i.e., the lower surface 22 of the second copper layer), and the lower surface 22 of the second copper layer can be set to protrude relative to the lower surface 51 of the sealing resin portion.

[0144] As described above, the electronic component module 200 according to the present embodiment can be manufactured.

[0145] It should be noted that the present invention is not limited to the above-mentioned embodiments, and modifications and improvements within the scope of achieving the purpose of the present invention are included in the present invention.

[0146] Hereinafter, the present invention will be described in detail with reference to Examples, but the present invention is not limited at all to what is described in these Examples.

[0147] <Silicon nitride circuit board>

[0148] The silicon nitride circuit substrate was prepared in the following manner.

[0149] <Silicon nitride substrate>

[0150] Prepare the linear expansion coefficient α shown in Table 1 B , Young's modulus E B , thickness T B silicon nitride substrate.

[0151] Specifically, 6.0 parts by mass of Y2O3 and 1.5 parts by mass of MgO are added as sintering aids to 91.4 parts by mass of silicon nitride raw material powder having an average particle size of 0.7 μm, and an organic solvent, an organic binder, a plasticizer, etc. are mixed and uniformly mixed using a ball mill to prepare a raw material slurry. After the raw material slurry is defoamed and thickened, the sheet is formed by a scraper method to obtain a molded body. After the obtained sheet molded body is cut, it is degreased at 500°C and further calcined in a nitrogen atmosphere at 1850°C in a calcining furnace for 5 hours to prepare a silicon nitride substrate.

[0152] Note that a silicon nitride substrate having a size of 148 mm×200 mm was prepared.

[0153] <Copper plates for the first copper layer and the second copper layer>

[0154] A rolled copper plate having the linear expansion coefficient, Young's modulus, and thickness described in Table 1 was prepared.

[0155] <Method for manufacturing silicon nitride circuit substrate>

[0156] The silicon nitride circuit substrate was manufactured using the silicon nitride substrate and the copper plate in combination shown in Table 1.

[0157] First, as a brazing material (containing an active metal), a brazing material containing 3.5 parts by mass of titanium hydride powder (manufactured by Toho Technical Service Co., Ltd.: TCH-100) was prepared relative to a total of 100 parts by mass of 89.5 parts by mass of Ag powder (manufactured by Fukuda Metal Foil Powder Co., Ltd.: Ag-HWQ 2.5 μm), 9.5 parts by mass of Cu powder (manufactured by Fukuda Metal Foil Powder Co., Ltd.: Cu-HWQ 3 μm), and 1.0 parts by mass of Sn powder (manufactured by Fukuda Metal Foil Powder Co., Ltd.: Sn-HPN 3 μm).

[0158] The brazing material, binder resin and solvent are mixed to obtain a brazing paste, which is applied to both surfaces of a silicon nitride substrate by screen printing so that the dry thickness of each surface is about 10 μm.

[0159] Then, the copper plates were overlapped on both sides of the silicon nitride substrate at 1.0×10 -3The copper plate and the silicon nitride substrate are heated at 780°C for 30 minutes in a vacuum below Pa to bond the copper plate to the silicon nitride substrate via solder. Thus, a silicon nitride-copper composite formed by bonding the silicon nitride substrate to the copper plate via solder is obtained. In addition, an anti-corrosion resist is printed on the copper layer of the obtained silicon nitride-copper composite, and a circuit pattern is formed by etching with a ferric chloride solution to obtain a silicon nitride circuit substrate.

[0160] <Method for manufacturing electronic component module>

[0161] An IGBT element as an electronic component is soldered to the circuit pattern of the obtained silicon nitride circuit board. It should be noted that Sn-Ag-Cu is used as the solder material. Next, the sealing resin portion is formed by transfer molding and the sealing resin portion is cured.

[0162] <Evaluation Method>

[0163] (1) Linear expansion coefficient of copper plate and silicon nitride substrate (α B )

[0164] Based on JIS R 1618, the linear expansion coefficient (linear expansion coefficient) of each copper plate and each silicon nitride substrate at 25° C. to 400° C. was measured using a thermomechanical analyzer (TMA).

[0165] (2) Young's modulus of silicon nitride substrate (E B )

[0166] The measurement was performed by a static bending method based on JIS R 1602. The test piece had a shape of 3 mm×4 mm×40 mm.

[0167] <Evaluation method of average crystal grain size of copper>

[0168] The average crystal grain size of copper in the first copper layer and the second copper layer in the silicon nitride circuit board was determined by the following method and was in the range of 50 μm or more and 500 μm or less.

[0169] First, a "cross section" for measurement is obtained by the following steps.

[0170] (1) The ceramic circuit substrate obtained in each of the examples and comparative examples was cut at a cross section perpendicular to the main surface and passing through the center of gravity of the substrate. The cutting was performed using a profiling machine.

[0171] (2) The cut silicon nitride circuit substrate is embedded with resin to prepare a resin embedded body.

[0172] (3) The cross section of the composite body in the resin-embedded body is polished using diamond abrasive grains.

[0173] The cross section of the polished silicon nitride circuit substrate was measured by electron backscatter diffraction.

[0174] Specifically, first, near the approximate center of the first copper layer or the second copper layer after the above-mentioned grinding, under the condition of accelerating voltage 15kV, analysis based on electron backscatter diffraction (EBSD) method is carried out in 50 times the observation field of view to obtain data. In the EBSD method, a SU6600 field emission scanning microscope made by Hitachi High-Technologies Corporation and an analytical device made by TSL Solutions Co., Ltd. are used.

[0175] The measured data were visualized to create a crystal orientation map using software OIM Data Analysis 7.3.0 manufactured by TSL Solutions Co., Ltd. The crystal orientation map was analyzed using image processing software to determine the average crystal grain size of copper crystals in the copper layer.

[0176] In the above, as the image processing software, Image-Pro PlusShape Stack version 6.3 manufactured by Media Cybernetics was used. It should be noted that the average crystal grain size was calculated using the intercept method, where 10 or more straight lines of a specified length were drawn in parallel on one observation image, and the average value of the straight line lengths of the portions where the above straight lines cross-cut the copper crystal particles was obtained as the average crystal grain size of the copper crystal (these are values ​​calculated by automatic processing by the software).

[0177] <Thermal cycle test and reliability evaluation>

[0178] First, an electronic component module as a test object at room temperature (20° C. as an example) is moved into an environment at 150° C. and maintained in the environment at 150° C. for 15 minutes (first step).

[0179] Next, the bonded substrate was moved from the 150° C. environment to the −55° C. environment, and was kept in the −55° C. environment for 15 minutes (second step).

[0180] Then, the first step and the second step were repeated alternately 2000 times.

[0181] Next, ultrasonic flaw detection was performed to observe whether or not there was separation between the brazing material layer 13 and the first copper layer 30. The evaluation criteria are shown below.

[0182] ◎: No peeling occurs.

[0183] ○: Peeling slightly occurred.

[0184] Specifically, with Experimental Example 5 in which peeling occurred as a reference, cases in which peeling was observed but to the same extent as in Experimental Example 5, or in which peeling was observed to be less severe than in Experimental Example 5 were marked as △.

[0185] ×: Peeling occurred in a large amount.

[0186] Specifically, the case where the peeling was observed in Experimental Example 5 was used as a reference, and the case where the peeling was observed and the peeling was greater than that in Experimental Example 5 was rated as ×.

[0187] The evaluation results and the like are summarized in Table 1.

[0188] [Table 1]

[0189] It can be seen from Examples 1 to 8 and Comparative Examples 1 to 4 that a highly reliable electronic component module can be stably obtained by keeping S1 and S2 within the specified range. From the above, it can be understood that in order to stably obtain a highly reliable electronic component module, it is important to control S1 and S2 within the specified range of the present invention.

[0190] This application claims priority based on Japanese Patent Application No. 2019-085446, filed on April 26, 2019, the disclosure of which is incorporated herein in its entirety.

[0191] Description of Reference Numerals

[0192] 10 Silicon Nitride Substrate

[0193] 12 Solder layer

[0194] 13 Brazing material layer

[0195] 20 Second copper layer

[0196] 21 Bonding material layer

[0197] 22 Lower surface of the second copper layer

[0198] 30 First copper layer

[0199] 31 Solder layer

[0200] 40 Electronic components

[0201] 50 Sealing resin part

[0202] 51 Sealing resin portion bottom surface

[0203] 60 Radiator

[0204] 70 External connection terminals

[0205] 71 Wire Bonding Wire

[0206] 100 Silicon Nitride Circuit Substrate

[0207] 200 Electronics Modules

Claims

1. An electronic component module comprising: Silicon nitride circuit substrate; an electronic component mounted on the silicon nitride circuit substrate; and a sealing resin portion that seals all or part of the silicon nitride circuit substrate and the electronic component, The silicon nitride circuit substrate comprises: Silicon nitride substrate; a first copper layer disposed on one side of the silicon nitride substrate; and A second copper layer is disposed on the other side of the silicon nitride substrate. The surface of the second copper layer opposite to the surface on which the silicon nitride substrate is provided is bonded to the heat sink directly or via a bonding material layer. When the linear expansion coefficient of the heat sink is set to α H ( / ℃), the Young's modulus of the heat sink is set to E H (GPa), the linear expansion coefficient of the sealing resin portion is α R ( / °C), the Young's modulus of the sealing resin portion is defined as E R (GPa), S1 calculated by the following formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less, S2 calculated by the following formula (2) is -0.028 (GPa) or more and 0.019 (GPa) or less, Equation (1): S1=(α BC -a H )×E H ×(290-25) in, α BC is an approximate value of the linear expansion coefficient of the composite laminate of the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is set to α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α BC Calculated by the following formula (3), Equation (3): α BC = ((α B × E B × T B ) + (α C × E C × T C )) / ((E B × T B ) + (E C × T C )) Equation (2): S2 = (α ABC - α R ) × E R × (290 - 25) Among them, α ABC is an approximate value of the linear expansion coefficient of the composite laminate of the first copper layer, the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the first copper layer is set to α A ( / °C), the Young's modulus of the first copper layer is set to E A (GPa), the thickness of the first copper layer is set to T A (mm), the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is set to α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α ABC Calculated by the following formula (4), formula(4): a ABC =((a A ×E A ×T A )+(a B ×E B ×T B )+(a C ×E C ×T C )) / ((E A ×T A )+(E B ×T B )+(E C ×T C ))。 2. The electronic component module according to claim 1, wherein: The second copper layer has an uncovered region that is not covered with the sealing resin portion on a surface opposite to a surface on which the silicon nitride substrate is provided.

3. The electronic component module according to claim 1 or 2, wherein: The linear expansion coefficient of the sealing resin portion is 5×10 -6 / ℃ and above 30×10 -6 / ℃ below.

4. The electronic component module according to claim 1 or 2, wherein: The Young's modulus of the sealing resin portion is 50 GPa or more and 80 GPa or less.

5. The electronic component module according to claim 1 or 2, wherein: The linear expansion coefficient of the heat sink is 20×10 -6 / ℃ and above 30×10 -6 / ℃ below.

6. The electronic component module according to claim 1 or 2, wherein: The Young's modulus of the heat sink is greater than or equal to 40 GPa and less than or equal to 110 GPa.

7. The electronic component module according to claim 1 or 2, wherein: The first copper layer is a copper layer formed into a circuit pattern.

8. The electronic component module according to claim 1 or 2, wherein: The thickness of the first copper layer is greater than or equal to 0.15 mm and less than or equal to 0.80 mm.

9. The electronic component module according to claim 1 or 2, wherein: An average crystal grain size of copper crystals in the first copper layer is 50 μm or more and 500 μm or less.

10. The electronic component module according to claim 1 or 2, wherein: The second copper layer is a heat sink bonding copper layer.

11. The electronic component module according to claim 1 or 2, wherein: The second copper layer has a thickness of 0.15 mm or more and 0.80 mm or less.

12. The electronic component module according to claim 1 or 2, wherein: An average crystal grain size of copper crystals in the second copper layer is 50 μm or more and 500 μm or less.

13. The electronic component module according to claim 1 or 2, wherein: The Young's modulus E of the silicon nitride substrate B It is 250 GPa or more and 320 GPa or less.

14. The electronic component module according to claim 1 or 2, wherein: The linear expansion coefficient α of the silicon nitride substrate B 1.5×10 -6 / ℃ and above 4.0×10 -6 / ℃ below.

15. The electronic component module according to claim 1 or 2, wherein: A surface of the second copper layer opposite to a surface on which the silicon nitride substrate is provided protrudes further than the sealing resin portion in a direction away from the silicon nitride substrate.

16. A silicon nitride circuit substrate comprising: Silicon nitride substrate; a first copper layer disposed on one side of the silicon nitride substrate; and A second copper layer is disposed on the other side of the silicon nitride substrate. The silicon nitride circuit substrate is used in the following form: All or part of it is sealed by a sealing resin portion, and The surface of the second copper layer opposite to the surface on which the silicon nitride substrate is provided is bonded to the heat sink directly or through a bonding material layer. When the linear expansion coefficient of the heat sink is set to α H ( / ℃), the Young's modulus of the heat sink is set to E H (GPa), the linear expansion coefficient of the sealing resin portion is α R ( / °C), the Young's modulus of the sealing resin portion is defined as E R (GPa), S1 calculated by the following formula (1) is -0.38 (GPa) or more and -0.23 (GPa) or less, S2 calculated by the following formula (2) is -0.028 (GPa) or more and 0.019 (GPa) or less, Equation (1): S1=(α BC -a H )×E H ×(290-25) in, α BC is an approximate value of the linear expansion coefficient of the composite laminate of the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is set to α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α BC Calculated by the following formula (3), Equation (3): α BC = ((α B × E B × T B ) + (α C × E C × T C )) / ((E B × T B ) + (E C × T C )) Equation (2): S2 = (α ABC - α R ) × E R × (290 - 25), Among them, α ABC is an approximate value of the linear expansion coefficient of the composite laminate of the first copper layer, the silicon nitride substrate and the second copper layer. When the linear expansion coefficient of the first copper layer is set to α A ( / °C), the Young's modulus of the first copper layer is set to E A (GPa), the thickness of the first copper layer is set to T A (mm), the linear expansion coefficient of the silicon nitride substrate is set to α B ( / °C), the Young's modulus of the silicon nitride substrate is set to E B (GPa), the thickness of the silicon nitride substrate is set to T B (mm), the linear expansion coefficient of the second copper layer is set to α C ( / °C), the Young's modulus of the second copper layer is set to E C (GPa), the thickness of the second copper layer is set to T C (mm), α ABC Calculated by the following formula (4), formula(4): a ABC =((a A ×E A ×T A )+(a B ×E B ×T B )+(a C ×E C ×T C )) / ((E A ×T A )+(E B ×T B )+(E C ×T C ))。

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