Time-of-flight sensor pixel circuit, structure and time-of-flight sensor

Abstract

A time-of-flight sensor pixel circuit, structure and time-of-flight sensor, which receive modulated light waves through photoelectric conversion elements to generate charges; a first charge storage transfer circuit to a fourth charge storage transfer circuit respectively modulate charges corresponding to four phases of the modulated light waves according to four charge modulation signals to generate four integrated charge signals, and output the four integrated charge signals according to four control selection signals; a charge readout circuit outputs a first photoelectric signal to a fourth photoelectric signal according to the first integrated charge signal to the fourth integrated charge signal; therefore, a single tap design method is adopted to reduce fixed noise and reduce the number of transistors required, which is conducive to the miniaturization of the time-of-flight sensor.

Description

Technical Field

[0001] The present application belongs to the field of sensors, and in particular, relates to a time-of-flight sensor pixel circuit, structure and a time-of-flight sensor. Background Art

[0002] The time-of-flight sensor is an important part of a distance measurement device that can capture the three-dimensional (3D) distance information of a target object and obtain a 3D image. It is widely used in the fields of behavior analysis, monitoring, autonomous driving, artificial intelligence, machine vision perception, and image 3D enhancement. With the continuous advancement of semiconductor manufacturing technology, time-of-flight sensors are developing in the direction of low power consumption, high integration, and smaller size. In many application fields, sensor chips used to collect 3D data are becoming increasingly miniaturized.

[0003] The time-of-flight sensor uses the time-of-flight method to measure the travel time of the light pulse from the light source to the target object after reflection and then to the sensor receiving end, thereby determining the distance information of the target object. The time-of-flight sensor can obtain the travel time of light by direct methods or indirect methods. The indirect method refers to recording the phase difference of the light pulse from the emission to the reception time period, and then calculating the travel time of light.

[0004] A time-of-flight sensor generally includes a light source transmitting module and a light source sensing module. The light source transmitting module is used to transmit a sine wave or a pulse square wave of a specific frequency; the light source sensing module records the phase difference between the light emission and light reception time periods, and then calculates the distance information of the measured object.

[0005] The light source sensing module generally includes a photosensitive pixel module and a photoelectric signal processing system module. The photosensitive pixel uses an indirect method to obtain time data, which requires collecting four phase signals of the sinusoidal continuous light wave: 0 degrees, 90 degrees, 180 degrees and 270 degrees, and then inferring the time information.

[0006] In the prior art, photosensitive pixels generally adopt a two-tap, three-tap or four-tap design structure, in which one charge readout circuit corresponds to one tap. Each tap can only collect one of the four phase signals at the same time. The more taps there are in a pixel, the more transistors are required, which brings difficulties to the miniaturization of time-of-flight sensors. In the process of manufacturing time-of-flight sensors, factors such as manufacturing process fluctuations will cause fluctuations in the operating characteristic parameters of transistors between different taps, thereby causing fixed noise in the signal. Summary of the invention

[0007] The purpose of the present application is to provide a time-of-flight sensor pixel circuit, structure and time-of-flight sensor, aiming to solve the defects of traditional time-of-flight sensors that are difficult to miniaturize and have large fixed noise in the signal.

[0008] An embodiment of the present application provides a time-of-flight sensor pixel circuit, including:

[0009] A photoelectric conversion element is configured to receive a modulated light wave to generate an electric charge; the modulated light wave is sent by a light source transmitting circuit and reflected by a target object to the photoelectric conversion element;

[0010] a first charge storage transfer circuit connected to the photoelectric conversion element, configured to modulate the charge corresponding to the first phase of the modulated light wave according to a first charge modulation signal to generate a first integrated charge signal, and output the first integrated charge signal according to a first control selection signal;

[0011] a second charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the second phase of the modulated light wave according to a second charge modulation signal to generate a second integrated charge signal, and output the second integrated charge signal according to a second control selection signal;

[0012] a third charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the third phase of the modulated light wave according to a third charge modulation signal to generate a third integrated charge signal, and output the third integrated charge signal according to a third control selection signal;

[0013] a fourth charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the fourth phase of the modulated light wave according to a fourth charge modulation signal to generate a fourth integrated charge signal, and output the fourth integrated charge signal according to a fourth control selection signal;

[0014] a charge readout circuit connected to an output terminal of the first charge storage transfer circuit, an output terminal of the second charge storage transfer circuit, an output terminal of the third charge storage transfer circuit, and an output terminal of the fourth charge storage transfer circuit, and configured to output a first photoelectric signal according to the first integrated charge signal to obtain a first calculation signal, output a second photoelectric signal according to the second integrated charge signal to obtain a second calculation signal, output a third photoelectric signal according to the third integrated charge signal to obtain a third calculation signal, and output a fourth photoelectric signal according to the fourth integrated charge signal to obtain a fourth calculation signal;

[0015] Wherein, the flight time is acquired based on the first calculation signal, the second calculation signal, the third calculation signal and the fourth calculation signal corresponding to each pixel unit.

[0016] The embodiment of the present application also provides a structure of the above-mentioned time-of-flight sensor pixel circuit,

[0017] When the pixel circuit includes at least one of the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor, the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor each include a transistor modulation channel structure;

[0018] The transistor modulation channel structure includes a first ion doping type channel region, a second ion doping type channel region and a second ion doping type extended channel region in sequence, wherein the gate of each charge modulation transistor correspondingly covers the first ion doping type channel region and the second ion doping type channel region and exposes the second ion doping type extended channel region, and the first ion doping type channel region corresponds to the charge input end, and the second ion doping type extended channel region corresponds to the integrated charge signal output end.

[0019] An embodiment of the present application further provides a time-of-flight sensor, the time-of-flight sensor comprising the above-mentioned time-of-flight sensor pixel circuit; and / or the time-of-flight sensor comprising the structure of the above-mentioned time-of-flight sensor pixel circuit.

[0020] The embodiment of the present application also provides an operating method of the structure of the above-mentioned time-of-flight sensor pixel circuit, and the operating method comprises the following steps:

[0021] Corresponding to the four phases of the modulated light wave, four charge modulation signals are input respectively, so that four charge storage transfer circuits modulate the charges corresponding to the four phases of the modulated light wave according to the four charge modulation signals respectively to generate four integrated charge signals;

[0022] After repeating at least one cycle, proceed to the next step;

[0023] The integrated charge signals of the four charge storage transfer circuits are outputted in sequence, and four photoelectric signals are outputted according to the integrated charge signals of the four charge storage transfer circuits.

[0024] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: since the charge readout circuit outputs a first photoelectric signal according to a first integrated charge signal to obtain a first calculation signal, outputs a second photoelectric signal according to a second integrated charge signal to obtain a second calculation signal, outputs a third photoelectric signal according to a third integrated charge signal to obtain a third calculation signal, and outputs a fourth photoelectric signal according to a fourth integrated charge signal to obtain a fourth calculation signal; therefore, the single tap design adopted reduces fixed noise and reduces the number of transistors required, which is conducive to the miniaturization of the time-of-flight sensor; and the charge modulation transistor includes a transistor modulation channel structure, the transistor modulation channel structure includes a first ion doping type channel region, a second ion doping type channel region and a second ion doping type extended channel region, wherein the gate of each charge modulation transistor covers the first ion doping type channel region and the second ion doping type channel region and exposes the second ion doping type extended channel region, and the first ion doping type channel region corresponds to the charge input terminal, and the second ion doping type extended channel region corresponds to the integrated charge signal output terminal; therefore, the charge modulation transistor has the dual functions of switching charge storage, which reduces the number of transistors and is conducive to the miniaturization of the time-of-flight sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical invention in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of a structure of a time-of-flight sensor pixel circuit provided by an embodiment of the present application;

[0027] Figure 2 Another structural schematic diagram of a time-of-flight sensor pixel circuit provided by an embodiment of the present application;

[0028] Figure 3 An example circuit diagram of a time-of-flight sensor pixel circuit provided in an embodiment of the present application;

[0029] Figure 4 An example diagram of a layout of a time-of-flight sensor pixel circuit provided in an embodiment of the present application;

[0030] Figure 5 for Figure 4 A potential well schematic diagram of the time-of-flight sensor pixel circuit when the charge collection operation is suspended;

[0031] Figure 6 for Figure 4Schematic diagram of the potential well of the time-of-flight sensor pixel circuit during charge collection operation

[0032] Figure 7 for Figure 4 Schematic diagram of the potential well of the time-of-flight sensor pixel circuit during the photoelectric signal reading operation. DETAILED DESCRIPTION

[0033] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0035] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0037] Figure 1 The schematic diagram of the structure of the pixel unit in the time-of-flight sensor pixel circuit provided by the preferred embodiment of the present application is shown. For the convenience of explanation, only the part related to the present embodiment is shown, which is described in detail as follows:

[0038] The above-mentioned time-of-flight sensor pixel circuit includes a photoelectric conversion element 11, a first charge storage transfer circuit 12, a second charge storage transfer circuit 13, a third charge storage transfer circuit 14, a fourth charge storage transfer circuit 15 and.

[0039] The photoelectric conversion element 11 is configured to receive the modulated light wave to generate electric charge; the modulated light wave is sent by the light source transmitting circuit and reflected by the target object to the photoelectric conversion element 11;

[0040] The first charge storage transfer circuit 12 is connected to the photoelectric conversion element 11 and is configured to modulate the charge corresponding to the first phase of the modulated light wave according to the first charge modulation signal to generate a first integrated charge signal, and output the first integrated charge signal according to the first control selection signal;

[0041] The second charge storage transfer circuit 13 is connected to the photoelectric conversion element 11 and is configured to modulate the charge corresponding to the second phase of the modulated light wave according to the second charge modulation signal to generate a second integrated charge signal, and output the second integrated charge signal according to the second control selection signal;

[0042] The third charge storage transfer circuit 14 is connected to the photoelectric conversion element 11 and is configured to modulate the charge corresponding to the third phase of the modulated light wave according to the third charge modulation signal to generate a third integrated charge signal, and output the third integrated charge signal according to the third control selection signal;

[0043] a fourth charge storage transfer circuit 15, connected to the photoelectric conversion element 11, configured to modulate the charge corresponding to the fourth phase of the modulated light wave according to the fourth charge modulation signal to generate a fourth integrated charge signal, and output the fourth integrated charge signal according to the fourth control selection signal;

[0044] The charge readout circuit 16 is connected to the output end of the first charge storage transfer circuit 12, the output end of the second charge storage transfer circuit 13, the output end of the third charge storage transfer circuit 14 and the output end of the fourth charge storage transfer circuit 15, and is configured to output a first photoelectric signal according to the first integrated charge signal to obtain a first calculation signal, output a second photoelectric signal according to the second integrated charge signal to obtain a second calculation signal, output a third photoelectric signal according to the third integrated charge signal to obtain a third calculation signal, and output a fourth photoelectric signal according to the fourth integrated charge signal to obtain a fourth calculation signal.

[0045] The flight time is acquired based on the first calculation signal, the second calculation signal, the third calculation signal and the fourth calculation signal corresponding to each pixel unit.

[0046] It is worth emphasizing that, in one implementation, the first calculation signal, the second calculation signal, the third calculation signal and the fourth calculation signal are acquired based on a pixel-frame operation.

[0047] The first phase, the second phase, the third phase and the fourth phase are respectively one of 0 degrees, 90 degrees, 180 degrees and 270 degrees; the modulated light source period is composed of four period intervals, and each period interval corresponds one-to-one to the first phase, the second phase, the third phase and the fourth phase to obtain the charge corresponding to each phase.

[0048] The modulated light source period is composed of four period intervals, and each period interval corresponds to the first phase, the second phase, the third phase and the fourth phase one by one to obtain the charge corresponding to each phase. Among them, the sizes of the four period intervals can be the same, and the first phase, the second phase, the third phase and the fourth phase are respectively located at the middle values ​​of the four period intervals. For example, the first phase, the second phase, the third phase and the fourth phase are 0 degrees, 90 degrees, 180 degrees and 270 degrees respectively, and the four period intervals are (-45 degrees, 45 degrees), (45 degrees, 135 degrees), (135 degrees, 225 degrees), (225 degrees, 315 degrees).

[0049] It is worth noting that the first phase, the second phase, the third phase and the fourth phase can be arranged in sequence, and the phase difference between every two adjacent phases in the first phase, the second phase, the third phase and the fourth phase is 90 degrees.

[0050] By making the phase difference between every two adjacent phases in the first phase, the second phase, the third phase and the fourth phase 90 degrees, photoelectric signals of four phases with a phase difference of 90 degrees can be obtained, which facilitates the calculation of time information and thus improves the calculation efficiency of time information.

[0051] The input end of the first charge storage transfer circuit 12, the input end of the second charge storage transfer circuit 13, the input end of the third charge storage transfer circuit 14 and the input end of the fourth charge storage transfer circuit 15 are connected to the same end of the photoelectric conversion element 11. For example, it can be the cathode of the photodiode.

[0052] like Figure 2 As shown, the time-of-flight sensor pixel circuit further includes an anti-charge crosstalk circuit 17 .

[0053] The anti-blooming circuit 18 is connected to the photoelectric conversion element 11, the first charge storage transfer circuit 12, the second charge storage transfer circuit 13, the third charge storage transfer circuit 14 and the fourth charge storage transfer circuit 15. The anti-blooming circuit 17 is at least configured to clear the charge in the photoelectric conversion element 11 according to the anti-blooming control signal.

[0054] The anti-charge crosstalk circuit 17 allows the charge in the photoelectric conversion element 11 to be cleared each time the time information is measured, thereby improving the accuracy of obtaining the time information.

[0055] In a specific implementation, the anti-charge crosstalk control signal, the first charge modulation signal, the second charge modulation signal, the third charge modulation signal, the fourth charge modulation signal, the first control selection signal, the second control selection signal, the third control selection signal and the fourth control selection signal can be output by the control logic.

[0056] An embodiment of the present invention further provides an operating method of the structure of the above-mentioned time-of-flight sensor pixel circuit, characterized in that the control method includes step 101 and step 102 .

[0057] Step 101: corresponding to the four phases of the modulated light wave, four charge modulation signals are input respectively, so that four charge storage transfer circuits modulate the charges corresponding to the four phases of the modulated light wave according to the four charge modulation signals respectively to generate four integrated charge signals;

[0058] After step 101 is repeated for at least one cycle, step 102 is executed.

[0059] Step 102: outputting the integrated charge signals of the four charge storage transfer circuits in sequence, and outputting four photoelectric signals according to the integrated charge signals of the four charge storage transfer circuits.

[0060] In a specific implementation, in one example, when the pixel circuit includes at least one of the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor, step 101 includes steps 1011 to 1014.

[0061] Step 1011: corresponding to the first phase of the modulated light wave, a first charge modulation signal is input to the gate of the first charge modulation transistor, and the first charge storage transfer circuit 12 modulates the charge generated by the first phase of the modulated light wave according to the first charge modulation signal to generate a first integrated voltage.

[0062] Step 1012: Corresponding to the second phase of the modulated light wave, a second charge modulation signal is input to the gate of the second charge modulation transistor, and the second charge storage transfer circuit 13 modulates the charge generated by the second phase of the modulated light wave according to the second charge modulation signal to generate a second integrated charge signal.

[0063] Step 1013: Corresponding to the third phase of the modulated light wave, a third charge modulation signal is input to the gate of the third charge modulation transistor, and the third charge storage transfer circuit 14 modulates the charge generated by the third phase of the modulated light wave according to the third charge modulation signal to generate a third integrated charge signal.

[0064] Step 1014: Corresponding to the fourth phase of the modulated light wave, a fourth charge modulation signal is input to the gate of the fourth charge modulation transistor, and the fourth charge storage transfer circuit 15 modulates the charge generated by the fourth phase of the modulated light wave according to the fourth charge modulation signal to generate a fourth integrated charge signal.

[0065] In a specific implementation, in one example, when the pixel circuit includes at least one of the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor, step 102 includes steps 1021 to 1024.

[0066] Step 1021: A first control selection signal is input to the gate of the corresponding first charge modulation transistor, and the first charge storage transfer circuit 12 outputs a first integrated charge signal according to the first control selection signal; the first charge readout circuit 16 outputs a first photoelectric signal according to the first integrated charge signal.

[0067] Step 1022: A second control selection signal is input to the gate of the corresponding second charge modulation transistor, and the second charge storage transfer circuit 13 outputs a second integrated charge signal according to the second control selection signal; the second charge readout circuit 16 outputs a second photoelectric signal according to the second integrated charge signal.

[0068] Step 1023: A third control selection signal is input to the gate of the corresponding third charge modulation transistor, and the third charge storage transfer circuit 14 outputs the first integrated charge signal according to the third control selection signal; the third charge readout circuit 16 outputs a third photoelectric signal according to the third integrated charge signal.

[0069] Step 1024: a fourth control selection signal is input to the gate of the corresponding fourth charge modulation transistor, and the fourth charge storage transfer circuit 15 outputs a fourth integrated charge signal according to the fourth control selection signal; and the fourth charge readout circuit 16 outputs a fourth photoelectric signal according to the fourth integrated charge signal.

[0070] As an example but not limitation, step 1021 - 1 is included between step 101 and step 1021 , step 1022 - 1 is included between step 1021 and step 1022 , step 1023 - 1 is included between step 1022 and step 1023 , and step 1024 - 1 is included between step 1023 and step 1024 .

[0071] Step 1021 - 1 : A first reset control signal is input, and the first charge readout circuit 16 outputs a first reset signal according to the first reset control signal, so as to obtain a first calculation signal based on the first reset signal and the first photoelectric signal.

[0072] Step 1022 - 1 : Input a second reset control signal, and the second charge readout circuit 16 outputs a second reset signal according to the second reset control signal to obtain a second calculation signal based on the second reset signal and the second photoelectric signal.

[0073] Step 1023 - 1 : Input a third reset control signal, and the third charge readout circuit 16 outputs a third reset signal according to the third reset control signal, so as to obtain a third calculation signal based on the third reset signal and the third photoelectric signal.

[0074] Step 1024 - 1 : Input a fourth reset control signal, and the fourth charge readout circuit 16 outputs a fourth reset signal according to the fourth reset control signal to obtain a fourth calculation signal based on the fourth reset signal and the fourth photoelectric signal.

[0075] As an example but not a limitation, step 100 is included before step 101. Step 101-2 is included between step 101 and step 102.

[0076] Step 100: before starting exposure, an anti-charge crosstalk control signal is input, and the anti-charge crosstalk circuit 17 clears the charge in the photoelectric conversion element 11 according to the anti-charge crosstalk control signal; the anti-charge crosstalk control signal is stopped, and exposure starts.

[0077] Step 101 - 2 : stop exposure, input an anti-charge crosstalk control signal, and the anti-charge crosstalk circuit 17 clears the charges in the photoelectric conversion element 11 according to the anti-charge crosstalk control signal.

[0078] By clearing the charge in the photoelectric conversion element 11 before exposure and after stopping exposure, the accuracy of obtaining time information is improved.

[0079] In a specific implementation, a first reset control signal, a second reset control signal, a third reset control signal, a fourth reset control signal, an anti-charge crosstalk control signal, a first charge modulation signal, a second charge modulation signal, a third charge modulation signal, a fourth charge modulation signal, a first control selection signal, a second control selection signal, a third control selection signal and a fourth control selection signal can be output by the control logic.

[0080] Figure 3 An exemplary circuit structure of a time-of-flight sensor pixel circuit provided by an embodiment of the present invention is shown. For the sake of convenience, only the part related to the embodiment of the present invention is shown, which is described in detail as follows:

[0081] The first charge storage transfer circuit 12 includes a first charge modulation transistor 102;

[0082] The source of the first charge modulation transistor 102 is connected to the charge input terminal of the first charge storage transfer circuit 12, and the drain of the first charge modulation transistor 102 is connected to the first integrated charge signal output terminal of the first charge storage transfer circuit 12;

[0083] The gate of the first charge modulation transistor 102 is connected to the first signal control line to serve as an input terminal of the first charge pause collection signal, the first charge modulation signal and the first control selection signal;

[0084] and / or;

[0085] The second charge storage transfer circuit 13 includes a second charge modulation transistor 103;

[0086] The source of the second charge modulation transistor 103 is connected to the charge input terminal of the second charge storage transfer circuit 13, and the drain of the second charge modulation transistor 103 is connected to the second integrated charge signal output terminal of the second charge storage transfer circuit 13;

[0087] The gate of the second charge modulation transistor 103 is connected to the second signal control line to serve as an input terminal of the second charge pause collection signal, the second charge modulation signal and the second control selection signal;

[0088] and / or;

[0089] The third charge storage transfer circuit 14 includes a third charge modulation transistor 104;

[0090] The source of the third charge modulation transistor 104 is connected to the charge input terminal of the third charge storage transfer circuit 14, and the drain of the third charge modulation transistor 104 is connected to the third integrated charge signal output terminal of the third charge storage transfer circuit 14;

[0091] The gate of the third charge modulation transistor 104 is connected to the third signal control line to serve as the input terminal of the third charge pause collection signal, the third charge modulation signal and the third control selection signal;

[0092] and / or;

[0093] The fourth charge storage transfer circuit 15 includes a fourth charge modulation transistor 105;

[0094] The source of the fourth charge modulation transistor 105 is connected to the charge input terminal of the fourth charge storage transfer circuit 15, and the drain of the fourth charge modulation transistor 105 is connected to the fourth integrated charge signal output terminal of the fourth charge storage transfer circuit 15;

[0095] The gate of the fourth charge modulation transistor 105 is connected to the fourth signal control line to serve as the input terminal of the fourth charge pause collection signal, the fourth charge modulation signal and the fourth control selection signal.

[0096] The charge modulation transistor has the dual functions of switching and charge storage, which reduces the number of transistors and is conducive to the miniaturization of time-of-flight sensors.

[0097] The charge readout circuit 16 includes a reset transistor 106 , a source follower transistor 107 , and a pixel selection transistor 108 .

[0098] The drain of the reset transistor 106 is connected to a first power supply, and the drain of the source follower transistor 107 is connected to a second power supply, the first power supply and the second power supply are the same or different, the source of the reset transistor 106 and the gate of the source follower transistor 107 are commonly connected to the floating diffusion active area to serve as an integrated charge signal input terminal, the source of the source follower transistor 107 is connected to the drain of the pixel selection transistor 108, and the source of the pixel selection transistor 108 is connected to the photoelectric signal output terminal.

[0099] The gate of the reset transistor 106 is connected to the reset control line to serve as the first reset control signal input terminal of the charge readout circuit 16, the second reset control signal input terminal of the charge readout circuit 16, the third reset control signal input terminal of the charge readout circuit 16 and the fourth reset control signal input terminal of the charge readout circuit 16.

[0100] The charge crosstalk protection circuit 17 includes a charge crosstalk protection transistor 109 .

[0101] The source of the anti-charge crosstalk transistor 109 is connected to the output end of the photoelectric conversion element 11 , the drain of the anti-charge crosstalk transistor 109 is connected to the control power supply, and the gate of the anti-charge crosstalk transistor 109 is connected to the anti-charge crosstalk control signal.

[0102] The photoelectric conversion element 101 includes but is not limited to a pinned photodiode, a polysilicon gate photodiode, and a current assist photodiode.

[0103] Figure 4 An example structure of a time-of-flight sensor pixel circuit provided by an embodiment of the present invention is shown. For the sake of convenience, only the part related to the embodiment of the present invention is shown, which is described in detail as follows:

[0104] When the pixel circuit includes at least one of a first charge modulation transistor, a second charge modulation transistor, a third charge modulation transistor and a fourth charge modulation transistor, the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor and the fourth charge modulation transistor all include a transistor modulation channel structure; the transistor modulation channel structure sequentially includes a first ion doping type channel region 202, a second ion doping type channel region 203a and a second ion doping type extended channel region 203b, wherein the gate 201 of each charge modulation transistor correspondingly covers the first ion doping type channel region 202 and the second ion doping type channel region 203a and exposes the second ion doping type extended channel region 203b, and the first ion doping type channel region 202 corresponds to the charge input terminal, and the second ion doping type extended channel region 203b corresponds to the integrated charge signal output terminal.

[0105] It is worth noting that the structure of the pixel circuit includes a first ion-doped type epitaxial layer P-epi and a first ion-doped type well region 205, wherein the photoelectric conversion element 101, the first ion-doped type channel region 202 and the first ion-doped type well region 205 are located in the first ion-doped type epitaxial layer P-epi, and the second ion-doped type channel region 203a and the second ion-doped type extended channel region 203b are located in the first ion-doped type well region 205.

[0106] As an example, the first ion doping type is P type, and the second ion doping type is N type.

[0107] In a specific implementation, the photoelectric conversion element includes an N-type region 206 and a P-type functional layer 207 located above the N-type region, the first ion-doped type channel region 202 is connected to the P-type functional layer 207, and the second ion-doped type extended channel region 203b is connected to the floating diffusion active region 204; the floating diffusion active region 204 is located in the P-type well (first ion-doped type well region 205).

[0108] Combine the following Figure 4 Explain how the time-of-flight sensor pixel circuit works:

[0109] The photoelectric signal collection process of the time-of-flight sensor pixel circuit of the present invention has three operations: pausing charge collection operation, collecting charge operation and photoelectric signal reading operation. The specific operations are described as follows:

[0110] The process of the time-of-flight sensor pixel circuit suspending the charge collection operation is described as follows: Figure 5 Shown Figure 4 Schematic diagram of the potential well of the time-of-flight sensor pixel circuit when the charge collection operation is suspended. Figure 4In the embodiment, the gate terminal SG1 of the first charge modulation transistor 102, the gate terminal SG2 of the second charge modulation transistor 103, the gate terminal SG3 of the third charge modulation transistor 104 or the gate terminal SG4 of the fourth charge modulation transistor 105 is configured as a low voltage (the voltage value is greater than 0V and less than or equal to Vdd / 2, where Vdd is the voltage of the first power supply), the downward direction of the potential axis is the high potential direction, 0V is the potential of the first ion doping type epitaxial layer P-epi (connected to the power ground), V1a is the highest potential of the first ion doping type channel region 202, Vpin is the fully depleted potential of the N-type region 206 of the photoelectric conversion element 101, V3 is the fully depleted potential of the second ion doping type extended channel region 203b, 203a is used as a photoelectric charge storage region, V2a is the highest potential of the second ion doping type channel region 203a, and Vrst is the reset potential of the floating diffusion active region FD (N+ region). The relationship between the above potential values ​​is:

[0111] 0V <V1a<Vpin<V3<V2a<Vrst

[0112] Because the highest potential V1a of the first ion doping type channel region 202 is less than Vpin and V2a, the first ion doping type channel region 202 forms a potential barrier between the N-type region 206 of the photoelectric conversion element 101 and the second ion doping type channel region 203a, and the photoelectric charge generated in the N-type region 206 of the photoelectric conversion element 101 will not flow into the second ion doping type channel region 203a; because the potential V3 of the second ion doping type extended channel region 203 is less than V2a and Vrst, a potential barrier is formed between the second ion doping type channel region 203a and the floating diffusion active region FD (N+ region) 204, and the charges in the second ion doping type channel region 203a and the floating diffusion active region FD (N+ region) 204 will not flow to each other. In this state, the charge modulation transistor is in a closed state, which is a process of suspending the operation of collecting charges.

[0113] The charge collection operation process of the time-of-flight sensor pixel circuit is as follows: Figure 6 Shown Figure 4 Schematic diagram of the potential well of the time-of-flight sensor pixel circuit during charge collection operation. Figure 5In the embodiment, the gate terminal SG1 of the first charge modulation transistor 102, the gate terminal SG2 of the second charge modulation transistor 103, the gate terminal SG3 of the third charge modulation transistor 104 or the gate terminal SG4 of the fourth charge modulation transistor 105 is configured as a high voltage (voltage value is greater than Vdd / 2 and less than or equal to Vdd), and the downward direction of the potential axis is the high potential direction; because the gate terminal configuration voltage of the charge modulation transistor is increased, the highest potential of the first ion doping type channel region 202 is increased to V1b, and the second ion doping type channel region 203a is used as a charge storage region, and the highest potential of the second ion doping type channel region 203a is increased to V2b. The relationship between the above potential values ​​is:

[0114] 0V <V1a<Vpin<V3<V1b<V2a<V2b<Vrst

[0115] or

[0116] 0V <V1a<Vpin<V3<V1b<V2a<Vrst<V2b

[0117] Because the highest potential V1b of the first ion doping type channel region 202 is greater than Vpin, no potential barrier is formed between the N-type region 206 of the photoelectric conversion element 101 and the second ion doping type channel region 203a, and the photoelectric charge generated in the N-type region 206 of the photoelectric conversion element 101 will flow into the second ion doping type channel region 203a; because the potential V3 of the second ion doping type extended channel region 203b is less than V2b and Vrst, a potential barrier is formed between the second ion doping type channel region 203a and the floating diffusion active region FD (N+ region) 204, and the charges in the second ion doping type channel region 203a and the floating diffusion active region FD (N+ region) 204 will not flow to each other. In this state, the charge modulation transistor is in the on state, which is the operation process of collecting charges.

[0118] The photoelectric signal reading operation process of the time-of-flight sensor pixel circuit is described as follows: Figure 7 Shown Figure 4 Schematic diagram of the potential well of the time-of-flight sensor pixel circuit during the photoelectric signal reading operation. Figure 7In the embodiment, the gate terminal SG1 of the first charge modulation transistor 102, the gate terminal SG2 of the second charge modulation transistor 103, the gate terminal SG3 of the third charge modulation transistor 104 or the gate terminal SG4 of the fourth charge modulation transistor 105 is configured as a negative voltage (voltage value is less than 0V), and the downward direction of the potential axis is the high potential direction; because the gate terminal of the charge modulation transistor is configured as a negative voltage, the highest potential of the first ion doping type channel region 202 is reduced to V1c, and the second ion doping type channel region 203a is used as a photoelectric charge storage region, and the highest potential of the second ion doping type channel region 203a is reduced to V2b. The relationship between the above potential values ​​is:

[0119] V1c<0V <V1a<V2c<Vpin<V3<V1b<V2a<Vrst

[0120] or

[0121] V1c<0V <V1a<Vpin<V2c<V3<V1b<V2a<Vrst

[0122] Because the highest potential V1c of the first ion doping type channel region 202 is less than Vpin, a potential barrier is formed between the N-type region 206 of the photoelectric conversion element 101 and the second ion doping type channel region 203a, and the charges generated in the N-type region 206 of the photoelectric conversion element 101 will not flow into the second ion doping type channel region 203a; because the potential V3 of the second ion doping type extended channel region 203b is greater than V2c, no potential barrier is formed between the second ion doping type channel region 203a and the floating diffusion active region FD (N+ region) 204, and the charges in the second ion doping type channel region 203a flow into the floating diffusion active region FD (N+ region) 204. Subsequently, the source follower transistor 107 reads the charge signal in the floating diffusion active region FD (N+ region) 204 and outputs the photoelectric signal through the signal output line output. This process is the reading operation process of the photoelectric signal.

[0123] Among them, for Figures 5 to 7 It can be understood that the potentials corresponding to 202 and 203a change by the same magnitude according to the voltage configured at the gate terminal SG1 of the first charge modulation transistor 102, the gate terminal SG2 of the second charge modulation transistor 103, the gate terminal SG3 of the third charge modulation transistor 104 or the gate terminal SG4 of the fourth charge modulation transistor 105.

[0124] An embodiment of the present application further provides a time-of-flight sensor, the time-of-flight sensor comprising the above-mentioned time-of-flight sensor pixel circuit; and / or the time-of-flight sensor comprising the above-mentioned time-of-flight sensor pixel circuit structure.

[0125] The embodiment of the present invention receives modulated light waves through a photoelectric conversion element to generate charges; the first charge storage transfer circuit to the fourth charge storage transfer circuit modulates the charges corresponding to the four phases of the modulated light waves according to the four charge modulation signals to generate four integrated charge signals, and outputs the four integrated charge signals according to the four control selection signals; the charge readout circuit outputs the first photoelectric signal to the fourth photoelectric signal according to the first integrated charge signal to the fourth integrated charge signal; therefore, the single tap design method adopted reduces the fixed noise and reduces the number of transistors required, which is conducive to the miniaturization of the time-of-flight sensor. And the charge modulation transistor includes a transistor modulation channel structure, the transistor modulation channel structure includes a first ion doping type channel region, a second ion doping type channel region and a second ion doping type extended channel region, wherein the gate of each charge modulation transistor covers the first ion doping type channel region and the second ion doping type channel region and exposes the second ion doping type extended channel region, and the first ion doping type channel region corresponds to the charge input end, and the second ion doping type extended channel region corresponds to the integrated charge signal output end; therefore, the charge modulation transistor has the dual functions of switching charge storage, which reduces the number of transistors and is conducive to the miniaturization of the time-of-flight sensor.

[0126] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0127] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A time-of-flight sensor pixel circuit, characterized in that: include: a photoelectric conversion element configured to receive the modulated light wave to generate an electric charge; The modulated light wave is sent by the light source transmitting circuit and reflected by the target object to the photoelectric conversion element; a first charge storage transfer circuit connected to the photoelectric conversion element, configured to modulate the charge corresponding to the first phase of the modulated light wave according to a first charge modulation signal to generate a first integrated charge signal, and output the first integrated charge signal according to a first control selection signal; a second charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the second phase of the modulated light wave according to a second charge modulation signal to generate a second integrated charge signal, and output the second integrated charge signal according to a second control selection signal; a third charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the third phase of the modulated light wave according to a third charge modulation signal to generate a third integrated charge signal, and output the third integrated charge signal according to a third control selection signal; a fourth charge storage transfer circuit, connected to the photoelectric conversion element, configured to modulate the charge corresponding to the fourth phase of the modulated light wave according to a fourth charge modulation signal to generate a fourth integrated charge signal, and output the fourth integrated charge signal according to a fourth control selection signal; a charge readout circuit connected to an output terminal of the first charge storage transfer circuit, an output terminal of the second charge storage transfer circuit, an output terminal of the third charge storage transfer circuit, and an output terminal of the fourth charge storage transfer circuit, and configured to output a first photoelectric signal according to the first integrated charge signal to obtain a first calculation signal, output a second photoelectric signal according to the second integrated charge signal to obtain a second calculation signal, output a third photoelectric signal according to the third integrated charge signal to obtain a third calculation signal, and output a fourth photoelectric signal according to the fourth integrated charge signal to obtain a fourth calculation signal; Wherein, the flight time is acquired based on the first calculation signal, the second calculation signal, the third calculation signal and the fourth calculation signal corresponding to each pixel unit.

2. The time-of-flight sensor pixel circuit according to claim 1, characterized in that: The input end of the first charge storage transfer circuit, the input end of the second charge storage transfer circuit, the input end of the third charge storage transfer circuit and the input end of the fourth charge storage transfer circuit are connected to the same end of the photoelectric conversion element.

3. The time-of-flight sensor pixel circuit according to claim 1, wherein: The first phase, the second phase, the third phase and the fourth phase are respectively one of 0 degrees, 90 degrees, 180 degrees and 270 degrees; the modulated light wave period is composed of four period intervals, and each of the period intervals corresponds one-to-one to the first phase, the second phase, the third phase and the fourth phase to obtain the charge corresponding to each phase.

4. The time-of-flight sensor pixel circuit according to claim 1, wherein: The first charge storage transfer circuit includes a first charge modulation transistor; The source of the first charge modulation transistor is connected to the charge input terminal of the first charge storage transfer circuit, and the drain of the first charge modulation transistor is connected to the first integrated charge signal output terminal of the first charge storage transfer circuit; The gate of the first charge modulation transistor is connected to the first signal control line to serve as an input terminal of the first charge pause collection signal, the first charge modulation signal and the first control selection signal; and / or; The second charge storage transfer circuit includes a second charge modulation transistor; The source of the second charge modulation transistor is connected to the charge input terminal of the second charge storage transfer circuit, and the drain of the second charge modulation transistor is connected to the second integrated charge signal output terminal of the second charge storage transfer circuit; The gate of the second charge modulation transistor is connected to the second signal control line to serve as the input end of the second charge pause collection signal, the second charge modulation signal and the second control selection signal; and / or; The third charge storage transfer circuit includes a third charge modulation transistor; The source of the third charge modulation transistor is connected to the charge input terminal of the third charge storage transfer circuit, and the drain of the third charge modulation transistor is connected to the third integrated charge signal output terminal of the third charge storage transfer circuit; The gate of the third charge modulation transistor is connected to the third signal control line to serve as the input end of the third charge pause collection signal, the third charge modulation signal and the third control selection signal; and / or; The fourth charge storage transfer circuit includes a fourth charge modulation transistor; The source of the fourth charge modulation transistor is connected to the charge input terminal of the fourth charge storage transfer circuit, and the drain of the fourth charge modulation transistor is connected to the fourth integrated charge signal output terminal of the fourth charge storage transfer circuit; The gate of the fourth charge modulation transistor is connected to a fourth signal control line to serve as an input terminal of a fourth charge pause collection signal, the fourth charge modulation signal and the fourth control selection signal.

5. The time-of-flight sensor pixel circuit according to any one of claims 1 to 4, characterized in that: The charge readout circuit includes a reset transistor, a source follower transistor and a pixel selection transistor; The drain of the reset transistor is connected to a first power supply, the drain of the source follower transistor is connected to a second power supply, the first power supply is the same as or different from the second power supply, the source of the reset transistor and the gate of the source follower transistor are commonly connected to a floating diffusion active region to serve as an integrated charge signal input terminal, the source of the source follower transistor is connected to the drain of the pixel selection transistor, and the source of the pixel selection transistor is connected to a photoelectric signal output terminal; The gate of the reset transistor is connected to the reset control line to serve as the first reset control signal input terminal of the charge readout circuit, the second reset control signal input terminal of the charge readout circuit, the third reset control signal input terminal of the charge readout circuit and the fourth reset control signal input terminal of the charge readout circuit.

6. The time-of-flight sensor pixel circuit according to any one of claims 1 to 4, characterized in that: Also includes: An anti-charge crosstalk circuit is connected to the photoelectric conversion element, the first charge storage transfer circuit, the second charge storage transfer circuit, the third charge storage transfer circuit and the fourth charge storage transfer circuit, and is at least configured to clear the charge in the photoelectric conversion element according to an anti-charge crosstalk control signal.

7. The time-of-flight sensor pixel circuit according to claim 6, characterized in that: The charge crosstalk resistance circuit includes a charge crosstalk resistance transistor; The source of the anti-charge crosstalk transistor is connected to the output end of the photoelectric conversion element, the drain of the anti-charge crosstalk transistor is connected to the control power supply, and the gate of the anti-charge crosstalk transistor is connected to the anti-charge crosstalk control signal.

8. The time-of-flight sensor pixel circuit according to any one of claims 1 to 4, characterized in that: The first calculation signal, the second calculation signal, the third calculation signal and the fourth calculation signal are acquired based on a pixel one-frame operation.

9. A structure of a time-of-flight sensor pixel circuit, applied to the time-of-flight sensor pixel circuit according to any one of claims 1 to 8, characterized in that: When the pixel circuit includes at least one of a first charge modulation transistor, a second charge modulation transistor, a third charge modulation transistor, and a fourth charge modulation transistor, the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor each include a transistor modulation channel structure; The transistor modulation channel structure includes a first ion doping type channel region, a second ion doping type channel region and a second ion doping type extended channel region in sequence, wherein the gate of each charge modulation transistor correspondingly covers the first ion doping type channel region and the second ion doping type channel region and exposes the second ion doping type extended channel region, and the first ion doping type channel region corresponds to the charge input end, and the second ion doping type extended channel region corresponds to the integrated charge signal output end.

10. The structure of the time-of-flight sensor pixel circuit according to claim 9, characterized in that: The structure of the pixel circuit includes a first ion-doped type epitaxial layer and a first ion-doped type well region, wherein the photoelectric conversion element, the first ion-doped type channel region and the first ion-doped type well region are located in the first ion-doped type epitaxial layer, and the second ion-doped type channel region and the second ion-doped type extended channel region are located in the first ion-doped type well region.

11. The structure of the time-of-flight sensor pixel circuit according to claim 9, characterized in that: The first ion doping type is P type, and the second ion doping type is N type.

12. The structure of the time-of-flight sensor pixel circuit according to claim 11, characterized in that: The photoelectric conversion element includes an N-type region and a P-type functional layer located above the N-type region, the first ion-doped type channel region is connected to the P-type functional layer, and the second ion-doped type extended channel region is connected to the floating diffusion active region; the floating diffusion active region is located in a P-type well.

13. The structure of the time-of-flight sensor pixel circuit according to claim 9, wherein: The length of the first ion-doped type channel region is less than 0.3um, and the depth of the first ion-doped type channel region is less than 0.2um; the length of the second ion-doped type extended channel region is greater than 0.1um and less than 0.3um, and the depth of the second ion-doped type extended channel region is less than 0.3um; the depth of the second ion-doped type channel region is less than 0.3um.

14. A time-of-flight sensor, characterized in that: The time-of-flight sensor comprises the time-of-flight sensor pixel circuit as claimed in any one of claims 1 to 8; and / or the time-of-flight sensor comprises the structure of the time-of-flight sensor pixel circuit as claimed in any one of claims 9 to 13.

15. A method for operating the structure of a time-of-flight sensor pixel circuit according to any one of claims 9 to 13, characterized in that: include: Corresponding to the four phases of the modulated light wave, four charge modulation signals are input respectively, so that four charge storage transfer circuits modulate the charges corresponding to the four phases of the modulated light wave according to the four charge modulation signals respectively to generate four integrated charge signals; After repeating at least one cycle, proceed to the next step; The integrated charge signals of the four charge storage transfer circuits are outputted in sequence, and four photoelectric signals are outputted according to the integrated charge signals of the four charge storage transfer circuits.

16. The method for operating the structure of the line time sensor pixel circuit according to claim 15, characterized in that: When the pixel circuit includes at least one of the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor, the generating four integrated charge signals includes: Corresponding to the first phase of the modulated light wave, the first charge modulation signal is input to the gate of the first charge modulation transistor, and the first charge storage transfer circuit modulates the charge generated by the first phase of the modulated light wave according to the first charge modulation signal to generate the first integrated charge signal; Corresponding to the second phase of the modulated light wave, the second charge modulation signal is input to the gate of the second charge modulation transistor, and the second charge storage transfer circuit modulates the charge generated by the second phase of the modulated light wave according to the second charge modulation signal to generate the second integrated charge signal; Corresponding to the third phase of the modulated light wave, the third charge modulation signal is input to the gate of the third charge modulation transistor, and the third charge storage transfer circuit modulates the charge generated by the third phase of the modulated light wave according to the third charge modulation signal to generate the third integrated charge signal; Corresponding to the fourth phase of the modulated light wave, the fourth charge modulation signal is input to the gate of the fourth charge modulation transistor, and the fourth charge storage transfer circuit modulates the charge generated by the fourth phase of the modulated light wave according to the fourth charge modulation signal to generate the fourth integrated charge signal.

17. The operating method of the structure of the line time sensor pixel circuit according to claim 16, characterized in that: Corresponding to the charge modulation signal input to the gate of the charge modulation transistor, the photoelectric conversion element has a fully depleted potential Vpin, the first ion doping type channel region has a highest potential V1a when receiving a charge pause collection signal, V3 is the fully depleted potential of the second ion doping type extended channel region, the second ion doping type channel region is used as a photoelectric charge storage region, the first ion doping type channel region has a highest potential V1b when receiving a charge modulation signal, V2a is the highest potential of the second ion doping type channel region when receiving a charge pause collection signal, V2b is the highest potential of the second ion doping type channel region when receiving a charge modulation signal, and Vrst is the reset potential of the floating diffusion active region: 0V <V1a<Vpin<V3<V1b<V2a<V2b<Vrst or 0V <V1a<Vpin<V3<V1b<V2a<Vrst<V2b。 18. The method for operating the structure of the line time sensor pixel circuit according to claim 15, characterized in that: When the pixel circuit includes at least one of the first charge modulation transistor, the second charge modulation transistor, the third charge modulation transistor, and the fourth charge modulation transistor, the outputting four photoelectric signals includes: A first control selection signal is input to the gate of the first charge modulation transistor, and the first charge storage transfer circuit outputs the first integrated charge signal according to the first control selection signal; and a first charge readout circuit outputs a first photoelectric signal according to the first integrated charge signal; A second control selection signal is input to the gate of the second charge modulation transistor, and the second charge storage transfer circuit outputs the second integrated charge signal according to the second control selection signal; and the second charge readout circuit outputs a second photoelectric signal according to the second integrated charge signal; A third control selection signal is inputted into the gate of the third charge modulation transistor, and the third charge storage transfer circuit outputs the first integrated charge signal according to the third control selection signal; and a third charge readout circuit outputs a third photoelectric signal according to the third integrated charge signal; A fourth control selection signal is input to the gate of the fourth charge modulation transistor, and the fourth charge storage transfer circuit outputs the fourth integrated charge signal according to the fourth control selection signal; and the fourth charge readout circuit outputs a fourth photoelectric signal according to the fourth integrated charge signal.

19. The method for operating the structure of the line time sensor pixel circuit according to claim 18, characterized in that: Corresponding to the gate input control selection signal of the charge modulation transistor, the photoelectric conversion element has a fully depleted potential Vpin, the first ion doping type channel region has a highest potential V1a when receiving a charge suspension collection signal, V3 is the fully depleted potential of the second ion doping type extended channel region, the second ion doping type channel region is used as a photoelectric charge storage region, the first ion doping type channel region has a highest potential V1b when receiving a charge modulation signal, the first ion doping type channel region has a highest potential V1c when receiving a control selection signal, V2a is the highest potential of the second ion doping type channel region when receiving a charge suspension collection signal, V2b is the highest potential of the second ion doping type channel region when receiving a charge modulation signal, V2b is the highest potential of the second ion doping type channel region when receiving a control selection signal, and Vrst is the reset potential of the floating diffusion active region: V1c<0V <V1a<V2c<Vpin<V3<V1b<V2a<Vrst or V1c<0V <V1a<Vpin<V2c<V3<V1b<V2a<Vrst。 20. The method for operating the structure of the line time sensor pixel circuit according to claim 15, characterized in that: The operation method also includes: Corresponding to the gate input charge pause collection signal of the charge modulation transistor, the photoelectric conversion element has a fully depleted potential Vpin, the first ion doping type channel region has a highest potential V1a when receiving the charge pause collection signal, V3 is the fully depleted potential of the second ion doping type extended channel region, the second ion doping type channel region is used as a photoelectric charge storage region, V2a is the highest potential of the second ion doping type channel region when receiving the charge pause collection signal, and Vrst is the reset potential of the floating diffusion active region: 0V <V1a<Vpin<V3<V2a<Vrst。 21. The method for operating the structure of the line time sensor pixel circuit according to claim 15, characterized in that: After generating the four integrated charge signals and before outputting the first photoelectric signal, the method further includes: A first reset control signal is input, and a first charge readout circuit outputs a first reset signal according to the first reset control signal, so as to obtain a first calculation signal based on the first reset signal and the first photoelectric signal; Before outputting the second photoelectric signal and after outputting the first photoelectric signal, the method further includes: A second reset control signal is input, and the second charge readout circuit outputs a second reset signal according to the second reset control signal, so as to obtain a second calculation signal based on the second reset signal and the second photoelectric signal; Before outputting the third photoelectric signal and after outputting the second photoelectric signal, the method further includes: Input a third reset control signal, and the third charge readout circuit outputs a third reset signal according to the third reset control signal, so as to obtain a third calculation signal based on the third reset signal and the third photoelectric signal; Before outputting the fourth photoelectric signal and after outputting the third photoelectric signal, the method further includes: A fourth reset control signal is input, and the fourth charge readout circuit outputs a fourth reset signal according to the fourth reset control signal to obtain a fourth calculation signal based on the fourth reset signal and the fourth photoelectric signal.

22. The method for operating the structure of the line time sensor pixel circuit according to any one of claims 15 to 21, characterized in that: Before generating four integrated charge signals, the method further includes: Before starting exposure, an anti-charge crosstalk control signal is input, and the anti-charge crosstalk circuit clears the charge in the photoelectric conversion element according to the anti-charge crosstalk control signal; when the anti-charge crosstalk control signal is stopped, exposure starts; After generating the four integrated charge signals and before outputting the four photoelectric signals, the method further includes: The exposure is stopped, and an anti-charge crosstalk control signal is inputted, and the anti-charge crosstalk circuit clears the charges in the photoelectric conversion element according to the anti-charge crosstalk control signal.

Images