IPM packaging structure and manufacturing method thereof

Abstract

The present invention provides an IPM packaging structure and a manufacturing method thereof. The IPM packaging structure includes: a control chip, a first plastic encapsulation layer, a rewiring layer, an IGBT chip, pins, and a second plastic encapsulation layer; the control chip includes a plurality of first solder pads, the first solder pads being located on the active surface of the control chip; the first plastic encapsulation layer at least covers the side surface of the control chip, with the active surface of the control chip exposed from the front of the first plastic encapsulation layer; the rewiring layer is located on the active surface of the control chip and the front of the plastic encapsulation layer, and is used to perform circuit layout for at least each of the first solder pads; the IGBT chip and the inner pin portions of the pins are located on the rewiring layer, and both the IGBT chip and the inner pin portions are electrically connected to the rewiring layer; the second plastic encapsulation layer covers the IGBT chip, the rewiring layer, and the inner pin portions, with the outer pin portions of the pins exposed outside the first and second plastic encapsulation layers. Placing the control chip and the IGBT chip on either side of the rewiring layer can reduce the volume of the packaging structure, improve integration, and make the structure compact.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to an IPM packaging structure and a manufacturing method thereof. Background Art

[0002] The Intelligent Power Module (IPM) is a new type of control module that integrates an insulated gate bipolar transistor (IGBT) chip and its driver circuit. It offers advantages such as low cost, miniaturization, high reliability, and ease of use, making it widely used in variable-frequency home appliances, inverter power supplies, and industrial control. In recent years, with the continuous advancement of circuit integration technology, electronic products have increasingly become more miniaturized, intelligent, highly integrated, high-performance, and highly reliable. However, packaging technology not only affects product performance but also hinders its miniaturization.

[0003] In view of this, the present invention provides an IPM packaging structure and a manufacturing method thereof, so as to achieve the requirements of small size, compact structure and high integration of the packaging structure. Summary of the Invention

[0004] The object of the present invention is to provide an IPM packaging structure and a manufacturing method thereof, so as to achieve the requirements of small size, compact structure and high integration of the packaging structure.

[0005] To achieve the above objectives, a first aspect of the present invention provides a method for manufacturing an IPM packaging structure, comprising:

[0006] A carrier board and at least one group of components to be encapsulated and carried on the carrier board are provided, wherein each group of components to be encapsulated includes: a control chip, the control chip including a plurality of first solder pads, the first solder pads being located on an active surface of the control chip; wherein the active surface of the control chip faces the carrier board;

[0007] forming a first plastic encapsulation layer on the surface of the carrier board to embed the component to be plastic encapsulated, wherein the plastic encapsulation layer includes a front side and a back side relative to each other;

[0008] Removing the carrier board to expose the active surface of the control chip and the front surface of the first plastic encapsulation layer; forming a redistribution layer on the active surface of the control chip and the front side of the first plastic encapsulation layer, the redistribution layer being used at least for performing circuit layout on each of the first pads of the control chip in the group;

[0009] Providing a pin including an inner pin portion and an outer pin portion, disposing the redistribution layer on the inner pin portion, and electrically connecting the inner pin portion and the redistribution layer;

[0010] Arranging an IGBT chip on the rewiring layer, and electrically connecting the IGBT chip and the rewiring layer;

[0011] A second plastic packaging layer is formed to cover the IGBT chip, the redistribution layer and the inner pin portion, so that the outer pin portion is exposed outside the first plastic packaging layer and the second plastic packaging layer.

[0012] Optionally, the parts to be plastic-encapsulated include multiple groups, and between the step of forming a redistribution layer and the step of setting the redistribution layer on the inner pin portion, the method for manufacturing the IPM packaging structure further includes: cutting to form multiple intermediate packaging structures, each of the intermediate packaging structures including a group of the parts to be plastic-encapsulated.

[0013] Optionally, the manufacturing method of the IPM packaging structure also includes: setting a first heat sink on the back side of the first plastic packaging layer, so that the first heat sink and the redistribution layer are connected together through a first conductive column or a first conductive plug, and the first heat sink is used for dissipating heat of the control chip or for dissipating heat of the control chip and the IGBT chip at the same time.

[0014] Optionally, the second plastic packaging layer includes a relative front and back surface, and the back surface of the second plastic packaging layer is away from the redistribution layer; the manufacturing method of the IPM packaging structure also includes: setting a second heat sink on the back side of the second plastic packaging layer, so that the second heat sink is connected to the redistribution layer through a second conductive column or a second conductive plug, and the second heat sink is used to dissipate heat from the IGBT chip.

[0015] Optionally, the IGBT chip and the redistribution layer are electrically connected together through a wire bonding process.

[0016] Optionally, while an IGBT chip is arranged on the rewiring layer, a MOS chip is also arranged on the rewiring layer, and the MOS chip and the rewiring layer are electrically connected together; the formed second plastic packaging layer also covers the MOS chip.

[0017] A second aspect of the present invention provides an IPM packaging structure, comprising:

[0018] A control chip, the control chip comprising a plurality of first pads, wherein the first pads are located on an active surface of the control chip;

[0019] a first plastic encapsulation layer covering at least a side surface of the control chip; the first plastic encapsulation layer comprising a front surface and a back surface relative to each other, the front surface of the first plastic encapsulation layer exposing an active surface of the control chip;

[0020] a redistribution layer located between the active surface of the control chip and the front side of the first plastic packaging layer; the redistribution layer is at least used for performing circuit layout on each of the first pads;

[0021] An IGBT chip is located on the redistribution layer and is electrically connected to the redistribution layer;

[0022] a pin, comprising an inner pin portion and an outer pin portion, wherein the inner pin portion is located on the redistribution layer and electrically connected to the redistribution layer; and

[0023] The second plastic packaging layer covers the IGBT chip, the redistribution layer and the inner pin portion; the outer pin portion is exposed outside the first plastic packaging layer and the second plastic packaging layer.

[0024] Optionally, the IPM packaging structure also includes: a first heat sink located on the back side of the first plastic packaging layer, the first heat sink being connected to the redistribution layer through a first conductive column or a first conductive plug, and being used for heat dissipation of the control chip or for heat dissipation of the control chip and the IGBT chip at the same time.

[0025] Optionally, the second plastic packaging layer includes a relative front and back surface, and the back surface of the second plastic packaging layer is away from the redistribution layer; the IPM packaging structure also includes: a second heat sink, located on the back side of the second plastic packaging layer, and the second heat sink is connected to the redistribution layer through a second conductive column or a second conductive plug for heat dissipation of the IGBT chip.

[0026] Optionally, the IGBT chip and the redistribution layer are electrically connected via wires.

[0027] Optionally, the redistribution layer includes two or more metal pattern layers.

[0028] Optionally, the IPM packaging structure further includes: a MOS chip located on the redistribution layer and electrically connected to the redistribution layer; and the second plastic packaging layer further covers the MOS chip.

[0029] Compared with the prior art, the beneficial effect of the present invention is that the control chip and the IGBT chip are distributed on both sides of the redistribution layer, and the inner pin portion of the pin is connected to the redistribution layer. Compared with setting both the control chip and the IGBT chip on a ceramic copper-clad board or an aluminum substrate, the volume of the packaging structure can be reduced, the integration can be improved, and the structure can be made compact. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic cross-sectional view of the IPM packaging structure according to the first embodiment of the present invention;

[0031] Figure 2yes Figure 1 Flow chart of a method for making an IPM packaging structure;

[0032] Figures 3 to 9 yes Figure 2 Schematic diagram of the intermediate structure corresponding to the process in;

[0033] Figure 10 is a schematic cross-sectional view of an IPM packaging structure according to a second embodiment of the present invention;

[0034] Figure 11 is a schematic cross-sectional view of an IPM packaging structure according to a third embodiment of the present invention;

[0035] Figure 12 is a schematic cross-sectional view of an IPM package structure according to a fourth embodiment of the present invention;

[0036] Figure 13 FIG. 5 is a schematic cross-sectional view of an IPM packaging structure according to a fifth embodiment of the present invention.

[0037] To facilitate understanding of the present invention, all reference numerals appearing in the present invention are listed below:

[0038] IPM packaging structure 1, 4, 5, 6, 7 control chip 11

[0039] First pad 111 controls the back surface 11b of the chip

[0040] Active surface 11a of control chip Protective layer 110

[0041] First opening 110a First plastic packaging layer 12

[0042] The front side 12a of the first plastic packaging layer The back side 12b of the first plastic packaging layer

[0043] Rewiring layer 13 IGBT chip 14

[0044] Second pad 141 Active surface 14a of the IGBT chip

[0045] Back side of IGBT chip 14b pin 15

[0046] Inner pin portion 151 Outer pin portion 152

[0047] Second plastic sealing layer 16 Second plastic sealing layer front side 16a

[0048] The back side of the second plastic packaging layer 16b and the first heat dissipation plate 17

[0049] First conductive plug 18 Intermediate packaging structure 20

[0050] Carrier board 2 Support board 3

[0051] Part to be plastic sealed 10 Second heat sink 19

[0052] Second conductive plug 21 MOS chip 22

[0053] Front side 22a of MOS chip Back side 22b of MOS chip

[0054] Dielectric layer 23 DETAILED DESCRIPTION

[0055] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0056] Figure 1 FIG. 1 is a schematic cross-sectional view of the IPM packaging structure according to the first embodiment of the present invention.

[0057] Reference Figure 1 As shown, the IPM package structure 1 includes:

[0058] The control chip 11 includes a plurality of first pads 111 , and the first pads 111 are located on the active surface 11a of the control chip 11 ; the active surface 11a of the control chip 11 is provided with a protective layer 110 , and the protective layer 110 has first openings 110a exposing the first pads 111 ;

[0059] The first plastic layer 12 covers at least the side surface of the control chip 11. The first plastic layer 12 includes a front surface 12a and a back surface 12b. The front surface 12a of the first plastic layer 12 is exposed to the protective layer 110.

[0060] The redistribution layer 13 is located between the active surface 11a of the control chip 11 and the front surface 12a of the first plastic packaging layer 12. The redistribution layer 13 is used at least for performing circuit layout on each first pad 111.

[0061] An IGBT chip 14 is located on the redistribution layer 13 and is electrically connected to the redistribution layer 13;

[0062] The pin 15 includes an inner pin portion 151 and an outer pin portion 152 , wherein the inner pin portion 151 is located on the redistribution layer 13 and electrically connected to the redistribution layer 13 ; and

[0063] The second plastic encapsulation layer 16 covers the IGBT chip 14 , the redistribution layer 13 and the inner pin portion 151 ; the outer pin portion 152 is exposed outside the first plastic encapsulation layer 12 and the second plastic encapsulation layer 16 .

[0064] The control chip 11 includes an active surface 11a and a back surface 11b that face each other. First pads 111 are disposed on the active surface 11a. The control chip 11 may include a variety of devices formed on a semiconductor substrate, as well as electrical interconnects electrically connected to each device. First pads 111 are connected to the electrical interconnects for inputting and outputting electrical signals from each device.

[0065] The protective layer 110 is made of an insulating material, specifically an insulating resin material or an inorganic material. Examples of the insulating resin material include polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials with similar insulating properties. Examples of the inorganic material include at least one of silicon dioxide and silicon nitride.

[0066] In other embodiments, the protection layer 110 may be omitted.

[0067] The materials of the first plastic encapsulation layer 12 and the second plastic encapsulation layer 16 can be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer or polyvinyl alcohol, etc. The materials of the first plastic encapsulation layer 12 and the second plastic encapsulation layer 16 can also be various polymers or composite materials of resins and polymers.

[0068] The first plastic layer 12 includes a front surface 12 a and a back surface 12 b opposite to each other. In this embodiment, the front surface 12 a of the first plastic layer 12 is exposed to the protective layer 110 .

[0069] Figure 1 In the illustrated embodiment, the redistribution layer 13 includes a metal pattern layer.

[0070] The IGBT chip 14 includes a plurality of second pads 141 located on the active surface 14a of the IGBT chip 14. The back surface 14b of the IGBT chip 14 is supported on the redistribution layer 13. The second pads 141 are electrically connected to the redistribution layer 13 via wires.

[0071] The electrical connection between the inner pin portion 151 and the redistribution layer 13 may be achieved through a soldering process.

[0072] Reference Figure 1As shown, the IPM package structure 1 in this embodiment has a control chip 11 and an IGBT chip 14 disposed on either side of a redistribution layer 13, and the inner pin portion 151 of the pin 15 is connected to the redistribution layer 13. Compared to disposing both the control chip 11 and the IGBT chip 14 on a ceramic copper-clad laminate or an aluminum substrate, the IPM package structure 1 in this embodiment can reduce the volume of the package structure, improve integration, and make the structure compact.

[0073] One embodiment of the present invention provides Figure 1 A method for manufacturing the IPM packaging structure 1. Figure 2 It is a flowchart of the production method. Figures 3 to 9 yes Figure 2 Schematic diagram of the intermediate structure corresponding to the process in .

[0074] First, refer to Figure 2 Step S1, Figure 3 and Figure 4 As shown, a carrier board 2 and a plurality of groups of components 10 to be encapsulated are provided. Each group of components 10 to be encapsulated includes a control chip 11. The control chip 11 includes a plurality of first solder pads 111. The first solder pads 111 are located on the active surface 11a of the control chip 11. The active surface 11a of the control chip 11 is covered with a protective layer 110. The active surface 11a of the control chip 11 faces the carrier board 2. Figure 3 It is a top view of the carrier board and multiple groups of parts to be plastic-sealed; Figure 4 It is along Figure 3 Cross-sectional view along line AA.

[0075] Reference Figure 4 As shown, the control chip 11 includes an active surface 11a and a back surface 11b that face each other. The control chip 11 may include a variety of devices formed on a semiconductor substrate, as well as an electrical interconnect structure electrically connected to each device. A first pad 111 disposed on the active surface 11a of the control chip 11 is connected to the electrical interconnect structure for inputting and outputting electrical signals from each device. A protective layer 110 covers the first pad 111 to protect it when the first plastic encapsulation layer 12 is thinned.

[0076] The protective layer 110 is made of an insulating material, specifically an insulating resin material or an inorganic material. The insulating resin material may be polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), an organic polymer film, an organic polymer composite material, or other organic materials with similar insulating properties.

[0077] The protective layer 110 may include one or more layers.

[0078] The carrier plate 2 is a hard plate, which may include a plastic plate, a glass plate, a ceramic plate or a metal plate.

[0079] When multiple sets of components 10 to be encapsulated are placed on the surface of carrier board 2, the active surfaces 11a of the multiple control chips 11 are positioned toward carrier board 2. In this embodiment, an adhesive layer can be provided between the protective layer 110 covering the active surfaces 11a of the control chips 11 and the surface of carrier board 2 to secure them. Specifically, an adhesive layer can be applied to the entire surface of carrier board 2, and the multiple control chips 11 can be placed on this adhesive layer.

[0080] The adhesive layer may be made of a material that is easily peelable so that the carrier board 2 can be peeled off. For example, a thermal release material that loses its stickiness by heating or a UV release material that loses its stickiness by ultraviolet irradiation may be used.

[0081] A group of components 10 to be encapsulated is located in an area on the surface of carrier board 2 to facilitate subsequent cutting. Multiple groups of components 10 to be encapsulated are fixed to the surface of carrier board 2 to simultaneously produce multiple IPM package structures 1, facilitating mass production and reducing costs. In some embodiments, another group of components 10 to be encapsulated can be fixed to the surface of carrier board 2.

[0082] Next, refer to Figure 2 Step S2 in Figure 5 As shown, a first plastic packaging layer 12 is formed on the surface of the carrier board 2 to embed each group of components 10 to be plastic packaged.

[0083] The material of the first plastic encapsulation layer 12 can be epoxy resin, polyimide resin, benzocyclobutene resin, polybenzoxazole resin, polybutylene terephthalate, polycarbonate, polyethylene terephthalate, polyethylene, polypropylene, polyolefin, polyurethane, polyolefin, polyethersulfone, polyamide, polyurethane, ethylene-vinyl acetate copolymer or polyvinyl alcohol. The material of the first plastic encapsulation layer 12 can also be various polymers or composite materials of resin and polymer. Correspondingly, plastic encapsulation can be performed by filling liquid plastic encapsulation material between each control chip 11 and then curing it at high temperature through a plastic encapsulation mold. In some embodiments, the first plastic encapsulation layer 12 can also be formed by a plastic material molding method such as hot pressing molding or transfer molding.

[0084] The first molding layer 12 may include a front surface 12 a and a back surface 12 b opposite to each other.

[0085] Specifically, the first plastic packaging layer 12 may be thinned from the back side 12b of the first plastic packaging layer 12 to reduce the thickness of the IPM package structure 1. The first plastic packaging layer 12 may be thinned by mechanical grinding, such as grinding with a grinding wheel.

[0086] During the process of forming the first plastic encapsulation layer 12 and grinding the first plastic encapsulation layer 12 , the protection layer 110 can prevent the first pads 111 and the electrical interconnection structure and various components in the control chip 11 from being damaged.

[0087] This step forms a plastic-encapsulated body of the component 10 to be plastic-encapsulated.

[0088] Next, refer to Figure 2 Step S3 in Figure 6 As shown, the carrier board 2 is removed to expose the protective layer 110 and the front side 12a of the first plastic encapsulation layer 12; a rewiring layer 13 is formed on one side of the protective layer 110 and the front side 12a of the first plastic encapsulation layer 12, and the rewiring layer 13 is at least used to perform circuit layout on each first pad 111 of the control chip 11 in the group.

[0089] The carrier board 2 can be removed by conventional removal methods such as laser stripping and UV irradiation.

[0090] Reference Figure 6 As shown, after the carrier plate 2 is removed, a support plate 3 can be provided on the back surface 12 b of the first plastic packaging layer 12 .

[0091] The support plate 3 can play a supporting role in the subsequent process of forming the redistribution layer 13 .

[0092] The support plate 3 is a hard plate, which may include a glass plate, a ceramic plate, a metal plate, etc.

[0093] In this embodiment, the redistribution layer 13 includes a metal pattern layer. Forming the redistribution layer 13 may include the following steps S31-S32.

[0094] Step S31 : forming a first opening 110 a in the protection layer 110 to expose the first pad 111 .

[0095] When the protective layer 110 is made of a laser-removable material, the first opening 110a can be opened in the protective layer 110 by laser irradiation. When the protective layer 110 is made of a dry-etchable material, the first opening 110a can be opened in the protective layer 110 by dry etching. When the protective layer 110 is made of a wet-etchable material, the first opening 110a can be opened in the protective layer 110 by wet etching.

[0096] Step S32 : forming a metal pattern layer on the protection layer 110 , the first pad 111 and the front surface 12 a side of the first plastic packaging layer 12 .

[0097] The metal pattern layer can be formed by electroplating, sputtering, etc. When the metal pattern layer is formed, the first opening 110a is filled.

[0098] After forming the redistribution layer 13, refer to Figure 7 As shown, the support plate 3 is removed.

[0099] The support plate 3 can be removed by conventional removal methods such as laser stripping and UV irradiation.

[0100] Afterwards, refer to Figure 2 Step S4 in Figure 7 As shown, a plurality of intermediate packaging structures 20 are formed by cutting, and each intermediate packaging structure 20 includes a group of parts 10 to be encapsulated.

[0101] Cutting can be performed along cutting streets.

[0102] Next, refer to Figure 2 Step S5 in Figure 8 As shown, a lead 15 including an inner lead portion 151 and an outer lead portion 152 is provided, a redistribution layer 13 is disposed on the inner lead portion 151 , and the inner lead portion 151 and the redistribution layer 13 are electrically connected.

[0103] The electrical connection between the inner pin portion 151 and the redistribution layer 13 may be achieved through a soldering process.

[0104] Afterwards, refer to Figure 2 Step S6 in Figure 9 As shown, an IGBT chip 14 is provided on the rewiring layer 13 , and the IGBT chip 14 and the rewiring layer 13 are electrically connected together.

[0105] In this embodiment, the IGBT chip 14 includes a plurality of second pads 141, which are located on the active surface 14a of the IGBT chip 14. The back surface 14b of the IGBT chip 14 is supported on the redistribution layer 13, and the electrical connection between the second pads 141 and the redistribution layer 13 can be achieved through wires.

[0106] The material of the lead wire can be gold wire or silver wire.

[0107] Next, refer to Figure 2 Step S7 in Figure 9 As shown, a second plastic encapsulation layer 16 is formed to cover the IGBT chip 14 , the redistribution layer 13 and the inner pin portion 151 , so that the outer pin portion 152 is exposed outside the first plastic encapsulation layer 12 and the second plastic encapsulation layer 16 .

[0108] The material and forming method of the second plastic encapsulation layer 16 may refer to the material and forming method of the first plastic encapsulation layer 12 .

[0109] Thereafter, the outer pin portion 152 may be bent.

[0110] Figure 10 FIG. 1 is a schematic cross-sectional view of an IPM package structure according to a second embodiment of the present invention. Figure 10As shown, the IPM packaging structure 4 in this embodiment is different from the IPM packaging structure 1 in the first embodiment only in that it also includes: a first heat sink 17, located on the back side 12b of the first plastic packaging layer 12, and the first heat sink 17 is connected to the redistribution layer 13 through a first conductive plug 18, which is at least used to control the heat dissipation of the chip 11.

[0111] The redistribution layer 13 includes a plurality of metal pattern blocks. The first conductive plug 18 is connected to the metal pattern block connected to the control chip 11 , so that the first heat sink 17 can dissipate heat from the control chip 11 .

[0112] In other embodiments, the first heat dissipation plate 17 and the redistribution layer 13 may also be connected via first conductive pillars.

[0113] In addition, the first heat sink 17 can also be used to dissipate heat from the IGBT chip 14. The first conductive plug 18 or the first conductive column is connected to the metal pattern block connected to the IGBT chip 14, so that the first heat sink 17 can dissipate heat from the IGBT chip 14.

[0114] Except for the above differences, other structures of the IPM package structure 4 of the second embodiment may refer to the corresponding structures of the IPM package structure 1 of the first embodiment.

[0115] Accordingly, the difference between the manufacturing method of the IPM packaging structure 4 of the second embodiment and the manufacturing method of the IPM packaging structure 1 of the first embodiment is that: between step S3 and step S4, a through hole exposing the redistribution layer 13 is formed in the first plastic packaging layer 12; a metal layer is deposited to fill the through hole and form a first heat dissipation plate 17.

[0116] When the first heat dissipation plate 17 is connected to the redistribution layer 13 through the first conductive pillars, the component to be encapsulated 10 includes the first conductive pillars.

[0117] Except for the above differences, other steps of the method for manufacturing the IPM package structure 4 of the second embodiment may refer to the corresponding steps of the method for manufacturing the IPM package structure 1 of the first embodiment.

[0118] Figure 11 FIG3 is a schematic cross-sectional view of an IPM package structure according to a third embodiment of the present invention. Figure 11 As shown, the IPM packaging structure 5 in this embodiment is different from the IPM packaging structures 1 and 4 in the first and second embodiments only in that: the second plastic packaging layer 16 includes a relative front side 16a and a back side 16b, and the back side 16b of the second plastic packaging layer 16 is away from the redistribution layer 13; the IPM packaging structure 5 also includes: a second heat sink 19, which is located on the back side 16b of the second plastic packaging layer 16, and the second heat sink 19 is connected to the redistribution layer 13 through a second conductive column or a second conductive plug 21, and is used at least for heat dissipation of the IGBT chip 14.

[0119] The redistribution layer 13 includes a plurality of metal pattern blocks. The second conductive pillars or second conductive plugs 21 are connected to the metal pattern blocks connected to the IGBT chip 14 , so that the second heat sink 19 can dissipate heat for the IGBT chip 14 .

[0120] Except for the above differences, other structures of the IPM package structure 5 of the third embodiment may refer to the corresponding structures of the IPM package structures 1 and 4 of the first and second embodiments.

[0121] Accordingly, the manufacturing method of the IPM packaging structure 5 of the third embodiment differs from the manufacturing methods of the IPM packaging structures 1 and 4 of the first and second embodiments only in that: after step S7, the following steps are performed: forming a through hole exposing the redistribution layer 13 in the second plastic packaging layer 16 from the back side 16b of the second plastic packaging layer 16; depositing a metal layer, filling the through hole and forming a second heat dissipation plate 19.

[0122] When the second heat dissipation plate 19 is connected to the redistribution layer 13 through the second conductive column, before the second plastic encapsulation layer 16 is formed, one end of the second conductive column is set on the redistribution layer 13; after the second plastic encapsulation layer 16 is formed, the second plastic encapsulation layer 16 is thinned from the back side 16b of the second plastic encapsulation layer 16 until the other end of the second conductive column is exposed.

[0123] Except for the above differences, other steps of the method for manufacturing the IPM package structure 5 of the third embodiment may refer to the corresponding steps of the methods for manufacturing the IPM package structures 1 and 4 of the first and second embodiments.

[0124] Figure 12 FIG is a schematic cross-sectional view of an IPM package structure according to a fourth embodiment of the present invention. Figure 12 As shown, the IPM packaging structure 6 in this embodiment differs from the IPM packaging structures 1, 4, and 5 of embodiments one, two, and three only in that it further includes: a MOS chip 22 located on the redistribution layer 13 and electrically connected to the redistribution layer 13; and the second plastic packaging layer 16 further covers the MOS chip 22.

[0125] The MOS chip 22 includes a front surface 22a and a back surface 22b opposite to each other. The MOS chip 22 includes a source, a drain, and a gate. The source, drain, and gate can be connected to the redistribution layer 13 via wires.

[0126] Except for the above differences, other structures of the IPM package structure 6 of the fourth embodiment may refer to the corresponding structures of the IPM package structures 1, 4, and 5 of the first, second, and third embodiments.

[0127] Accordingly, the manufacturing method of the IPM packaging structure 6 of the fourth embodiment differs from the manufacturing methods of the IPM packaging structures 1, 4, and 5 of the first, second, and third embodiments only in that: in step S6, while the IGBT chip 14 is arranged on the redistribution layer 13, a MOS chip 22 is also arranged on the redistribution layer 13, and the MOS chip 22 is electrically connected to the redistribution layer 13; the second plastic encapsulation layer 16 formed in step S7 also covers the MOS chip 22.

[0128] Except for the above differences, other steps of the method for manufacturing the IPM package structure 6 of the fourth embodiment may refer to the corresponding steps of the methods for manufacturing the IPM package structures 1, 4, and 5 of the first, second, and third embodiments.

[0129] Figure 13 FIG is a schematic cross-sectional view of an IPM package structure according to a fifth embodiment of the present invention. Figure 13 As shown, the only difference between the IPM package structure 7 in this embodiment and the IPM package structures 1, 4, 5, and 6 in the first to fourth embodiments is that the redistribution layer 13 includes two metal pattern layers.

[0130] Specifically, the redistribution layer 13 includes a first metal pattern layer and a second metal pattern layer, which are electrically connected via a third conductive plug. The first metal pattern layer and the third conductive plug are disposed within the dielectric layer 23. The second metal pattern layer is disposed on the dielectric layer 23. The IGBT chip 14 and the inner pin portion 151 are disposed on the second metal pattern layer. The electrical connection layout between the first and second metal pattern layers can be determined based on a pre-set circuit layout.

[0131] In other embodiments, the redistribution layer 13 may further include two or more metal pattern layers.

[0132] Except for the above differences, other structures of the IPM package structure 7 of the fifth embodiment may refer to the corresponding structures of the IPM package structures 1, 4, 5, and 6 of the first to fourth embodiments.

[0133] Accordingly, the manufacturing method of the IPM package structure 7 of the fifth embodiment differs from the manufacturing methods of the IPM package structures 1, 4, 5, and 6 of the first to fourth embodiments only in that in step S3, forming the dielectric layer 23 and the redistribution layer 13 may include the following steps S31 to S34.

[0134] Step S31 : forming a first opening 110 a in the protection layer 110 to expose the first pad 111 .

[0135] Step S32 : forming a first metal pattern layer on the protection layer 110 , the first pad 111 and the front surface 12 a side of the first plastic packaging layer 12 .

[0136] The first opening 110 a is filled when the first metal pattern layer is formed.

[0137] Step S33 : forming a dielectric layer 23 that embeds the first metal pattern layer; and forming a second opening in the dielectric layer 23 that exposes the first metal pattern layer.

[0138] The dielectric layer 23 is an insulating material, specifically an insulating resin material or an inorganic material. Examples of insulating resin materials include polyimide, epoxy resin, ABF (Ajinomoto buildup film), PBO (Polybenzoxazole), organic polymer films, organic polymer composites, or other organic materials with similar insulating properties. Examples of inorganic materials include at least one of silicon dioxide and silicon nitride. Compared to inorganic materials, insulating resin materials have lower tensile stress, which can prevent warping of the surface of the IPM package structure 6.

[0139] Step S34 : forming a second metal pattern layer on one side of the dielectric layer 23 .

[0140] The second opening is filled when forming the second metal pattern layer.

[0141] Except for the above differences, other steps of the method for manufacturing the IPM package structure 7 of the fifth embodiment may refer to the corresponding steps of the methods for manufacturing the IPM package structures 1, 4, 5, and 6 of the first to fourth embodiments.

[0142] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A method for manufacturing an IPM packaging structure, characterized in that: include: A carrier board and at least one group of components to be encapsulated and carried on the carrier board are provided, wherein each group of components to be encapsulated includes: a control chip, the control chip including a plurality of first solder pads, the first solder pads being located on an active surface of the control chip; wherein the active surface of the control chip faces the carrier board; forming a first plastic encapsulation layer on the surface of the carrier board to embed the component to be plastic encapsulated, wherein the first plastic encapsulation layer includes a front surface and a back surface relative to each other; Removing the carrier board to expose the active surface of the control chip and the front surface of the first plastic encapsulation layer; forming a redistribution layer on the active surface of the control chip and the front side of the first plastic encapsulation layer, the redistribution layer being used at least for performing circuit layout on each of the first pads of the control chip in the group; Providing a pin including an inner pin portion and an outer pin portion, disposing the redistribution layer on the inner pin portion, and electrically connecting the inner pin portion and the redistribution layer; Arranging an IGBT chip on the rewiring layer, and electrically connecting the IGBT chip and the rewiring layer; forming a second plastic encapsulation layer covering the IGBT chip, the redistribution layer, and the inner pin portion, so that the outer pin portion is exposed outside the first plastic encapsulation layer and the second plastic encapsulation layer; The parts to be plastic-encapsulated include a plurality of groups. Between the step of forming a redistribution layer and the step of arranging the redistribution layer on the inner pin portion, the method for manufacturing the IPM package structure further includes: cutting to form a plurality of intermediate package structures, each of the intermediate package structures including a group of the parts to be plastic-encapsulated; The manufacturing method also includes: arranging a first heat sink on the back side of the first plastic packaging layer, connecting the first heat sink and the redistribution layer through a first conductive column or a first conductive plug, the first heat sink being used for dissipating heat from the control chip or for dissipating heat from the control chip and the IGBT chip at the same time; the distance from the surface of the first heat sink away from the second plastic packaging layer to the second plastic packaging layer is greater than the distance from the surface of the external pin away from the second plastic packaging layer to the second plastic packaging layer.

2. The method for manufacturing the IPM packaging structure according to claim 1, wherein: The second plastic encapsulation layer comprises a front surface and a back surface relative to each other, and the back surface of the second plastic encapsulation layer is away from the redistribution layer; The manufacturing method of the IPM packaging structure also includes: setting a second heat sink on the back side of the second plastic packaging layer, connecting the second heat sink to the redistribution layer through a second conductive column or a second conductive plug, and the second heat sink is used to dissipate heat from the IGBT chip.

3. The method for manufacturing the IPM packaging structure according to claim 1, wherein: The IGBT chip and the redistribution layer are electrically connected together through a wire bonding process.

4. The method for manufacturing the IPM packaging structure according to claim 1, wherein: While arranging an IGBT chip on the rewiring layer, a MOS chip is also arranged on the rewiring layer, and the MOS chip and the rewiring layer are electrically connected together; the formed second plastic packaging layer also covers the MOS chip.

5. An IPM packaging structure, characterized in that: include: A control chip, the control chip comprising a plurality of first pads, wherein the first pads are located on an active surface of the control chip; a first plastic encapsulation layer covering at least a side surface of the control chip; the first plastic encapsulation layer comprising a front surface and a back surface relative to each other, the front surface of the first plastic encapsulation layer exposing an active surface of the control chip; a redistribution layer, located between the active surface of the control chip and the front side of the first plastic packaging layer; The redistribution layer is at least used to perform circuit layout on each of the first pads; An IGBT chip is located on the redistribution layer and is electrically connected to the redistribution layer; A pin, comprising an inner pin portion and an outer pin portion, wherein the inner pin portion is located on the redistribution layer and electrically connected to the redistribution layer; as well as A second plastic encapsulation layer covers the IGBT chip, the redistribution layer, and the inner pin portion; the outer pin portion is exposed outside the first plastic encapsulation layer and the second plastic encapsulation layer; A first heat sink is located on the back side of the first plastic packaging layer. The first heat sink is connected to the redistribution layer through a first conductive column or a first conductive plug, and is used for dissipating heat from the control chip or for dissipating heat from the control chip and the IGBT chip at the same time. The distance from the surface of the first heat sink away from the second plastic packaging layer to the second plastic packaging layer is greater than the distance from the surface of the external pin away from the second plastic packaging layer to the second plastic packaging layer.

6. The IPM packaging structure according to claim 5, characterized in that: The second plastic encapsulation layer comprises a front surface and a back surface relative to each other, and the back surface of the second plastic encapsulation layer is away from the redistribution layer; The IPM packaging structure further includes: a second heat sink located on the back side of the second plastic packaging layer. The second heat sink is connected to the redistribution layer via a second conductive column or a second conductive plug for dissipating heat from the IGBT chip.

7. The IPM packaging structure according to claim 5, characterized in that: The IGBT chip and the redistribution layer are electrically connected together through leads.

8. The IPM packaging structure according to claim 5, characterized in that: Also includes: The MOS chip is located on the redistribution layer and is electrically connected to the redistribution layer; the second plastic packaging layer further covers the MOS chip.

Images