Semiconductor structure and method for manufacturing the same

Abstract

The present application discloses a semiconductor structure and a method for preparing the same, wherein the method for preparing the semiconductor structure comprises: providing a substrate, wherein the surface of the substrate is covered with a graphic structure to be etched; and using ion implantation technology to etch and remove the graphic structure to be etched to obtain a target graphic structure. When high-energy ions collide with the graphic structure to be etched, energy is transferred from the incident ions to the surface atoms of the graphic structure to be etched. If the binding energy between the atoms on the surface of the graphic structure to be etched is lower than the energy of the incident ions, the surface atoms of the graphic structure to be etched will be moved away or removed from the surface to achieve the purpose of etching. The method can achieve control of the etching speed by controlling the energy and dosage of the injected ions. Increasing the energy and dosage of the injected ions can speed up the etching speed and improve the production efficiency of the product.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and specifically relates to a semiconductor structure and a method for preparing the same. Background Art

[0002] Etching is a technique for removing materials by chemical reaction or physical impact. In fact, in a narrow sense, it is photolithography corrosion. First, the photoresist is exposed by photolithography, and then the corrosion treatment is carried out by other means to remove the required part. Usually, etching technology can be divided into two categories: wet etching and dry etching. It is a very important step in semiconductor manufacturing process, microelectronics manufacturing process and micro-nano manufacturing process, and is the main process of pattern processing associated with photolithography.

[0003] At present, in the semiconductor industry, plasma etching in dry etching is becoming more and more widely used because it can make circuit patterns more refined.

[0004] The existing dry etching process is difficult to control and cannot effectively increase the etching speed. Summary of the invention

[0005] The purpose of the present application is to provide a semiconductor structure and a method for preparing the same to control the etching process.

[0006] According to a first aspect of an embodiment of the present application, a method for preparing a semiconductor structure is provided, and the method may include:

[0007] Providing a substrate, the surface of which is covered with a pattern structure to be etched;

[0008] The ion implantation technique is used to etch away the graphic structure to obtain the target graphic structure.

[0009] In some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer includes a first region and a second region, the mask layer has an exposed first groove, the first region is a region of the mask layer where the first groove is exposed, and the second region is a region of the mask layer where the first groove is not exposed;

[0010] The ion implantation technique is used to etch away the graphic structure to be etched, and the target graphic structure is obtained, including:

[0011] Using ion implantation technology to etch and remove the mask layer of a preset thickness in the first region;

[0012] The mask layer in the first area is removed by dry etching until the first area exposes the substrate, thereby obtaining the target graphic structure.

[0013] In some optional embodiments of the present application, the preset thickness is 80%-90% of the overall thickness of the mask layer.

[0014] In some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer;

[0015] The ion implantation technique is used to etch away the graphic structure to be etched, and the target graphic structure is obtained, including:

[0016] Determining the thickness of the mask layer to be etched;

[0017] Adjusting the ion implantation dose of the corresponding mask layer area according to the thickness to be etched;

[0018] Based on the ion implantation dose, the oxide layer and the mask layer are removed by etching using the ion implantation technology to expose the bottom of the second trench and the substrate portion covered by the mask layer, thereby obtaining a target graphic structure.

[0019] In some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer;

[0020] The ion implantation technique is used to etch away the graphic structure to be etched, and the target graphic structure is obtained, including:

[0021] The oxide layer and the mask layer of a preset thickness are removed by etching using ion implantation technology to expose the bottom of the second trench and the substrate portion covered by the mask layer.

[0022] In some optional embodiments of the present application, the graphic structure to be etched is removed by etching using ion implantation technology to obtain a target graphic structure, and further includes:

[0023] The implantation area of ​​the ionized rare gas is adjusted, and the oxide layer covering the sidewall of the second trench is etched to make the oxide layer covering the sidewall of the second trench have the same height, thereby obtaining a target pattern structure.

[0024] In some optional embodiments of the present application, the implanted ions in the ion implantation technology are positive argon ions.

[0025] In some optional embodiments of the present application, the implantation energy of the argon positive ions is greater than 10 KeV and less than 30 KeV.

[0026] According to a second aspect of an embodiment of the present application, a semiconductor structure is provided. The semiconductor structure can be prepared using the method for preparing a semiconductor structure according to any one of the first aspects of the embodiments.

[0027] According to a third aspect of an embodiment of the present application, a semiconductor etching method is provided, which may include:

[0028] Acquire a region of the semiconductor to be etched;

[0029] Calculate the ion implantation dose according to the etching thickness of the area to be etched;

[0030] Based on the ion implantation dose, the ion implanter is called to etch and remove the area to be etched.

[0031] In some optional embodiments of the present application, the implanted ions of the ion implanter are positive argon ions.

[0032] In some optional embodiments of the present application, the implantation energy of the argon positive ions is greater than 10 KeV and less than 30 KeV.

[0033] The above technical solution of the present application has the following beneficial technical effects:

[0034] The method of the embodiment of the present application provides a substrate whose surface is covered with a graphic structure to be etched, and uses ion implantation technology to etch and remove the graphic structure to be etched to obtain a target graphic structure. The method uses ion implantation technology to perform semiconductor etching. When high-energy ions collide with the graphic structure to be etched, energy is transferred from the incident ions to the surface atoms of the graphic structure to be etched. If the binding energy between the atoms on the surface of the graphic structure to be etched is lower than the energy of the incident ions, the surface atoms of the graphic structure to be etched will be moved away or removed from the surface to achieve the purpose of etching. The method can control the etching speed by controlling the energy and dosage of the injected ions. Increasing the energy and dosage of the injected ions can speed up the etching speed and improve the production efficiency of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a schematic flow chart of a method for preparing a semiconductor structure in an exemplary embodiment of the present application;

[0036] Figure 2 is a schematic diagram of a substrate structure in an exemplary embodiment of the present application;

[0037] Figure 3 is a schematic diagram of a target graphic structure obtained by etching in an exemplary embodiment of the present application;

[0038] Figure 4 is a schematic diagram of a substrate structure in another exemplary embodiment of the present application;

[0039] Figure 5 is a schematic diagram of a structure after etching using ion implantation technology in another exemplary embodiment of the present application;

[0040] Figure 6is a schematic diagram of a target graphic structure obtained by dry etching in another exemplary embodiment of the present application;

[0041] Figure 7 is a schematic diagram of a substrate structure in another exemplary embodiment of the present application;

[0042] Figure 8 is a schematic diagram of a target graphic structure obtained by etching using ion implantation technology in another exemplary embodiment of the present application;

[0043] Fig. 9 is a schematic diagram of a substrate structure in another exemplary embodiment of the present application;

[0044] Fig.10 is a schematic diagram of a target graphic structure obtained after etching using ion implantation technology in another exemplary embodiment of the present application;

[0045] Fig.11 is a schematic diagram of a substrate structure in another exemplary embodiment of the present application;

[0046] Fig.12 is a schematic diagram of a structure after etching using ion implantation technology in another exemplary embodiment of the present application;

[0047] Fig.13 It is a schematic diagram of a target pattern structure that is etched flat using ion implantation technology in another exemplary embodiment of the present application;

[0048] Fig.14 It is a schematic flow chart of a semiconductor etching method in another exemplary embodiment of the present application. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with specific implementations and with reference to the accompanying drawings. It should be understood that these descriptions are only exemplary and are not intended to limit the scope of the present application. In addition, in the following description, the description of known structures and technologies is omitted to avoid unnecessary confusion of the concepts of the present application.

[0050] The accompanying drawings show schematic diagrams of layer structures according to embodiments of the present application. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clarity. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0051] Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0052] In the description of the present application, it should be noted that the terms "first", "second" and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0053] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0054] In the process of manufacturing semiconductor devices, after a mask layer is arranged above the pattern material to be formed, the mask layer is removed by dry etching. If the pattern material or the mask layer is too thick in this process, the etching time will be relatively long, which will greatly affect the production efficiency of the product. Therefore, the present application provides a method for preparing a semiconductor structure to solve this problem.

[0055] The following is a detailed description of the method for preparing the substrate provided in the embodiment of the present application through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0056] like Figure 1 As shown, in a first aspect of an embodiment of the present application, a method for preparing a semiconductor structure is provided, and the method may include:

[0057] S110: providing a substrate, wherein a surface of the substrate is covered with a pattern structure to be etched;

[0058] S120: using ion implantation technology to etch away the graphic structure to be etched, to obtain a target graphic structure.

[0059] The above-mentioned embodiment method utilizes ion implantation technology to perform semiconductor etching. When high-energy ions collide with the graphic structure to be etched, energy is transferred from the incident ions to the surface atoms of the graphic structure to be etched. If the binding energy between the atoms on the surface of the graphic structure to be etched is lower than the energy of the incident ions, the surface atoms of the graphic structure to be etched will be moved away or removed from the surface to achieve the etching purpose. This method can control the etching speed by controlling the energy and dosage of the injected ions. Increasing the energy and dosage of the injected ions can speed up the etching speed and improve the production efficiency of the product.

[0060] For a clearer explanation, the above steps are described below:

[0061] First, step S110 is to provide a substrate, the surface of which is covered with a pattern structure to be etched, such as Figure 2 shown.

[0062] The material of the substrate in this step includes but is not limited to silicon crystal or germanium crystal, silicon on insulator (SOI) structure or epitaxial layer structure on silicon, compound semiconductor (such as silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, or indium dysprosium), alloy semiconductor (such as SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, GaInAsP or a combination thereof).

[0063] The graphic structure to be etched in this step is a mask layer stacked in sequence, the mask layer includes a first region and a second region, the mask layer has an exposed first groove, the first region is a region of the mask layer where the first groove is exposed, and the second region is a region of the mask layer where the first groove is not exposed;

[0064] The graphic structure to be etched may also be a mask layer stacked in sequence, wherein the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer.

[0065] Exemplarily, the material of the mask layer may include one of the group consisting of photoresist, silicon dioxide, silicon nitride, silicon oxynitride and polysilicon. Exemplarily, the material of the oxide layer may be silicon oxide or silicon oxynitride.

[0066] Next is step S120: using ion implantation technology to etch away the graphic structure to obtain the target graphic structure, such as Figure 3 shown.

[0067] In this step, the ion implantation technique may be used alone to etch and remove the graphic structure to be etched, or the ion implantation technique may be used with the existing dry etching to etch and remove the graphic structure to be etched. In this step, the implanted ions of the ion implantation technique may be argon positive ions; the implantation energy of the argon positive ions may be greater than 10 KeV and less than 30 KeV.

[0068] like Figure 4 As shown, in some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer includes a first region and a second region, the mask layer has an exposed first groove, the first region is a region of the mask layer exposing the first groove, and the second region is a region of the mask layer not exposing the first groove;

[0069] Using ion implantation technology to etch and remove the graphic structure to be etched to obtain the target graphic structure may include:

[0070] The mask layer of a preset thickness in the first region is removed by etching using ion implantation technology, such as Figure 5 As shown;

[0071] The mask layer of the first region is removed by dry etching until the first region exposes the substrate to obtain a target graphic structure, such as Figure 6 shown.

[0072] In this embodiment, the preset thickness may be 80%-90% of the overall thickness of the oxide layer.

[0073] This embodiment uses ion implantation technology with existing dry etching to remove the pattern structure to be etched, which has the characteristics of fast etching speed of ion implantation technology and good selectivity of dry etching.

[0074] like Figure 7 As shown, in some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer includes a first region and a second region, the mask layer has an exposed first groove, the first region is a region of the mask layer exposing the first groove, and the second region is a region of the mask layer not exposing the first groove;

[0075] Using ion implantation technology to etch and remove the graphic structure to be etched to obtain the target graphic structure may include:

[0076] The mask layer in the first region is removed by etching using ion implantation technology until the first region exposes the substrate to obtain a target graphic structure, such as Figure 8 shown.

[0077] This embodiment directly utilizes ion implantation technology to perform etching and controls the etching area to achieve rapid removal of the graphic structure to be etched.

[0078] like Fig. 9 As shown, in some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer;

[0079] The ion implantation technique is used to etch away the graphic structure to be etched, and the target graphic structure is obtained, including:

[0080] Determining the thickness of the mask layer to be etched;

[0081] Adjusting the ion implantation dose of the corresponding mask layer area according to the thickness to be etched;

[0082] Based on the ion implantation dose, the oxide layer and the mask layer are removed by etching using the ion implantation technology to expose the bottom of the second trench and the substrate portion covered by the mask layer, thereby obtaining a target graphic structure, such as Fig.10 shown.

[0083] In this embodiment, when relatively fine patterns are secondary conducted, the mask layer and the oxide layer can be directly removed by using ion implantation technology, which is convenient and quick.

[0084] like Fig.11 As shown, in some optional embodiments of the present application, the graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer;

[0085] The ion implantation technique is used to etch away the graphic structure to be etched, and the target graphic structure is obtained, including:

[0086] The oxide layer and the mask layer of a preset thickness are removed by etching using ion implantation technology to expose the bottom of the second trench and the substrate portion covered by the mask layer. Fig.12 shown.

[0087] like Fig.13 As shown, in some optional embodiments of the present application, the graphic structure to be etched is removed by etching using ion implantation technology to obtain a target graphic structure, and further includes:

[0088] The implantation area of ​​the ionized rare gas is adjusted, and the oxide layer covering the sidewall of the second trench is etched to make the oxide layer covering the sidewall of the second trench have the same height, thereby obtaining a target pattern structure.

[0089] When performing secondary conduction of finer graphics, there is a situation where the height of the entire mask is inconsistent, resulting in inconsistent thickness of the pattern left after dry etching. In this embodiment, ion implantation technology is first used to remove the oxide layer and mask layer of a preset thickness to expose the bottom of the second groove and the substrate portion covered by the mask layer, and then the controllability of the ion implantation technology is used to implant ions into the uneven areas to finally obtain a flat target graphic structure.

[0090] In some optional embodiments of the present application, since the mass of positive argon ions is more suitable for semiconductor etching, the implanted ions in the ion implantation technology are positive argon ions.

[0091] In this embodiment, argon positive ions are injected by ion implantation. Argon positive ions have an etching effect and can achieve an etching rate faster than ordinary plasma dry etching. By using the ion implantation method of argon positive ions, the argon positive ion dosage in different areas of the entire wafer can be changed as needed to achieve different etching rates in different areas.

[0092] The higher the ion implantation energy, the better. In some optional embodiments of the present application, the implantation energy of argon positive ions is greater than 10 KeV and less than 30 KeV. Within the scope of this embodiment, the substrate can be not damaged under accelerated etching conditions. In this implantation energy range, a faster etching rate than ordinary plasma dry etching can be achieved.

[0093] In a second aspect of the embodiments of the present application, a semiconductor structure is provided. The semiconductor structure can be prepared using the method for preparing the semiconductor structure of the first aspect of the embodiments.

[0094] The structure of this embodiment is prepared using the semiconductor structure preparation method of the first aspect of the embodiment. The preparation process controls the etching speed by controlling the energy and dose of the injected ions. Increasing the energy and dose of the injected ions can speed up the etching speed and improve the production efficiency of the product.

[0095] like Fig.14 As shown, in a third aspect of an embodiment of the present application, a semiconductor etching method is provided, and the method may include:

[0096] S1410: Acquire a region of the semiconductor to be etched;

[0097] S1420: Calculating the ion implantation dose according to the etching thickness of the area to be etched;

[0098] S1430: Based on the ion implantation dose, call the ion implanter to etch and remove the area to be etched.

[0099] The method of this embodiment uses an ion implanter to etch away the area to be etched, and the etching speed can be controlled by controlling the energy and dosage of the implanted ions. Increasing the energy and dosage of the implanted ions can speed up the etching speed and improve the production efficiency of the product. It can also realize automatic control.

[0100] In some optional embodiments of the present application, the implanted ions of the ion implanter are positive argon ions.

[0101] In some optional embodiments of the present application, the implantation energy of the argon positive ions is greater than 10 KeV and less than 30 KeV.

[0102] It should be noted that the semiconductor etching method provided in the embodiment of the present application can be performed by a semiconductor etching device, or a control module in the semiconductor etching device for performing the semiconductor etching method. In the embodiment of the present application, the semiconductor etching method performed by the semiconductor etching device is taken as an example to illustrate the semiconductor etching device provided in the embodiment of the present application.

[0103] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0104] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0105] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A method for preparing a semiconductor structure, characterized in that: include: Providing a substrate, wherein the surface of the substrate is covered with a pattern structure to be etched; Using ion implantation technology to etch and remove the graphic structure to be etched, so as to obtain a target graphic structure; The graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer; The method of using ion implantation technology to etch and remove the graphic structure to be etched to obtain a target graphic structure includes: Determining the thickness of the mask layer to be etched; adjusting the ion implantation dose corresponding to the mask layer region according to the thickness to be etched; Based on the ion implantation dose, the oxide layer and the mask layer are removed by etching using an ion implantation technique to expose the bottom of the second trench and the substrate portion covered by the mask layer, thereby obtaining a target graphic structure.

2. The method for preparing a semiconductor structure according to claim 1, characterized in that: The graphic structure to be etched is a mask layer stacked in sequence, the mask layer includes a first area and a second area, the mask layer has an exposed first groove, the first area is an area of ​​the mask layer where the first groove is exposed, and the second area is an area of ​​the mask layer where the first groove is not exposed; The method of using ion implantation technology to etch and remove the graphic structure to be etched to obtain a target graphic structure includes: Using ion implantation technology to etch and remove the mask layer of a preset thickness in the first region; The mask layer in the first area is removed by dry etching until the first area exposes the substrate, thereby obtaining the target graphic structure.

3. The method for preparing a semiconductor structure according to claim 2, characterized in that: The preset thickness is 80%-90% of the overall thickness of the mask layer.

4. A method for preparing a semiconductor structure, characterized in that: include: Providing a substrate, wherein the surface of the substrate is covered with a pattern structure to be etched; Using ion implantation technology to etch and remove the graphic structure to be etched, so as to obtain a target graphic structure; The graphic structure to be etched is a mask layer stacked in sequence, the mask layer has a second trench exposing the substrate, and the bottom and sidewall of the second trench and the top of the mask layer are covered with an oxide layer; The method of using ion implantation technology to etch and remove the graphic structure to be etched to obtain a target graphic structure includes: Using ion implantation technology to etch and remove the oxide layer and the mask layer of a preset thickness, so as to expose the bottom of the second trench and the substrate portion covered by the mask layer; The method of etching and removing the graphic structure to be etched by using ion implantation technology to obtain a target graphic structure also includes: The implantation area of ​​the ionized rare gas is adjusted, and the oxide layer covering the sidewall of the second trench is etched to make the oxide layer covering the sidewall of the second trench have a uniform height, thereby obtaining a target pattern structure.

5. The method for preparing a semiconductor structure according to any one of claims 1 to 4, characterized in that: The implanted ions of the ion implantation technology are positive argon ions.

6. The method for preparing a semiconductor structure according to claim 5, characterized in that: The implantation energy of the argon positive ions is greater than 10 KeV and less than 30 KeV.

7. A semiconductor structure, characterized in that: The semiconductor structure is prepared by the method for preparing the semiconductor structure according to any one of claims 1 to 6.

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