Packaging substrate and manufacturing method thereof

Abstract

The present invention provides a packaging carrier and a method for manufacturing the same. The packaging carrier includes a build-up circuit structure, a first insulating protective layer, a plurality of connection pads, and a plurality of metal balls. The build-up circuit structure has an upper surface. The first insulating protective layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings. The connection pads are respectively disposed in the first openings of the first insulating protective layer and are structurally and electrically connected to the build-up circuit structure. Each connection pad has an arc-shaped groove. The metal balls are respectively disposed in the arc-shaped groove of each connection pad. The metal balls and the corresponding connection pads define a plurality of bump structures, and the plurality of top surfaces of the bump structures are located on the same plane. The packaging carrier provided by the present invention has better flatness, and the method for manufacturing the packaging carrier of the present invention can improve the chip packaging yield.

Description

Technical Field

[0001] The present invention relates to a substrate structure and a manufacturing method thereof, and in particular to a packaging carrier and a manufacturing method thereof. Background Art

[0002] In order to achieve a chip stacking structure, a copper pillar structure formed by electroplating is provided on the circuit substrate or carrier of the current flip chip (Flip chip) or package-on-package (POP). However, due to the necessary electroplating and layer-adding processes in the production process of the circuit substrate or carrier, its coplanarity is poor, which in turn affects the height of the electroplated copper pillar structure and causes variation. In other words, the surface coplanarity of the circuit substrate or carrier with a copper pillar structure is poor. In order to solve the above problems, before the chip is packaged to the circuit substrate or carrier with a copper pillar structure, an additional grinding process is required for the copper pillar structure to improve the chip packaging yield. However, due to the need for an additional grinding process, the process is lengthy and the production cost is high. Summary of the invention

[0003] The present invention is directed to a packaging carrier having better flatness.

[0004] The present invention is directed to a method for manufacturing a packaging carrier, which is used to manufacture the above-mentioned packaging carrier and can improve the chip packaging yield.

[0005] According to an embodiment of the present invention, a package carrier includes a build-up circuit structure, a first insulating protective layer, a plurality of connection pads, and a plurality of metal balls. The build-up circuit structure has an upper surface. The first insulating protective layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings. The connection pads are respectively disposed in the first openings of the first insulating protective layer and are structurally and electrically connected to the build-up circuit structure. Each connection pad has an arc-shaped groove. The metal balls are respectively disposed in the arc-shaped groove of each connection pad. The metal balls respectively define a plurality of bump structures with the corresponding connection pads, and the plurality of top surfaces of the bump structures are located on the same plane.

[0006] In the package carrier according to the embodiment of the present invention, the package carrier further includes a second insulating protection layer disposed on a lower surface of the build-up circuit structure relative to the upper surface and having a plurality of second openings, wherein the second openings expose a portion of the build-up circuit structure.

[0007] In the package carrier according to the embodiment of the present invention, each metal ball includes a copper core, a first metal layer and a second metal layer. The first metal layer covers the surface of the copper core, and the second metal layer covers the first metal layer.

[0008] In the package carrier according to the embodiment of the present invention, the second metal layer completely covers the first metal layer, and the metal balls and the corresponding connection pads respectively define a plurality of flat bump structures.

[0009] In the package carrier according to the embodiment of the present invention, the second metal layer covers a portion of the first metal layer, and the metal balls and the corresponding connection pads respectively define a plurality of convex-top type bump structures.

[0010] According to an embodiment of the present invention, a method for manufacturing a package carrier includes the following steps. A substrate is provided. The substrate includes a core layer, two first copper foil layers and two second copper foil layers. The two first copper foil layers are arranged on two opposite surfaces of the core layer and are located between the core layer and the two second copper foil layers. Two photoresist layers are formed on the two second copper foil layers of the substrate respectively. The two photoresist layers have a plurality of openings respectively, and the openings expose a portion of the two second copper foil layers. A plurality of metal balls are bonded to the two second copper foil layers exposed by the openings. Two first insulating protective layers are formed on the two photoresist layers respectively. The two first insulating protective layers have a plurality of first openings respectively, and the first openings expose the metal balls respectively. A plurality of connection pads are formed in the first openings of the two first insulating protective layers and extend onto the two first insulating protective layers. The connection pads cover the metal balls respectively, and each connection pad has an arc-shaped joint with the corresponding metal ball. Two build-up layer circuit structures are formed on the two first insulating protective layers respectively. The connection pads are electrically connected to the two build-up layer circuit structures. The substrate and the photoresist layer are removed to expose the two first insulating protection layers and the metal balls. The metal balls and the corresponding connection pads respectively define a plurality of bump structures, and the top surfaces of the bump structures are located on the same plane.

[0011] In the method for manufacturing a package carrier according to an embodiment of the present invention, the method for manufacturing a package carrier further includes forming two second insulating protection layers respectively on the two build-up layer circuit structures after forming two build-up layer circuit structures respectively on the two first insulating protection layers and before removing the substrate and the photoresist layer. The two second insulating protection layers respectively have a plurality of second openings, and the second openings respectively expose a portion of the two build-up layer circuit structures.

[0012] In the method for manufacturing a package carrier according to an embodiment of the present invention, each metal ball includes a copper core, a first metal layer and a second metal layer. The first metal layer covers the surface of the copper core, and the second metal layer covers the first metal layer.

[0013] In the method for manufacturing a package carrier according to an embodiment of the present invention, the second metal layer completely covers the first metal layer, and the step of removing the substrate and the photoresist layer includes: peeling off the two first copper foil layers and the two second copper foil layers of the substrate to remove the core layer and the two first copper foil layers. Removing the two second copper foil layers to expose the photoresist layer and a surface of the second metal layer of each metal ball. Removing the photoresist layer to expose the two first insulating protective layers and the metal balls. The metal balls and the corresponding connection pads define a plurality of flat bump structures.

[0014] In the method for manufacturing a package carrier according to an embodiment of the present invention, after removing the photoresist layer, a portion of the second metal layer of each metal ball is removed to expose a portion of the first metal layer. The metal balls and the corresponding connection pads define a plurality of convex bump structures.

[0015] Based on the above, in the design of the packaging carrier of the present invention, the metal balls are respectively arranged in the arc-shaped grooves of each connection pad, and the metal balls and the corresponding connection pads can define a plurality of bump structures, wherein the top surfaces of these bump structures are located on the same plane. That is, the bump structure of the present invention has better coplanarity. Thereby, the packaging carrier of the present invention can have better flatness, which can improve the subsequent chip packaging yield. In addition, compared with the conventional method of forming a copper column structure through electroplating and grinding procedures, the manufacturing method of the packaging carrier of the present invention is to define the bump structure through the connection pads and metal balls, so there is no need to perform a grinding procedure before chip packaging, which can simplify the process and reduce production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figures 1A to 1L is a partial cross-sectional schematic diagram of a method for manufacturing a packaging carrier according to an embodiment of the present invention;

[0017] Figure 2 is a partial cross-sectional schematic diagram of a packaging carrier according to an embodiment of the present invention;

[0018] Figure 3A is a schematic top view of a packaging carrier according to another embodiment of the present invention;

[0019] Figure 3B is along Figure 3A Schematic cross-sectional view of line II.

[0020] Description of Reference Numerals

[0021] 10:Substrate;

[0022] 12: core layer;

[0023] 13, 15: surface;

[0024] 14: first copper foil layer;

[0025] 16: second copper foil layer;

[0026] 20: photoresist layer;

[0027] 22: Open your mouth;

[0028] 100a, 100b: packaging substrate;

[0029] 110, 110b: metal ball;

[0030] 112: copper core;

[0031] 114: first metal layer;

[0032] 116, 116b: second metal layer;

[0033] 117: surface;

[0034] 120: first insulating protective layer;

[0035] 122: First opening;

[0036] 130a: copper layer;

[0037] 130: connection pad;

[0038] 140: layer-added circuit structure;

[0039] 141: upper surface;

[0040] 143: lower surface;

[0041] 142: dielectric layer;

[0042] 144: circuit layer;

[0043] 146: conductive through hole;

[0044] 150: second insulating protective layer;

[0045] 152: second opening;

[0046] 170: bump;

[0047] B1: flat bump structure;

[0048] B2: convex top type bump structure;

[0049] C: arc-shaped groove;

[0050] D1: chip configuration area;

[0051] D2: peripheral area;

[0052] H1: first height;

[0053] H2: second height;

[0054] P1, P2: plane;

[0055] S: arc-shaped joint;

[0056] T: Top surface. DETAILED DESCRIPTION

[0057] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0058] Figures 1A to 1L FIG. 1 is a partial cross-sectional schematic diagram of a method for manufacturing a packaging carrier according to an embodiment of the present invention. Figure 1K and Figure 1L Only one package carrier on one side after being detached from the substrate 10 is shown.

[0059] Regarding the method for manufacturing the package carrier of this embodiment, first, please refer to Figure 1A , providing a substrate 10. In detail, the substrate 10 of the present embodiment includes a core layer 12, two first copper foil layers 14 and two second copper foil layers 16. The first copper foil layer 14 is disposed on two opposite surfaces 13 and 15 of the core layer 12 and is located between the core layer 12 and the second copper foil layer 16. Here, the substrate 10 is, for example, a tearable copper foil substrate, and the material of the core layer 12 is, for example, glass fiber, but the present invention is not limited to this substrate 10. In other embodiments not shown, the substrate may also be a BT resin substrate or other appropriate substrates.

[0060] Next, please refer to Figure 1B , two photoresist layers 20 are formed on the second copper foil layer 16 of the substrate 10, wherein the photoresist layers 20 have a plurality of openings 22, and the openings 22 expose a portion of the second copper foil layer 16. Here, the method of forming the photoresist layer 20 is to press a photoresist material layer (not shown) onto the substrate 10 by lamination (please refer to Figure 1A ), and then a photoresist layer 20 having an opening 22 is formed by laser drilling.

[0061] Next, please refer to Figure 1D , bonding a plurality of metal balls 110 to the second copper foil layer 16 exposed by the opening 22 of the photoresist layer 20. In detail, the step of bonding the metal balls 110 to the second copper foil layer 16 exposed by the opening 22, first, please refer to Figure 1C, provide metal balls 110 in the openings 22 of the photoresist layer 20, wherein each metal ball 110 includes a copper core 112, a first metal layer 114, and a second metal layer 116. The first metal layer 114 covers the surface of the copper core 112, and the second metal layer 116 covers the first metal layer 114. Here, the thickness of the first metal layer 114 is thinner than the thickness of the second metal layer 116, and the first metal layer 114 can be regarded as a protective layer to protect the surface of the copper core 112. The first metal layer 114 is, for example, a nickel layer or a gold layer, and the second metal layer 116 is, for example, a pure tin layer, a tin alloy layer, a tin-silver-copper alloy layer, a tin-copper alloy layer, a tin-antimony alloy layer, a tin-lead alloy layer, etc., but is not limited thereto. Please refer to Figure 1D , the metal ball 110 is subjected to a reflow process, so that the metal ball 110 is bonded to the second copper foil layer 16 exposed by the opening 22 through the intermetallic compound. More specifically, after the reflow process, the second metal layer 116 is in a molten state and flows to fill the opening 22 of the photoresist layer 20. At this time, the metal ball 110 is bonded to the second copper foil layer 16 through the molten second metal layer 116.

[0062] Next, please refer to Figure 1E , two first insulating protective layers 120 are formed on the two photoresist layers 20, respectively, wherein the first insulating protective layers 120 respectively have a plurality of first openings 122, and the first openings 122 respectively expose the metal balls 110. Here, the material of the first insulating protective layer 120 is, for example, a dry film type solder mask, and its model is, for example, Taiyo AUS SR1, SR3; Hitachi SR7300, SRFA; Sumitomo LAZ-7751, 7752, etc., but not limited thereto.

[0063] Next, please refer to Figure 1G , forming a plurality of connection pads 130 in the first opening 122 of the first insulating protection layer 120 and extending onto the first insulating protection layer 120. Here, the connection pads 130 cover the metal balls 110 respectively, and an arc-shaped interface S is formed between each connection pad 130 and the corresponding metal ball 110. In detail, the steps of forming the connection pads 130 are as follows: first, refer to Figure 1F , two copper layers 130a are electroplated on the first insulating protection layer 120, wherein the copper layer 130a covers the metal ball 110 and fills the first opening 122 and extends onto the first insulating protection layer 120. Since the copper layer 130a covers the surface of the metal ball 110, the connection interface between the connection pad 130 and the metal ball 110 formed subsequently is an arc-shaped interface S (please refer to Figure 1G ). Afterwards, refer to Figure 1G, the two copper layers 130a are patterned to form connection pads 130 on the metal balls 110. That is, the connection pads 130 are separated from each other and a portion of the first insulating protection layer 120 is exposed.

[0064] Next, please refer to Figure 1H , two build-up circuit structures 140 are formed on the first insulating protection layer 120, wherein the connection pad 130 is structurally and electrically connected to the build-up circuit structure 140. Here, the build-up circuit structure 140 includes at least one dielectric layer 142 (three dielectric layers 142 are schematically shown), at least one circuit layer 144 (three circuit layers 144 are schematically shown), and at least one conductive via 146 (a plurality of conductive vias 146 are schematically shown). The dielectric layer 142 covers the connection pad 130, and the circuit layer 144 is disposed on the dielectric layer 142, and the conductive via 146 penetrates the dielectric layer 142 to electrically connect the connection pad 130 and the circuit layer 144. Here, the build-up circuit structure 140 is formed by lamination and electroplating copper layers, and the number of layers of the dielectric layer 142 and the circuit layer 144 can be increased or decreased according to needs, and is not limited here.

[0065] Afterwards, please refer to Fig. 1I , two second insulating protective layers 150 are formed on the build-up circuit structure 140, wherein the second insulating protective layers 150 have a plurality of second openings 152, and the second openings 152 expose a portion of the circuit layer 144 of the build-up circuit structure 140. Here, the material of the second insulating protective layer 150 is, for example, a dry film type solder mask, and its model is, for example, Taiyo AUS SR1, SR3; Hitachi SR7300, SRFA; Sumitomo LAZ-7751, 7752, etc., but not limited thereto.

[0066] Finally, please also refer to Figure 1J and Figure 1L , the substrate 10 and the photoresist layer 20 are removed to expose the first insulating protection layer 120 and the metal balls 110. For details, please refer to Figure 1J , the step of removing the substrate 10 and the photoresist layer 20, first, peel off the first copper foil layer 14 and the second copper foil layer 16 of the substrate 10 to remove the core layer 12 and the first copper foil layer 14. Then, please refer to Figure 1J and Figure 1K , the second copper foil layer 16 is removed to expose the photoresist layer 20 and the surface 117 of the second metal layer 116, wherein the surface 117 of the second metal layer 116 is coplanar with the photoresist layer 20. Finally, please refer to Figure 1L, the photoresist layer 20 is removed to expose the first insulating protection layer 120 and the surrounding surface of the second metal layer 116 of the metal ball 110. Here, the metal ball 110 and the corresponding connection pad 130 can define a plurality of flat bump structures B1. So far, the manufacture of the coreless package carrier 100a having the flat bump structure B1 has been completed.

[0067] In terms of structure, please refer to Figure 1L The package carrier 100a of the present embodiment includes a build-up circuit structure 140, a first insulating protection layer 120, a connection pad 130 and a metal ball 110. The build-up circuit structure 140 has an upper surface 141, and includes a dielectric layer 142, a circuit layer 144 and a conductive via 146. The first insulating protection layer 120 is disposed on the upper surface 141 of the build-up circuit structure 140 and has a first opening 122. The connection pads 130 are respectively disposed in the first openings 122 of the first insulating protection layer 120 and are structurally and electrically connected to the build-up circuit structure 140. Each connection pad 130 has an arc-shaped groove C, and the metal ball 110 is respectively disposed in the arc-shaped groove C of each connection pad 130. Here, the dielectric layer 142 covers the connection pad 130, and the circuit layer 144 is disposed on the dielectric layer 141, and the conductive via 146 penetrates the dielectric layer 142 to electrically connect the connection pad 130 and the circuit layer 144. Each metal ball 110 includes a copper core 112 , a first metal layer 114 , and a second metal layer 116 , wherein the first metal layer 114 covers the surface of the copper core 112 , and the second metal layer 116 covers the first metal layer 114 .

[0068] Furthermore, the metal ball 110 and the corresponding connection pad 130 of the present embodiment define a flat bump structure B1, wherein the surface 117 of the second metal layer 116 of the metal ball 110 is located on the same plane P1. In addition, the package carrier 100a of the present embodiment further includes a second insulating protection layer 150, which is disposed on the lower surface 143 of the build-up circuit structure 140 relative to the upper surface 141 and has a second opening 152, wherein the second opening 152 exposes a portion of the circuit layer 144 of the build-up circuit structure 140.

[0069] Since the flat bump structure B1 of the present embodiment is composed of the metal ball 110 and the corresponding connection pad 130, that is, the copper pillar structure is not formed by electroplating the copper layer, and the surface 117 of the second metal layer 116 of the metal ball 110 is located on the same plane P1. Therefore, the flat bump structure B1 of the present embodiment can have better coplanarity, so that the package carrier 100a of the present embodiment can have better flatness, which is beneficial to the subsequent chip packaging yield. In addition, the present embodiment can obtain better flatness without adding an additional grinding process before chip packaging, so it can effectively simplify the process steps and reduce production costs.

[0070] It must be noted that the following embodiments use the same component numbers and some contents of the previous embodiments, wherein the same number is used to represent the same or similar components, and the description of the same technical contents is omitted. The description of the omitted parts can refer to the previous embodiments, and the following embodiments will not be repeated.

[0071] Figure 2 FIG. 1 is a partial cross-sectional view of a packaging carrier according to an embodiment of the present invention. The packaging carrier 100a of this embodiment is similar to the packaging carrier 100b described above, and the difference between the two is that: Figure 1L After the step of removing the photoresist layer 20 to expose the first insulating protection layer 120 and the metal balls 110, please also refer to Figure 1L as well as Figure 2 , an etching process is performed to remove a portion of the second metal layer 116 of the metal ball 110, thereby exposing a portion of the first metal layer 114 to form a metal ball 110b. Here, the second metal layer 116b only covers a portion of the first metal layer 114, and the second metal layer 116b can be coplanar with the first insulating protection layer 120, and the metal ball 110b including the copper core 112, the first metal layer 114 and the second metal layer 116b and the corresponding connection pad 130 can define a plurality of convex top type bump structures B2, wherein the top surface T of the convex top type bump structure B2 is located on the same plane P2. So far, the production of the package carrier 100b with a convex top type bump structure B2 and without a core has been completed.

[0072] In the package carrier 100b of the present embodiment, since the metal ball 110b is disposed in the arc-shaped groove C of the connection pad 130, and the metal ball 110b and the corresponding connection pad 130 can define a convex top type bump structure B2, wherein the top surface T of the convex top type bump structure B2 is located on the same plane P2. That is, the convex top type bump structure B2 of the present embodiment can have better coplanarity. Therefore, the package carrier 100b of the present embodiment can have better flatness, which can improve the subsequent chip packaging yield. In addition, since the present embodiment can achieve better flatness without the need for a grinding process, the process steps can be effectively simplified and the manufacturing cost can be reduced.

[0073] Figure 3A FIG. 4 is a schematic top view of a packaging carrier according to another embodiment of the present invention. Figure 3B is along Figure 3A Please also refer to the cross-sectional diagram of line II. Figure 3A and Figure 3B The package carrier 100c of this embodiment has a chip configuration area D1 and a peripheral area D2 surrounding the chip configuration area D1. The peripheral area D2 is provided with Figure 1LThe flat bump structure B1 is provided, and the chip configuration area D1 is provided with bumps 170. For example, the chip configuration area D1 may be provided with a chip with logic computing processing capability, and the peripheral area D2 may be provided with a chip with memory storage function, but the present invention is not limited thereto. The flat bump structure B1 has a first height H1 to the first insulating protection layer 120, and the bump 170 has a second height H2 to the first insulating protection layer 120, wherein the first height H1 is 3 to 5 times the second height H2.

[0074] In summary, in the design of the packaging carrier of the present invention, the metal balls are respectively arranged in the arc-shaped grooves of each connection pad, and the metal balls and the corresponding connection pads can define a plurality of bump structures, wherein the top surfaces of these bump structures are located on the same plane. That is, the bump structure of the present invention has better coplanarity. Thereby, the packaging carrier of the present invention can have better flatness, which can improve the subsequent chip packaging yield. In addition, compared to the conventional method of forming a copper column structure through electroplating and grinding procedures, the manufacturing method of the packaging carrier of the present invention is to define the bump structure through connection pads and metal balls, so there is no need to perform a grinding procedure before chip packaging, which can simplify the process and reduce production costs.

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A packaging substrate, characterized in that: include: A build-up circuit structure having an upper surface; A first insulating protection layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings; A plurality of connection pads are respectively disposed in the plurality of first openings of the first insulating protection layer and are structurally and electrically connected to the build-up circuit structure, wherein each of the plurality of connection pads has an arc-shaped groove; as well as A plurality of metal balls are respectively disposed in the arc-shaped groove of each of the plurality of connection pads, wherein the plurality of metal balls respectively define a plurality of bump structures with the corresponding plurality of connection pads, and the plurality of top surfaces of the plurality of bump structures are located on the same plane.

2. The packaging carrier according to claim 1, characterized in that: Also includes: The second insulating protection layer is disposed on the lower surface of the build-up circuit structure relative to the upper surface and has a plurality of second openings, wherein the plurality of second openings expose a portion of the build-up circuit structure.

3. The packaging carrier according to claim 1, characterized in that: Each of the metal balls includes a copper core, a first metal layer, and a second metal layer, wherein the first metal layer covers a surface of the copper core, and the second metal layer covers the first metal layer.

4. The packaging carrier according to claim 3, characterized in that: The second metal layer completely covers the first metal layer, and the plurality of metal balls and the corresponding plurality of connection pads respectively define a plurality of flat bump structures.

5. The packaging carrier according to claim 3, characterized in that: The second metal layer covers a portion of the first metal layer, and the plurality of metal balls and the corresponding plurality of connection pads respectively define a plurality of convex-top type bump structures.

6. A method for manufacturing a packaging carrier, characterized in that: include: A substrate is provided, the substrate comprising a core layer, two first copper foil layers and two second copper foil layers, the two first copper foil layers are arranged on two opposite surfaces of the core layer and are located between the core layer and the two second copper foil layers; Forming two photoresist layers respectively on the two second copper foil layers of the substrate, wherein the two photoresist layers respectively have a plurality of openings, and the plurality of openings expose a portion of the two second copper foil layers; bonding a plurality of metal balls to the two second copper foil layers exposed by the plurality of openings; Forming two first insulating protection layers respectively on the two photoresist layers, wherein the two first insulating protection layers respectively have a plurality of first openings, and the plurality of first openings respectively expose the plurality of metal balls; forming a plurality of connection pads in the plurality of first openings of the two first insulating protection layers and extending onto the two first insulating protection layers, wherein the plurality of connection pads respectively cover the plurality of metal balls, and each of the plurality of connection pads has an arc-shaped interface with each of the corresponding plurality of metal balls; forming two build-up circuit structures respectively on the two first insulating protection layers, wherein the plurality of connection pads are electrically connected to the two build-up circuit structures; as well as The substrate and the photoresist layer are removed to expose the two first insulating protection layers and the plurality of metal balls, wherein the plurality of metal balls respectively define a plurality of bump structures with the corresponding plurality of connection pads, and the plurality of top surfaces of the plurality of bump structures are located on the same plane.

7. The method for manufacturing a packaging carrier according to claim 6, characterized in that: Also includes: After forming the two build-up circuit structures respectively on the two first insulating protection layers and before removing the substrate and the photoresist layer, two second insulating protection layers are formed respectively on the two build-up circuit structures, and the two second insulating protection layers respectively have a plurality of second openings, and the plurality of second openings respectively expose a portion of the two build-up circuit structures.

8. The method for manufacturing a packaging carrier according to claim 6, characterized in that: Each of the metal balls includes a copper core, a first metal layer, and a second metal layer, wherein the first metal layer covers a surface of the copper core, and the second metal layer covers the first metal layer.

9. The method for manufacturing a packaging carrier according to claim 8, characterized in that: The second metal layer completely covers the first metal layer, and the step of removing the substrate and the photoresist layer includes: Peeling off the two first copper foil layers and the two second copper foil layers of the substrate to remove the core layer and the two first copper foil layers; removing the two second copper foil layers to expose the plurality of photoresist layers and a surface of the second metal layer of each of the metal balls; and The photoresist layers are removed to expose the two first insulating protection layers and the metal balls, wherein the metal balls and the corresponding connection pads respectively define a plurality of flat bump structures.

10. The method for manufacturing a packaging carrier according to claim 9, characterized in that: After removing the plurality of photoresist layers, a portion of the second metal layer of each of the metal balls is removed to expose a portion of the first metal layer, and the plurality of metal balls and the corresponding plurality of connection pads respectively define a plurality of convex-top type bump structures.

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