A ferroelectric tunnel junction memristor with high tunnel resistance and its preparation method and application

Abstract

The present invention belongs to the field of microelectronics and relates to a ferroelectric tunnel junction memristor with high tunnel resistance and a preparation method and application thereof. The memristor comprises: a substrate, a bottom gold electrode layer, and a heterojunction layer are sequentially arranged from bottom to top; the heterojunction layer is CuInP 2 S 6 / MoS 2 Vertical heterojunction, as a dielectric layer. Using two different two-dimensional materials and forming them into a vertical heterojunction, a high-speed and low-voltage mediated memristor is presented.

Description

Technical Field

[0001] The invention belongs to the technical field of microelectronics and relates to a ferroelectric tunnel junction memristor with high tunnel resistance and a preparation method and application thereof. Background Art

[0002] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention, and should not necessarily be regarded as an admission or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art.

[0003] For today's memristors, high sensitivity, high stability, and fast read modes are essential. Ferroelectric tunnel junction (FTJ)-based memristors with continuous electric field-controlled resistance states are considered promising candidates for high-density memory and advanced neuromorphic computing architectures. At present, related research is not mature. The main reason is that when the size of traditional ferroelectric thin film materials in ferroelectric tunnel junctions is reduced to nanoscale, due to the influence of surface effects and size effects, their Curie temperature and polarity will decrease with the decrease of film thickness. When the thickness of the ferroelectric film is lower than a certain critical value, the ferroelectricity will disappear or the polarization will change from out-of-plane to in-plane. In addition, due to the depolarization effect caused by the charge accumulation at the interface between the two end electrodes and the central region, the ferroelectric layer cannot be made too thin, which makes it difficult for this type of ferroelectric tunnel junction to meet the requirements of minimizing the device size.

[0004] At the same time, the existing ferroelectric tunnel junction memristor has a slow speed and a small tunnel resistance, which makes it difficult to meet the requirements for high-speed, low-voltage mediated memristors. The traditional method of preparing ferroelectric tunnel junction memristors is complicated and cannot reduce the thickness of the device, making it difficult to obtain a small-sized device. Therefore, how to reduce the size of the memristor, reduce the thickness of the device, and at the same time, improve the tunnel resistance and speed to obtain a low-voltage mediated memristor has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] In order to solve the shortcomings of the current ferroelectric tunnel junction memristor, such as slow speed, low tunnel resistance, and large device thickness, the present invention proposes a ferroelectric tunnel junction memristor with high tunnel resistance and its preparation method and application. By using two different two-dimensional materials and forming them into a vertical heterojunction, a high-speed and low-voltage mediated memristor is presented.

[0006] Specifically, the present invention is achieved through the following technical solutions:

[0007] In a first aspect of the present invention, a ferroelectric tunnel junction memristor with high tunnel resistance comprises: a substrate, a bottom gold electrode layer, and a heterojunction layer arranged in sequence from bottom to top; the heterojunction layer is CuInP 2 S 6 / MoS2 Vertical heterojunction, as the dielectric layer.

[0008] In a second aspect of the present invention, a method for preparing a ferroelectric tunnel junction memristor with high tunnel resistance comprises: (1) using a CuInP 2 S 6 Gold tape for two-dimensional materials, CuInP 2 S 6 The two-dimensional material is transferred to the substrate with the electrode layer and the tape is removed; (2) MoS is obtained by mechanical exfoliation. 2 Two-dimensional materials, MoS 2 Place it on the transfer system and press it onto the existing CuInP 2 S 6 on the substrate while heating.

[0009] In a third aspect of the present invention, a ferroelectric tunnel junction memristor with high tunnel resistance and / or a method for preparing a ferroelectric tunnel junction memristor with high tunnel resistance is used in a microelectronic device.

[0010] One or more embodiments of the present invention have the following beneficial effects:

[0011] (1) When building a heterojunction, the electrode, CuInP 2 S 6 (CIPS) and MoS 2 In the same vertical structure, electrons can not only flow laterally but also tunnel directly between the two materials, ensuring that the tunnel resistance of the memristor is larger and the storage effect is better.

[0012] (2) The memristor can realize a ferroelectric tunnel junction with large tunnel resistance of two-dimensional materials. It has good stability, strong durability, low cost and simple manufacturing process. It can be mass-produced and has great application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. The embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein:

[0014] Figure 1 : is the Raman spectrum characterization diagram of CIPS of Example 1;

[0015] Figure 2 : MoS of Example 1 2 Raman spectrum characterization diagram;

[0016] Figure 3 :CIPS / MoS of Example 1 2Voltage-current characteristics of ferroelectric tunnel junctions of heterojunctions;

[0017] Figure 4 :CIPS / MoS of Example 1 2 Flow chart of the process for preparing a heterojunction ferroelectric tunnel junction. DETAILED DESCRIPTION

[0018] The present invention will be further described below in conjunction with specific examples. It should be understood that these examples are only used to illustrate the present invention and are not intended to limit the scope of the present invention. The experimental methods in the following examples without specifying specific conditions are usually carried out under conventional conditions or according to the conditions recommended by the manufacturer.

[0019] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0020] At present, the conventional memristor has a slow speed, a small tunnel resistance and a large device thickness. Therefore, the present invention provides a ferroelectric tunnel junction memristor with a high tunnel resistance and a preparation method and application thereof.

[0021] In one or more embodiments of the present invention, a ferroelectric tunnel junction memristor with high tunnel resistance comprises: a substrate, a bottom gold electrode layer, and a heterojunction layer arranged in sequence from bottom to top; the heterojunction layer is CuInP 2 S 6 / MoS 2 Vertical heterojunction, as the dielectric layer.

[0022] CuInP 2 S 6 (CIPS) has the advantages of high spontaneous polarization, low phase transition temperature, stable ferroelectricity and compatibility with industrial silicon electronic processes. CIPS nanosheets are a typical two-dimensional (2D) iron material that shows stable out-of-plane ferroelectricity at atomic layer thickness. As an intrinsic ferroelectric material, the CIPS layer can break the critical thickness limit that appears in most ferroelectric perovskite oxide films, making it possible to obtain a memristor with minimized size. MoS 2 Containing one molybdenum atom and two sulfur atoms, its unique band gap and structure make it a promising alternative material to graphene and other semiconductor devices when silicon-based semiconductor devices face quantum and tunneling effects at the nanoscale. 2From the bulk structure to the two-dimensional structure, it shows good electronic and quantum properties, and in the thin layer structure it changes from an indirect energy gap to a direct band gap. The covalent bonds between molybdenum and sulfur and the van der Waals bonds between the layers give it a smaller contact resistance, that is, MoS 2 Has good switching characteristics and high efficiency. CuInP 2 S 6 and MoS 2 Forming a vertical heterojunction, it can play a synergistic role. CuInP 2 S 6 The spontaneous ferroelectric polarization property of MoS 2 Band structure tuning, MoS 2 Favorable for CuInP 2 S 6 The ferroelectric polarization properties come into play, and in addition to flowing laterally, electrons can also tunnel directly between the two materials, ensuring that the tunnel resistance of the memristor is larger and the storage effect is better.

[0023] Wherein, the substrate is selected from 285nmSiO 2 Substrate, 300nmSiO 2 Substrate; preferably, 285nmSiO 2 Further, the bottom gold electrode layer is a metal electrode Cr / Au, Cr is 20nm, and Au is 60nm.

[0024] CuInP 2 S 6 and MoS 2 The two form a vertical heterojunction, which cooperates with each other to give full play to CuInP 2 S 6 As for the advantage of reducing size, by maintaining a stable ferroelectric effect at room temperature, the size of the device can be greatly reduced, wherein the thickness of the electrode layer is 80nm; or the thickness of the heterojunction layer is 7-15nm, preferably, the thickness is 7-10nm.

[0025] In one or more embodiments of the present invention, a method for preparing a ferroelectric tunnel junction memristor with high tunnel resistance includes:

[0026] (1), using CuInP adhered 2 S 6 Gold tape for two-dimensional materials, CuInP 2 S 6 The 2D material is transferred to the substrate with the electrode layer and the tape is removed;

[0027] (2) MoS is obtained by mechanical exfoliation 2 Two-dimensional materials, MoS 2Place it on the transfer system and press it onto the existing CuInP 2 S 6 on the substrate while heating.

[0028] A thin layer of CIPS two-dimensional material was obtained by using gold tape, and a thin layer of molybdenum disulfide two-dimensional material was obtained by mechanical exfoliation. Then, a high-precision two-dimensional material transfer system was used to form a heterojunction by dry transfer, and combined with the existing metal electrode, a CIPS / MoS 2 Vertical heterojunction memristor. This preparation method has the advantages of simple process, economical, convenient and fast.

[0029] In step (1), the preparation method of the gold tape comprises: plating gold on a substrate, performing uniform coating with a PMMA solution, attaching a thermal release tape, maintaining a constant temperature of 120-200°C for 2-10 minutes, and tearing off the tape with the gold film to obtain the desired gold tape; further, the thickness of the gold plating is 30-80nm, preferably 50nm; further, the thermal release tape is a double-layer release film on both sides.

[0030] In the process of preparing gold tape, an EZ4 compact coating machine is used to control the spin coating of PMMA solution, rotating at 1000r for 5s and 3000r for 60s to form a PMMA film of uniform thickness, thereby enhancing the adsorption force between the thermal release tape and the gold film and obtaining a gold tape with a complete morphology. If the spin coating is uneven, it cannot be guaranteed that a complete gold tape will be obtained to transfer the two-dimensional material.

[0031] In step (1), transfer CuInP 2 S 6 The specific processes for 2D materials include:

[0032] CuInP 2 S 6 The gold tape of the two-dimensional material is adhered to the substrate, pressed, and placed in a constant temperature of 85-105°C for 2-10 minutes, and the thermal release tape is observed to turn white; further, the method of removing the gold tape includes: soaking it in deionized water to allow the thermal release tape to fall off, and then soaking it in acetone, alcohol and deionized water in turn to remove polyvinyl pyrrolidone, and then performing oxygen plasma treatment, and finally soaking it in potassium iodide solution, and then rinsing with deionized water.

[0033] Before use, the substrate must be cleaned and ultrasonicated with ethanol for 30 minutes. The size of the substrate for making gold tape is 1cm×1cm, and the size of the electrode substrate is 0.8cm×0.8cm. This method can achieve CuInP 2 S 6 The uniform and stable transfer of two-dimensional materials has an economical and rapid effect.

[0034] The soaking time in deionized water is 10-12 hours, and then the soaking time in acetone, alcohol and deionized water is 19-40 minutes respectively, the oxygen plasma treatment time is 10-40 seconds, and the soaking time in potassium iodide solution is 8-15 hours. Through this treatment, the influence of impurities can be removed.

[0035] In step (2), the mechanical exfoliation method specifically includes: using a thermal release tape to tear off a thin layer of MoS on the molybdenum disulfide crystal. 2 ; or, the heating temperature is 70-90°C, preferably 85°C. This treatment method is very simple and is conducive to obtaining a vertical heterojunction and to giving full play to the CuInP 2 S 6 and MoS 2 The synergistic effect ensures that the tunnel resistance of the memristor is larger.

[0036] In one or more embodiments of the present invention, a ferroelectric tunnel junction memristor with high tunnel resistance and / or a method for preparing a ferroelectric tunnel junction memristor with high tunnel resistance is used in a microelectronic device.

[0037] The present invention will be further described in detail below in conjunction with specific embodiments. It should be noted that the specific embodiments are intended to explain the present invention rather than to limit it.

[0038] Example 1

[0039] A ferroelectric tunnel junction memristor with high tunnel resistance, the preparation method of which is as follows:

[0040] Preparation of gold tape: On a 1 cm × 1 cm Si / SiO 2 A gold film with a thickness of 50 nm is plated on the substrate using electron beam evaporation. PMMA solution (mass fraction of 0.13%) is used for even coating. A thermal release tape is applied and placed in a 150-degree constant temperature box for 5 minutes. The required gold tape is then removed and the tape with the gold film is obtained.

[0041] Use gold tape to stick CuInP 2 S 6 The blue film tape of the two-dimensional material is used to obtain the gold tape with the two-dimensional material, and the gold tape with the two-dimensional material is adhered to the new SiO 2On the substrate (substrate containing a metal electrode with a metal electrode thickness of 80 nm), press gently for 30 seconds, put it in a 95-degree constant temperature box for 5 minutes, observe that the thermal release tape turns white, take out the sample from the constant temperature box, remove the layers of the gold tape, first soak it in deionized water until the thermal release tape falls off naturally, then soak it in acetone, alcohol and deionized water for 30 minutes each to remove PMMA, then perform oxygen plasma treatment for 30 seconds, and finally soak it in 20% potassium iodide solution to remove the gold film, then rinse with deionized water to clean up excess potassium iodide solution.

[0042] Using a high-precision two-dimensional material transfer system for dry transfer, 2 S 6 Directed transfer of MoS on substrates 2 , forming CuInP 2 S 6 / MoS 2 Heterogeneous structure.

[0043] The substrate is 285nm SiO 2 The substrate and the bottom gold electrode layer are metal electrodes Cr / Au, with Cr being 20nm and Au being 60nm.

[0044] Figure 1 , 2 CuInP 2 S 6 and MoS 2 The Raman spectrum characterization diagram shows that the materials used in the device preparation are accurate;

[0045] Figure 3 CuInP 2 S 6 / MoS 2 Voltage-current characteristics of a ferroelectric tunnel junction with a heterojunction, with a current ratio of 10 in the on / off state 3 That is, the tunnel resistance of the ferroelectric tunnel junction is 10 3 , showing a large tunnel resistance;

[0046] Figure 4 CuInP 2 S 6 / MoS 2 Flow chart of the process for preparing a heterojunction ferroelectric tunnel junction.

[0047] Example 2

[0048] A ferroelectric tunnel junction memristor with high tunnel resistance, the preparation method of which is as follows:

[0049] Preparation of gold tape: On a 1 cm × 1 cm Si / SiO 2A gold film with a thickness of 60 nm is deposited on the substrate using electron beam evaporation. PMMA solution is used for even coating. Thermal release tape is applied and placed in a 200-degree constant temperature box for 10 minutes. The required gold tape is then removed after the tape with the gold film is removed.

[0050] Use gold tape to stick CuInP 2 S 6 The blue film tape of the two-dimensional material is used to obtain the gold tape with the two-dimensional material, and the gold tape with the two-dimensional material is adhered to the new SiO 2 On the substrate (the substrate containing the metal electrode, the thickness of the metal electrode is 80nm), press gently for 30 seconds, put it in a 100-degree constant temperature box for 10 minutes, and observe that the thermal release tape turns white. Take out the sample from the constant temperature box, remove the layers of the gold tape, first soak it in deionized water until the thermal release tape falls off naturally, and then soak it in acetone, alcohol and deionized water for 30 minutes each to remove PMMA, and then perform oxygen plasma treatment for 40 seconds, and finally soak it in 20% potassium iodide solution to remove the gold film, and then rinse with deionized water to clean up the excess potassium iodide solution.

[0051] Using a high-precision two-dimensional material transfer system for dry transfer, 2 S 6 Directed transfer of MoS on substrates 2 , forming CuInP 2 S 6 / MoS 2 Heterogeneous structure.

[0052] The substrate is 285nmSiO 2 The substrate and the bottom gold electrode layer are metal electrodes Cr / Au, with Cr being 20nm and Au being 60nm.

[0053] Comparative Example 1:

[0054] The difference from Example 1 is that the intermediate dielectric layer only has CuInP 2 S 6 , does not contain MoS 2 The memristor cannot achieve its function because the intermediate dielectric layer only contains CuInP 2 S 6 , the current does not change in the switching state and no tunnel resistance can be formed.

[0055] Comparative Example 2:

[0056] The difference from Example 1 is that the intermediate dielectric layer only has MoS 2 , does not contain CuInP 2 S 6 The memristor cannot achieve its function because the intermediate dielectric layer only contains MoS2 There is no ferroelectric property.

[0057] Comparative Example 3:

[0058] The difference from Example 1 is that ZnS is replaced by MoS 2 The memristor has a small tunnel resistance and is easily affected by light. However, in Example 1, due to the CuInP 2 S 6 and MoS 2 The synergistic effect between them not only improves the tunnel resistance, but also greatly reduces the impact of light.

[0059] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A ferroelectric tunnel junction memristor with high tunnel resistance, characterized in that: The memristor comprises: a substrate, a bottom gold electrode layer, and a heterojunction layer arranged in sequence from bottom to top; the heterojunction layer is a CuInP2S6 / MoS2 vertical heterojunction as a dielectric layer; CuInP2S6 and MoS2 form a vertical heterojunction; The thickness of the heterojunction layer is 7-15 nm; The method for preparing the ferroelectric tunnel junction memristor with high tunnel resistance comprises: (1) Using a gold tape with CuInP2S6 two-dimensional material, transfer the CuInP2S6 two-dimensional material to a substrate with an electrode layer, and remove the tape; (2) Use mechanical exfoliation to obtain MoS2 two-dimensional material. Place MoS2 on a transfer system and press it onto an existing CuInP2S6 substrate while heating it.

2. A ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The substrate is selected from a 285nmSiO2 substrate and a 300nmSiO2 substrate.

3. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The substrate is a 285nm SiO2 substrate.

4. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The bottom gold electrode layer and the top electrode layer are the same type of electrode layers, both are metal electrodes Cr / Au, Cr is 20nm, and Au is 60nm.

5. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The thickness of the electrode layer is 80 nm; or the thickness of the heterojunction layer is 7-10 nm.

6. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: In step (1), the preparation method of the gold tape comprises: plating gold on a substrate, applying PMMA to the substrate, attaching a heat release tape, keeping the substrate at a constant temperature of 120-200° C. for 2-10 minutes, and tearing off the tape with the gold film to obtain the desired gold tape.

7. A ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 6, characterized in that: The thickness of the gold plating is 30-80nm; the thermal release tape is a double-layer release film on both sides.

8. A ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 7, characterized in that: The thickness of the gold plating is 50 nm.

9. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: In step (1), the specific process of transferring the CuInP2S6 two-dimensional material includes: The gold tape with CuInP2S6 two-dimensional material was adhered to the substrate, pressed, and placed in a constant temperature of 85-105°C for 2-10 minutes. The heat release tape was observed to turn white.

10. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The method for removing the gold tape includes: soaking in deionized water to allow the thermal release tape to fall off, then soaking in acetone, alcohol and deionized water in sequence to remove polyvinyl pyrrolidone, then performing oxygen plasma treatment, and finally soaking in potassium iodide solution, and then rinsing with deionized water.

11. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 10, characterized in that: The immersion time in deionized water is 10-12 hours, and then the immersion time in acetone, alcohol and deionized water is 19-40 minutes respectively. The oxygen plasma treatment time is 10-40 seconds, and the immersion time in potassium iodide solution is 8-15 hours.

12. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: In step (2), the specific process of the mechanical stripping method includes: using a thermal release tape to tear off a thin layer of MoS2 on the molybdenum disulfide crystal; or, the heating temperature is 70-90°C.

13. The ferroelectric tunnel junction memristor with high tunnel resistance as claimed in claim 1, characterized in that: The heating temperature is 85°C.

14. Application of a ferroelectric tunnel junction memristor with high tunnel resistance as claimed in any one of claims 1 to 13 in a microelectronic device.

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