A single-phase SOGI phase-locked loop based on three-sampling point frequency detection and its implementation method

Abstract

The present invention discloses a single-phase SOGI phase-locked loop based on three-sampling point frequency detection, comprising a SOGI module, a frequency detection module, a low-pass filter module, a Park transformation module, a proportional integral regulator module, an adder, an integrator module, a cosine transformation module and a multiplier module, wherein the input end of the SOGI module is connected to a grid voltage sampling signal, and the output end is connected to the input end of the frequency detection module; after the frequency detection module processes the signal input by the SOGI module, the fundamental frequency of the grid voltage is obtained, and the signal is transmitted to the low-pass filter module, and the estimated frequency obtained after filtering is provided to the SOGI module; the implementation method of the present invention is to send the orthogonal signal output by the SOGI module to the frequency detection module to obtain the grid fundamental frequency, and then send the signal to the SOGI module after filtering by the low-pass filter module. The present invention realizes frequency adaptation, ensures the estimation accuracy of the phase angle output by the phase-locked loop when the fundamental frequency of the grid voltage changes, and enables the phase-locked loop to operate stably under a larger bandwidth.

Description

Technical Field

[0001] The invention relates to a single-phase SOGI phase-locked loop, and in particular to a single-phase SOGI phase-locked loop based on a three-sampling point frequency detection method and an implementation method thereof. Background Art

[0002] With the vigorous development of renewable energy generation, the performance of grid-connected inverters, as the key interface between distributed power generation systems and large power grids, is crucial to the stable operation of the entire system. Among them, the grid synchronization method is an important part of the control, protection and monitoring of grid-connected inverters, which is used to quickly and accurately obtain the frequency and phase of the grid voltage at the point of common coupling (PCC). Among the many synchronization methods, the phase-locked loop has been widely used due to its simple structure, high synchronization speed and accuracy.

[0003] In single-phase applications, the SOGI-based phase-locked loop (second-order generalized integrator-based phase-locked loop, SOGI-PLL) has excellent comprehensive performance. It uses SOGI to generate a pair of orthogonal signals, has a simple structure, and has certain filtering capabilities and frequency adaptability. Therefore, SOGI-PLL has been widely used. However, under the current "double high" background, a large number of nonlinear loads are connected to the power grid and a large number of power electronic equipment are used, and the power grid is increasingly showing a very complex state. For SOGI-PLL, its performance is greatly affected by changes in grid frequency and weak grids.

[0004] Some scholars pointed out that the instability of SOGI-PLL at high bandwidth is because the frequency of the phase-locked loop feedback changes too quickly, and proposed to add a low-pass filter to the phase-locked loop frequency feedback branch to slow down the speed of the frequency change sent to SOGI. Some scholars have abandoned the traditional frequency feedback method and turned to study the feasibility of using a fixed-frequency SOGI-PLL (FFSOGI-PLL). Admittedly, the use of FFSOGI-PLL can avoid the nonlinear coupling problem of SOGI-PLL and expand the bandwidth of the phase-locked loop, but when the grid frequency fluctuates, the phase-locked loop output frequency and phase angle of this method contain a large number of double harmonics, which require additional methods to suppress. The above methods only reduce the coupling between SOGI and subsequent SRF-PLL modules, but do not completely eliminate it; in addition, the above methods only consider the characteristics of the phase-locked loop itself, and do not consider the applicability of the phase-locked loop used in the inverter in the case of weak power grids. And in the field of grid-connected converter current control, there is a problem of poor system stability of SOGI-PLL under large phase-locked loop bandwidth and large grid impedance. Summary of the invention

[0005] Purpose of the invention: The purpose of the present invention is to provide a single-phase SOGI phase-locked loop based on three-sampling point frequency detection with strong robustness under weak power grid.

[0006] Technical solution: The single-phase SOGI phase-locked loop of the present invention comprises a SOGI module, a frequency detection module, a low-pass filter module, a Park conversion module, a proportional integral regulator module, an adder, an integrator module, a cosine conversion module and a multiplier module; the input end of the SOGI module is connected to the grid voltage sampling signal u g The output end of the SOGI module is connected to the input end of the frequency detection module; after the frequency detection module processes the signal input by the SOGI module, it obtains the fundamental frequency ω of the grid voltage. g , and sent to the low-pass filter module; the low-pass filter module filters the estimated frequency ω est Provided to SOGI module;

[0007] The output end of the SOGI module is also connected to the input end of the Park transformation module. The DC current u at the output end of the Park transformation module is q Connect the input end of the proportional integral regulator module, the output signal ω of the proportional integral regulator module e and the grid voltage frequency reference value ω ff After being processed by the adder, it is connected to the input end of the integrator module; the grid phase angle θ at the output end of the integrator module PLL , respectively connected to the cosine transform module input and Park transform module; the cosine transform module output and fundamental frequency grid current amplitude reference I m The output of the multiplier module outputs the grid current reference i ref .

[0008] Furthermore, the SOGI module includes: a first adder, a first multiplier, a second adder, a second multiplier, a first integrator, a third multiplier, and a second integrator; the first adder converts the grid voltage sampling signal u g With the orthogonal signal u α The feedback signal is subtracted and sent to the first multiplier. The output of the first adder is summed with the fixed parameter k. e The first multiplier performs multiplication processing; the second adder adds the orthogonal signal u output by the first multiplier and the second integrator β The second multiplier outputs the second adder and the estimated frequency ω output by the low-pass filter module est The first integrator performs integration processing on the output of the second multiplier and then outputs an orthogonal signal u α The third multiplier adds the estimated frequency ω of the first integrator output and the low-pass filter module output estThe second integrator performs integration processing on the output of the third multiplier and outputs an orthogonal signal u β .

[0009] Furthermore, the frequency detection module uses three pairs of orthogonal signal sampling points with equal time intervals to obtain the fundamental frequency ω of the grid voltage. g .

[0010] Furthermore, the low-pass filter module is a first-order low-pass filter, which is used to filter out the double frequency harmonic components contained in the output of the frequency detection module.

[0011] The implementation method of the single-phase SOGI phase-locked loop of the present invention is as follows: the input end of the SOGI module is connected to the grid voltage sampling signal u g , a pair of orthogonal signals u at the output of the SOGI module α 、u β As the input signal of the frequency detection module; the frequency detection module processes the input signal to obtain the fundamental frequency ω of the grid voltage g , fundamental frequency ω g After filtering by the filter in the low-pass filter module, the estimated frequency ω is obtained est , then the estimated frequency ω est Then it is provided to the SOGI module as the resonant frequency; at the same time, a pair of orthogonal signals u at the output end of the SOGI module α 、u β As the input signal of the Park transformation module, the DC quantity u at the output of the Park transformation module q As the input signal of the proportional integral regulator module; the output signal ω of the proportional integral regulator module e and grid frequency reference value ω ff After being processed by the adder, the estimated angular frequency ω of the phase-locked loop is obtained. PLL , the phase-locked loop estimates the angular frequency ω PLL As the input signal of the integrator module; after being processed by the integrator module, the real-time estimated grid phase angle θ is obtained PLL , grid phase angle θ PLL Connected to the input of the cosine transform module, and the grid phase angle θ PLL Feedback to the Park transformation module; the output signal of the cosine transformation module and the fundamental frequency grid current amplitude reference I m After multiplication by the multiplier module, the grid current reference i is obtained. ref .

[0012] Furthermore, the frequency detection module uses a pair of orthogonal signals u with three equal time intervals. α 、u β The sampling point obtains the fundamental frequency ω of the grid voltage g ; Fundamental frequency ωg The calculation formula is as follows:

[0013]

[0014] Among them, cos -1 {·} is the arccosine function, T s is the sampling period of the frequency detection module, u α (k) represents the sampling point at time k, n represents the sampling interval, u α (kn) is u at time k delayed by n sampling periods α Sampling point, u α (k-2n) is u at time k delayed by 2n sampling periods α Sampling point; β (k) represents the sampling point at time k, u β (kn) is u at time k delayed by n sampling periods α Sampling point, u β (k-2n) is u at time k delayed by 2n sampling periods α Sampling point;

[0015] The expression of the low-pass filter module is:

[0016] G F (s) = A 0 / (s / ω p +1)

[0017] Among them, A 0 is the DC gain of the low-pass filter, ω p is the cutoff frequency of the low-pass filter;

[0018] The expression of the Park transformation module is:

[0019]

[0020] The expression of the proportional integral regulator module is:

[0021] G PI (s) = k p_pll +k i_pll / s

[0022] Among them, k p_pll is the proportional coefficient of the proportional-integral regulator module, k i_pll is the integral coefficient of the proportional integral regulator module; p_pll and k i_pll They are the second-order system control models:

[0023]

[0024] Among them, U gm is the peak value of the grid voltage, ξ is the damping coefficient, ω n is the natural angular frequency;

[0025] Then the phase-locked loop bandwidth f BW The expression is:

[0026]

[0027] Among them, ω ff It is the grid frequency reference value.

[0028] Compared with the prior art, the present invention has the following significant effects: 1. By adopting a three-sampling point frequency detection module to obtain the grid voltage fundamental frequency, and sending the grid voltage fundamental frequency to the SOGI module, frequency adaptation is achieved, ensuring the estimation accuracy of the phase angle of the phase-locked loop output when the grid voltage fundamental frequency changes; 2. By avoiding the need to introduce the estimated angular frequency of the phase-locked loop back to the SOGI module, the nonlinearity of the SOGI-PLL is reduced, and the phase-locked loop can operate stably at a larger bandwidth with greater robustness; 3. The single-phase SOGI phase-locked loop provided by the present invention has a simple structure and is suitable for grid-connected converter systems with single-phase L, LCL filtering and other types of filtering. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is the overall structural diagram of the present invention;

[0030] Figure 2 The specific structure diagram of the SOGI module of the present invention;

[0031] Figure 3 (a) is the frequency feedback branch ω when the low-pass filter module is not added est The waveform of

[0032] (b) is a schematic diagram of the corresponding FFT result when the low-pass filter module is not added;

[0033] Figure 4 is the low-pass filter cutoff frequency ω p When taking different values ​​of ω est Schematic diagram of the response waveform;

[0034] Figure 5 (a) Schematic diagram of the traditional SOGI-PLL waveform with a phase-locked loop bandwidth of 150 Hz.

[0035] (b) is a schematic diagram of the waveform of the SOGI-PLL with a phase-locked loop bandwidth of 150 Hz according to the present invention;

[0036] Figure 6 (a) Schematic diagram of the traditional SOGI-PLL waveform with a phase-locked loop bandwidth of 200 Hz.

[0037] (b) is a schematic diagram of the waveform of the SOGI-PLL with a phase-locked loop bandwidth of 200 Hz according to the present invention;

[0038] Figure 7 It is the block diagram of dual current feedback control of grid current and capacitor current of single-phase LCL filter grid-connected inverter;

[0039] Figure 8 (a) Schematic diagram of the waveform of the traditional SOGI-PLL with a grid impedance of 15mH and a phase-locked loop bandwidth of 100Hz.

[0040] (b) The grid impedance is 15mH, the phase-locked loop bandwidth is 100Hz, and the common coupling point voltage u of the grid-connected inverter of the present invention is PCC and grid current i g Test waveform diagram;

[0041] Fig. 9 (a) Schematic diagram of the waveform of the traditional SOGI-PLL with a grid impedance of 15mH and a phase-locked loop bandwidth of 200Hz.

[0042] (b) The grid impedance is 15mH, the phase-locked loop bandwidth is 200Hz, and the common coupling point voltage u of the grid-connected inverter of the present invention is PCC and grid current i g Schematic diagram of test waveform. DETAILED DESCRIPTION

[0043] The present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0044] like Figure 1 As shown, it is the overall structure diagram of the single-phase SOGI phase-locked loop of the present invention, u g is the grid voltage at the common coupling point; u α 、u β A pair of orthogonal signals output by the SOGI module; ω g is the output of the frequency detection module, ω est ω g The estimated frequency after filtering; u d 、u q is a pair of direct flows output by the Park transformation module; ω e is the error angular frequency estimated by the phase-locked loop; ω ff is the reference value of the fundamental frequency of the power grid; ω PLL Estimate the angular frequency of the phase-locked loop; θ PLL Estimate the phase angle for the phase-locked loop; I m is the fundamental frequency grid current amplitude benchmark; i ref It is an output signal synchronized with the grid voltage, that is, the instantaneous reference signal of the fundamental frequency grid current.

[0045] The single-phase SOGI phase-locked loop of the present invention comprises a SOGI module, a frequency detection module based on three sampling points (3CS), a low-pass filter module G F (s), Park transformation module, proportional integral regulator module PI, integrator module The cosine transform module cos and the multiplier module. Among them, the input end of the SOGI module is used to connect the grid voltage sampling signal u g , and the output terminal u of the SOGI module α 、u β Connect the input end of the frequency detection module, and then use the frequency detection module based on 3CS to obtain the fundamental frequency of the grid voltage, and then pass it through the low-pass filter module G F (s) is filtered to get ω est , and then provided to the SOGI module as its resonant frequency; at the same time, the output end u of the SOGI module α 、u β Connect the input of the Park transform module and one of the outputs of the Park transform module u q Connect the input of the proportional integral regulator module PI, and the output signal ω of the proportional integral regulator module PI e and the grid frequency reference value ω ff After adding, connect to the integrator module Input terminal of the integrator module The output end is the grid phase angle θ estimated in real time by the phase-locked loop. PLL , which is connected to the cosine transform module cos input terminal; and the output terminal of the cosine function cos is connected to the grid current reference given I m After multiplication by the multiplier module, the grid current reference i is finally obtained. ref .

[0046] The specific structure of the SOGI module is shown in Figure 2 , including: a first adder, a first multiplier, a second adder, a second multiplier, a first integrator, a third multiplier, and a second integrator. The specific connection method is as follows: the first adder converts the grid voltage sampling signal u g with u α The feedback signal is sent to the first multiplier after subtraction and is multiplied by the fixed parameter k. e The multiplication is performed in the first multiplier; the second adder adds the output of the first multiplier and the orthogonal signal u β The second multiplier adds the output of the second adder to the estimated frequency ω output of the low-pass filter module est The first integrator performs integration processing on the output of the second multiplier; the third multiplier outputs the first integrator and the estimated frequency ω output by the low-pass filter module estThe second integrator performs integration processing on the output of the third multiplier and outputs an orthogonal signal u β Among them, the parameter k e Taking into account the dynamic response speed and overshoot size of the SOGI module, 1.414 is selected.

[0047] The frequency detection module is a frequency detection module based on three sampling points (3CS), and its input is the orthogonal signal u output by SOGI. α 、u β , using three equally spaced u α 、u β The sampling point obtains the grid voltage fundamental frequency ω g , then the output ω of the frequency detection module g The expression is:

[0048]

[0049] Among them, cos -1 {·} is the arccosine function, T s is the sampling period of the frequency detection module, n is the sampling interval, u α (k) represents the sampling point at time k, n represents the sampling interval, u α (kn) is u at time k delayed by n sampling periods α Sampling point, u α (k-2n) is u at time k delayed by 2n sampling periods α Sampling point; β (k) represents the sampling point at time k, u β (kn) is u at time k delayed by n sampling periods α Sampling point, u β (k-2n) is u at time k delayed by 2n sampling periods α Sampling point.

[0050] Generally, T s The sampling frequency of the grid-connected converter control module is the same as that of the grid-connected converter control module. The sampling interval n needs to be determined by comprehensively considering the noise suppression effect in the loop and the frequency detection speed.

[0051] The single-phase SOGI phase-locked loop of the present invention is suitable for grid voltage synchronization control and grid current control in grid-connected current conversion equipment such as single-phase grid-connected inverters, rectifiers, and reactive power compensators.

[0052] Figure 3 (a) and (b) are the frequency detection branch ω when no low-pass filter is used. est The waveform and fast Fourier transform (FFT) result. It can be seen that ω estThere are a lot of harmonics in it, and the total harmonic distortion (THD) is large. est The main component is the DC component, that is, the fundamental frequency of the grid voltage to be estimated, and the harmonic components are concentrated at twice the frequency and beyond. The low-pass filter module is a first-order low-pass filter, which is used to filter out the twice-frequency harmonic components contained in the output of the frequency detection module and improve the accuracy of the estimated frequency sent to SOGI. The expression of the low-pass filter module is:

[0053] G F (s) = A 0 / (s / ω p +1) (2)

[0054] Among them, A 0 is the DC gain of the low-pass filter module, ω p is the cut-off frequency of the low-pass filter module. Since the frequency output by the frequency detection module needs to be sent to SOGI to achieve frequency adaptation, the low-pass filter module should not attenuate the DC component. Its parameter A 0 Take 1. From the perspective of harmonic suppression, ω p It should not be too large and should be much smaller than twice the base frequency. From the perspective of frequency detection speed, ω p It should not be too small, otherwise it will lead to poor dynamic performance of the phase-locked loop and even the grid-connected converter system. Figure 4 is the low-pass filter module parameter ω p When taking different values ​​of ω est The response waveform of ω is recommended based on the comprehensive harmonic suppression capability, dynamic performance and overshoot size. p The value range is 90-130rad / s.

[0055] The expression of the Park transformation module is:

[0056]

[0057] The expression of the proportional integral regulator module is:

[0058] G PI (s) = k p_pll +k i_pll / s (4)

[0059] Among them, k p_pll is the proportional coefficient of the proportional-integral regulator module, k i_pll k is the integral coefficient of the proportional integral regulator module. p_pll and k i_pll According to the second-order system control model design of the phase-locked loop, that is,

[0060]

[0061] Among them, U gm is the peak value of the grid voltage, ξ is the damping coefficient, ω n is the natural angular frequency.

[0062] Phase-locked loop bandwidth f BW About ξ and ω n The expression is:

[0063]

[0064] Among them, ω ff is the reference value of the grid frequency; generally ξ is taken as 0.707 to achieve the best compromise between the regulation time and overshoot size.

[0065] The present invention selects the peak value of the grid voltage U gm 311V,

[0066] When the PLL bandwidth is 100Hz: k p_pll =0.69, k i_pll =75(ξ=0.707,ω n =628rad / s);

[0067] When the PLL bandwidth is 150Hz: k p_pll =1.39, k i_pll =300(ξ=0.707,ω n =942rad / s);

[0068] When the PLL bandwidth is 200Hz: k p_pll =2.08, k i_pll =675(ξ=0.707,ω n =1256rad / s).

[0069] For comparison, Figure 5 The conventional SOGI-PLL and the SOGI-PLL of the present invention are shown in FIG. ref It can be seen that the conventional SOGI-PLL has become unstable and cannot perform the phase-locking function normally; however, the SOGI-PLL of the present invention can still perform the phase-locking function normally, and the output current reference i ref The sinusoidal degree is higher.

[0070] Figure 6 (a) and (b) are respectively the conventional SOGI-PLL and the SOGI-PLL of the present invention when the phase-locked loop bandwidth is 200 Hz. refAt this time, under a larger phase-locked loop bandwidth, the SOGI-PLL of the present invention can still work normally. This shows that when the grid voltage fluctuates, the SOGI-PLL of the present invention can work stably under a larger bandwidth, so the dynamic response speed can be faster.

[0071] A single-phase LCL filter grid-connected converter system is taken as an example to demonstrate the robustness advantage of the SOGI-PLL of the present invention over the traditional SOGI-PLL under weak power grid.

[0072] Figure 7 The single-phase LCL filter grid-connected inverter shown in the figure consists of a bridge inverter topology, an inverter side inductor L 1 、Filter capacitor C 1 and grid-side inductance L 2 And control loop. In this example, U dc is 400V, u s 220V / 50Hz, that is, when there is no grid impedance, U gm Rated at 311V, rated power 5kW, inductance L 1 0.75mH, L 2 is 0.45mH, the filter capacitor C 1 The switching frequency is 15kHz. PWM represents the gain of the converter bridge arm link, which is normalized to |k PWM |=1;G f (s) is the voltage feedforward compensation link, and its value is 0.6; G c (s) is a current regulator, which uses fundamental wave plus 3rd, 5th, and 7th harmonic resonance control; k AD G is the capacitor current proportional feedback coefficient, which is 13; PLL (s) is the transfer function of the SOGI phase-locked loop.

[0073] Figure 8 (a) and (b) are respectively the case where the grid impedance is 15mH and the phase-locked loop bandwidth is 100Hz (i.e., k p_pll =0.69, k i_pll =75) when the common coupling point voltage u of the grid-connected inverter using the conventional SOGI-PLL and the SOGI-PLL of the present invention PCC and grid current i g Test waveform: Under the same grid impedance and phase-locked loop bandwidth, the grid-connected inverter using the SOGI-PLL of the present invention as the synchronization link has stronger robustness under weak grid conditions and higher grid current quality.

[0074] Fig. 9 (a) and (b) are grid impedance of 15mH and phase-locked loop bandwidth of 200Hz (i.e., k p_pll=2.08, k i_pll =675) when the common coupling point voltage u of the grid-connected inverter using the conventional SOGI-PLL and the SOGI-PLL of the present invention is PCC and grid current i g Test waveform. Combined Figure 8 It can be seen from (a), (b) and 9(a), (b) that, compared with the traditional SOGI-PLL, the SOGI-PLL of the present invention can still ensure the stable operation of the grid-connected inverter when the grid impedance and the phase-locked loop bandwidth are both large, and the grid current can still ensure a high quality.

[0075] The difference between L filtering, LCL filtering and other forms of filtering in grid-connected inverters is that the filter structures are different, while the positions where the input signal used by the phase-locked loop and the output signal of the phase-locked loop are injected into the current control loop are consistent. The present invention can effectively improve the stability of the grid-connected inverter and the quality of the grid current, and can therefore be widely used in the synchronous control of grid-connected inverters under different filter structures.

[0076] Since the control structures of other grid-connected converters such as reactive power compensation, active filtering, rectification and the grid-connected inverter are similar, the present invention can also be widely applied to the synchronous control of various grid-connected systems.

[0077] In summary, the present invention is suitable for grid voltage synchronization control in grid-connected converters such as grid-connected inverters, rectifiers, and reactive power compensators, and has the advantages of simple structure, convenient design, improved phase-locked loop bandwidth, and enhanced robustness of grid-connected converters under weak grid conditions.

[0078] The above embodiments are only for illustrating the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. A single-phase SOGI phase-locked loop based on three-sampling point frequency detection, characterized in that: It includes a SOGI module, a frequency detection module, a low-pass filter module, a Park conversion module, a proportional integral regulator module, an adder, an integrator module, a cosine conversion module and a multiplier module; the input end of the SOGI module is connected to the grid voltage sampling signal u g The output end of the SOGI module is connected to the input end of the frequency detection module; after the frequency detection module processes the signal input by the SOGI module, it obtains the fundamental frequency ω of the grid voltage. g , and sent to the low-pass filter module; The low-pass filter module filters the estimated frequency ω est Provided to SOGI module; The output end of the SOGI module is also connected to the input end of the Park transformation module. The DC current u at the output end of the Park transformation module is q Connect the input end of the proportional integral regulator module, the output signal ω of the proportional integral regulator module e and the grid voltage frequency reference value ω ff After being processed by the adder, it is connected to the input end of the integrator module; the grid phase angle θ at the output end of the integrator module PLL , respectively connected to the cosine transform module cos input terminal and the Park transform module; the cosine transform module cos output terminal and the fundamental frequency grid current amplitude reference I m The output of the multiplier module outputs the grid current reference i ref .

2. The single-phase SOGI phase-locked loop based on three-sampling point frequency detection according to claim 1, characterized in that: The SOGI module includes: a first adder, a first multiplier, a second adder, a second multiplier, a first integrator, a third multiplier, and a second integrator; the first adder converts the grid voltage sampling signal u g With the orthogonal signal u α The feedback signal is subtracted and sent to the first multiplier. The output of the first adder is summed with the fixed parameter k. e The first multiplier performs multiplication processing; the second adder adds the orthogonal signal u output by the first multiplier and the second integrator β The second multiplier outputs the second adder and the estimated frequency ω output by the low-pass filter module est The first integrator performs integration processing on the output of the second multiplier and then outputs an orthogonal signal u α The third multiplier adds the estimated frequency ω of the first integrator output and the low-pass filter module output est The second integrator performs integration processing on the output of the third multiplier and outputs an orthogonal signal u β .

3. The single-phase SOGI phase-locked loop based on three-sampling point frequency detection according to claim 1, characterized in that: The frequency detection module uses three pairs of orthogonal signal sampling points with equal time intervals to obtain the fundamental frequency ω of the grid voltage. g .

4. The single-phase SOGI phase-locked loop based on three-sampling point frequency detection according to claim 1, characterized in that: The low-pass filter module is a first-order low-pass filter, which is used to filter out the double frequency harmonic components contained in the output of the frequency detection module.

5. A method for implementing a single-phase SOGI phase-locked loop based on three-sampling point frequency detection, characterized in that: The input end of the SOGI module is connected to the grid voltage sampling signal u g , a pair of orthogonal signals u at the output of the SOGI module α 、u β As the input signal of the frequency detection module; the frequency detection module processes the input signal to obtain the fundamental frequency ω of the grid voltage g , fundamental frequency ω g After filtering by the filter in the low-pass filter module, the estimated frequency ω is obtained est , then the estimated frequency ω est Then it is provided to the SOGI module as the resonant frequency; at the same time, a pair of orthogonal signals u at the output end of the SOGI module α 、u β As the input signal of the Park transformation module, the DC quantity u at the output of the Park transformation module q As the input signal of the proportional-integral regulator module; The output signal ω of the proportional-integral regulator module e and grid frequency reference value ω ff After being processed by the adder, the estimated angular frequency ω of the phase-locked loop is obtained. PLL , the phase-locked loop estimates the angular frequency ω PLL As the input signal of the integrator module; After being processed by the integrator module, the real-time estimated grid phase angle θ is obtained. PLL , grid phase angle θ PLL Connected to the input of the cosine transform module, and the grid phase angle θ PLL Feedback to the Park transformation module; the output signal of the cosine transformation module and the fundamental frequency grid current amplitude reference I m After multiplication by the multiplier module, the grid current reference i is obtained. ref .

6. The method for realizing a single-phase SOGI phase-locked loop based on three-sampling point frequency detection according to claim 5, characterized in that: The frequency detection module uses three pairs of orthogonal signals u with equal time intervals. α 、u β The sampling point obtains the fundamental frequency ω of the grid voltage g ; Fundamental frequency ω g The calculation formula is as follows: Among them, cos -1 {·} is the arccosine function, T s is the sampling period of the frequency detection module, u α (k) represents the sampling point at time k, n represents the sampling interval, u α (kn) is u at time k delayed by n sampling periods α Sampling point, u α (k-2n) is u at time k delayed by 2n sampling periods α Sampling point; β (k) represents the sampling point at time k, u β (kn) is u at time k delayed by n sampling periods α Sampling point, u β (k-2n) is u at time k delayed by 2n sampling periods α Sampling point; The expression of the low-pass filter module is: G F (s)=A0 / (s / ω) p +1) Where A0 is the DC gain of the low-pass filter, ω p is the cutoff frequency of the low-pass filter; The expression of the Park transformation module is: The expression of the proportional integral regulator module is: G PI (s)=k p_pll +k i_pll / s Among them, k p_pll is the proportional coefficient of the proportional-integral regulator module, k i_pll is the integral coefficient of the proportional-integral regulator module; The k p_pll and k i_pll They are the second-order system control models: Among them, U gm is the peak value of the grid voltage, ξ is the damping coefficient, ω n is the natural angular frequency; Then the phase-locked loop bandwidth f BW The expression is: Among them, ω ff It is the grid frequency reference value.

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