Semiconductor structure and method for forming the same

By forming a multi-layer structure in semiconductor manufacturing, the problem of poor performance of metal interconnect structures in the prior art is solved, the performance and production efficiency of semiconductor devices are improved, and the cost is reduced.

CN114156255BActive Publication Date: 2025-01-14SEMICON MFG INT (SHANGHAI) CORP +1
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Patent Information

Application Number
CN202010930970.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-09-07
Publication Date
2025-01-14
Estimated Expiration
2040-09-07

AI Technical Summary

Technical Problem

The metal interconnect structures formed in existing semiconductor manufacturing have poor performance, which affects device performance and cost.

Method used

Using a semiconductor structure and a method of forming the same, including forming a first conductive layer on the substrate and forming a multi-layer structure on its surface, including a reaction layer, a buffer layer and a barrier layer, through specific process parameters such as annealing and deposition processes, Control the resistivity and layer structure to reduce the resistance between the conductive layers.

Benefits of technology

The performance of the semiconductor structure is improved, the resistance between the conductive layers is reduced, process steps and production costs are saved, and production efficiency is improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

A semiconductor structure and a method for forming the same, wherein the structure comprises: a substrate, wherein the substrate has a first conductive layer, wherein the substrate exposes the top of the first conductive layer; a first dielectric layer located on the substrate, wherein the first dielectric layer has an opening exposing the top surface of the first conductive layer; and a first reaction layer located on the first conductive layer exposed by the opening, wherein the material of the first reaction layer has a first resistivity, and the first resistivity is within a preset range. The first reaction layer is conducive to reducing the resistance between the second conductive layer and the first conductive layer, thereby facilitating improving the performance of the formed semiconductor structure.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] The metal interconnection structure is an indispensable structure in semiconductor devices, which is used to realize the interconnection between active areas, between transistors, or between metal lines of different layers, and complete the transmission and control of signals. Therefore, in the semiconductor manufacturing process, the formation of the metal interconnection structure has a great influence on the performance of semiconductor devices and the semiconductor manufacturing cost.

[0003] The method for forming the metal interconnection structure is as follows: providing a semiconductor substrate; forming a first dielectric layer on the semiconductor substrate, wherein the first dielectric layer has a first opening; forming a first plug in the first opening; after forming the first plug, forming a second dielectric layer on the surface of the first plug and the surface of the first dielectric layer; forming a second opening in the second dielectric layer; after forming the second opening, forming a second plug in the second opening. The first plug and the second plug constitute the metal interconnection structure.

[0004] However, the performance of the metal interconnect structure formed by the prior art is relatively poor. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of the formed semiconductor structure.

[0006] To solve the above technical problems, the technical solution of the present invention provides a semiconductor structure, including: a substrate, wherein a first conductive layer is provided in the substrate, and the substrate exposes the top of the first conductive layer; a first dielectric layer located on the substrate, and the first dielectric layer has an opening exposing the top surface of the first conductive layer; a first reaction layer located on the first conductive layer exposed by the opening, and the material of the first reaction layer has a first resistivity, and the first resistivity is within a preset range.

[0007] Optionally, the method further includes: a buffer layer located on the first reaction layer, wherein a material of the buffer layer has a second resistivity, and the first resistivity is smaller than the second resistivity.

[0008] Optionally, it further includes: a second reaction layer located between the first reaction layer and the first conductive layer.

[0009] Optionally, the material of the second reaction layer has a third resistivity, the material of the first conductive layer has a fourth resistivity, and the third resistivity is less than the fourth resistivity.

[0010] Optionally, the material of the first reaction layer includes: metal silicide; the metal silicide includes: titanium silicide or tantalum silicide.

[0011] Optionally, the material of the buffer layer includes: titanium or tantalum.

[0012] Optionally, the material of the second reaction layer includes: metal silicide.

[0013] Optionally, it also includes: a barrier layer located on the first reaction layer and on the side wall surface of the opening; and a second conductive layer located on the surface of the barrier layer, wherein the second conductive layer completely fills the opening.

[0014] Optionally, the barrier layer is located on the surface of the buffer layer.

[0015] Optionally, the material of the barrier layer includes: titanium nitride, tantalum nitride or tungsten nitride.

[0016] Optionally, the material of the first conductive layer includes: metal or metal compound, the metal includes: tungsten, copper, cobalt, titanium, tantalum or ruthenium, and the metal compound includes: titanium nitride, tantalum nitride or ruthenium nitride.

[0017] Optionally, the base includes a substrate and a second dielectric layer located on a surface of the substrate, the first conductive layer is located in the second dielectric layer, and the second dielectric layer exposes the top of the first conductive layer.

[0018] Correspondingly, the technical solution of the present invention also provides a method for forming a semiconductor structure, including: providing a substrate, wherein the substrate has a first conductive layer, and the substrate exposes the top of the first conductive layer; forming a first dielectric layer on the substrate, and the first dielectric layer has an opening exposing the top surface of the first conductive layer; forming a reaction material film on the first conductive layer exposed at the bottom of the opening; forming a buffer material film on the surface of the reaction material film; allowing the reaction material film to react with the buffer material film to form a first reaction layer, the material of the first reaction layer has a first resistivity, the buffer material film has a second resistivity, and the first resistivity is less than the second resistivity.

[0019] Optionally, the material of the reaction material film includes: amorphous silicon or single crystal silicon; the thickness of the reaction material film ranges from 9 angstroms to 49 angstroms.

[0020] Optionally, the material of the buffer material film includes: titanium or tantalum; the thickness of the buffer material film ranges from 20 angstroms to 50 angstroms.

[0021] Optionally, the method for forming the reaction material film includes: forming an initial reaction material film on the surface of the first conductive layer exposed at the bottom of the opening; part of the initial reaction material film reacts with the first conductive layer to form a second reaction layer, and the remaining initial reaction material film forms the reaction material film.

[0022] Optionally, the material of the second reaction layer has a third resistivity, the material of the first conductive layer has a fourth resistivity, and the third resistivity is less than the fourth resistivity.

[0023] Optionally, it also includes: after forming the initial reaction material film and before forming the buffer material film, a first annealing process is used to make part of the initial reaction material film react with the first conductive layer; parameters of the first annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

[0024] Optionally, part of the buffer material film located in the opening reacts with the reactive material film, and the remaining buffer material film located in the opening forms a buffer layer, and the buffer layer is located on the surface of the first reactive layer.

[0025] Optionally, it also includes: after forming the buffer material film and before forming the first reaction layer, forming a barrier material film on the surface of the buffer material film and the surface of the opening side wall; the formation process of the barrier material film includes: chemical vapor formation process or atomic layer deposition process, and the deposition process includes: high temperature process; the parameters of the deposition process include: temperature range of 300 degrees Celsius to 400 degrees Celsius, time range of 2 minutes to 6 minutes.

[0026] Optionally, a high temperature process for forming the barrier material film causes the reaction material film to react with the buffer material film to form the first reaction layer.

[0027] Optionally, the high temperature process for forming the barrier material film forms the reactive material film.

[0028] Optionally, it also includes: after forming the buffer material film and before forming the barrier material film, a second annealing process is used to make the reaction material film react with the buffer material film; the parameters of the second annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

[0029] Optionally, the first reaction layer is also located on the first dielectric layer; the buffer material film is also located on the first dielectric layer; the blocking material film is also located on the first dielectric layer; the method for forming the semiconductor structure also includes: forming a conductive material film on the surface of the blocking material film, and the conductive material film fills the opening; planarizing the first reaction layer, the buffer material film, the blocking material film and the conductive material film until the surface of the first dielectric layer is exposed, so that the blocking material film forms a blocking layer, and the conductive material film forms a second conductive layer, and the second conductive layer fills the opening.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] In the semiconductor structure provided by the technical solution of the present invention, the material of the first reaction layer has a first resistivity, and the first resistivity is within a preset range, so that the resistance of the first reaction layer is low. The first reaction layer is beneficial to reducing the resistance between the second conductive layer and the first conductive layer, thereby helping to improve the performance of the formed semiconductor structure.

[0032] Furthermore, the material of the first reaction layer includes metal silicide, and the first reaction layer is beneficial to reducing the contact resistance between the second conductive layer and the first conductive layer, thereby further reducing the resistance between the first conductive layer and the second conductive layer, which is beneficial to improving the performance of the formed semiconductor structure.

[0033] Furthermore, the semiconductor structure also includes: a second reaction layer located between the first reaction layer and the first conductive layer, the material of the second reaction layer has a third resistivity, the material of the first conductive layer has a fourth resistivity, and the third resistivity is less than the fourth resistivity, the resistance of the second reaction layer is relatively low, and the second reaction layer is beneficial to reducing the resistance between the second conductive layer and the first conductive layer, thereby facilitating improving the performance of the formed semiconductor structure.

[0034] Furthermore, the material of the second reaction layer includes metal silicide, and the second reaction layer is beneficial to reducing the contact resistance between the subsequently formed second conductive layer and the first conductive layer, thereby further reducing the resistance between the first conductive layer and the second conductive layer, which is beneficial to improving the performance of the formed semiconductor structure.

[0035] In the method for forming a semiconductor structure provided by the technical solution of the present invention, a reaction material film is formed, and the reaction material film is reacted with the buffer material film to form a first reaction layer. Since the material of the buffer material film includes: metal, the material of the first reaction layer formed includes: metal silicide, the material of the first reaction layer has a first resistivity, the material of the buffer material film has a second resistivity, and the first resistivity is less than the second resistivity, so that the resistance of the first reaction layer formed is lower, and the first reaction layer is beneficial to reducing the resistance between the subsequently formed second conductive layer and the first conductive layer, thereby facilitating improving the performance of the formed semiconductor structure.

[0036] Furthermore, since the deposition process for forming the barrier material film includes a high-temperature process, the high-temperature treatment can cause the reaction material film to react with the buffer material film to form the first reaction layer while forming the barrier material film, which is beneficial for saving process steps, thereby improving production efficiency and reducing production costs.

[0037] Furthermore, since the deposition process for forming the barrier material film includes a high-temperature process, the high-temperature treatment causes part of the initial reaction material film to react with the first conductive layer to form a second reaction layer while forming the barrier material film, which is beneficial for saving process steps, thereby improving production efficiency and reducing production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figures 1 to 3 It is a structural schematic diagram of each step of a method for forming a conventional semiconductor structure;

[0039] Figure 4 is a schematic structural diagram of an existing semiconductor structure;

[0040] Figures 5 to 13 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention. DETAILED DESCRIPTION

[0041] It should be noted that the terms “surface” and “on” in this specification are used to describe relative positional relationships in space and are not limited to direct contact.

[0042] First, the reasons why the performance of the existing semiconductor structure is poor are described in detail with reference to the accompanying drawings. Figures 1 to 4 The present invention is a structural schematic diagram of each step of a method for forming a conventional semiconductor structure.

[0043] Please refer to Figure 1A substrate 100 is provided, wherein the substrate 100 has a first dielectric layer 110, wherein the first dielectric layer 110 has a first conductive layer 120, and the first dielectric layer 110 exposes the top of the first conductive layer 120; a second dielectric layer 130 and an opening 140 located in the second dielectric layer 130 are formed on the surfaces of the first conductive layer 120 and the first dielectric layer 110, and the opening 140 exposes the top surface of the first conductive layer 110.

[0044] Please refer to Figure 2 A barrier material film 150 is formed on the bottom and sidewall surfaces of the opening 140 and the surface of the second dielectric layer 130 .

[0045] Please refer to Figure 3 A conductive material film 160 is formed on the surface of the barrier material film 150 , and the conductive material film 160 fills the opening 140 .

[0046] In the above method, the barrier material film 150 is formed before the conductive material film 160 is formed. Since the barrier material film 150 can better adhere to the side wall surface of the opening 140, the conductive material film 160 can better adhere to the barrier material film 150. Therefore, the barrier material film 150 is conducive to the conductive material film 160 being better formed at the bottom and side wall surface of the opening 140.

[0047] In order to improve the step coverage of the barrier material film 150 so that the barrier material film 150 can be well formed on the sidewall surface of the opening 140, a chemical vapor deposition or atomic layer vapor deposition process is usually used to form the barrier material film 150. However, during the process of depositing the film layer using the chemical vapor deposition process or the atomic layer deposition process, the plasma generated is likely to cause significant damage to the material of the first conductive layer 120 at the bottom of the opening 140, resulting in poor performance of the first conductive layer 120, or even a short circuit at the first conductive layer 120.

[0048] To solve the above technical problems, please Figure 1 Based on reference Figure 4 , a buffer layer 11 is formed on the bottom surface of the opening 140; a barrier material film 12 is formed on the surface of the buffer layer 11 and the sidewall surface of the opening 140. The buffer layer 11 is formed by a physical vapor deposition process, and the buffer layer 11 can prevent the subsequent process of forming the barrier material film 12 from damaging the first conductive layer 120. However, the resistivity of titanium, the material of the buffer layer 11, is generally large, and the contact resistance between the buffer layer 11 and the first conductive layer 120 is also large. The introduction of the buffer layer 11 is likely to greatly increase the resistance, which is not conducive to the performance of the semiconductor structure.

[0049] In order to solve the technical problem, an embodiment of the present invention provides a semiconductor structure and a method for forming the same, wherein the structure includes: a first reaction layer located on the first conductive layer exposed by the opening, the material of the first reaction layer having a first resistivity, and the first resistivity being within a preset range; and a barrier layer located on the first reaction layer and on the surface of the sidewall of the opening. The material of the first reaction layer has a first resistivity, and the first resistivity is within a preset range, so that the resistance of the first reaction layer is relatively low, and the first reaction layer is conducive to reducing the resistance between the second conductive layer and the first conductive layer, thereby facilitating improving the performance of the formed semiconductor structure.

[0050] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0051] Figures 5 to 13 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention.

[0052] Please refer to Figure 5 , providing a substrate 200 , wherein the substrate 200 has a first conductive layer 210 therein, and the substrate 200 exposes the top of the first conductive layer 210 .

[0053] In this embodiment, the base 200 includes a substrate 201 and a second dielectric layer 202 located on the surface of the substrate 201 . The first conductive layer 210 is located in the second dielectric layer 202 , and the second dielectric layer 202 exposes the top of the first conductive layer 210 .

[0054] In this embodiment, the substrate 201 is single crystal silicon. In other embodiments, the substrate may be made of semiconductor materials such as single crystal germanium, silicon germanium, gallium arsenide, etc., or may be a semiconductor-on-insulator structure.

[0055] The material of the second dielectric layer 202 is a dielectric material, and the dielectric material includes: one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide nitride, and silicon oxycarbon nitride. In this embodiment, the material of the second dielectric layer 202 is silicon oxide.

[0056] The material of the first conductive layer 210 includes metal or metal compound, the metal includes tungsten, copper, cobalt, titanium, tantalum or ruthenium, the metal compound includes titanium nitride, tantalum nitride or ruthenium nitride. In this embodiment, the material of the first conductive layer 210 is cobalt.

[0057] Next, a first dielectric layer is formed on the substrate 200, and the first dielectric layer has an opening exposing the top surface of the first conductive layer 210. For details on the process of forming the first dielectric layer and the opening in the first dielectric layer, please refer to Figure 5 to Figure 6 .

[0058] Please refer to Figure 6 A dielectric material film 220 is formed on the surface of the first conductive layer 210 and the surface of the substrate 200 ; a patterned layer 221 is formed on the surface of the dielectric material film 220 , and the patterned layer 221 exposes a portion of the surface of the dielectric material film 220 .

[0059] The patterned layer 221 provides a mask for subsequent etching of the dielectric material film 220 .

[0060] In this embodiment, the dielectric material film 220 is located on the surface of the first conductive layer 210 and the surface of the second dielectric layer 202 .

[0061] Please refer to Figure 7 , using the patterned layer 221 as a mask, etching the dielectric material film 220 until the top surface of the first conductive layer 210 is exposed, thereby forming the first dielectric layer 230 and the opening 240 .

[0062] The process of etching the dielectric material film 220 includes: one of a wet etching process and a dry etching process or a combination of the two.

[0063] In this embodiment, the process of etching the dielectric material film 220 is a dry etching process, which is beneficial to improving the morphology of the formed opening 240 .

[0064] In this embodiment, after forming the first dielectric layer 230 and the opening 240 , the method further includes: removing the patterned layer 221 .

[0065] Next, a reaction material film is formed on the first conductive layer 210 exposed at the bottom of the opening 240. In this embodiment, the specific process of forming the reaction material film is shown in FIG. Figures 8 to 9 .

[0066] Please refer to Figure 8 An initial reaction material film 250 is formed on the surface of the first conductive layer 210 exposed at the bottom of the opening 240 .

[0067] The initial reaction material film 250 provides material for subsequently forming a reaction material film.

[0068] In this embodiment, the initial reaction material film 250 is also located on the first dielectric layer 250 .

[0069] The thickness of the initial reaction material film 250 is in a range of 10 angstroms to 50 angstroms.

[0070] The material of the initial reaction material film 250 includes: amorphous silicon or single crystal silicon. In this embodiment, the material of the initial reaction material film 250 is amorphous silicon.

[0071] The formation process includes: a physical vapor deposition process, through which the initial reaction material film 250 will not be deposited on the side wall of the opening 240, thereby reducing the space occupied by the opening 240, which is conducive to the subsequent filling of the conductive material film.

[0072] Please refer to Fig. 9 Part of the initial reaction material film 250 reacts with the first conductive layer 210 to form a second reaction layer 260 , and the remaining initial reaction material film 250 forms the reaction material film 270 .

[0073] Since the reaction material film 270 is the remaining initial reaction material film 250, the material of the reaction material film 270 includes: amorphous silicon or single crystal silicon. In this embodiment, the material of the reaction material film 270 is amorphous silicon.

[0074] The thickness of the reaction material film 270 is in a range of 9 angstroms to 49 angstroms.

[0075] The material of the second reaction layer 260 has a third resistivity, the material of the first conductive layer 210 has a fourth resistivity, and the third resistivity is less than the fourth resistivity.

[0076] The material of the second reaction layer 260 includes: metal silicide. In this embodiment, the material of the first conductive layer 210 is cobalt, and the material of the initial reaction material film 250 is amorphous silicon, so the material of the second reaction layer 260 is cobaltized silicon.

[0077] In this embodiment, the reaction material film 270 is also located on the first dielectric layer 230 .

[0078] In this embodiment, a first annealing process is used to make part of the initial reaction material film 250 react with the first conductive layer 210; parameters of the first annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

[0079] In other embodiments, the first annealing process may not be performed, and the initial reaction material film may be subjected to high temperature treatment through a subsequent process to make a portion of the initial reaction material film react with the first conductive layer.

[0080] In this embodiment, the initial reaction material film 250 is first formed, and part of the initial reaction material film 250 reacts with the first conductive layer 210 to form the second reaction layer 260 , and the unreacted initial reaction material film 240 forms a reaction material film 270 , and the reaction material film 270 in the opening 240 is located on the surface of the second reaction layer 260 .

[0081] In other embodiments, the process for forming the reaction material film includes: a physical vapor deposition process.

[0082] Please refer to Fig.10 , a buffer material film 280 is formed on the surface of the reaction material film 270 .

[0083] The buffer material film 280 is used to prevent the first conductive layer 210 from being damaged by a subsequent process of forming a barrier material film.

[0084] In this embodiment, the buffer material film 280 is also located on the first dielectric layer 230 .

[0085] Specifically, the buffer material film 280 is located on the surface of the reaction material film 270 on the first dielectric layer 230 .

[0086] The material of the buffer material film 280 includes titanium or tantalum.

[0087] The thickness of the buffer material film 280 is in a range of 20 angstroms to 50 angstroms.

[0088] The formation process of the buffer material film 280 includes a physical vapor deposition process. Through the physical vapor deposition process, the buffer material film 280 will not be deposited on the side wall of the opening 240, thereby reducing the space occupied by the opening 240, which is beneficial to the subsequent filling of the conductive material film.

[0089] Please refer to Fig.11 In the buffer material film 280 (such as Fig.10 A barrier material film 290 is formed on the surface (shown) and the sidewall surface of the opening 240.

[0090] The function of the barrier material film 290 is, on the one hand, to increase the adhesion of the subsequently formed conductive material film so that the conductive material film can be better formed in the opening 240; on the other hand, to prevent the ions or atoms in the subsequently formed conductive material film from diffusing into the first dielectric layer 210, which may easily cause leakage.

[0091] In this embodiment, the barrier material film 290 is also located on the first dielectric layer 230 .

[0092] Specifically, the barrier material film 290 is located on the surface of the buffer material film 280 on the first dielectric layer 230 .

[0093] The formation process of the barrier material film 290 includes a chemical vapor formation process or an atomic layer deposition process, and the deposition process includes: a high temperature process; the parameters of the deposition process include: a temperature range of 300 degrees Celsius to 400 degrees Celsius, and a time range of 2 minutes to 6 minutes.

[0094] The chemical vapor deposition process or the atomic layer deposition process is beneficial to improving the step coverage of the barrier material film 290 , so that the barrier material film 290 can be well formed on the side wall surface of the opening 140 .

[0095] Please continue to refer to Fig.11 , so that the reaction material film 270 (such as Fig.10 As shown) reacts with the buffer material film 280 to form a first reaction layer 271, the material of the first reaction layer 271 has a first resistivity, the buffer material film 280 has a second resistivity, and the first resistivity is less than the second resistivity.

[0096] By forming a reaction material film 270, the reaction material film 270 reacts with the buffer material film 280 to form a first reaction layer 271. Since the material of the buffer material film 280 includes: metal, the material of the first reaction layer 271 includes: metal silicide, the material of the first reaction layer 271 has a first resistivity, the material of the buffer material film 280 has a second resistivity, and the first resistivity is less than the second resistivity, so that the resistance of the first reaction layer 271 formed is lower, and the first reaction layer 271 is beneficial to reducing the resistance between the second conductive layer and the first conductive layer 210 formed later, thereby helping to improve the performance of the formed semiconductor structure.

[0097] In this embodiment, the high temperature process of forming the barrier material film 290 causes the reaction material film 270 to react with the buffer material film 280 to form the first reaction layer 271 .

[0098] Specifically, in this embodiment, part of the buffer material film 280 in the opening 240 reacts with the reaction material film 270 , and the remaining buffer material film 280 in the opening 240 forms a buffer layer 281 , which is located on the surface of the first reaction layer 271 .

[0099] In this embodiment, the high temperature process of forming the barrier material film 290 forms the first reaction layer 271 and the buffer layer 281 located on the surface of the first reaction layer 271 .

[0100] Since the deposition process for forming the barrier material film 290 includes a high-temperature process, the high-temperature treatment can cause the reaction material film 270 to react with the buffer material film 280 to form the first reaction layer 271 while forming the barrier material film 290, which is beneficial for saving process steps, thereby improving production efficiency and reducing production costs.

[0101] In other embodiments, all the buffer material film in the opening reacts with the reactive material film, and no buffer material film remains, so that the buffer layer is not formed.

[0102] In other embodiments, after forming the initial reaction material film, the first annealing process is not performed, so that the high temperature treatment of forming the barrier material film can also make part of the initial reaction material film react with the first conductive layer to form the second reaction layer, and the remaining part of the initial reaction material film forms the reaction material film, and further make the reaction material film react with the buffer material film to form the first reaction layer. Since the deposition process of forming the barrier material film includes a high temperature process, the high temperature treatment makes part of the initial reaction material film react with the first conductive layer to form the second reaction layer while forming the barrier material film, which is conducive to saving process steps, thereby improving production efficiency and reducing production costs.

[0103] In other embodiments, a second annealing process may be used to make the reaction material film react with the buffer material film; parameters of the second annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

[0104] Please refer to Fig.12 A conductive material film 292 is formed on the surface of the barrier material film 290 , and the conductive material film 292 fills the opening 240 .

[0105] The conductive material film 292 provides material for subsequently forming a second conductive layer.

[0106] The material of the conductive material film 292 includes: metal or metal compound, the metal includes: tungsten, copper, cobalt, titanium, tantalum or ruthenium, the metal compound includes: titanium nitride, tantalum nitride or ruthenium nitride. In this embodiment, the material of the conductive material film 292 is tungsten.

[0107] Please refer to Fig.13 , planarize the first reaction layer 271, the buffer material film 281, the barrier material film 290 and the conductive material film 292 until the surface of the first dielectric layer 230 is exposed, so that the barrier material film 290 forms a barrier layer 2901, and the conductive material film 292 forms a second conductive layer 2921, and the second conductive layer 2921 fills the opening 240.

[0108] It should be noted that the planarization process removes the first reaction layer 271 on the first dielectric layer 230 , thereby retaining the first reaction layer 271 in the opening 240 .

[0109] It should be noted that the planarization process removes the buffer layer 281 on the first dielectric layer 230 , thereby retaining the buffer layer 281 in the opening 240 .

[0110] Accordingly, the embodiment of the present invention further provides a semiconductor structure formed by the above method, please continue to refer to Fig.13 , including: a substrate 200, wherein the substrate 200 has a first conductive layer 210, and the substrate 200 exposes the top of the first conductive layer 210; a first dielectric layer 230 located on the substrate 200, and the first dielectric layer 230 has an opening 240 exposing the top surface of the first conductive layer 210; a first reaction layer 271 located on the first conductive layer 210 exposed by the opening 240, and the material of the first reaction layer 271 has a first resistivity, and the first resistivity is within a preset range.

[0111] The material of the first reaction layer 271 has a first resistivity, and the first resistivity is within a preset range, so that the resistance of the first reaction layer 271 is low. The first reaction layer 271 is beneficial to reducing the resistance between the second conductive layer 2921 and the first conductive layer 210, thereby helping to improve the performance of the formed semiconductor structure.

[0112] The following is a detailed description with reference to the accompanying drawings.

[0113] The semiconductor structure further includes: a buffer layer 281 located on the first reaction layer 271 , wherein a material of the buffer layer 281 has a second resistivity, and the first resistivity is less than the second resistivity.

[0114] The material of the first reaction layer 271 includes: metal silicide; the metal silicide includes: titanium silicide or tantalum silicide. In this embodiment, the material of the first reaction layer 271 is titanium silicide.

[0115] Since the material of the first reaction layer 271 includes metal silicide, the first reaction layer 271 is conducive to reducing the contact resistance between the second conductive layer 2921 and the first conductive layer 210, thereby further reducing the resistance between the first conductive layer 210 and the second conductive layer 2921, which is conducive to improving the performance of the formed semiconductor structure.

[0116] The material of the buffer layer 281 includes titanium or tantalum.

[0117] The semiconductor structure further includes a second reaction layer 260 located between the first reaction layer 271 and the first conductive layer 210 .

[0118] The material of the second reaction layer 260 has a third resistivity, the material of the first conductive layer 210 has a fourth resistivity, and the third resistivity is less than the fourth resistivity. The resistance of the second reaction layer 260 is relatively low, and the second reaction layer 260 is conducive to reducing the resistance between the second conductive layer 2921 and the first conductive layer 210, thereby facilitating the improvement of the performance of the formed semiconductor structure. In addition, the material of the second reaction layer 260 is a metal silicide, and the second reaction layer 260 is conducive to reducing the contact resistance between the second conductive layer 2921 and the first conductive layer 210 formed subsequently, thereby further reducing the resistance between the first conductive layer 210 and the second conductive layer 2921, and facilitating the improvement of the performance of the formed semiconductor structure.

[0119] The semiconductor structure further includes: a barrier layer 2901 located on the first reaction layer 271 and on the sidewall surface of the opening 240 ; and a second conductive layer 2921 located on the surface of the barrier layer 2901 , and the second conductive layer 2921 completely fills the opening 240 .

[0120] The barrier layer 2901 is located on the surface of the buffer layer 281 .

[0121] The material of the barrier layer 2901 includes titanium nitride, tantalum nitride or tungsten nitride.

[0122] The material of the first conductive layer 210 includes metal, and the metal includes one or more combinations of tungsten, copper, cobalt, titanium nitride, titanium, tantalum, tantalum nitride, ruthenium, ruthenium nitride and aluminum.

[0123] The base 200 includes a substrate 201 and a second dielectric layer 202 located on the surface of the substrate 201 . The first conductive layer 210 is located in the second dielectric layer 202 , and the second dielectric layer 202 exposes the top of the first conductive layer 210 .

[0124] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that: include: A substrate, wherein the substrate has a first conductive layer therein, and the substrate exposes a top portion of the first conductive layer; A first dielectric layer located on the substrate, wherein the first dielectric layer has an opening exposing a top surface of the first conductive layer; a first reaction layer located on the first conductive layer exposed by the opening, wherein a material of the first reaction layer has a first resistivity, and the first resistivity is within a preset range; a second reaction layer located between the first reaction layer and the first conductive layer, wherein the second reaction layer is located on the first conductive layer; and a buffer layer located on the first reaction layer, and a second conductive layer located on the buffer layer; The material of the buffer layer has a second resistivity, and the first resistivity is smaller than the second resistivity; the material of the second reaction layer has a third resistivity, and the material of the first conductive layer has a fourth resistivity, and the third resistivity is smaller than the fourth resistivity.

2. The semiconductor structure according to claim 1, wherein: The material of the first reaction layer includes: metal silicide; the metal silicide includes: titanium silicide or tantalum silicide.

3. The semiconductor structure according to claim 1, wherein: The material of the buffer layer includes: titanium or tantalum.

4. The semiconductor structure according to claim 1, wherein: The material of the second reaction layer includes: metal silicide.

5. The semiconductor structure according to claim 1, wherein: Also includes: A barrier layer is located on the first reaction layer and on the sidewall surface of the opening; and a second conductive layer is located on the surface of the barrier layer, and the second conductive layer completely fills the opening.

6. The semiconductor structure according to claim 5, characterized in that The barrier layer is located on the surface of the buffer layer.

7. The semiconductor structure according to claim 5, characterized in that The material of the barrier layer includes: titanium nitride, tantalum nitride or tungsten nitride.

8. The semiconductor structure according to claim 1, wherein: The material of the first conductive layer includes: metal or metal compound, the metal includes: tungsten, copper, cobalt, titanium, tantalum or ruthenium, and the metal compound includes: titanium nitride, tantalum nitride or ruthenium nitride.

9. The semiconductor structure according to claim 1, wherein: The base comprises a substrate and a second dielectric layer located on the surface of the substrate, the first conductive layer is located in the second dielectric layer, and the second dielectric layer exposes the top of the first conductive layer.

10. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, wherein the substrate has a first conductive layer therein, and the substrate exposes a top portion of the first conductive layer; forming a first dielectric layer on the substrate, wherein the first dielectric layer has an opening exposing the top surface of the first conductive layer; forming a reaction material film on the first conductive layer exposed at the bottom of the opening; forming a buffer material film on the surface of the reaction material film; Allowing the reaction material film to react with the buffer material film to form a first reaction layer, wherein the material of the first reaction layer has a first resistivity, the buffer material film has a second resistivity, and the first resistivity is less than the second resistivity; forming an initial reaction material film on the surface of the first conductive layer exposed at the bottom of the opening; a portion of the initial reaction material film reacts with the first conductive layer to form a second reaction layer, and the remaining initial reaction material film forms the reaction material film; A portion of the buffer material film located in the opening reacts with the reactive material film, and the remaining buffer material film located in the opening forms a buffer layer, and the buffer layer is located on the surface of the first reactive layer; The material of the second reaction layer has a third resistivity, the material of the first conductive layer has a fourth resistivity, and the third resistivity is smaller than the fourth resistivity.

11. The method for forming a semiconductor structure according to claim 10, wherein: The material of the reaction material film includes: amorphous silicon or single crystal silicon; the thickness of the reaction material film ranges from 9 angstroms to 49 angstroms.

12. The method for forming a semiconductor structure according to claim 10, wherein: The material of the buffer material film includes: titanium or tantalum; the thickness of the buffer material film ranges from 20 angstroms to 50 angstroms.

13. The method for forming a semiconductor structure according to claim 10, wherein: Also includes: After forming the initial reaction material film and before forming the buffer material film, a first annealing process is performed to make a portion of the initial reaction material film react with the first conductive layer; The parameters of the first annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

14. The method for forming a semiconductor structure according to claim 10, wherein: Also includes: After forming the buffer material film and before forming the first reaction layer, forming a barrier material film on the surface of the buffer material film and the surface of the side wall of the opening; The formation process of the barrier material film includes: a chemical vapor formation process or an atomic layer deposition process, and the deposition process includes: a high temperature process; the parameters of the deposition process include: a temperature range of 300 degrees Celsius to 400 degrees Celsius, and a time range of 2 minutes to 6 minutes.

15. The method for forming a semiconductor structure according to claim 14, wherein: The high temperature process of forming the barrier material film causes the reaction material film to react with the buffer material film to form the first reaction layer.

16. The method for forming a semiconductor structure according to claim 14, wherein: The high temperature process of forming the barrier material film forms the reactive material film.

17. The method for forming a semiconductor structure according to claim 14, wherein: Also includes: After forming the buffer material film and before forming the barrier material film, a second annealing process is performed to make the reaction material film react with the buffer material film; The parameters of the second annealing process include: a temperature range of 300 degrees Celsius to 800 degrees Celsius, and a time range of 2 minutes to 10 minutes.

18. The method for forming a semiconductor structure according to claim 14, wherein: The first reaction layer is also located on the first dielectric layer; the buffer material film is also located on the first dielectric layer; The barrier material film is also located on the first dielectric layer; the method for forming the semiconductor structure further comprises: forming a conductive material film on the surface of the barrier material film, and the conductive material film fills the opening; The first reaction layer, buffer material film, barrier material film and conductive material film are planarized until the surface of the first dielectric layer is exposed, so that the barrier material film forms a barrier layer, and the conductive material film forms a second conductive layer, and the second conductive layer fills the opening.

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