CPU energy efficiency model optimization method and device

By recalculating static power consumption when the CPU temperature changes and updating the energy efficiency model, the problem of insufficient accuracy in CPU power consumption calculation in the prior art is solved, and more accurate power consumption prediction and more efficient EAS scheduling are achieved.

CN114327025BActive Publication Date: 2025-02-28BEIJING SPREADTRUM HI TECH COMM TECH CO LTD
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Patent Information

Application Number
CN202111355548.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-16
Publication Date
2025-02-28
Estimated Expiration
2041-11-16

AI Technical Summary

Technical Problem

In the prior art, the energy efficiency model used by the EAS scheduling algorithm has problems with accuracy when calculating CPU power consumption, resulting in misjudgment and increasing CPU power consumption.

Method used

After the CPU temperature changes, the static power consumption of each frequency point of the CPU at the current temperature is recalculated, and the energy efficiency model is updated based on the static power consumption to ensure the accuracy of the energy efficiency model.

Benefits of technology

By recalculating static power consumption and updating the energy efficiency model, the accuracy of CPU power consumption prediction is improved, ensuring that EAS scheduling more effectively reduces the overall power consumption of the device.

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Abstract

The present application provides a method and device for optimizing a CPU energy efficiency model, the method comprising: recalculating the static power consumption of each CPU frequency point at the current temperature after the CPU temperature changes; and updating the energy efficiency model according to the static power consumption. The present application scheme can accurately predict the CPU power consumption and ensure the accuracy of the energy efficiency model.
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Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method and device for optimizing a CPU energy efficiency model. Background Art

[0002] The big.Little architecture is a low-power design architecture that combines the highest-performance CPU with the most efficient CPU into a processor subsystem, aiming to assign the right processor to the right task. EAS (EnergyAware Scheduling) is a scheduling algorithm for the big.Little architecture that relies on the CPU's energy efficiency model to select a power-saving CPU core for each task while minimizing the impact on the throughput of the task. The core of the EAS scheduling algorithm is to try to select a CPU core with lower power consumption for the task from the candidate CPU cores while ensuring performance. At this time, it is necessary to calculate which candidate CPU core the task will consume less power on based on the CPU's energy efficiency model.

[0003] In the prior art, the energy efficiency model used by EAS takes the sum of the dynamic power consumption and static power consumption of the CPU core at each frequency point as the power consumption data in the energy efficiency model. However, the existing power consumption calculation scheme has accuracy problems, which can easily lead to misjudgment and increase CPU power consumption. Summary of the invention

[0004] The embodiments of the present application provide a method and device for optimizing a CPU energy efficiency model so as to accurately predict CPU power consumption and ensure the accuracy of the energy efficiency model.

[0005] In order to solve the above technical problems, the embodiments of the present application provide the following technical solutions:

[0006] On the one hand, an embodiment of the present application provides a CPU energy efficiency model optimization method, the method comprising:

[0007] When the CPU temperature changes, recalculate the static power consumption of each CPU frequency point at the current temperature;

[0008] An energy efficiency model is updated according to the static power consumption.

[0009] Optionally, the method further includes: acquiring a current temperature of the CPU; and if the current temperature of the CPU is different from a CPU temperature acquired last time, determining that the CPU temperature has changed.

[0010] Optionally, obtaining the current temperature of the CPU includes: obtaining the current temperature of the CPU according to a set period.

[0011] Optionally, obtaining the current temperature of the CPU includes: obtaining the current temperature of the CPU using a temperature obtaining module arranged in a CPU core.

[0012] Optionally, the method further includes: performing EAS scheduling using the updated energy efficiency model.

[0013] Optionally, the method further includes: synchronizing the reading and updating process of the energy efficiency model by using an RCU lock mechanism.

[0014] The present application also provides a CPU energy efficiency model optimization device, the device comprising:

[0015] A calculation module is used to recalculate the static power consumption of each CPU frequency point at the current temperature after the CPU temperature changes;

[0016] A model updating module is used to update the energy efficiency model according to the static power consumption.

[0017] Optionally, the device further comprises: a temperature acquisition module, used for acquiring the current temperature of the CPU; and a judgment module, used for determining whether the current temperature of the CPU is different from the CPU temperature acquired last time, and if so, determining that the CPU temperature has changed.

[0018] Optionally, the temperature acquisition module is specifically used to obtain the current temperature of the CPU according to a set period.

[0019] Optionally, the temperature acquisition module is arranged in a CPU core.

[0020] Optionally, the device further includes: a scheduling module, configured to perform EAS scheduling using the updated energy efficiency model.

[0021] Optionally, the device further includes: a synchronization module, configured to synchronize the reading and updating process of the energy efficiency model by utilizing an RCU lock mechanism.

[0022] On the other hand, an embodiment of the present application further provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transient storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the above method is executed.

[0023] On the other hand, an embodiment of the present application further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program executable on the processor, and when the processor runs the computer program, the above is executed.

[0024] The CPU energy efficiency model optimization method and device provided in the embodiment of the present application take into account the characteristics that the static power consumption of the CPU is related to the temperature of the CPU itself and that the static power consumption will increase exponentially when the temperature rises. After the CPU temperature changes, the static power consumption of each frequency point of the CPU at the current temperature is recalculated. In other words, the calculation of the static power consumption is based on the real-time temperature of the CPU, and once the temperature of the CPU changes, the static power consumption of the CPU is recalculated, and the energy efficiency model is updated according to the static power consumption, so that the calculation of the static power consumption can be more accurate, the accuracy of the CPU energy efficiency model is guaranteed, and the EAS scheduling based on the energy efficiency model can be made more effective, and the overall power consumption of the equipment can be better reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is the energy efficiency data curve of CPU big and small cores at a lower temperature obtained by using the CPU energy efficiency model in the prior art;

[0026] Figure 2 It is the energy efficiency data curve of CPU big and small cores at higher temperature obtained by using the CPU energy efficiency model in the prior art;

[0027] Figure 3 This is a flow chart of the CPU energy efficiency model optimization method according to an embodiment of the present application;

[0028] Figure 4 is another flow chart of the CPU energy efficiency model optimization method according to an embodiment of the present application;

[0029] Figure 5 This is a structural diagram of a CPU energy efficiency model optimization device according to an embodiment of the present application;

[0030] Figure 6 This is another structural schematic diagram of the CPU energy efficiency model optimization device according to an embodiment of the present application;

[0031] Figure 7 It is a schematic diagram of the hardware structure of the electronic device according to the embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the above-mentioned purposes, features and beneficial effects of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0033] The CPU is mainly composed of CMOS (Complementary Metal Oxide Semiconductor) circuits. The power consumption of CMOS circuits is mainly composed of dynamic power consumption and static power consumption, where dynamic power consumption is p_dynamic = C × F × V ∧2, where C is a coefficient (constant) related to the CPU architecture, F is the operating frequency of the CPU (central processing unit), and V is the operating voltage of the CPU at this frequency. Static power consumption is P_leakage = V × e ∧ aT, where a is a constant and T is the CPU temperature. It can be seen that dynamic power consumption is directly related to the CPU's operating frequency and operating voltage, and has nothing to do with temperature; while static power consumption is related to the CPU's operating voltage V and temperature T, and when the temperature T rises, the static power consumption increases exponentially.

[0034] The EAS scheduling algorithm relies on the CPU energy efficiency model to select a power-saving CPU core for each task, while requiring the minimum impact on the throughput of the executed task. The sum of the dynamic power consumption and static power consumption of the CPU core at each frequency point is used as the power consumption data in the energy efficiency model. For a fixed frequency point, its voltage is fixed, so the dynamic power consumption is also a fixed value. The static power consumption of a fixed frequency point will change with temperature. In the prior art, the EAS energy efficiency model uses the static power consumption value at a certain temperature to calculate the static power consumption. Obviously, the static power consumption calculated in this way cannot reflect the accurate static power consumption of the CPU in the current application environment, thereby affecting the accuracy of the power consumption data of each CPU core obtained according to the energy efficiency model, and effective EAS scheduling cannot be achieved.

[0035] Furthermore, using the energy efficiency model used in EAS in the prior art, we can obtain Figure 1 and Figure 2 The energy efficiency data curve of the CPU size core is shown in Figure 1. Figure 1 and Figure 2 It can be seen that the energy efficiency data curves of the CPU big and small cores do not cross when the temperature is low (25°C), but after the temperature rises (85°C), the static power consumption increases, causing the energy efficiency data curves of the big and small cores to cross. For example, the two frequency points with the same performance marked in the circle have different temperatures, and their power consumption data are reversed. In this way, at low temperatures, the power consumption of the task will be better when running on the small core, and at high temperatures, the power consumption will be better when running on the large core. It can be seen that if the static power consumption value at a certain temperature is used to calculate the static power consumption in the EAS energy efficiency model according to the solution of the prior art, misjudgment will occur, resulting in increased power consumption.

[0036] To this end, an embodiment of the present application provides a CPU energy efficiency model optimization method and device. After the CPU temperature changes, the static power consumption of each frequency point of the CPU at the current temperature is recalculated, and the energy efficiency model is updated according to the static power consumption, so that the energy efficiency model can be more accurate. The energy efficiency model can be used to more accurately determine the power consumption of the CPU.

[0037] like Figure 3 FIG. 1 is a flow chart of a CPU energy efficiency model optimization method according to an embodiment of the present application, comprising the following steps:

[0038] Step 301, after the CPU temperature changes, recalculate the static power consumption of each CPU frequency point at the current temperature.

[0039] In specific applications, the current CPU temperature can be obtained in real time, or it can be obtained according to a set period (for example, a period of 100ms) and compared with the CPU temperature obtained last time to determine whether the CPU temperature has changed. If the CPU temperature obtained this time is different from the CPU temperature obtained last time, it can be determined that the CPU temperature has changed.

[0040] The CPU temperature can be obtained by setting a temperature reading module in the CPU core.

[0041] Step 302: Update the energy efficiency model according to the calculated static power consumption.

[0042] As mentioned earlier, the energy efficiency model uses the sum of the dynamic power consumption and static power consumption of the CPU core at each frequency point as the power consumption data in the energy efficiency model. For a fixed frequency point, the voltage is fixed, so the dynamic power consumption is also a fixed value, while the static power consumption is related to the CPU temperature and changes dynamically. Therefore, when updating the energy efficiency model, you only need to update the static power consumption.

[0043] The CPU energy efficiency model optimization method provided in the embodiment of the present application recalculates the static power consumption of each frequency point of the CPU at the current temperature after the CPU temperature changes, and updates the energy efficiency model according to the static power consumption, thereby making the calculation of the static power consumption more accurate and ensuring the accuracy of the CPU energy efficiency model at different CPU operating temperatures.

[0044] like Figure 4 FIG. 1 is another flow chart of the CPU energy efficiency model optimization method according to an embodiment of the present application, comprising the following steps:

[0045] Step 401, after the CPU temperature changes, recalculate the static power consumption of each CPU frequency point at the current temperature.

[0046] Step 402: Update the energy efficiency model according to the static power consumption.

[0047] Step 403: Use the updated energy efficiency model to perform EAS scheduling.

[0048] The CPU energy efficiency model optimization method provided in the embodiment of the present application can adapt the energy efficiency model to the current operating temperature of the CPU, ensure the accuracy of the energy efficiency model, and further enable the EAS scheduler to use the updated energy efficiency model when calculating which CPU core to place the task on to save more power, thereby making the scheduling more accurate.

[0049] Furthermore, considering that EAS scheduling occurs frequently, it will take a long time to update the energy efficiency model. In order to avoid the impact of updating the energy efficiency model on EAS scheduling, the RCU (Read, Copy-Update) lock mechanism can also be used to synchronize the reading and updating process of the energy efficiency model. In this way, the EAS scheduler can achieve zero overhead when reading energy efficiency data, ensuring the real-time scheduling.

[0050] Accordingly, the embodiment of the present application also provides a CPU energy efficiency model optimization device, such as Figure 5 The figure shows a structural diagram of the device.

[0051] In this embodiment, the CPU energy efficiency model optimization device 500 includes: a calculation module 51 and a model update module 52. Among them:

[0052] The calculation module 51 is used to recalculate the static power consumption of each frequency point of the CPU at the current temperature after the CPU temperature changes;

[0053] The model updating module 52 is used to update the energy efficiency model according to the static power consumption.

[0054] It should be noted that, in a non-limiting embodiment, Figure 6 As shown, the CPU energy efficiency model optimization device 500 may also include the following modules:

[0055] A temperature acquisition module 61 is used to acquire the current temperature of the CPU, for example, the current temperature of the CPU can be acquired in real time or according to a set period;

[0056] The judgment module 62 is used to determine whether the current CPU temperature is different from the last acquired CPU temperature. If so, it is determined that the CPU temperature has changed.

[0057] It should be noted that the temperature acquisition module 61 may be arranged in a CPU core.

[0058] Accordingly, in this embodiment, the judgment module 62 can trigger the calculation module 51 to recalculate the static power consumption of each frequency point of the CPU at the current temperature after determining that the CPU temperature has changed; or the judgment module 62 saves the judgment result in a specific storage space, and the calculation module 51 periodically reads the data stored in the storage space, and recalculates the static power consumption of each frequency point of the CPU at the current temperature after finding that the stored data has changed. This embodiment of the present application is not limited to this.

[0059] The CPU energy efficiency model optimization device provided in the embodiment of the present application recalculates the static power consumption of each frequency point of the CPU at the current temperature after the CPU temperature changes, and updates the energy efficiency model according to the static power consumption, thereby making the calculation of the static power consumption more accurate and ensuring the accuracy of the CPU energy efficiency model at different CPU operating temperatures.

[0060] In another non-limiting embodiment of the CPU energy efficiency model optimization device of the present application, the CPU energy efficiency model optimization device may further include: a scheduling module (not shown) for performing EAS scheduling using the updated energy efficiency model.

[0061] The CPU energy efficiency model optimization device provided in the embodiment of the present application can effectively ensure the accuracy of the energy efficiency model, so that the EAS scheduler can use the updated energy efficiency model when calculating which CPU core to place the task on to save more power, making the scheduling more accurate.

[0062] Furthermore, considering that EAS scheduling occurs frequently, it will take a long time to update the energy efficiency model. In order to avoid the impact of updating the energy efficiency model on EAS scheduling, in another non-limiting embodiment of the CPU energy efficiency model optimization device of the present application, it may also include: a synchronization module (not shown) for synchronizing the reading and updating process of the energy efficiency model using the RCU lock mechanism. Using this synchronization module, the EAS scheduler can achieve zero overhead when reading energy efficiency data, ensuring the real-time nature of scheduling.

[0063] For more details about the working principles and working methods of the above-mentioned devices, please refer to the relevant descriptions in the previous corresponding method embodiments, which will not be repeated here.

[0064] In a specific implementation, the above-mentioned CPU energy efficiency model optimization device can be applicable to chips and chip modules that support the big.Little architecture, and to terminals or base stations based on the Linux kernel, including but not limited to embedded devices such as Android phones.

[0065] In a specific implementation, each module / unit included in each device or product described in the above embodiments may be a software module / unit or a hardware module / unit, or may be partly a software module / unit and partly a hardware module / unit.

[0066] For example, for each device or product applied to or integrated in a chip, each module / unit contained therein may be implemented in the form of hardware such as circuits, or at least some of the modules / units may be implemented in the form of software programs, which run on a processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for each device or product applied to or integrated in a chip module, each module / unit contained therein may be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or in different components of the chip module, or at least some of the modules / units may be implemented in the form of software programs, which run on a processor integrated inside the chip module, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for each device or product applied to or integrated in a terminal, each module / unit contained therein may be implemented in the form of hardware such as circuits, Different modules / units may be located in the same component (e.g., a chip, a circuit module, etc.) or in different components within the terminal, or at least some of the modules / units may be implemented in the form of a software program that runs on a processor integrated within the terminal, and the remaining (if any) modules / units may be implemented in hardware such as circuits.

[0067] An embodiment of the present application further provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transient storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are executed.

[0068] An embodiment of the present application also provides a CPU energy efficiency model optimization device, including a memory and a processor, wherein the memory stores a computer program that can be executed on the processor, and the processor executes the steps in the above-mentioned method embodiments when running the computer program.

[0069] Please refer to Figure 7 , is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. The electronic device includes a processor 801, a memory 802 and a transceiver 803.

[0070] Processor 801 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application. Processor 801 may also include multiple CPUs, and processor 801 may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. The processor here may refer to one or more devices, circuits, or processing cores for processing data (such as computer program instructions).

[0071] The memory 802 may be a ROM or other types of static storage devices that can store static information and instructions, a RAM or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a disk storage medium or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, and the embodiments of the present application do not impose any restrictions on this. The memory 802 may exist independently (in this case, the memory 802 may be located outside the device or inside the device), or it may be integrated with the processor 801. Among them, the memory 802 may contain computer program code. The processor 801 is used to execute the computer program code stored in the memory 802, thereby realizing the method provided in the embodiments of the present application.

[0072] The processor 801, the memory 802 and the transceiver 803 are connected via a bus. The transceiver 803 is used to communicate with other devices or communication networks. Optionally, the transceiver 803 may include a transmitter and a receiver. The device used to implement the receiving function in the transceiver 803 can be regarded as a receiver, and the receiver is used to perform the receiving step in the embodiment of the present application. The device used to implement the sending function in the transceiver 803 can be regarded as a transmitter, and the transmitter is used to perform the sending step in the embodiment of the present application.

[0073] when Figure 7The schematic diagram of the structure shown in FIG. 1 is used to illustrate the structure of the terminal device involved in the above embodiment. The processor 801 is used to control and manage the actions of the terminal device. For example, the processor 801 is used to support the terminal device to execute Figure 2 or Figure 3 or Figure 4 or Figure 5 The processor 801 may communicate with other network entities, for example, the above-mentioned network devices, through the transceiver 803. The memory 802 is used to store program codes and data of the terminal device. When the processor runs the computer program, it may control the transceiver 803 to receive downlink signaling or downlink data.

[0074] when Figure 7 The schematic diagram of the structure shown in FIG. 1 is used to illustrate the structure of the network device involved in the above embodiment. The processor 801 is used to control and manage the actions of the network device. For example, the processor 801 is used to support the network device to execute Figure 3 or Figure 4 The processor 801 may communicate with other network entities, for example, the terminal device, through the transceiver 803. The memory 802 is used to store program codes and data of the network device. When the processor runs the computer program, it may control the transceiver 803 to send downlink data or downlink signaling.

[0075] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship.

[0076] The "plurality" appearing in the embodiments of the present application refers to two or more.

[0077] The first, second, etc. descriptions appearing in the embodiments of the present application are only used for illustration and distinction of the description objects. There is no order, nor do they indicate any special limitation on the number of devices in the embodiments of the present application, and cannot constitute any limitation on the embodiments of the present application.

[0078] The various embodiments provided in this application can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, a computer, a server or a data center to another website site, a computer, a server or a data center by wired or wireless means. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0079] In the several embodiments provided in the present application, it should be understood that the disclosed methods, devices and systems can be implemented in other ways. For example, the device embodiments described above are merely schematic; for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0080] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0081] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may be physically arranged separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0082] Although the present application is disclosed as above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application shall be subject to the scope defined by the claims.

Claims

1. A CPU energy efficiency model optimization method, characterized in that: The method comprises: When the CPU operates at a fixed frequency, if the CPU temperature changes, the static power consumption of the CPU at each frequency at the current temperature is recalculated, and the static power consumption is exponentially related to the CPU temperature; The energy efficiency model is updated according to the static power consumption, and the sum of the static power consumption and the dynamic power consumption at the fixed frequency point is used as the power consumption data in the energy efficiency model; the energy efficiency model is used to predict CPU energy efficiency for EAS scheduling of large and small core CPUs.

2. The method according to claim 1, characterized in that The method further comprises: Get the current CPU temperature; If the current CPU temperature is different from the last acquired CPU temperature, it is determined that the CPU temperature has changed.

3. The method according to claim 2, characterized in that The obtaining of the current CPU temperature includes: Get the current CPU temperature according to the set period.

4. The method according to claim 2, characterized in that: The obtaining of the current CPU temperature includes: The temperature acquisition module set in the CPU core is used to obtain the current temperature of the CPU.

5. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: The updated energy efficiency model is used for EAS scheduling.

6. The method according to claim 5, characterized in that The method further comprises: The RCU lock mechanism is used to synchronize the reading and updating process of the energy efficiency model.

7. A CPU energy efficiency model optimization device, characterized in that: The device comprises: A calculation module, used for recalculating the static power consumption of the CPU at each frequency point at the current temperature when the CPU operates at a fixed frequency point and the CPU temperature changes, wherein the static power consumption is exponentially related to the CPU temperature; A model update module is used to update the energy efficiency model according to the static power consumption, and use the sum of the static power consumption and the dynamic power consumption at the fixed frequency point as the power consumption data in the energy efficiency model; the energy efficiency model is used to predict CPU energy efficiency for EAS scheduling of large and small core CPUs.

8. The device according to claim 7, characterized in that The device also includes: Temperature acquisition module, used to obtain the current temperature of the CPU; The judgment module is used to determine whether the current CPU temperature is different from the last acquired CPU temperature. If so, it is determined that the CPU temperature has changed.

9. The device according to claim 8, characterized in that The temperature acquisition module is specifically used to acquire the current temperature of the CPU according to a set period.

10. The device according to claim 8, characterized in that The temperature acquisition module is arranged in the CPU core.

11. The device according to any one of claims 7 to 10, characterized in that The device also includes: The scheduling module is used to perform EAS scheduling using the updated energy efficiency model.

12. The device according to claim 11, characterized in that The device also includes: The synchronization module is used to synchronize the reading and updating process of the energy efficiency model by using the RCU lock mechanism.

13. A computer-readable storage medium, wherein the computer-readable storage medium is a non-volatile storage medium or a non-transient storage medium, and a computer program is stored thereon, wherein: When the computer program is executed by a processor, the method according to any one of claims 1 to 6 is performed.

14. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor runs the computer program, the method according to any one of claims 1 to 6 is performed.

Citation Information

Patent Citations

  • Task scheduling method and device and server cluster

    CN103902379A