Display Panel

Abstract

The present application provides a display panel, which includes a substrate, an oxide semiconductor layer, an oxygen-containing layer and an oxygen absorption layer. The oxide semiconductor layer and the oxygen-containing layer are stacked on the substrate. The oxygen absorption layer is arranged between the oxide semiconductor layer and the oxygen-containing layer. The oxygen absorption layer includes condensed aromatic hydrocarbons and their derivatives, which are used to react with oxygen to generate internal peroxides. The present application arranges an oxygen absorption layer between the oxide semiconductor layer and the oxygen-containing layer for reacting with oxygen to generate internal peroxides. The oxygen absorption layer can prevent low-concentration oxygen from entering the oxide semiconductor layer by absorbing low-concentration oxygen released in the oxygen-containing layer, thereby ensuring the threshold voltage stability of the oxide semiconductor thin film transistor.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] Micro-LED (Micro Light-emitting Diode) display panels and sub-millimeter LED (Mini Light-emitting Diode, Mini-LED) (collectively referred to as MLED) display technologies have become a hotspot for major panel manufacturers in recent years due to their advantages over current liquid crystal display (LCD) technology and organic light-emitting diode (OLED) display technology, such as fast response, high color gamut, high resolution, low energy consumption, ultra-high number of partitions for precise dimming, and ultra-high contrast. MLED display technology integrates miniaturized RGB three-color LEDs into an addressable LED display driver circuit for each pixel to form an LED array, thereby realizing LED micro-display. In existing MLED display panels, a commonly used driving device is an oxide semiconductor thin-film transistor. The oxide semiconductor layer (e.g., InGaZnO layer) of the oxide semiconductor thin-film transistor is easily invaded by water vapor or affected by light of different wavelengths, resulting in reduced device functionality. During the use of the display panel, the oxygen-containing layer releases low concentrations of oxygen. The low-concentration oxygen released from the oxygen-containing layer will enter the oxide semiconductor layer, causing the threshold voltage of the oxide semiconductor thin film transistor to shift to the right, thereby affecting the stability of the oxide semiconductor thin film transistor. Summary of the Invention

[0003] In view of this, the present application provides a display panel that can prevent low-concentration oxygen released from an oxygen-containing layer from entering the oxide semiconductor layer, thereby ensuring the threshold voltage stability of the oxide semiconductor thin film transistor.

[0004] The present application provides a display panel, comprising:

[0005] substrate;

[0006] an oxide semiconductor layer and an oxygen-containing layer stacked on the substrate; and

[0007] The oxygen absorbing layer is disposed between the oxide semiconductor layer and the oxygen-containing layer. The oxygen absorbing layer comprises condensed ring aromatic hydrocarbons and derivatives thereof. The condensed ring aromatic hydrocarbons and derivatives thereof are used to react with oxygen to generate endoperoxides.

[0008] Optionally, in one embodiment, the display panel further includes a gate, an interlayer insulating layer, a source electrode and a drain electrode, the oxygen absorption layer covers the oxide semiconductor layer, the oxygen-containing layer is arranged on the oxygen absorption layer, the oxygen-containing layer includes silicon oxide, the gate is arranged on the oxygen-containing layer, the interlayer insulating layer covers the gate and the oxygen absorption layer, the source electrode and the drain electrode are arranged on the interlayer insulating layer and are connected to both ends of the oxide semiconductor layer.

[0009] Optionally, in one embodiment, the display panel further includes a gate insulating layer, a gate, a source electrode, and a drain electrode, the gate insulating layer is arranged on the oxide semiconductor layer, the gate is arranged on the gate insulating layer, the oxygen absorption layer is arranged on the gate, the oxygen-containing layer covers the oxygen absorption layer, the oxygen-containing layer includes silicon oxide, the source electrode and the drain electrode are arranged on the oxygen-containing layer and are connected to both ends of the oxide semiconductor layer.

[0010] Optionally, in one embodiment, the display panel further includes a gate, a source, and a drain, the oxygen-containing layer includes a first oxygen-containing layer and a second oxygen-containing layer, the first oxygen-containing layer and the second oxygen-containing layer both include silicon oxide, the oxygen absorption layer includes a first oxygen absorption layer and a second oxygen absorption layer, the first oxygen absorption layer covers the oxide semiconductor layer, the first oxygen-containing layer is arranged on the first oxygen absorption layer, the gate is arranged on the first oxygen-containing layer, the second oxygen absorption layer is arranged on the gate, the second oxygen-containing layer covers the second oxygen absorption layer, the source and the drain are arranged on the second oxygen-containing layer and are connected to both ends of the oxide semiconductor layer.

[0011] Optionally, in one embodiment, the oxygen absorbing layer includes a metal skeleton compound with condensed ring aromatic hydrocarbons and derivatives thereof as ligands.

[0012] Optionally, in one embodiment, the metal skeleton compound is a metal skeleton compound of an anthracene hydrocarbon derivative.

[0013] Optionally, in one embodiment, the thickness of the oxygen absorption layer is 100 angstroms to 1 micron.

[0014] Optionally, in one embodiment, the oxygen absorbing layer is a high molecular polymer film, and the high molecular polymer constituting the high molecular polymer film has a main chain or a side chain of condensed ring aromatic hydrocarbons and derivatives thereof.

[0015] Optionally, in one embodiment, the oxygen-containing layer is disposed on a side of the oxide semiconductor layer away from the substrate, and the oxygen absorbing layer is coated on an outer surface of the oxide semiconductor layer.

[0016] Optionally, in one embodiment, the display panel is a micro-LED display panel or a sub-millimeter LED display panel. The present application provides an oxygen absorption layer between the oxide semiconductor layer and the oxygen-containing layer for reacting with oxygen to generate endoperoxides. The oxygen absorption layer absorbs low-concentration oxygen released from the oxygen-containing layer, thereby preventing the low-concentration oxygen from entering the oxide semiconductor layer and ensuring the threshold voltage stability of the oxide semiconductor thin film transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a cross-sectional view of a display panel according to the first embodiment of the present application.

[0018] Figure 2 Schematic diagram of the effect of highly reactive oxygen species released during the formation of the oxygen-containing layer on the gate voltage.

[0019] Figure 3 This is a cross-sectional view of another structure of the display panel according to the first embodiment of the present application.

[0020] Figure 4 This is a schematic diagram of the principle of condensed-ring aromatic hydrocarbons absorbing low-concentration oxygen or active oxygen to form internal oxides.

[0021] Figure 5 This is a cross-sectional view of a display panel according to the second embodiment of the present application.

[0022] Figure 6 This is a cross-sectional view of a display panel according to a third embodiment of the present application.

[0023] Figure 7(a) to Figure 7(i) Schematic diagram of the steps of a method for manufacturing a display panel according to the first embodiment of the present application.

[0024] Figure 8 Schematic diagram of the molecular structure changes of the anthracene-based MOF (DPA-MOF) of the present application when absorbing oxygen. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiment of this application to clearly and completely describe the technical solutions in this application. Obviously, the embodiment described is only a part of the embodiment of this application, not all the embodiments. Based on the embodiment of this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0026] In the present application, unless otherwise expressly specified and limited, the first feature "above" or "below" the second feature may include the first and second features directly, or may include the first and second features not being directly connected but being in contact through another feature between them. Moreover, the first feature "above", "above" and "above" the second feature include the first feature being directly above and obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature "below", "below" and "below" the second feature include the first feature being directly below and obliquely below the second feature, or simply means that the first feature is lower in level than the second feature. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features.

[0027] The present application provides a display panel. The display panel in the embodiments of the present application can be used in mobile phones, tablet computers, desktop computers, laptop computers, e-readers, handheld computers, electronic display screens, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, as well as cellular phones, personal digital assistants (PDAs), augmented reality (AR) and virtual reality (VR) devices, media players, wearable devices, digital cameras, car navigation systems, etc.

[0028] The display panel can be an organic light-emitting diode (OLED) display panel, a quantum dot organic light-emitting diode (QLED) display panel, a micro light-emitting diode (Micro-LED) display panel, a sub-millimeter light-emitting diode (Mini-LED) display panel or a liquid crystal display panel.

[0029] The display panel includes a substrate, an oxide semiconductor layer, an oxygen-containing layer, and an oxygen-absorbing layer. The oxide semiconductor layer and the oxygen-containing layer are stacked on the substrate. Specifically, the oxygen-containing layer can be disposed on the side of the oxide semiconductor layer away from the substrate, or on the side of the oxide semiconductor layer closer to the substrate. The display panel includes thin-film transistors for driving, and the oxide semiconductor layer serves as the channel layer of these thin-film transistors. The oxygen-absorbing layer is disposed between the oxide semiconductor layer and the oxygen-containing layer. The oxygen-absorbing layer includes condensed aromatic hydrocarbons and their derivatives, which react with oxygen to form endoperoxides.

[0030] During the use of the display panel, the oxygen-containing layer will release low-concentration oxygen, which will enter the oxide semiconductor layer, causing the threshold voltage of the oxide semiconductor thin film transistor to shift to the right, affecting the stability of the oxide semiconductor thin film transistor.

[0031] The present application sets an oxygen absorption layer between the oxide semiconductor layer and the oxygen-containing layer for reacting with oxygen to generate an internal peroxide. The oxygen absorption layer absorbs low-concentration oxygen released in the oxygen-containing layer, thereby preventing low-concentration oxygen from entering the oxide semiconductor layer and ensuring the threshold voltage stability of the oxide semiconductor thin film transistor.

[0032] Hereinafter, the specific structure of the display panel of the present application will be described in detail with reference to the accompanying drawings.

[0033] Please refer to Figure 1 The display panel 100 of the first embodiment of the present application is a Mini-LED display panel. The display panel 100 includes a substrate 10 and a barrier layer BA, a light shielding layer LS, a buffer layer BL, a thin film transistor layer 20, a passivation layer PV, a planarization layer PLN, and terminal electrodes 30 stacked sequentially on the substrate 10.

[0034] The substrate 10 may be a rigid substrate such as a glass substrate or a plastic substrate, or may be a flexible substrate made of polyimide.

[0035] The barrier layer BA is provided on the substrate 10. The barrier layer BA is used to block water and oxygen and protect the film layer above the barrier layer BA from water and oxygen invasion. The material of the barrier layer BA can be metal Mo (molybdenum), and the thickness of the barrier layer BA can be In addition, the barrier layer BA is disposed between the substrate 10 and the light shielding layer LS, and can also enhance the adhesion between the light shielding layer LS and the glass substrate 10 .

[0036] The light shielding layer LS is used to shield the oxide semiconductor layer (i.e., channel layer) of the thin film transistor in the thin film transistor layer 20 from light, thereby preventing the oxide semiconductor layer of the thin film transistor from being affected by light and maintaining the electrical stability of the thin film transistor. Optionally, the material of the light shielding layer LS is aluminum, and the thickness of the light shielding layer LS is

[0037] The buffer layer BL is used as an insulating protective layer between the light shielding layer LS and the oxide semiconductor layer of the thin film transistor layer 20. The material of the buffer layer BL can be a SiNx film, a SiOx film, or a stack of SiNx and SiOx films. Optionally, the material of the buffer layer BL is SiNx with a thickness of

[0038] The thin-film transistor layer 20 includes a plurality of thin-film transistors T. These thin-film transistors T can be located within a sub-pixel, forming a driving circuit for the sub-pixel. These thin-film transistors T can also be thin-film transistors in a gate-on-array (GOA) circuit (array substrate row driving circuit). This application does not limit the location and function of the thin-film transistors in the T display panel 100. The following description uses thin-film transistors within sub-pixels as an example.

[0039] The thin film transistor T may be a top-gate thin film transistor. Specifically, the thin film transistor T includes an oxide semiconductor layer CL, an oxygen absorbing layer 21, a gate insulating layer GI, a gate electrode GE, an interlayer insulating layer IL, a source electrode SE, and a drain electrode DE, which are sequentially stacked on a buffer layer BL. The oxide semiconductor layer CL is disposed on the buffer layer BL, the oxygen absorbing layer 21 is disposed on the oxide semiconductor layer CL, the gate insulating layer GI is disposed on the oxygen absorbing layer 21, the gate electrode GE is disposed on the gate insulating layer GI, and the interlayer insulating layer IL covers the gate electrode GE and the oxygen absorbing layer 21. The source electrode SE and the drain electrode DE are disposed on the interlayer insulating layer IL and are connected to the oxide semiconductor layer CL via through holes (not shown) provided in the interlayer insulating layer IL.

[0040] Specifically, the material of the oxide semiconductor layer CL may be IGZO, ITZO or IGZTO. The thickness of the oxide semiconductor layer CL may be

[0041] In this embodiment, the gate insulating layer GI is an oxygen-containing layer. The gate insulating layer GI is made of silicon oxide with a thickness of

[0042] As described above, during the use of the display panel 100, the gate insulating layer GI, which is an oxygen-containing layer, releases low-concentration oxygen. Furthermore, because the oxygen-containing layer is located on the side of the oxide semiconductor layer CL away from the substrate 10, the oxygen-containing layer is formed after the oxide semiconductor layer CL in the manufacturing process. The oxygen-containing layer of silicon oxide is generally formed by chemical vapor deposition (CVD), and its reaction formula is:

[0043] SiH4+N2O→SiOx+H2O

[0044] During this process, some N2O will dissociate and the following reactions will occur:

[0045] NO2→NO+O

[0046] The highly active O generated by dissociation will enter the oxide semiconductor layer CL and undergo the following reactions:

[0047] O+2e-→O 2-

[0048] O - +e-→O 2-

[0049] Please refer to Figure 2 , Figure 2 shows that as the absorption of O 2- As time goes by, the gate voltage (or threshold voltage Vth) of the thin film transistor T changes. Figure 2 It can be seen that as O is absorbed 2- As the duration of the delay increases, the gate voltage of the thin film transistor T gradually increases and shifts to the right. Figure 2 The results show that O 2- The generation of will reduce the carrier concentration in the oxide semiconductor layer CL, causing the threshold voltage Vth to shift to the right, thereby causing the oxide semiconductor thin film transistor device to function abnormally.

[0050] In this embodiment, an oxygen absorption layer 21 is provided between the oxide semiconductor layer CL and the oxygen-containing layer for reacting with oxygen to generate endoperoxides. The oxygen absorption layer 21 absorbs low-concentration oxygen released from the oxygen-containing layer or highly active oxygen during the formation of the oxygen-containing layer, thereby preventing low-concentration oxygen or highly active oxygen from entering the oxide semiconductor layer CL, thereby blocking subsequent reactions to generate O 2- , suppressing the Vth shift to the right and ensuring the normal operation of the oxide semiconductor thin film transistor.

[0051] In this embodiment, the oxygen absorbing layer 21 covers the oxide semiconductor layer CL and the buffer layer BL. Figure 3 As shown, the oxygen absorbing layer 21 can be coated only on the outer surface of the oxide semiconductor layer CL. The "outer surface" of the oxide semiconductor layer CL herein refers to the top and side surfaces, excluding the bottom surface in contact with the oxide semiconductor layer CL. By configuring the oxygen absorbing layer 21 to coat only the outer surface of the oxide semiconductor layer CL, it is possible to conserve material for the oxygen absorbing layer 21, reduce costs, and minimize the impact of the oxygen absorbing layer 21 on the display panel.

[0052] The oxygen absorbing layer 21 used for absorbing oxygen in the present application includes condensed aromatic hydrocarbons and their derivatives. The condensed aromatic hydrocarbons and their derivatives in the oxygen absorbing layer 21 are used to react with oxygen to form endoperoxides. This can absorb oxygen released by the oxygen-containing layer or highly reactive oxygen species dissociated during the formation of the oxygen-containing layer.

[0053] Optionally, the oxygen absorbing layer 21 includes a metal skeleton compound (Metal Organic Framework, MOF) with condensed aromatic hydrocarbons and their derivatives as ligands. Metal organic framework compounds are a class of compounds composed of metal ions or clusters, which are coordinated with organic ligands to form a one-dimensional, two-dimensional or three-dimensional structure. The metal skeleton compound of the present application is a metal skeleton compound with condensed aromatic hydrocarbons and their derivatives as ligands, such as Figure 4 As shown, these fused-ring aromatic hydrocarbons and their derivatives are used to react with oxygen to form endoperoxides, thereby absorbing oxygen.

[0054] Specifically, the metal skeleton compound can be a metal skeleton compound of anthracene hydrocarbon derivatives. As a specific embodiment, the metal skeleton compound can be an anthracene-based MOF (DPA-MOF) described in the document “Structural Transformation in Metal-Organic Frameworks for Reversible Binding of Oxygen” (Angew.Chem.Int.Ed., 2019, DOI: 10.1002 / anie.201902810). As another specific embodiment, the metal skeleton compound can be 9,10-di(4-carboxyphenyl)anthracene MOF or 9,10-di(pyridin-4-yl)anthracene MOF.

[0055] Theoretically, the thicker the oxygen absorbing layer 21 is, the better the oxygen absorption effect is. However, considering the difficulty of the process, the thickness of the oxygen absorbing layer 21 can be To 1 μm. Specifically, the thickness of the oxygen absorbing layer 21 can be Or 1μm.

[0056] In another embodiment of the present application, the oxygen absorbing layer 21 may also be a polymer film, and the polymer constituting the polymer film has a main chain or side chain of condensed aromatic hydrocarbons and their derivatives. Specifically, a polymerizable repeating unit having a main chain or side chain of condensed aromatic hydrocarbons and their derivatives can be polymerized or copolymerized to generate a polymer, and then formed on the gate insulating layer GI by coating or inkjet printing. Specifically, the polymer constituting the polymer film has a molecular structure shown in any one of the following formulas (1) to (5):

[0057]

[0058] Among them, in formula (1) to formula (5), Ar1 to Ar3 are aromatic substituents, and R can be a substituent such as alkyl, alkoxy, halogen, -CN, or -NH2.

[0059] The gate GE is made of a stacked structure of Cu and Mo layers, wherein the Mo layer is formed on the Cu layer. The thickness of the Cu layer is The thickness of the Mo layer is

[0060] The material of the interlayer insulating layer IL is silicon oxide, and the thickness of the interlayer insulating layer IL is

[0061] The source SE and drain DE are made of a stack of Cu and Mo layers, with a Cu layer thickness of The thickness of the Mo layer is

[0062] In addition, the display panel 100 further includes a terminal connection electrode 22 provided in the same layer as the source electrode SE and the drain electrode DE.

[0063] The passivation layer PV covers the thin film transistor layer 20. The passivation layer PV can be a silicon oxide thin film with a thickness of Two first via holes VA1 are formed in the passivation layer PV, and the two first via holes VA1 expose the drain electrode DE and the terminal connection electrode 22 respectively.

[0064] The planar layer PLN covers the passivation layer PV. The planar layer PLN may be an organic resin film with a thickness of 3 μm. Two second via holes VA2 are defined in the planar layer PLN, each second via hole VA2 being connected to one of the first via holes VA1.

[0065] Two terminal electrodes 30 are provided on the planar layer PLN. The two terminal electrodes 30 extend into the two large holes formed by the second via hole VA2 and the first via hole VA1, respectively. One terminal electrode 30 is connected to the drain electrode DE, and the other terminal electrode 30 is connected to the terminal connection electrode 22. The terminal electrode 30 includes a metal conductive layer 31 and an oxide conductive layer 32. The metal conductive layer 31 is located between the oxide conductive layer 32 and the planar layer PLN. The metal conductive layer 31 includes a stack of Cu layers and Mo layers, wherein the thickness of the Mo layer is The thickness of the Cu layer is The oxide conductive layer 32 is an indium tin oxide layer (ITO), and the thickness of ITO is

[0066] Please refer to Figure 5In the second embodiment of the present application, the oxygen-containing layer is disposed on the side of the oxide semiconductor layer CL away from the substrate 10. The interlayer insulating layer IL is an oxygen-containing layer, and the material of the interlayer insulating layer IL includes silicon oxide.

[0067] Specifically, the gate insulating layer GI is arranged on the oxide semiconductor layer CL, the gate GE is arranged on the gate insulating layer GI, the oxygen absorption layer 21 is arranged on the gate GE, the interlayer insulating layer IL covers the oxygen absorption layer 21, the source SE and the drain DE are arranged on the interlayer insulating layer IL and connected to the two ends of the oxide semiconductor layer CL.

[0068] The first embodiment and the second embodiment of the present application respectively illustrate an embodiment in which the oxygen-containing layer is the gate insulating layer GI or the interlayer insulating layer IL. Figure 6 In the third embodiment of the present application, an oxygen absorption layer may be provided between the gate insulating layer GI and the oxide semiconductor layer CL, and an oxygen absorption layer may also be provided between the interlayer insulating layer IL and the oxide conductor layer CL.

[0069] Specifically, the oxygen-containing layer includes a first oxygen-containing layer and a second oxygen-containing layer. The gate insulating layer GI is the first oxygen-containing layer, and the interlayer insulating layer IL is the second oxygen-containing layer. Both the gate insulating layer GI and the interlayer insulating layer IL include silicon oxide. The oxygen absorbing layer 21 includes a first oxygen absorbing layer 21a and a second oxygen absorbing layer 21b. The first oxygen absorbing layer 21a covers the oxide semiconductor layer CL, the gate insulating layer GI is disposed on the first oxygen absorbing layer 21a, the gate GE is disposed on the gate insulating layer GI, the second oxygen absorbing layer 21b is disposed on the gate GE, the interlayer insulating layer IL covers the gate GE and the second oxygen absorbing layer 21b, and the source electrode SE and the drain electrode DE are disposed on the interlayer insulating layer IL and connected to both ends of the oxide semiconductor layer CL.

[0070] It will be appreciated that the above embodiments illustrate this application using top-gate thin-film transistors as an example. In other embodiments of this application, the thin-film transistors may also be bottom-gate thin-film transistors. This application also provides a method for manufacturing a display panel. The following describes the method for manufacturing a display panel of this application using the first embodiment as an example.

[0071] The manufacturing method of the display panel includes:

[0072] Step 101: Referring to FIG. 7( a ), a substrate 10 is provided, a barrier layer BA is deposited on the substrate 10 , and a light shielding layer LS is formed on the barrier layer BA.

[0073] The substrate 10 is a glass substrate. The material of the barrier layer BA is molybdenum, and the thickness of the barrier layer BA is The material of the light shielding layer LS is aluminum, and the thickness of the light shielding layer LS is

[0074] Step 102: Referring to FIG. 7( b ), a buffer layer BL is formed on the light shielding layer LS, and an oxide semiconductor layer CL is formed on the buffer layer BL. The material of the buffer layer BL is SiNx, and the thickness is The material of the oxide semiconductor layer CL can be IGZO, ITZO or IGZTO. The thickness of the oxide semiconductor layer CL is

[0075] Step 103: Referring to Figure 7(c), an oxygen absorber layer 21 is formed on the oxide semiconductor layer CL. The oxygen absorber layer 21 comprises a metal framework compound with condensed aromatic hydrocarbons and their derivatives as ligands. Specifically, the metal framework compound is an anthracene-based MOF (DPA-MOF). The method for forming the oxygen absorber layer 21 includes synthesizing MOF nanoparticles, and then depositing the synthesized oxygen absorber layer 21 onto the oxide semiconductor layer CL by PVD.

[0076] A method for synthesizing anthracene-based MOF (DPA-MOF) specifically includes the following steps:

[0077] 1. Synthesis of 4,4'-(9,10-anthracenediyl)dibenzoic acid

[0078] A mixture of 9,10-dibromoanthracene (1.8 g, 5.4 mmol), 4-methoxycarbonylphenylboronic acid (2.92 g, 16.2 mmol), CsF (3 g, 19.7 mmol) and Pd(PPh3)4 (Chinese name: tetrakis(triphenylphosphine)palladium, 0.17 g, 0.15 mmol) was placed in a 200 mL double-necked shclenk flask and evacuated with a vacuum pump for 15 minutes. Subsequently, 100 mL of 1,2-dimethoxyethane, which had been deaerated with nitrogen, was added through a syringe and a long needle. The above mixture was heated to reflux for 60 hours under nitrogen protection. After the mixture was cooled to room temperature, it was subjected to reduced pressure rotary evaporation to remove the solvent. 50 mL of water was added to the resulting yellow residue, followed by extraction with dichloromethane. After drying the organic phase overnight over anhydrous magnesium sulfate and anhydrous sodium sulfate, the solvent was removed, and the resulting crude product was purified by column chromatography (silica, dichloromethane) to obtain a yellow powder product (compound name: 9,10-bis(p-(4-methoxycarbonyl)phenyl)anthracene). Subsequently, the yellow powder product (0.51 g, 1.15 mmol) was dissolved in a 90 mL mixture of THF and MeOH (2:1 volume ratio), followed by the addition of 20 mL of 20% aqueous KOH. The mixture was stirred and refluxed for 14 hours. The solvent was removed by rotary evaporation under reduced pressure, and the resulting suspension was diluted with 30 mL of water. The aqueous solution was acidified with dilute hydrochloric acid, and the resulting precipitate was filtered, washed several times with water, and then heated under vacuum to dry overnight.

[0079] 2. Preparation of MOF nanoparticles

[0080] 4,4'-(9,10-anthracenediyl)dibenzoic acid (20.9 mg, 0.05 mmol), ZrOCl2·8H2O (10 mg, 0.03 mmol) and benzoic acid (100 mg, 0.82 mmol) were mixed with 5.0 mL of anhydrous and oxygen-free N,N-dimethylformamide (DMF) in a 10 mL round-bottom flask and ultrasonically treated under nitrogen protection to completely dissolve the above solids. The above mixture was stirred in a nitrogen atmosphere at room temperature (speed 500 rpm) for 40 minutes. After the reaction was completed, the obtained MOF nanoparticles were collected by centrifugation under nitrogen protection (10000 rpm, 10 min), and then washed with anhydrous and oxygen-free DMF. The chemical structure of the obtained target product is as follows Figure 8 As shown in the left figure, the target product combines with low concentration oxygen or active oxygen to generate internal oxides such as Figure 8 As shown in the picture on the right.

[0081] It is understood that in another embodiment of the present application, the oxygen absorbing layer 21 may also be a polymer film, wherein the polymer constituting the polymer film has side chains of condensed aromatic hydrocarbons and their derivatives. Specifically, polymerizable repeating units having side chains of condensed aromatic hydrocarbons and their derivatives may be polymerized or copolymerized to generate a polymer, which is then formed on the gate insulating layer GI by coating or inkjet printing to serve as the oxygen absorbing layer 21. The specific polymerization method is omitted here.

[0082] Step 104: Referring to FIG. 7( d ), a gate insulating material layer is deposited on the oxide semiconductor layer CL, and a gate metal layer is deposited on the gate insulating material layer. Using a photomask, the gate insulating material layer and the gate material layer are patterned to form a gate GE and a gate insulating layer GI. The gate insulating layer GI comprises silicon oxide with a thickness of The gate metal is a stacked structure of Cu layer and Mo layer, wherein the Mo layer is formed on the Cu layer. The thickness of the Cu layer is The thickness of the Mo layer is

[0083] Step 105: Referring to FIG. 7( e ), a silicon oxide film is deposited on the gate as an interlayer insulating layer IL with a thickness of

[0084] Step 106: Referring to FIG7(f), contact holes for the source electrode SE, the drain electrode DE and the oxide semiconductor layer CL are etched in the interlayer insulating layer IL, and a source-drain metal layer is deposited on the interlayer insulating layer IL. The source-drain metal layer is patterned to form the source electrode SE, the drain electrode DE and the terminal connection electrode 22. The source-drain metal layer is a stacked metal layer of Cu and Mo, and the thickness of the Cu layer is The thickness of the Mo layer is The source electrode SE and the drain electrode DE are directly connected to the oxide semiconductor layer CL through through holes formed in the interlayer insulating layer IL.

[0085] Step 107: Referring to FIG. 7( g ), a passivation layer PV is deposited. The passivation layer PV is a silicon oxide film with a thickness of A 3μm thick organic resin film is deposited as the planarization layer PLN. Two second vias VA2 are formed in the planarization layer PLN. These two second vias VA2 are used to subsequently form terminal electrodes connecting to the Mini-LED light-emitting elements. One of the second vias VA2 exposes the drain electrode DE, while the other exposes the terminal connection electrode 22, which is located on the same layer as the source electrode SE and drain electrode DE.

[0086] Step 108 : Referring to FIG. 7 ( h ), two first via holes VA1 are formed in the passivation layer PV, and each second via hole VA2 is connected to one of the first via holes VA1 .

[0087] Step 109: Referring to FIG. 7(i), two terminal electrodes 30 are formed on the planar layer PLN. The two terminal electrodes 30 extend into the two large holes formed by the second via VA2 and the first via VA1, respectively. One terminal electrode 30 is connected to the drain DE, and the other terminal electrode 30 is connected to the terminal connection electrode 22. The terminal electrode 30 includes a metal conductive layer 31 and an oxide conductive layer 32. The metal conductive layer 31 is located between the oxide conductive layer 32 and the planar layer PLN. The metal conductive layer 31 includes a stack of Cu and Mo layers, and the thickness of the Mo layer is The thickness of the Cu layer is The oxide conductive layer 32 is an indium tin oxide layer (ITO), and the thickness of ITO is

[0088] In addition, the manufacturing methods of the display panels of the second and third embodiments of the present application may refer to the manufacturing method of the display panel of the first embodiment, and the description thereof is omitted here.

[0089] The above provides a detailed introduction to the implementation methods of this application. Specific examples are used herein to illustrate the principles and implementation methods of this application. The above description of the implementation methods is intended only to help understand this application. At the same time, those skilled in the art may vary the specific implementation methods and application scopes based on the concepts of this application. In summary, the contents of this specification should not be construed as limiting this application.

Claims

1. A display panel, characterized in that: include: substrate; An oxide semiconductor layer and an oxygen-containing layer are stacked on the substrate; as well as The oxygen absorbing layer is arranged between the oxide semiconductor layer and the oxygen-containing layer. The oxygen absorbing layer includes condensed aromatic hydrocarbons and their derivatives. The condensed aromatic hydrocarbons and their derivatives are used to react with the oxygen released by the oxygen-containing layer to generate internal peroxides to prevent the oxygen from entering the oxide semiconductor layer.

2. The display panel according to claim 1, wherein: The display panel also includes a gate, an interlayer insulating layer, a source and a drain, the oxygen absorbing layer covers the oxide semiconductor layer, the oxygen-containing layer is arranged on the oxygen absorbing layer, the oxygen-containing layer includes silicon oxide, the gate is arranged on the oxygen-containing layer, the interlayer insulating layer covers the gate and the oxygen absorbing layer, the source and the drain are arranged on the interlayer insulating layer and are connected to both ends of the oxide semiconductor layer.

3. The display panel according to claim 1, wherein: The display panel also includes a gate insulating layer, a gate, a source electrode and a drain electrode, wherein the gate insulating layer is arranged on the oxide semiconductor layer, the gate is arranged on the gate insulating layer, the oxygen absorbing layer is arranged on the gate, the oxygen-containing layer covers the oxygen absorbing layer, the oxygen-containing layer includes silicon oxide, the source electrode and the drain electrode are arranged on the oxygen-containing layer and are connected to both ends of the oxide semiconductor layer.

4. The display panel according to claim 1, wherein: The display panel also includes a gate, a source electrode and a drain electrode, the oxygen-containing layer includes a first oxygen-containing layer and a second oxygen-containing layer, the first oxygen-containing layer and the second oxygen-containing layer both include silicon oxide, the oxygen absorbing layer includes a first oxygen absorbing layer and a second oxygen absorbing layer, the first oxygen absorbing layer covers the oxide semiconductor layer, the first oxygen-containing layer is arranged on the first oxygen absorbing layer, the gate is arranged on the first oxygen-containing layer, the second oxygen absorbing layer is arranged on the gate, the second oxygen-containing layer covers the second oxygen absorbing layer, the source electrode and the drain electrode are arranged on the second oxygen-containing layer and are connected to both ends of the oxide semiconductor layer.

5. The display panel according to claim 1, wherein: The oxygen absorbing layer comprises a metal skeleton compound with condensed aromatic hydrocarbons and derivatives thereof as ligands.

6. The display panel according to claim 5, wherein: The metal skeleton compound is a metal skeleton compound of anthracene hydrocarbon derivative.

7. The display panel according to claim 6, wherein: The thickness of the oxygen absorbing layer is 100 angstroms to 1 micron.

8. The display panel according to claim 1, wherein: The oxygen absorbing layer is a high molecular polymer film, and the high molecular polymer constituting the high molecular polymer film has a main chain or a side chain of condensed ring aromatic hydrocarbons and derivatives thereof.

9. The display panel according to claim 1, wherein: The oxygen-containing layer is disposed on a side of the oxide semiconductor layer away from the substrate, and the oxygen absorbing layer covers an outer surface of the oxide semiconductor layer.

10. The display panel according to claim 1, wherein: The display panel is a micro light emitting diode display panel or a sub-millimeter light emitting diode display panel.

Images