Protocol expansion and transplantation method based on single chip microcomputer I2C interface
By extending the register address into an array on the I2C interface of the microcontroller and analyzing data according to the Uart protocol, the problem of protocol expansion and migration is solved, the extension of the I2C protocol and the portability of the Uart protocol are realized, and the custom length and expansion are supported. The protocol realizes platform-based docking.
Patent Information
- Application Number
- CN202210020846.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-10
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2042-01-10
AI Technical Summary
The prior art is difficult to implement protocol expansion and porting on the I2C interface of the microcontroller, especially when the protocol increases, the scalability is poor, and the Uart protocol and the I2C protocol are not universal, which affects development time.
By extending the register address into an array in the program space of the microcontroller, 256 register addresses are supported, and data is parsed according to the Uart protocol and protocol verification are added to realize the expansion of the I2C protocol and the porting of the Uart protocol.
It realizes the expansion of the Uart communication protocol based on the I2C protocol, enhances the scalability, portability and robustness of the protocol, supports custom length and extension protocols, and realizes mutual portability and platform connection between the Uart and the I2C protocol.
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Figure CN114461566B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of communication protocol transmission between a display screen single-chip computer and a host, and particularly relates to a protocol expansion and transplantation method based on an I2C interface of a single-chip computer. Background Art
[0002] In the single-chip microcomputer peripheral interface, the I2C protocol format is in the form of a register, and the register address is usually 0x00~0xFF, or expanded to a 2-byte register address. After being defined in the early stage, it is difficult to expand when more protocols are added in the later stage, or our commonly used Uart protocol interface is transplanted to the I2C protocol. The protocol is completely not universal and needs to be redeveloped, which greatly affects the development time. The present invention mainly introduces an expansion method of the I2C protocol to solve the above-mentioned problems of scalability and ease of transplantation. Summary of the invention
[0003] The technical problem to be solved by the present invention is to provide a protocol expansion and transplantation method based on the I2C interface of a single-chip microcomputer.
[0004] The technical solution of the present invention to solve the above technical problems is as follows:
[0005] The protocol expansion and transplantation method based on the I2C interface of the single-chip microcomputer is characterized in that when the protocol is expanded, the corresponding register address is expanded into an array form Address[RegInd] in the program space of the single-chip microcomputer, and 256 register addresses correspond to 256 arrays, and the length of the array is defined as needed.
[0006] Furthermore, the data stored in each register is correspondingly defined according to the original Uart protocol parsing method.
[0007] Furthermore, each register stores data with correlation.
[0008] The beneficial effects of the present invention are as follows: the method of the present invention expands the I2C protocol format to the Uart communication protocol format under the condition that the I2C follows the standard single-chip I2C protocol format, and adds protocol verification to enhance the extensibility, portability and robustness. The modified protocol can customize the length and add the extended protocol. The Uart protocol and the I2C protocol can be transplanted to each other to achieve platform docking.
[0009] Figure Description
[0010] Figure 1 This is the IRQ schematic diagram;
[0011] Figure 2 This is a schematic diagram of the standard I2C continuous write timing;
[0012] Figure 3This is a schematic diagram of the standard I2C continuous read timing. DETAILED DESCRIPTION
[0013] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.
[0014] The communication mode of I2C is master-slave mode. The slave cannot actively send data. It needs to add an IRQ IO to the hardware. When the slave needs to actively send data, it notifies the host to read the data sent by the slave through a pulse of IRQ. Figure 1 shown.
[0015] Standard I2C timing see Figure 2 and Figure 3 .
[0016] In the case of continuous writing, the Byte1 corresponding to continuous writing in the standard timing is the register address RegisterAddress in Byte0, and Byte2 is automatically increased by 1 to Register Address+1. The register address is 1 Byte, calculated according to the maximum value of 0x00 to 0xFF, and a frame of data is up to 256 bytes.
[0017] For example: write 3 bytes (0x21, 0x23, 0x56) to the register address 0x10 through I2C timing. The storage space status is shown in Table 1:
[0018] Table 1
[0019] Address Data 0x10 0x21 0x11 0x23 0x12 0x56
[0020] When performing protocol expansion, the corresponding register address is expanded into an array form Address[RegInd] in the program space of the microcontroller. 256 register addresses correspond to 256 arrays. The length of the array can be defined as long as needed, such as 1024 or 2048... When the register address is 0x00, data 1 is filled in Address[0], and data 2 is put in Address[1]...
[0021] For example: write 3 bytes (0x21, 0x23, 0x56) to the register address 0x10 through I2C timing. The storage space status is shown in Table 2:
[0022] Table 2
[0023] Address Data 0x10 0x21, 0x23, 0x56
[0024] Since the extended protocol data is in the form of an array, we can define it in the same way as the original Uart protocol parsing, and the upper-layer parsing logic remains completely consistent, as shown in Table 3:
[0025] Table 3
[0026] Byte1 Header Start character (1 Byte) Byte2 Common XX(1Byte) Byte3 Length_H High byte length of the data area (1 Byte) Byte4 Length_L The low byte length of the data area (1 Byte) Byte(4+Length) DATA(0)~DATA(Length-1) Data area (Length bytes) Byte(5+Length) CRC16_H High byte of CRC16 checksum (1 Byte) Byte(6+Length) CRC16_L CRC16 check low byte (1 Byte) Byte(7+Length) End Terminator (1 Byte)
[0027] Example 1
[0028] Our original platform integrated the host and the display, and the microcontroller used Uart as the protocol for receiving data. With the development of vehicle-mounted displays, the current project has been updated to a solution that separates the machine and the screen, using I2C for protocol transmission.
[0029] Table 4 below is an example of upgrade package data and display brightness level data:
[0030] Table 4
[0031] Address Data 0x10 (upgrade package data) 0xE1 (frame header), 0x23 (Commond), 0x04, 0x00 (Length), Data0 to Data1023, 0xE1 (frame tail) 0x11 (display brightness level data) 0xE1 (frame header), 0x03 (commond), 0x00, 0x03 (Length), Data0 to Data2, 0xE1 (frame tail)
[0032] Take the upgrade package data protocol as an example (1024 bytes of data need to be transmitted as a complete packet of data):
[0033] Before implementation:
[0034]
[0035] 68 bytes of data are stored in the addresses 0x8D to 0xD0. According to the protocol description below, there are 64 bytes of data in one frame of data. If 1024 bytes need to be transmitted, 1024 / 64 = 16 packets need to be transmitted in segments.
[0036] After implementation:
[0037] Address Data 0x10 (upgrade package data) 0xE1 (frame header), 0x23 (Commond), 0x04, 0x00 (Length), Data0 to Data1023, 0xE1 (frame tail)
[0038] Stored directly at address 0x10, it can be seen that only one transmission is needed to complete the transmission of 1024 bytes of data.
[0039] The method of the present invention is similar to the UART communication protocol, and has the advantages of:
[0040] 1. Use the Uart communication protocol format and only modify the underlying driver to complete the protocol transplantation
[0041] 2. Added upgrade protocol, which can use 256 bytes or 1024 bytes data length to speed up the upgrade rate
[0042] Factory production test protocols can be expanded and added at will on a temporary basis.
[0043] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A protocol expansion and transplantation method based on a single-chip microcomputer I2C interface, characterized in that: When performing protocol expansion, the stored data corresponding to the register address in the program space of the MCU is expanded into an array form Address[RegInd]. 256 register addresses correspond to 256 arrays, and the length of the array is defined as needed. The data stored in each register is defined accordingly according to the original Uart protocol parsing method. When expanding the upgrade package data protocol, the 68 bytes of data originally stored in the addresses 0x8D~0xD0 are directly stored in the form of an array at the address 0x10.
2. The protocol expansion and transplantation method based on the single-chip microcomputer I2C interface according to claim 1 is characterized in that: Each register stores data with dependencies.
Citation Information
Patent Citations
Dynamic regrouping method for register list data of Modbus communication protocol
CN102638451A
Memory system in which extended function can easily be set
CN103403803A