A multifunctional waveform generating device and method

By designing a multi-functional waveform generator, using DDS multi-waveform generator circuit and crystal oscillation circuit, the existing waveform generator has been solved, and the application in teaching equipment has been realized, and the waveform generator has been improved. Output frequency stability and teaching efficiency.

CN114527827BActive Publication Date: 2025-01-10GUILIN UNIV OF AEROSPACE TECH
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Patent Information

Application Number
CN202111640824.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-29
Publication Date
2025-01-10
Estimated Expiration
2041-12-29

AI Technical Summary

Technical Problem

Due to its large size and high cost, existing waveform generators are difficult to meet the needs of teaching equipment, and they cannot generate stable three periodic waveforms: sinusoidal, square wave and triangular wave.

Method used

A multifunctional waveform generator is designed, using the main controller and the DDS multi-waveform generator circuit, including the DDC circuit, D/A converter, low-pass filter and signal amplifier. The sine and triangular waves with different frequencies are generated by key adjustment. Square wave and display the waveform on the display screen, and use the crystal oscillation circuit to improve the stability of the output frequency.

Benefits of technology

It realizes a multi-functional waveform generator with a simple structure, small size and cheap price. It can be widely used in teaching equipment and communicates with the upper computer through a serial port circuit, which improves the output frequency stability and teaching efficiency of the waveform generator.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a multifunctional waveform generating device and method, wherein the device comprises a main controller, a DDS multi-waveform generating circuit, a display screen and a button, wherein the DDS multi-waveform generating circuit, the display screen and the button are all electrically connected to the main controller. The present invention takes the main controller as the core and adopts a DDS multi-waveform generating circuit, which can not only generate sine waves, triangle waves and square waves with different frequencies and display them on the display screen under the adjustment of the button, but also control the initial phase of the waveform, and utilize a crystal oscillator circuit to improve the output frequency stability of the multi-waveform generator; the present invention has a relatively simple structure, a small size and a low price, and is very suitable for use as a teaching device.
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Description

Technical Field

[0001] The invention relates to a signal source, and in particular to a multifunctional waveform generating device and method. Background Art

[0002] A waveform generator is a signal source that is widely used in electronic circuits, automatic control, scientific experiments and other fields. For example: measuring electrical parameters, radar, communication, electronic countermeasures and electronic systems, aerospace and remote control telemetry technology, etc. Therefore, a high-quality signal source is the key to the realization of high-performance pointers. The realization of many modern electronic instruments and many system functions depends on the performance of their signal sources. Therefore, it can be said that a high-quality signal source is the "lifeline" of many electronic systems. With the rapid development of communication technology and radar technology, more requirements are put forward for some performance of signal sources (such as frequency stability, spectrum purity, frequency range, number of output frequencies and shape of signal waveform). In addition, waveform generators can also be used as teaching equipment, but because the existing waveform generators are usually too expensive and large in size, they greatly affect the teaching quality and bring maintenance pressure to campus equipment managers. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a multifunctional waveform generating device and method, which has a simple structure, small size and low cost, and can generate three stable periodic waveforms of sine wave, square wave and triangle wave.

[0004] The technical solution of the present invention to solve the above technical problems is as follows: a multifunctional waveform generating device, including a main controller, a DDS multi-waveform generating circuit, a display screen and a button, wherein the DDS multi-waveform generating circuit, the display screen and the button are all electrically connected to the main controller.

[0005] The beneficial effects of the present invention are as follows: a multifunctional waveform generating device of the present invention takes a main controller as the core and adopts a DDS multi-waveform generating circuit. Under the adjustment of a key, it can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit. The present invention has a relatively simple structure, a small size and a low price, and is very suitable for use as a teaching device.

[0006] Based on the above technical solution, the present invention can also be improved as follows.

[0007] Further, the DDS multi-waveform generating circuit includes a DDC circuit, a D / A converter, a low-pass filter and a signal amplifier;

[0008] The DDC circuit includes a DDC chip D1 of model AD9833BRM and a crystal oscillator CY1; the VDD pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage, and the VDD pin of the DDC chip D1 is also connected to AGND through capacitors C2 and C3 respectively; the COMP pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage through capacitor C4; the CAP pin of the DDC chip D1 is connected to DGND through capacitors C6 and C7 respectively; the VCC pin of the crystal oscillator CY ... The pin is connected to DGND through the DGND pin; the MCLK pin of the DDC chip D1 is connected to the OUT pin of the crystal oscillator CY1, the GND pin of the crystal oscillator CY1 is connected to DGND, the VCC pin of the crystal oscillator CY1 is connected to the DVCC+5V power supply voltage through the magnetic bead B1, and the VCC pin of the crystal oscillator CY1 is also grounded through capacitors C9 and C10 respectively; the AGND pin of the DDC chip D1 is connected to AGND, and the VOUT pin of the DDC chip D1 is connected to the D / A converter;

[0009] The D / A converter includes an operational amplifier U1A of model TLV2374, the non-inverting input terminal of the operational amplifier U1A is connected to the VOUT pin of the DDC chip D1 through a resistor R3, the non-inverting input terminal of the operational amplifier U1A is also connected to AGND through a capacitor C5, the reverse input terminal of the operational amplifier U1A is connected to the output terminal of the operational amplifier U1A, the negative power terminal of the operational amplifier U1A is connected to AGND, the positive power terminal of the operational amplifier U1A is connected to the power supply voltage of VCC12V, and the positive power terminal of the operational amplifier U1A is also connected to AGND through a capacitor C1; the output terminal of the operational amplifier U1A is connected to the low-pass filter;

[0010] The low-pass filter includes an operational amplifier U1B of model TLV2374, the same-direction input terminal of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1A through resistors R2 and R1 in sequence, the common connection terminal of the resistor R2 and the resistor R1 is connected to the output terminal of the operational amplifier U1B through a capacitor C8, the reverse input of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1B, and the output terminal of the operational amplifier U1B is connected to the signal amplifier;

[0011] The signal amplifier includes an operational amplifier U1C of model TLV2374 and a dual voltage comparator U2A of model LM393DR; the reverse input terminal of the operational amplifier U1C is connected to the output terminal of the operational amplifier U1B through a resistor R7 and a capacitor C12 in sequence, the reverse input terminal of the operational amplifier U1C is also connected to the output terminal of the operational amplifier U1C through a resistor R5, the positive input terminal of the operational amplifier U1C is connected to the power supply voltage AVCC+5V through a resistor R12, and the positive input terminal of the operational amplifier U1C is also connected to AGND through a resistor R13; the output terminal of the operational amplifier U1C is connected to the dual voltage comparator The same-direction input terminal of the dual voltage comparator U2A is connected, the reverse input terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V through a resistor R14, the reverse input terminal of the dual voltage comparator U2A is connected to AGND through a resistor R15, the negative power supply terminal of the dual voltage comparator U2A is connected to AGND, the positive power supply terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V, the positive power supply terminal of the dual voltage comparator U2A is also connected to AGND through a capacitor C11, the positive power supply terminal of the dual voltage comparator U2A is also connected to the output terminal of the dual voltage comparator U2A through a resistor R6, and the output terminal of the dual voltage comparator U2A is connected to the main controller.

[0012] Furthermore, it also includes a power supply circuit, which is electrically connected to the main controller and the display screen respectively.

[0013] Furthermore, it also includes a serial port circuit, which is electrically connected to the main controller.

[0014] The beneficial effect of adopting the above further solution is that the device of the present invention can communicate with the host computer through the serial port circuit, which facilitates the transmission and application of data.

[0015] Furthermore, the main controller adopts a single chip microcomputer of model STM32F103, and the display screen adopts an OLED display screen.

[0016] Furthermore, it also includes a shell, the main controller and the DDS multi-waveform generating circuit are integrated and packaged in the shell, the top surface of the shell is provided with an inclined display screen embedding opening and a control panel, the display screen is embedded in the display screen embedding opening, and the buttons are embedded in the control panel; the side of the shell is provided with a dustproof and heat dissipation port, and the side of the shell is also provided with a handle.

[0017] Based on the above-mentioned multifunctional waveform generating device, the present invention also provides a multifunctional waveform generating method.

[0018] A multifunctional waveform generating method, applied to the multifunctional waveform generating device described above, comprises the following steps:

[0019] S1, power on initialization, display interface through the display screen;

[0020] S2, detect whether a key is pressed; if not, the display screen continues to display the current interface; if so, adjust the waveform type, waveform frequency and waveform amplitude through the keys; wherein the waveform types include sine wave, triangle wave and rectangular wave;

[0021] S3, displaying the corresponding waveform on the display screen according to the adjusted waveform type, waveform frequency and waveform amplitude.

[0022] The beneficial effects of the present invention are as follows: a multifunctional waveform generating method of the present invention can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen under the adjustment of a key, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit.

[0023] Based on the above technical solution, the present invention can also be improved as follows.

[0024] Further, in said S2, the waveform type and waveform amplitude are controlled by adjusting the discretized phase value, and the waveform frequency is controlled by adjusting the overflow time of the timer;

[0025] Let the number of discretized phase value points be N and the frequency of the timer be f tim , the timer reload count value is N tim , then the output frequency f of the waveform is,

[0026] Furthermore, the discrete phase value of the triangle wave is obtained by addition, the discrete phase value of the rectangular wave is obtained by assigning a value to a global variable, and the discrete phase value of the sine wave is obtained by calling a sin() function.

[0027] Furthermore, in the process of adjusting the waveform type, waveform frequency and waveform amplitude by pressing a button, the button is debounced by adding a delay program; the process of debounce processing of the button is as follows:

[0028] After the system is powered on, the key status is scanned to determine whether a key is pressed. If a key is detected to be pressed, the preset time is delayed;

[0029] After a preset delay time, the key state of the key is scanned again. If the key is still detected to be pressed, it is determined that the key is pressed.

[0030] The beneficial effect of adopting the above further solution is that key debouncing can prevent the effect of key misjudgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is an overall structural block diagram of a multifunctional waveform generating device of the present invention;

[0032] Figure 2 A schematic diagram of the circuit structure of a DDC circuit in a multifunctional waveform generating device of the present invention;

[0033] Figure 3-1 Schematic diagram of the circuit structure of the main controller in Example 1;

[0034] Figure 3-2 This is a schematic diagram of the circuit structure of the main controller in Example 2;

[0035] Figure 4-1 Schematic diagram of the circuit structure of the power supply circuit in Embodiment 1;

[0036] Figure 4-2 Schematic diagram of the circuit structure of the power supply circuit in Embodiment 2;

[0037] Figure 5 This is a schematic diagram of the appearance structure of a multifunctional waveform generating device of the present invention;

[0038] Figure 6 A flowchart of a multifunctional waveform generating method of the present invention;

[0039] Figure 7 A DDS driving flow chart in a multifunctional waveform generating method of the present invention;

[0040] Figure 8 A DDS software flow chart of a multifunctional waveform generation method of the present invention;

[0041] Fig. 9 This is the main function flow chart of the DDS software;

[0042] Fig.10 This is the flow chart of the sine wave output program of the DDS software;

[0043] Fig.11 This is the square wave output program flow chart of the DDS software;

[0044] Fig.12 This is the flow chart of the triangle wave output program of the DDS software;

[0045] Fig.13 Display the program flow chart for the OLED screen;

[0046] Fig.14 A flowchart of key debouncing processing in a multifunctional waveform generating method of the present invention;

[0047] Fig.15 This is the serial port initialization flow chart.

[0048] In the accompanying drawings, the components represented by the reference numerals are listed as follows:

[0049] 1. Shell, 2. Display panel inlay, 3. Control panel, 4. Dust-proof and heat dissipation vents, 5. Handle. DETAILED DESCRIPTION

[0050] The principles and features of the present invention are described below in conjunction with the accompanying drawings. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0051] like Figure 1 As shown, a multifunctional waveform generating device includes a main controller, a DDS multi-waveform generating circuit, a display screen and a button, wherein the DDS multi-waveform generating circuit, the display screen and the button are all electrically connected to the main controller.

[0052] The present invention provides a multifunctional waveform generating device with a main controller as the core and adopts a DDS multi-waveform generating circuit. Under the adjustment of a key, it can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit. The present invention has a relatively simple structure, a small size and a low price, and is very suitable for use as a teaching device.

[0053] In the present invention, if Figure 2 As shown, the DDS multi-waveform generating circuit includes a DDC circuit, a D / A converter, a low-pass filter and a signal amplifier;

[0054] The DDC circuit includes a DDC chip D1 of model AD9833BRM and a crystal oscillator CY1; the VDD pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage, and the VDD pin of the DDC chip D1 is also connected to AGND through capacitors C2 and C3 respectively; the COMP pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage through capacitor C4; the CAP pin of the DDC chip D1 is connected to DGND through capacitors C6 and C7 respectively; the VCC pin of the crystal oscillator CY ... The pin is connected to DGND through the DGND pin; the MCLK pin of the DDC chip D1 is connected to the OUT pin of the crystal oscillator CY1, the GND pin of the crystal oscillator CY1 is connected to DGND, the VCC pin of the crystal oscillator CY1 is connected to the DVCC+5V power supply voltage through the magnetic bead B1, and the VCC pin of the crystal oscillator CY1 is also grounded through capacitors C9 and C10 respectively; the AGND pin of the DDC chip D1 is connected to AGND, and the VOUT pin of the DDC chip D1 is connected to the D / A converter;

[0055] The D / A converter includes an operational amplifier U1A of model TLV2374, the non-inverting input terminal of the operational amplifier U1A is connected to the VOUT pin of the DDC chip D1 through a resistor R3, the non-inverting input terminal of the operational amplifier U1A is also connected to AGND through a capacitor C5, the reverse input terminal of the operational amplifier U1A is connected to the output terminal of the operational amplifier U1A, the negative power terminal of the operational amplifier U1A is connected to AGND, the positive power terminal of the operational amplifier U1A is connected to the power supply voltage of VCC12V, and the positive power terminal of the operational amplifier U1A is also connected to AGND through a capacitor C1; the output terminal of the operational amplifier U1A is connected to the low-pass filter;

[0056] The low-pass filter includes an operational amplifier U1B of model TLV2374, the same-direction input terminal of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1A through resistors R2 and R1 in sequence, the common connection terminal of the resistor R2 and the resistor R1 is connected to the output terminal of the operational amplifier U1B through a capacitor C8, the reverse input of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1B, and the output terminal of the operational amplifier U1B is connected to the signal amplifier;

[0057] The signal amplifier includes an operational amplifier U1C of model TLV2374 and a dual voltage comparator U2A of model LM393DR; the reverse input terminal of the operational amplifier U1C is connected to the output terminal of the operational amplifier U1B through a resistor R7 and a capacitor C12 in sequence, the reverse input terminal of the operational amplifier U1C is also connected to the output terminal of the operational amplifier U1C through a resistor R5, the positive input terminal of the operational amplifier U1C is connected to the power supply voltage AVCC+5V through a resistor R12, and the positive input terminal of the operational amplifier U1C is also connected to AGND through a resistor R13; the output terminal of the operational amplifier U1C is connected to the dual voltage comparator The same-direction input terminal of the dual voltage comparator U2A is connected, the reverse input terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V through a resistor R14, the reverse input terminal of the dual voltage comparator U2A is connected to AGND through a resistor R15, the negative power supply terminal of the dual voltage comparator U2A is connected to AGND, the positive power supply terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V, the positive power supply terminal of the dual voltage comparator U2A is also connected to AGND through a capacitor C11, the positive power supply terminal of the dual voltage comparator U2A is also connected to the output terminal of the dual voltage comparator U2A through a resistor R6, and the output terminal of the dual voltage comparator U2A is connected to the main controller.

[0058] The internal circuit of the DDS chip mainly consists of three parts: frequency control register, sine calculator and high-speed phase accumulator. The frequency control register controls the frequency control code in two ways: serial or parallel. The sine calculator increases the output of the phase register by the step size, adds the phase control word, and then inputs it into the sine lookup table address, and obtains the digital sine wave amplitude mapped by the table lookup. [5] . The phase accumulator is obtained by phase accumulation within the clock cycle according to the DDS frequency control code. The digital sine wave output by the DDS chip needs to pass through the D / A converter and low-pass filter to obtain an analog frequency signal. The sine wave is a signal with the singlest frequency component. All signals can be regarded as a composite of sine waves with different frequencies and sizes. Then the output sine waveform is passed through a low-pass filter circuit to obtain a sine wave in the required range. The production principle of the sine wave is to expand the triangle wave according to the Fourier series. The triangle wave contains fundamental waves, 3rd, 5th, 7th and other odd harmonics. The sine wave can be obtained by filtering the high-order harmonics through a low-pass filter. The low-pass filter uses an operational amplifier to form a SallenKey Butterworth filter to filter out frequencies above 200KHz. The output sine wave and triangle wave also need to be amplified. The TLV2374 chip is used. This is a single-power operational amplifier chip that is often used in signal processing and provides rail-to-rail input and output functions.

[0059] In the present invention, the present invention further comprises a power supply circuit, and the power supply circuit is electrically connected to the main controller and the display screen respectively.

[0060] In the present invention, the present invention further comprises a serial port circuit, which is electrically connected to the main controller. The serial port circuit can realize communication with the host computer, facilitating data transmission and application.

[0061] In the present invention, the main controller adopts a single-chip microcomputer of model STM32F103, and the display screen adopts an OLED display screen; or, the main controller adopts a single-chip microcomputer of model STC89C52, and the display screen adopts a liquid crystal display screen of model LCD1602.

[0062] Embodiment 1: In the present invention, the main controller adopts a single chip microcomputer of model STM32F103, and the display screen adopts an OLED display screen.

[0063] The main controller uses a single chip microcomputer model STM32F103. Figure 3-1 As shown, its peripheral circuit includes a crystal oscillator circuit and a reset circuit.

[0064] The crystal oscillator circuit is one of the indispensable parts of the single-chip microcomputer system. Together with the reset circuit, it constitutes the minimum system of the single-chip microcomputer. It is a necessary condition for the single-chip microcomputer to work normally. Without the crystal oscillator circuit, the single-chip microcomputer will not work. The crystal oscillator circuit also determines the running speed of the single-chip microcomputer. The single-chip microcomputer mainly relies on the crystal oscillator in the crystal oscillator circuit to provide clock oscillation. An oscillator transmits a clock beat to the single-chip microcomputer, and completes the instructions that the single-chip microcomputer needs to execute according to the beat generated by the clock circuit. The single-chip microcomputer cannot work alone without the crystal oscillator circuit. The crystal oscillator circuit itself will not control any device in the system, but only cooperates with the single-chip microcomputer to complete the corresponding work. The general crystal oscillator circuit is composed of a crystal oscillator and a capacitor. The crystal oscillator used in this system is an 8Mhz passive crystal oscillator and two 20pf ceramic capacitors. The two ends of the crystal oscillator are connected to the PH0 and PH1 pins of the single-chip microcomputer respectively.

[0065] The design of the reset circuit can be divided into two types, one is the power-on reset, and the other is to achieve the reset operation through human intervention. The reset pin of the STM32F103 microcontroller is the NRST pin. The microcontroller prompts the reset circuit to work by transmitting a high-level signal. The reset circuit of this design realizes a short high-level reset through the control of a four-pin button, a 104 electrolytic capacitor C and a 10K resistor R. The NRST pin needs to be maintained at a high level for 24 clock cycles to make the address pointed by the pointer become 0. As an important part of the minimum system of the microcontroller, the reset circuit realizes the power-on reset function by the electrolytic capacitor C. When the system is powered on, the electrolytic capacitor C has a charging and discharging process, and a high level will be generated during discharge. The RST pin of the microcontroller is continuously set to a high level. The duration of RESET being set to a high level is the discharge time. The discharge time can be calculated according to Get; where C is the size of the electrolytic capacitor C, and R is the resistance of the resistor R. When the system is running, by manually pressing the reset button, the NRST pin generates a high level, and the voltage is VCC*10 / 11, which can achieve manual high-level reset.

[0066] When the main controller adopts a single chip microcomputer of the model STM32F103 and the display screen adopts an OLED display screen, the power supply circuit adopts the following Figure 4-1 The power supply circuit shown uses +12V power supply, and the power supply voltage of the microcontroller and OLED screen in the multi-function waveform generator is +3.3V. Therefore, the voltage needs to be processed, mainly through the TPS61040DBVRG4 power chip, first to get +5V voltage, and then convert 5V to 3.3V to get the required voltage.

[0067] Embodiment 2: In the present invention, the main controller adopts a single chip microcomputer of model STC89C52, and the display screen adopts a liquid crystal display screen of model LCD1602.

[0068] The main controller uses a single-chip microcomputer model STC89C52. Figure 3-2 As shown. The main controller selects the STC89C52 microcontroller, which has a small number of pins and is limited in the number of peripheral IO devices it can carry. However, it is precisely because of the limited number of peripheral devices that it can maximize its high processing efficiency. The biggest advantage of the STC89C52 microcontroller is that after years of product verification and performance optimization, its performance has been brought to the optimal state and the cost is very low, which has a good role in promoting the marketization of the product, and its stable performance can meet the needs of most customers.

[0069] The reset circuit of the single-chip microcomputer of model STC89C52 includes a resistor R4-1, a capacitor C4-1 and a reset switch K0. One end of the capacitor C4-1 is connected to the voltage VCC, and the other end of the capacitor C4-1 is grounded through the resistor R0. The reset switch K0 is connected in parallel with the capacitor C4-1, and the common connection end of the capacitor C4-1 and the resistor R4-1 is connected to the REST pin of the single-chip microcomputer. The reset circuit is usually hidden in the product in the form of a button, in order to avoid false triggering. If the reset button K0 is not pressed, that is, the signal output by the REST end to the single-chip microcomputer is low level, the single-chip microcomputer does not recognize the command signal, and the entire circuit remains the same. When the reset button K0 is pressed, the short touch of the capacitor C4-1 does not generate a low-level reset signal, so the reset button K0 needs to be long pressed. At this time, the power in the capacitor C4-1 is completely released, and the REST end continues to output a low level to the single-chip microcomputer, and the single-chip microcomputer completes the initialization operation.

[0070] The crystal oscillator circuit of the single-chip microcomputer of model STC89C52 includes crystal oscillator Y, capacitor C4-2 and capacitor C4-3. One end of the crystal oscillator Y is grounded through the capacitor C4-2, and the other end of the crystal oscillator Y is grounded through the capacitor C4-3. The two ends of the crystal oscillator Y are also connected to the XTAL1 pin and the XTAL2 pin of the single-chip microcomputer respectively. The RTC of the STC89C52 single-chip microcomputer uses the internal clock mode. By adjusting the crystal oscillator Y and the two sets of matching capacitors of capacitor C4-2 and capacitor C4-3, normal oscillation is achieved, and the frequency deviation must be within plus or minus 3% to ensure the stable operation of the single-chip microcomputer minimum system. To ensure its reliability, the subsequent functional module content can be realized. The crystal oscillator frequency is 11.0592MHz, and the matching capacitor is a ceramic capacitor with a capacitance of 30pF or 22pF. The calculation formula of parasitic capacitance shows that the frequency deviation is the smallest at this time, and the oscillation of the single-chip microcomputer is the most stable.

[0071] When the main controller uses a single-chip microcomputer of type STC89C52 and the display screen uses a liquid crystal display screen of type LCD1602, the power supply circuit uses the following Figure 4-2 The power supply circuit shown in the figure includes a button switch J, a capacitor C4-4, a capacitor C4-5, an indicator light LED and a resistor R4-2; the input end of the button switch J is connected to a 5V USB power supply, the power supply end of the button switch J is connected to one end of the capacitor C4-4, and the other end of the capacitor C4-4 is grounded; the power supply end of the button switch J is also connected to one end of the capacitor C4-5, and the other end of the capacitor C4-5 is grounded; the power supply end of the button switch J is also connected to the positive electrode of the indicator light LED, and the negative electrode of the indicator light LED is grounded through the resistor R4-2; the power supply end of the button switch J provides a +5V voltage VCC for the single-chip microcomputer. Since the single-chip microcomputer is powered by a standard 5V, the present invention uses a 5V USB as the input power supply to ensure the normal operation of the core main control module. At the same time, in order to avoid the high peak signal generated at the moment of voltage input, capacitors C4-4 and C4-5 are built on the power module circuit to realize overvoltage protection and energy storage functions, a button switch J is added to realize the switching of the power supply working state, and an indicator LED is designed to display the power supply working state.

[0072] like Figure 5 As shown, a multifunctional waveform generating device of the present invention also includes a shell 1, the main controller and the DDS multi-waveform generating circuit are integrated and packaged in the shell 1, the top surface of the shell 1 is provided with an inclined display screen embedding opening 2 and a control panel 3, the display screen is embedded in the display screen embedding opening 2, and the buttons are embedded in the control panel 3; the side of the shell 1 is provided with a dustproof and heat dissipation port 4, and the side of the shell 1 is also provided with a handle 5.

[0073] In the present invention, the single-chip microcomputer communicates with the AD9833 chip with digital synthesis DDS function through the serial port, and converts the sine wave into a variety of waveforms such as triangular wave and rectangular wave through the calculation formula. The triangular wave and rectangular wave are calculated based on the sine wave using the mathematical principle of direct digital frequency synthesis technology:

[0074] A sine wave signal expression is shown in formula (1):

[0075] u(t)=Usin(2πf o t+θ o ) (1)

[0076] Where:

[0077] U——amplitude;

[0078] θ0——initial phase;

[0079] f o ——Initial frequency.

[0080] If U=1,θ0=0, then we can get formula (2):

[0081] u(t)=sin(2πf o t)=sinθ(t)(n=0,1,2...) (2)

[0082] With the system clock frequency f c By sampling u(t) at intervals, we can obtain the sampling waveform sequence of formula (3):

[0083] u(n)=sin(2πf o nT c ) (3)

[0084] Where:

[0085] T c - sampling period;

[0086] f0——initial frequency.

[0087] The corresponding discrete phase sequence is shown in formula (4):

[0088] θ(n)=2πf o nT c =Δθ·n(n=0,1,2...) (4)

[0089] Where:

[0090] Δθ——is the phase increment between two consecutive samples.

[0091] Δθ=2πf o T c =2πf o / f c (5)

[0092] is the phase increment, which is the difference between two consecutive samplings. According to the sampling theorem, the following formula (6) is obtained:

[0093]

[0094] Therefore, the system output frequency f0 is determined by the increment Δθ between two samples, so by controlling Δθ, the frequency of the synthesized signal can be controlled.

[0095] If the phase increment is Kδ, the signal frequency is given by formula (7):

[0096]

[0097] The corresponding analog signal is:

[0098]

[0099] Where:

[0100] K——control word;

[0101] M——Accumulator bit width;

[0102] f c ——Clock frequency.

[0103] In a DDS chip, if the accumulator bit width is M = 2 N , so the output sinusoidal signal frequency is shown in formula (9):

[0104]

[0105] It can be seen from formula (9) that when the value of the input control word K is changed, the output sine wave frequency can be changed. When K = 1, the minimum frequency f of the DDS system can be reached. omin See formula (10):

[0106]

[0107] According to the Nyquist criterion, under ideal conditions,

[0108]

[0109] The maximum frequency allowed to be output, that is, K≤2 N-1 However, in practical applications, considering that it is limited by the low-pass filter, the highest frequency fomax is usually as shown in formula (12)

[0110]

[0111] In order to filter the image frequency, the highest frequency is tested to be: f omax =40%×f c Therefore, the operating frequency band of DDS is still relatively wide, and can be obtained from zero to 40% f c signal output.

[0112] The present invention provides a multifunctional waveform generating device with a main controller as the core and adopts a DDS multi-waveform generating circuit. Under the adjustment of a key, it can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit. The present invention has a relatively simple structure, a small size and a low price, and is very suitable for use as a teaching device.

[0113] Based on the above-mentioned multifunctional waveform generating device, the present invention also provides a multifunctional waveform generating method.

[0114] like Figure 6 As shown, a multifunctional waveform generating method is applied to the multifunctional waveform generating device described above, comprising the following steps:

[0115] S1, power on initialization, display interface through the display screen;

[0116] S2, detect whether a key is pressed; if not, the display screen continues to display the current interface; if so, adjust the waveform type, waveform frequency and waveform amplitude through the keys; wherein the waveform types include sine wave, triangle wave and rectangular wave;

[0117] S3, displaying the corresponding waveform on the display screen according to the adjusted waveform type, waveform frequency and waveform amplitude.

[0118] A multifunctional waveform generating method of the present invention can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen under the adjustment of a key, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit.

[0119] The present invention uses the AD9833 chip to output the waveform, completes phase accumulation and phase modulation under the action of the system clock, and sets the selection signal to a valid state so that the data is effectively written into the register. The output frequency of the signal generated by the DDS is Given, where f clk is the system frequency, and K is the frequency control word. The output of the digital-to-analog converter is controlled by reading the waveform data table. The system clock CLK is the working clock of the entire system, and its frequency is f_CLK; the frequency word input F_WORD is generally an integer, and the value controls the frequency of the output signal. The larger the value, the higher the output signal frequency. Conversely, the lower the output signal frequency, which is represented by K in the following text; the phase word input P_WORD is an integer, and the value controls the phase offset of the output signal.

[0120] DDS driving process is as follows Figure 7 As shown, the discrete phase value of the triangle wave can be obtained by addition, the discrete phase value of the rectangular wave can be obtained by assigning a value to a global variable, and the discrete phase value of the sine wave can be obtained by calling the sin() function in the math.h header file. The attenuation coefficient of the amplitude is adjusted appropriately by the subsequent operational amplifier and actual measurement. Finally, the attenuation coefficient of the sine wave is 0.2822, the attenuation coefficient of the rectangular wave is 0.3173, and the attenuation coefficient of the triangle wave is 0.2598. The inconsistency of the attenuation coefficients of the three is due to the same difference between the maximum and minimum discrete phase values.

[0121] When the waveform parameters are set in the human-computer interaction interface, the waveform parameter structure changes accordingly. The waveform parameter structure is mainly composed of frequency, amplitude and waveform type. The waveform type and amplitude are mainly controlled by the discrete phase value, while the waveform frequency is controlled by the overflow time of the timer. Assume that the number of discrete phase value points is N and the frequency of the timer is f tim , the timer reload count value is N tim , then the output frequency f of the waveform is,

[0122] Finally, according to Calculate the trigger time of the timer and automatically trigger DMA to transmit the DDS data stream through the timer. Figure 8 As shown; among them, the main function flow of DDS software is as follows Fig. 9 As shown, the sine wave output program of DDS software is as follows Fig.10 As shown, the square wave output program of DDS software is as follows Fig.11 As shown, the triangle wave output program of DDS software is as follows Fig.12 shown.

[0123] For the OLED screen display in the multifunctional waveform generating device of the present invention, a single-chip microcomputer is used to control the OLED display to display the required content. First, the OLED screen needs to be configured. Set the cursor and input mode. When the configuration is completed, the LCD screen is cleared. Then the LCD display position and content are initialized. When a certain bit of the OLED displays data, the address of the bit must be written into the program first, and then the data to be displayed can be written into the OLED screen. When programming, the relevant display processing functions of the OLED are encapsulated into a function library, and each function is called through the header file in the main function for use. The function library includes an initialization function. In the main function, if display is required, the initialization function is called first. The operations performed in the initialization function include setting the cursor position and moving direction through the write data instruction function to prevent the system from having other display tasks that have not been completed. When the data is input again, garbled characters will appear, and then it is determined whether the main function calls the display function. If called, the character display function is used. Fig.13 This is the display program flow chart of OLED.

[0124] In the method of the present invention, in the process of adjusting the waveform type, waveform frequency and waveform amplitude by pressing a key, the key is debounced by adding a delay program; Fig.14 As shown, the process of key debounce processing is as follows:

[0125] After the system is powered on, the key status is scanned to determine whether a key is pressed. If a key is detected to be pressed, the preset time (10ms) is delayed.

[0126] After a preset delay time, the key state of the key is scanned again. If the key is still detected to be pressed, it is determined that the key is pressed.

[0127] The key jitter time is very short, and the 10ms delay can avoid the jitter caused by the machine, thus preventing the key from being misjudged.

[0128] The serial port is a key part of the multifunctional waveform generating device of the present invention. When using the serial port, the first thing to do is to initialize the serial port polarity. In the multifunctional waveform generating device, the collected signal is displayed, and then the data is packaged and transmitted to the host computer through the serial port. The first step is to initialize the serial port. Serial port initialization is to set the data format and baud rate of the serial port, and to set the registers inside the single-chip microcomputer to control the communication mode of the serial port. In the method of the present invention, it is first necessary to set the working mode of the serial port, which is generally set to 8 data bits, one stop bit, and no check bit. Set the baud rate to 9600bit / s. Turn on the serial port interrupt when the interrupt is triggered. The data is sent out byte by byte, and the serial port initialization process is as follows: Fig.15 shown.

[0129] A multifunctional waveform generating method of the present invention can not only generate sine waves, triangle waves and square waves with different frequencies and display them on a display screen under the adjustment of a key, but also control the initial phase of the waveform. The output frequency stability of the multi-waveform generator can be improved by using a crystal oscillator circuit.

[0130] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A multifunctional waveform generating device, characterized in that: Includes a main controller, a DDS multi-waveform generating circuit, a display screen and a button, wherein the DDS multi-waveform generating circuit, the display screen and the button are electrically connected to the main controller; The DDS multi-waveform generating circuit includes a DDC circuit, a D / A converter, a low-pass filter and a signal amplifier; The DDC circuit includes a DDC chip D1 of model AD9833BRM and a crystal oscillator CY1; the VDD pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage, and the VDD pin of the DDC chip D1 is also connected to AGND through capacitors C2 and C3 respectively; the COMP pin of the DDC chip D1 is connected to the AVCC+5V power supply voltage through capacitor C4; the CAP pin of the DDC chip D1 is connected to DGND through capacitors C6 and C7 respectively; the VCC pin of the crystal oscillator CY ... The pin is connected to DGND through the DGND pin; the MCLK pin of the DDC chip D1 is connected to the OUT pin of the crystal oscillator CY1, the GND pin of the crystal oscillator CY1 is connected to DGND, the VCC pin of the crystal oscillator CY1 is connected to the DVCC+5V power supply voltage through the magnetic bead B1, and the VCC pin of the crystal oscillator CY1 is also grounded through capacitors C9 and C10 respectively; the AGND pin of the DDC chip D1 is connected to AGND, and the VOUT pin of the DDC chip D1 is connected to the D / A converter; The D / A converter includes an operational amplifier U1A of model TLV2374, the non-inverting input terminal of the operational amplifier U1A is connected to the VOUT pin of the DDC chip D1 through a resistor R3, the non-inverting input terminal of the operational amplifier U1A is also connected to AGND through a capacitor C5, the reverse input terminal of the operational amplifier U1A is connected to the output terminal of the operational amplifier U1A, the negative power terminal of the operational amplifier U1A is connected to AGND, the positive power terminal of the operational amplifier U1A is connected to the power supply voltage of VCC12V, and the positive power terminal of the operational amplifier U1A is also connected to AGND through a capacitor C1; the output terminal of the operational amplifier U1A is connected to the low-pass filter; The low-pass filter includes an operational amplifier U1B of model TLV2374, the same-direction input terminal of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1A through resistors R2 and R1 in sequence, the common connection terminal of the resistor R2 and the resistor R1 is connected to the output terminal of the operational amplifier U1B through a capacitor C8, the reverse input of the operational amplifier U1B is connected to the output terminal of the operational amplifier U1B, and the output terminal of the operational amplifier U1B is connected to the signal amplifier; The signal amplifier includes an operational amplifier U1C of model TLV2374 and a dual voltage comparator U2A of model LM393DR; the reverse input terminal of the operational amplifier U1C is connected to the output terminal of the operational amplifier U1B through a resistor R7 and a capacitor C12 in sequence, the reverse input terminal of the operational amplifier U1C is also connected to the output terminal of the operational amplifier U1C through a resistor R5, the positive input terminal of the operational amplifier U1C is connected to the power supply voltage AVCC+5V through a resistor R12, and the positive input terminal of the operational amplifier U1C is also connected to AGND through a resistor R13; the output terminal of the operational amplifier U1C is connected to the dual voltage comparator The same-direction input terminal of the dual voltage comparator U2A is connected, the reverse input terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V through a resistor R14, the reverse input terminal of the dual voltage comparator U2A is connected to AGND through a resistor R15, the negative power supply terminal of the dual voltage comparator U2A is connected to AGND, the positive power supply terminal of the dual voltage comparator U2A is connected to the power supply voltage of AVCC+5V, the positive power supply terminal of the dual voltage comparator U2A is also connected to AGND through a capacitor C11, the positive power supply terminal of the dual voltage comparator U2A is also connected to the output terminal of the dual voltage comparator U2A through a resistor R6, and the output terminal of the dual voltage comparator U2A is connected to the main controller.

2. The multifunctional waveform generating device according to claim 1, characterized in that: It also includes a power supply circuit, which is electrically connected to the main controller and the display screen respectively.

3. The multifunctional waveform generating device according to claim 1, characterized in that: It also includes a serial port circuit, which is electrically connected to the main controller.

4. The multifunctional waveform generating device according to claim 1, characterized in that: The main controller adopts a single chip microcomputer of model STM32F103, and the display screen adopts an OLED display screen.

5. The multifunctional waveform generating device according to claim 1, characterized in that: The device also comprises a housing (1), wherein the main controller and the DDS multi-waveform generating circuit are integrated and packaged in the housing (1); the top surface of the housing (1) is provided with an inclined display screen embedding opening (2) and a control panel (3); the display screen is embedded in the display screen embedding opening (2), and the buttons are embedded in the control panel (3); a dustproof heat dissipation opening (4) is provided on the side of the housing (1); and a handle (5) is also provided on the side of the housing (1).

6. A multifunctional waveform generation method, characterized in that: The multifunctional waveform generating device as claimed in any one of claims 1 to 5 comprises the following steps: S1, power on initialization, display interface through the display screen; S2, detect whether a key is pressed; if not, the display screen continues to display the current interface; if so, adjust the waveform type, waveform frequency and waveform amplitude through the keys; wherein the waveform types include sine wave, triangle wave and rectangular wave; S3, displaying the corresponding waveform on the display screen according to the adjusted waveform type, waveform frequency and waveform amplitude.

7. The multifunctional waveform generating method according to claim 6, characterized in that: In S2, the waveform type and waveform amplitude are controlled by adjusting the discretized phase value, and the waveform frequency is controlled by adjusting the overflow time of the timer; Let the number of discretized phase value points be , the frequency of the timer is , the timer reload count Value is , then the output frequency of the waveform for, .

8. The multifunctional waveform generating method according to claim 7, characterized in that: The discrete phase value of the triangle wave is obtained by addition, the discrete phase value of the rectangular wave is obtained by assigning a value to a global variable, and the discrete phase value of the sine wave is obtained by calling the sin() function.

9. The multifunctional waveform generating method according to claim 6, 7 or 8, characterized in that: In the process of adjusting the waveform type, waveform frequency and waveform amplitude by pressing keys, the keys are debounced by adding a delay program; the process of debounce processing of the keys is as follows: After the system is powered on, the key status is scanned to determine whether a key is pressed. If a key is detected to be pressed, the preset time is delayed; After a preset delay time, the key state of the key is scanned again. If the key is still detected to be pressed, it is determined that the key is pressed.

Citation Information

Patent Citations

  • Simple DDS waveform generator and DDS waveform generating method

    CN104821803A

  • Simple and economic waveform generator based on DDS technology

    CN106681426A

  • Simple and easy DDS waveform generator

    CN206021128U

  • Multifunctional waveform generating device

    CN217238696U