Method, cache and node for processing non-cached write data request
The data attached with non-cache write data requests are directly sent to the node through the cache, which solves the problem of many handshakes during non-cache write data operations in a multi-core and multi-chip system, and achieves the effect of reducing time consumption.
Patent Information
- Application Number
- CN201980101341.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-10-31
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2039-10-31
AI Technical Summary
In a multi-core and multi-chip system, each non-cache write operation requires multiple handshakes, resulting in high communication costs and high time consumption.
After receiving the processor's non-cache write data request, the buffer directly sends the data attached with the request to the node without sending the request first and obtaining the data buffer number.
The number of handshakes for sending non-cached write data requests individually and receiving data buffer numbers is reduced, thereby reducing time consumption during data writing.
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Figure CN114556314B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to a cache, and in particular to a method, a cache and a node for processing a non-cache write data request. Background Art
[0002] As the chipset scale becomes larger, the communication cost between chips is also getting higher. In a multi-core multi-chip system, each non-cacheable (NC) data write requires interaction and handshake to complete. Typical application scenarios include: high-width same-address operations and low-width same-address operations of remote direct memory access (RDMA). A complete data write operation needs to include the following steps:
[0003] When the central processing unit (CPU) has a need to write data, the CPU can send a non-cached write data request to the node through the buffer, and the node can write the data that the CPU needs to write, or send the data to be written to the next child node. The node can be a bus node or a controller. Exemplarily, the controller can be a storage controller, a universal serial bus (USB) controller, etc. The node can form a storage system with the child nodes. After the node receives the non-cached write data request, a data buffer ID (DBID) is assigned to the CPU, and the DBID is sent to the CPU through the buffer. After the CPU receives the DBID, it sends the data to be written to the node through the buffer. The node determines the data buffer to which the data is written based on the DBID assigned to the CPU, and then writes the data sent by the CPU into the buffer. After completing the data writing, a completion (COMP) response is sent to the CPU through the buffer.
[0004] From the above, we can see that the CPU needs to go through the above process every time it writes data, and the number of handshakes is relatively large, resulting in each data write taking a long time. Summary of the invention
[0005] The present application provides a method, a buffer and a node for processing non-cached data write requests. The method for processing non-cached data write requests can reduce the number of handshakes in the process of writing data to a node, thereby reducing the time for writing data to a node each time.
[0006] In view of this, the first aspect of the present application provides a method for processing a non-cached write data request. In this method, after receiving the first non-cached write data request sent by the first processor, the cache sends the first data buffer number stored locally to the first processor, and the first data buffer number is used to indicate the first processor to send the first data corresponding to the first non-cached write data request; the cache receives the first data from the first processor; the cache attaches the first non-cached write data request to the first data; the cache sends the first data attached with the first non-cached write data request to the node, and the first data attached with the first non-cached write data request is used to indicate the node to write the first data into the node according to the first buffer number. In this way, the cache can directly send the first data attached with the first non-cached write data request to the node without having to send the first non-cached write data request first, and then send the first data to the node after obtaining the DBID, which can reduce the number of handshakes for sending the first non-cached write data request separately and receiving the DBID, thereby reducing the time occupied by the data writing process.
[0007] Optionally, in combination with the first aspect, in a first possible implementation of the first aspect, before the cache receives the first non-cached write data request sent by the first processor, the method further includes: the cache applies for the first data buffer number from the node based on the second non-cached write data request sent by the first processor. Before the cache receives the first non-cached write data request, the cache has applied for the first data buffer number, which is equivalent to applying for the first data buffer number in advance, and can prepare for writing the first data to the node.
[0008] Optionally, in combination with the first possible implementation of the first aspect, in the second possible implementation of the first aspect, the cache applies to the node for the first data buffer number based on the second non-cached write data request sent by the first processor, including: the cache receives the second non-cached write data request from the first processor; the cache applies to the node for at least two data buffer numbers according to the second non-cached write data request, and the at least two data buffer numbers include the first data buffer number. The cache can apply for at least two data buffer numbers according to the at least two data buffer numbers, so that the first processor can be supported to write data multiple times.
[0009] Optionally, in combination with the second possible implementation of the first aspect, in a third possible implementation of the first aspect, the at least two data buffer numbers also include a second data buffer number, and after the cache applies for at least two data buffer numbers from the node according to the second non-cached write data request, the method further includes: the cache sends the second data buffer number to the first processor; the cache receives second data corresponding to the second non-cached write data request from the first processor and sends the second data to the node. The second data buffer number can support writing the second data to the node.
[0010] Optionally, in combination with the second or third possible implementation of the first aspect, in a fourth possible implementation of the first aspect, the cache applies for at least two buffer numbers from the node according to the second non-cached write data request, including: the cache tags the second non-cached write data request with a sequence tag, and sends the second non-cached write data request with the sequence tag to the node, the second non-cached write data request with the sequence tag is used to apply for at least two data buffer numbers from the node; the cache receives at least two data buffer numbers from the node and stores the at least two data buffer numbers locally. The sequence tag can be an identifier that can indicate that the node allocates at least two data buffer numbers.
[0011] Optionally, in combination with any possible implementation of the second possible implementation of the first aspect to the fourth possible implementation of the first aspect, in the fifth possible implementation of the first aspect, after the cache applies to the node for at least two data buffer numbers according to the second non-cached write data request, the method further includes: the cache sends a recycling instruction to the node according to a preset time, and the recycling instruction is used to instruct the node to recycle the idle data buffer number among the at least two data buffer numbers. When the first processor has no need to write data for a long time or other processors have a need to write data, the node can recycle the idle data buffer number among the at least two data buffer numbers allocated to the first processor, so that the data buffer numbers can be effectively utilized to avoid the data buffer numbers being idle for a long time and in large quantities.
[0012] The second aspect of the present application provides a method for processing a non-cached write data request, the method comprising: a node receives first data attached with a first non-cached write data request from a cache; the node splits the first data from the first data attached with the first non-cached write data request, and writes the first data to the node according to a first data buffer number, the first data buffer number being one of at least two data buffer numbers assigned by the node to the first processor. The node can receive the first data attached with the first non-cached write data request from the cache, then obtain the first data, and then write the first data to the node. In this way, the node does not need to receive the first non-cached write data request separately, and then assign a DBID to the first processor. Thereby, the number of handshakes can be reduced, and the time occupied in the data writing process can be reduced.
[0013] Optionally, in combination with the second aspect, in a first possible implementation of the second aspect, before the node receives the first data attached with the first non-cached write data request from the cache, the method further includes: the node receives the second non-cached write data request with a sequence tag from the cache; the node allocates at least two data buffer numbers to the first processor according to the second non-cached write data request with the sequence tag; the node sends at least two data buffer numbers to the cache and stores at least two data buffer numbers; when the node receives the second data corresponding to the second non-cached write data request from the cache, the node writes the second data according to the second data buffer number in the at least two data buffer numbers and updates the number of free data buffer numbers in the at least two data buffer numbers, and the second data buffer number is a data buffer number in the at least two data buffer numbers that is different from the first data buffer number. The node can allocate at least two data buffer numbers to the first processor according to the free status of its own cache area, so that only one data buffer number does not need to be allocated at a time, and the handshake here can be reduced, thereby saving time.
[0014] Optionally, in combination with the second aspect or the first possible implementation of the second aspect, in a third possible implementation of the second aspect, the method further includes: the node receives a recycle instruction from the cache; and the node recycles the idle data buffer number from the at least two buffer numbers according to the recycle instruction. In this way, the data buffer numbers can be effectively utilized to avoid the data buffer numbers being idle for a long time and in large quantities.
[0015] The third aspect of the present application provides a cache, which includes: a management module, which is used to send the first data buffer number stored in the data buffer number recording module to the first processor after receiving the first non-cache write data request sent by the first processor, and the first data buffer number is used to indicate the first processor to send the first data corresponding to the first non-cache write data request; a data processing module, which is used to receive the first data from the first processor; the data processing module is also used to attach the first non-cache write data request received by the management module to the first data; the data processing module is also used to send the first data attached with the first non-cache write data request to the node, and the first data attached with the first non-cache write data request is used to indicate the node to write the first data into the node according to the first buffer number. The cache can directly send the first data attached with the first non-cache write data request to the node, without having to send the first non-cache write data request first, and then send the first data to the node after obtaining the DBID, so that the number of handshakes for sending the first non-cache write data request and receiving the DBID can be reduced, thereby reducing the time occupied by the data writing process.
[0016] Optionally, in combination with the third aspect, in a first possible implementation of the third aspect, the cache further includes: a management module, which is also used to apply for a first data buffer number from the node based on a second non-cached write data request sent by the first processor.
[0017] Optionally, in combination with the first possible implementation of the third aspect, in a second possible implementation of the third aspect, the cache also includes: a management module, which is also used to receive a second non-cached write data request from the first processor; the management module is also used to apply to the node for at least two data buffer numbers based on the second non-cached write data request, and the at least two data buffer numbers include the first data buffer number.
[0018] Optionally, in combination with the second possible implementation of the third aspect, in a third possible implementation of the third aspect, the cache includes: a management module, which is also used to send a second data buffer number to the first processor; a data processing module, which is also used to receive second data corresponding to a second non-cached write data request from the first processor and send the second data to the node.
[0019] Optionally, in combination with the second possible implementation manner of the third aspect or the third possible implementation manner, in a fourth possible implementation manner of the third aspect, the cache includes: a management module, which is also used to mark the second non-cached write data request with a sequence tag and send the second non-cached write data request with the sequence tag to the node, and the second non-cached write data request with the sequence tag is used to apply for at least two data buffer numbers from the node; a data buffer number recording module, which is used to receive at least two data buffer numbers from the node and store at least two data buffer numbers.
[0020] Optionally, in combination with any one of the second to fourth possible implementations of the third aspect, in the fifth possible implementation of the third aspect, the cache also includes: a timing module, used to send a recovery instruction to the node according to a preset time, and the recovery instruction is used to instruct the node to recover an idle data buffer number among at least two data buffer numbers.
[0021] The fourth aspect of the present application provides a node, which includes: a data processing module, which is used to receive first data with a first non-cached write data request attached from a cache; the data processing module is also used to split the first data from the first data with the first non-cached write data request attached, and write the first data into a data buffer module according to a first data buffer number, and the first data buffer number is one of at least two data buffer numbers assigned by the data buffer module to the first processor. The node does not need to receive the first non-cached write data request separately, and then assign a DBID to the first processor. Thereby, the number of handshakes can be reduced and the time occupied in the data writing process can be reduced.
[0022] Optionally, in combination with the fourth aspect, in a first possible implementation of the fourth aspect, the node also includes: a request processing module, used to receive a second non-cached write data request with a sequence tag from a cache; a data buffer module, also used to assign at least two data buffer numbers to the first processor according to the second non-cached write data request with a sequence tag received by the request processing module; a data buffer number management module, used to send at least two data buffer numbers to the cache and store at least two data buffer numbers; the data buffer module, also used to write the second data to the data buffer module according to the second data buffer number among the at least two data buffer numbers when the data processing module receives the second data corresponding to the second non-cached write data request, and instruct the data buffer number management module to update the number of free data buffer numbers among the at least two data buffer numbers, the second data buffer number being a data buffer number among the at least two data buffer numbers that is different from the first data buffer number.
[0023] Optionally, in combination with the fourth aspect or the first possible implementation of the fourth aspect, in the second possible implementation of the fourth aspect, the node includes: a data buffer number management module, which is also used to receive a recycle instruction from the cache; a data buffer number management module, which is also used to instruct the data buffer module to recycle an idle data buffer number from at least two buffer numbers according to the recycle instruction.
[0024] The present application provides a method, a cache and a node for processing a non-cached write data request. In the method for processing a non-cached write data request, after receiving a first non-cached write data request sent by a first processor, the cache sends a locally stored first data buffer number to the first processor, and the first data buffer number is used to indicate that the first processor sends the first data corresponding to the first non-cached write data request; the cache receives the first data from the first processor; the cache attaches the first non-cached write data request to the first data; the cache sends the first data attached with the first non-cached write data request to the node, and the first data attached with the first non-cached write data request is used to indicate that the node writes the first data into the node according to the first buffer number. In this way, the cache can directly send the first data attached with the first non-cached write data request to the node without having to send the first non-cached write data request first, and then send the first data to the node after obtaining the DBID, which can reduce the number of handshakes for sending the first non-cached write data request and receiving the DBID separately, thereby reducing the time occupied by the data writing process. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 A schematic diagram of an embodiment of an information processing system provided by the present application;
[0026] Figure 2 A schematic diagram of an embodiment of a method for processing a non-cached write data request provided by the present application;
[0027] Figure 3 A schematic diagram of an embodiment of a method for processing a non-cached write data request provided by the present application;
[0028] Figure 4 A schematic diagram of an embodiment of a method for processing a non-cached write data request provided by the present application;
[0029] Figure 5 A schematic diagram of an embodiment of a method for processing a non-cached write data request provided by the present application;
[0030] Figure 6 A schematic diagram of an embodiment of a buffer provided by the present application;
[0031] Figure 7A schematic diagram of an embodiment of a node provided in the present application. DETAILED DESCRIPTION
[0032] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.
[0033] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or modules is not necessarily limited to those steps or modules that are clearly listed, but may include other steps or modules that are not clearly listed or inherent to these processes, methods, products or devices.
[0034] As chipsets get bigger, the cost of chip-to-chip communication is getting higher. In a multi-core, multi-chip system, each non-cached write requires interaction and handshakes to complete. In high-performance processor architectures, typical application scenarios include: high-width same-address operations such as work queue elements (WQEs), or low-width same-address sequential operations such as doorbell tasks.
[0035] Figure 1 The present application provides an information processing system, which includes one or more processors, such as Figure 1 The first processor 101, the second processor 102, ... the Nth processor in the system can be connected via a system bus. The N processors can interact with the cache 200. When any one of the N processors has a need to write data, the processor with the need to write data will send a non-cached write data request to the cache 200. The cache 200 applies for a DBID from the node 300 according to the non-cached write data request. The cache then forwards the DBID to the processor with the need to write data. The processor then sends the data to be written to the cache 200. The cache then forwards the data to be written to the node 300. The node 300 determines the buffer corresponding to the DBID according to the allocated DBID and then writes the data into the buffer. For details, please refer to Figure 2 Steps 201 to 208 are shown.
[0036] See also Figure 2 It should be noted that after the first data is written in steps 201 to 208, if the processor has another data write request, steps 209 to 216 need to be executed, and the cache needs to apply to the node for the second data buffer number again, so that the node can determine the buffer to write the second data. In this way, each time the processor writes data, it needs to go through steps 201 to 208, and the number of handshakes is relatively large, which is time-consuming.
[0037] It should be noted that Figure 1 The N processors shown are located on the same chip as the cache 200, while the cache 200 and the node 300 may be located on the same chip or may not be located on the same chip. When the cache 200 and the node 300 are not located on the same chip, a protocol adapter (PA) may also exist between the cache 200 and the node 300. When the cache 200 receives a non-cached write data request from any processor, the cache 200 needs to first send the non-cached write data request to the source PA located on the same chip as the cache, and the source PA then forwards the non-cached write data request to the destination PA located on the same chip as the node, and the destination PA then forwards the non-cached write data request to the node 300.
[0038] It should be noted that the non-cached write data request includes the attributes of the data to be written, the final destination address to be written and other basic information. The non-cached write data request is necessary when the node is writing the data to be written.
[0039] This application embodiment provides a method for processing a non-cached write data request. Figure 3 Specifically, the method for processing a write data request includes:
[0040] 301. A first processor sends a second non-cache write data request to a cache.
[0041] When the first processor has a write data requirement, the first processor sends a second non-cache write data request to the cache. Figure 1 Any one of the N processors shown.
[0042] 302. The cache applies for at least two data buffer numbers from the node.
[0043] The cache requests at least two data buffer numbers from the node. For details, see Figure 4 , the following will Figure 4Give further introduction.
[0044] 303. The cache sends a second data buffer number to the first processor.
[0045] When the buffer applies for at least two data buffer numbers in step 302, the buffer sends a second data buffer number to the first processor, and the second data buffer number is one of the at least two data buffer numbers. It should be noted that the at least two data buffer numbers are consecutive, and the second data buffer number is the first of the at least two data buffer numbers.
[0046] 304. The first processor sends second data to the buffer.
[0047] After receiving the second data buffer number, the first processor sends the second data to the cache. The second data is data corresponding to the second non-cached write data request. In step 301, the first processor has a write data requirement, which specifically means that the first processor needs to write the second data to the node, so the first processor sends the second non-cached write data request to the cache.
[0048] Since the buffer and the first processor are located in the same chip, the first processor does not need to forward the second data to the buffer via the PA, so the delay of the first processor sending the second data to the buffer is relatively short.
[0049] 305. The buffer sends second data to the node.
[0050] The buffer sends the second data to the node.
[0051] 306. The node writes the second data into a second data buffer number among the at least two buffer numbers.
[0052] The node determines a data buffer corresponding to the second data buffer number, and then writes the second data into the data buffer.
[0053] After completing writing the second data, the node may continue to send the second data to the child node of the node, and the child node will write the second data again.
[0054] It should be noted that after the node writes the second data, the node may directly send a COMP response to the first processor. After the first processor receives the COMP response, the first processor may release the buffer occupied by the second data in the first processor.
[0055] 307. The first processor sends a first non-cache write data request to the cache.
[0056] The first processor sends a first non-cache write data request to the cache, wherein the first non-cache write data request is different from the second non-cache write data request.
[0057] It should be noted that step 307 is after step 304 , but there is no time sequence between step 307 and step 305 .
[0058] 308. The buffer determines whether the first data buffer number is recorded locally.
[0059] Whether a first data buffer number is recorded locally in the cache, where the first data buffer number is a data buffer number different from the second data buffer number among at least two data buffer numbers allocated by the node to the first processor.
[0060] 309. When the cache locally records the first data buffer number, the cache sends the first buffer number to the first processor.
[0061] When the cache locally records a first data buffer number, the cache sends the first data buffer number to the first processor, the first data buffer number being used to instruct the first processor to send the first data corresponding to the first non-cached write data request to the cache. The first data buffer number is different from the second data buffer number.
[0062] 310. The first processor sends first data to a buffer.
[0063] When the first processor receives the first data buffer number, the first processor sends the first data to the buffer.
[0064] 311. The cache adds the first non-cache write data request to the first data.
[0065] After the buffer receives the first data, the buffer attaches the first non-cached write data request to the first data. The position where the first non-cached write data request is attached to the first data is not limited.
[0066] 312. The cache sends the first data with a first non-cached write data request attached to the node.
[0067] The cache sends the first data with a first non-cached write data request attached to the node.
[0068] 313. The node separates the first data from the first data to which the first non-cache write data request is attached, and then writes the first data to the node according to the first data buffer number.
[0069] After receiving the first data with the first non-cached write data request attached, the node splits the first data from the first data with the first non-cached write data request attached, and then writes the first data to the node. Specifically, the node can write the first data to the data buffer module of the node, see Figure 7 As described in step 306, after completing writing the first data, the node may continue to send the first data to the child node of the node, and the child node may write the first data again.
[0070] The rule for the node to split the first data with the first non-cached write data request attached is the same as the rule attached in step 311. Exemplarily, in step 311, the first non-cached write data request is attached to the end of the first data, assuming that the first non-cached write data request occupies 100 bits. In step 313, the first data with the first non-cached write data request attached is split into 100 bits from the end.
[0071] It should be noted that steps 307 to 313 can be performed multiple times. That is, when the first processor has multiple write data requirements, in step 302, the cache applies for multiple data buffer numbers from the node, and no other processor except the first processor sends a write data request to the cache, the first processor can attach the write data request to the data through the cache multiple times, and then send it to the node.
[0072] 314. The buffer indication node reclaims an idle data buffer number among at least two data buffer numbers.
[0073] The buffer indication node reclaims an idle data buffer number from at least two data buffer numbers. It should be noted that if a data buffer corresponding to a data buffer number has no data written into it, then the data buffer number is idle.
[0074] See also Figure 4 The specific implementation method of the cache in 302 above applying for at least two data buffer numbers from the node may be:
[0075] 3021. The cache tags the second non-cached write data request with a sequence tag.
[0076] The cache tags the second non-cached write data request with a sequence tag, where the sequence tag may be a flag. After receiving the non-cached write data request with the sequence tag, the node allocates at least two data buffer numbers to the first processor.
[0077] 3022. The cache sends a second non-cached write data request with a sequence tag to the node.
[0078] The cache sends the second non-cached write data request with the sequence tag in step 3021 to the node.
[0079] When the cache and the node are located in different chips, when the cache sends a second non-cache write data request with a sequence tag to the node, it needs to be forwarded by the source PA and the destination PA.
[0080] 3023. The node allocates at least two data buffer numbers to the first processor according to the second non-cached data write request with the sequence tag and records the at least two data buffer numbers.
[0081] After receiving the second non-cache write data request with the sequence tag, the node allocates at least two data buffer numbers to the first processor according to the idle state of its own buffer, and the at least two data buffer numbers are continuous.
[0082] It should be noted that the node can determine the first data buffer number assigned to the first processor and the number of data buffer numbers assigned to the first processor, and the number of data buffer numbers is greater than or equal to 2. Exemplarily, the node can determine that the first data buffer number assigned to the first processor is 0, and the data buffer number assigned to the first processor is 4, then the 4 data buffer numbers assigned to the first processor by the node are: 0, 1, 2, 3.
[0083] 3024. The node sends at least two data buffer numbers to the cache.
[0084] The node sends at least two data buffer numbers allocated in step 2023 to the cache.
[0085] 3025. The cache stores the at least two data buffer numbers locally.
[0086] The buffer stores the at least two data buffer numbers locally.
[0087] See also Figure 5 The specific implementation method of the buffer indicating the node to reclaim the idle data buffer number among the at least two data buffer numbers in 314 may be:
[0088] 3141. The cache determines that the third non-cached write data request from the first processor is not received within a preset time range or that the fourth non-cached write data request from the second processor is received before the third non-cached write data request from the first processor is received within the preset time range.
[0089] When the cache determines that the third non-cached write data request of the first processor is not received within a preset time range or the fourth non-cached write data request of the second processor is received before the third non-cached write data request of the processor is received within the preset time range, the node can reclaim the idle data buffer number of at least one data buffer number allocated to the first processor. The second processor is a processor different from the first processor.
[0090] The duration of the preset time range is not limited, and the buffer may start timing from when the buffer receives the first non-cache write data request.
[0091] 3142. The cache sends a recycle instruction to the node.
[0092] The cache sends a reclaim instruction to the node.
[0093] 3143. The node reclaims an idle data buffer number from at least two data buffer numbers according to the reclaim instruction.
[0094] The node reclaims an idle data buffer number among the at least two data buffer numbers according to the reclaim instruction.
[0095] It should be noted that step 314 is an optional step. If at least two data buffer numbers requested by the cache from the node in step 302 can be used up by the first processor, there is no step 314. For example, if in step 302, the cache requested three data buffer numbers from the node, and the first processor wrote data three times, the three data buffer numbers are used up, and there is no process of reclaiming the data buffer numbers in step 314.
[0096] An embodiment provides a method for processing a non-cached write data request, in which the interaction between the first processor and the cache does not need to cross slices, and the interaction time between the two is short. After receiving the first non-cached write data request and the first data from the first processor, the cache can directly send the first data attached with the first non-cached write data request to the node. From a process point of view, merging the first non-cached write data request with the first data and then sending it is equivalent to reducing the number of handshakes for sending the first non-cached write data request to the node, which can reduce the time consumed by the handshake.
[0097] The present application embodiment provides a buffer, which is the buffer in the above embodiment, see Figure 6 The buffer includes: a timing module 2001, a management module 2002, a data buffer number recording module 2003, and a data processing module 2004. The timing module 2001 is intercommunication with the management module 2002, and the timing module is used to send a recycling instruction to the node.
[0098] The management module 2002 can receive a non-cached write data request from a processor. The management module 2002 communicates with the data buffer number recording module 2003. The management module 2002 can obtain the data buffer number from the data buffer number recording module 2003 and send the data buffer number to the processor. The management module 2002 can also be used to tag the non-cached write data request received from the processor with a sequence tag and then send it to the node. The data buffer number recording module 2003 can receive the data buffer number from the node and record the data buffer number.
[0099] After receiving the non-cached write data request, the management module 2002 may also send the non-cached write data request to the data processing module 2004. After receiving the data, the data processing module 2004 may attach the non-cached write data request to the data and send it to the node.
[0100] Specifically, the functions of the timing module 2001, the management module 2002, the data buffer number recording module 2003, and the data processing module 2004 are as follows:
[0101] The timing module 2001 is used to determine that the management module does not receive the third non-cache write data request of the first processor within a preset time range;
[0102] The timing module 2001 is further configured to determine that within a preset time range, the management module receives a fourth non-cache write data request from the second processor before receiving a third non-cache write data request from the first processor.
[0103] The timing module 2001 is used to send a reclaim instruction to the node when the management module does not receive the third non-cached write data request of the first processor within a preset time range; or when the management module receives the fourth non-cached write data request of the second processor before receiving the third non-cached write data request of the first processor within a preset time range. The reclaim instruction is used to instruct the node to reclaim an idle data buffer number among at least two data buffer numbers, and the second processor is different from the first processor.
[0104] The management module 2002 is configured to receive a first non-cache write data request from a first processor;
[0105] The management module 2002 is further used to send a first data buffer number to the first processor, where the first data buffer number is used to instruct the first processor to send first data corresponding to the first non-cache write data request to the cache;
[0106] The management module 2002 is further configured to receive a second non-cache write data request from the first processor;
[0107] The management module 2002 is further configured to send a second data buffer number to the first processor, where the second data buffer number is a data buffer number different from the first data buffer number among the at least two data buffer numbers recorded by the data buffer number recording module;
[0108] The management module 2002 is further used to tag the second non-cached write data request with a sequence tag;
[0109] The management module 2002 is further used to send a second non-cached data write request with a sequence tag to the node, where the second non-cached data write request with the sequence tag is used to apply for at least two data buffer area numbers from the node.
[0110] A data buffer number recording module 2003 is used to determine whether a first data buffer number exists in the data buffer number recording module, where the first data buffer number is one of at least two data buffer numbers allocated by the node to the first processor;
[0111] The data buffer number recording module 2003 is used to receive at least two data buffer numbers from a node and store at least two data buffer numbers.
[0112] The data processing module 2004 is used to receive first data from the first processor;
[0113] The data processing module 2004 is further used to append the first non-cache write data request received by the management module to the first data;
[0114] The data processing module 2004 is further configured to send first data with a first non-cached write data request attached to the node, wherein the first data with the first non-cached write data request attached is used to instruct the node to write the first data according to the first buffer number.
[0115] The data processing module 2004 is further configured to receive second data corresponding to a second non-cache write data request from the first processor.
[0116] The data processing module 2004 is also used to send second data to the node.
[0117] The present application embodiment provides a node, which is the node in the above embodiment. Figure 7 The node includes: a request processing module 3001, a data buffer number management module 3002, a data processing module 3003, a data buffer module 3004, and a request buffer module 3005.
[0118] The request processing module 3001 is used to receive a non-cached write data request from the cache, and then send the non-cached write data request to the data buffer module 3004, and the data buffer module 3004 assigns a data buffer number. At the same time, the request processing module 3001 sends the non-cached write data request to the request buffer module 3005, and the request buffer module 3005 is used to store the non-cached write data request.
[0119] The data buffer module 3004 is intercommunication with the data buffer number management module 3002. The data buffer number management module 3002 is used to send the data buffer number to the cache after the data buffer module 3004 assigns the data buffer number to the processor, and store the data buffer number in the data buffer number management module 3002. The data buffer number management module 3002 is also used to receive a reclaim instruction from the cache, and send the reclaim instruction to the data buffer module 3004, and the data buffer module 3004 reclaims the idle data buffer number in the assigned data buffer number.
[0120] The data processing module 3003 can receive data with a non-cached write data request attached from the cache, split the data with the non-cached write data request attached into data and a non-cached write data request, and then send the data to the data buffer module 3004, and send the non-cached write data request to the request buffer module 3005. The request buffer module 3005 is used to store the non-cached write data request. The data buffer module 3004 and the request buffer module 3005 can also send the non-cached write data request and the data to the lower-level node.
[0121] Specifically, the functions of the request processing module 3001, the data buffer number management module 3002, the data processing module 3003, the data buffer module 3004 and the request buffer module 3005 are as follows:
[0122] The request processing module 3001 is used to receive a second non-cached write data request with a sequence tag from a cache.
[0123] The data buffer number management module 3002 is used to send at least two data buffer numbers allocated by the data buffer module to the buffer and record at least two data buffer numbers.
[0124] The data buffer number management module 3002 is also used to update the number of free data buffer numbers in the stored at least two data buffer numbers after the data buffer module writes the second data according to the second data buffer number.
[0125] The data buffer number management module 3002 is also used to receive a reclaim instruction from the cache.
[0126] The data buffer number management module 3002 is further configured to instruct the data buffer module to reclaim the idle data buffer number among the at least two data buffer numbers when it is determined that there is an idle data buffer number among the at least two data buffer numbers.
[0127] The data processing module 3003 is configured to receive first data attached with a first non-cache write data request from a cache.
[0128] The data processing module 3003 is used to separate the first data from the first data to which the first non-cache write data request is attached.
[0129] The data processing module 3003 is further configured to receive second data corresponding to a second non-cached write data request from the cache.
[0130] The data buffer module 3004 is used to write the first data into the data buffer module 3004 according to the first data buffer number, where the first data buffer number is a data buffer number among at least two data buffer numbers allocated by the data buffer module 3004 to the first processor.
[0131] The data buffer module 3004 is also used to write the second data into the data buffer module 3004 according to the second data buffer number among the at least two data buffer numbers, where the second data buffer number is a data buffer number among the at least two data buffer numbers allocated by the data buffer module 3004 that is different from the first data buffer number.
[0132] The data buffer module 3004 is further configured to recycle an idle data buffer number from at least two buffer numbers upon receiving a recycle instruction from the data buffer number management module 3002 .
[0133] The data buffer module 3004 is further configured to allocate at least two data buffer numbers to the first processor according to the second non-cache write data request with a sequence tag received by the request processing module.
[0134] It should be noted that, in the present application, the cache may be a shared cache, such as an L3 cache; the node may be a storage controller, a bus controller, etc. Since the cache and the node are mainly implemented by hardware circuits, the various modules contained in the cache and the node in the above embodiments (such as the timing module 2001, the management module 2002, the data buffer number recording module 2003, the data processing module 2004, the request processing module 3001, the data buffer number management module 3002, the data processing module 3003, the data buffer module 3004, the request buffer module 3005, etc.) are all circuit modules. For those skilled in the art, it is easy to design the corresponding circuit structure after understanding the function of the circuit module. Therefore, the present application does not further explain the structure of these circuit modules.
[0135] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A method for processing a non-cached write data request, characterized in that: The method comprises: After receiving the first non-cached write data request sent by the first processor, the cache sends a locally stored first data buffer number to the first processor, where the first data buffer number is used to instruct the first processor to send first data corresponding to the first non-cached write data request; The buffer receives the first data from the first processor; The cache device appends the first non-cached write data request to the first data; The cache sends first data with a first non-cache write data request attached to the node, and the first data with the first non-cache write data request attached is used to instruct the node to write the first data into the node according to the first buffer number.
2. The method for processing a non-cached write data request according to claim 1, characterized in that: Before the cache receives the first non-cache write data request sent by the first processor, the method further includes: The cache applies for the first data buffer number from the node based on a second non-cached write data request sent by the first processor.
3. The method for processing a non-cached write data request according to claim 2, characterized in that: The cache applies for the first data buffer number from the node based on the second non-cached write data request sent by the first processor, comprising: The cache receives the second non-cached write data request from the first processor; The cache applies to the node for at least two data buffer numbers according to the second non-cache write data request, and the at least two data buffer numbers include the first data buffer number.
4. The method for processing a non-cached write data request according to claim 3, characterized in that: The at least two data buffer numbers also include a second data buffer number, After the cache applies to the node for the at least two data buffer area numbers according to the second non-cache write data request, the method further includes: The cache sends the second data buffer number to the first processor; The cache receives second data corresponding to the second non-cached write data request from the first processor and sends the second data to the node.
5. The method for processing a non-cached write data request according to claim 3 or 4, characterized in that: The cache applying for the at least two buffer zone numbers from the node according to the second non-cache write data request comprises: The cache tags the second non-cached write data request with a sequence tag, and sends the second non-cached write data request with the sequence tag to the node, wherein the second non-cached write data request with the sequence tag is used to apply for at least the two data buffer numbers from the node; The buffer receives the at least two data buffer numbers from the node and stores the at least two data buffer numbers locally.
6. The method for processing a non-cached write data request according to claim 3 or 4, characterized in that: After the cache applies for at least two data buffer area numbers from the node according to the second non-cache write data request, the method further includes: The buffer sends a reclaim instruction to the node according to a preset time, and the reclaim instruction is used to instruct the node to reclaim an idle data buffer number among the at least two data buffer numbers.
7. A method for processing a non-cached write data request, characterized in that: The method comprises: The node receives first data attached with a first non-cached write data request from the cache; The node splits the first data from the first data to which the first non-cached write data request is attached, and writes the first data into the node according to a first data buffer number, where the first data buffer number is one of at least two data buffer numbers allocated by the node to the first processor.
8. The method for processing a non-cached write data request according to claim 7, characterized in that: Before the node receives the first data attached with the first non-cached write data request from the cache, the method further includes: The node receives a second non-cached write data request with a sequence tag from the cache; The node assigns the at least two data buffer numbers to the first processor according to the second non-cached write data request with the sequence tag; The node sends the at least two data buffer numbers to the buffer and stores the at least two data buffer numbers; When the node receives second data corresponding to the second non-cached write data request from the cache, the node writes the second data into and updates the number of free data buffer numbers among the at least two data buffer numbers according to a second data buffer number among the at least two data buffer numbers, where the second data buffer number is a data buffer number among the at least two data buffer numbers that is different from the first data buffer number.
9. The method for processing a non-cached write data request according to claim 7 or 8, characterized in that: The method further comprises: The node receives a reclaim instruction from the cache; The node recycles an idle data buffer number among the at least two buffer numbers according to the recycle instruction.
10. A buffer, characterized in that: The buffer comprises: a management module, configured to, after receiving a first non-cached write data request sent by a first processor, send a first data buffer number stored in a data buffer number recording module to the first processor, wherein the first data buffer number is used to instruct the first processor to send first data corresponding to the first non-cached write data request; a data processing module, configured to receive the first data from the first processor; The data processing module is further configured to append the first non-cached write data request received by the management module to the first data; The data processing module is further used to send first data with a first non-cached write data request attached to the node, and the first data with the first non-cached write data request attached to the node is used to instruct the node to write the first data into the node according to the first buffer number.
11. The buffer according to claim 10, characterized in that: The buffer comprises: The management module is further configured to apply for the first data buffer number from the node based on a second non-cached write data request sent by the first processor.
12. The buffer according to claim 11, characterized in that: The buffer comprises: The management module is further configured to receive a second non-cached write data request from the first processor; The management module is further used to apply for at least two data buffer numbers from the node according to the second non-cache write data request, and the at least two data buffer numbers include the first data buffer number.
13. The buffer according to claim 12, wherein: The at least two data buffer numbers also include a second data buffer number, and the buffer includes: The management module is further used to send the second data buffer number to the first processor; The data processing module is further configured to receive second data corresponding to the second non-cache write data request from the first processor and send the second data to the node.
14. The buffer according to claim 12 or 13, characterized in that: The buffer comprises: The management module is further used to tag the second non-cached write data request with a sequence tag, and send the second non-cached write data request with the sequence tag to the node, wherein the second non-cached write data request with the sequence tag is used to apply for at least the two data buffer numbers from the node; The data buffer number recording module is used to receive the at least two data buffer numbers from the node and store the at least two data buffer numbers.
15. The buffer according to claim 12 or 13, characterized in that: The buffer also includes: A timing module is used to send a recycling instruction to the node according to a preset time, and the recycling instruction is used to instruct the node to recycle an idle data buffer number among the at least two data buffer numbers.
16. A node, characterized in that: The node is a node device, and the node includes: A data processing module, configured to receive first data attached with a first non-cache write data request from a cache; The data processing module is also used to split the first data from the first data to which the first non-cached write data request is attached, and write the first data into the data buffer module according to a first data buffer number, wherein the first data buffer number is one of the at least two data buffer numbers assigned by the data buffer module to the first processor.
17. The node according to claim 16, characterized in that: The node also includes: A request processing module, configured to receive a second non-cached write data request with a sequence tag from the cache; The data buffer module is further configured to allocate the at least two data buffer numbers to the first processor according to the second non-cache write data request with the sequence tag received by the request processing module; A data buffer number management module, used for sending the at least two data buffer numbers to the buffer and storing the at least two data buffer numbers; The data buffer module is also used to write the second data into the data buffer module according to the second data buffer number among the at least two data buffer numbers when the data processing module receives the second data corresponding to the second non-cached write data request, and instruct the data buffer number management module to update the number of free data buffer numbers among the at least two data buffer numbers, wherein the second data buffer number is a data buffer number among the at least two data buffer numbers that is different from the first data buffer number.
18. The node according to claim 16 or 17, characterized in that: The nodes include: The data buffer number management module is further used to receive a reclaim instruction from the buffer; The data buffer number management module is further used to instruct the data buffer module to recycle the idle data buffer numbers among the at least two buffer numbers according to the recycle instruction.
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