Image display element

Abstract

In the image display element of one aspect of the present application, each of a plurality of light emitting elements in an array has a mesa shape, a wiring layer connected to a second conductive layer is provided between the mesa shapes, and a common second electrode connected to the wiring layer and connected to the plurality of light emitting elements is provided, the layer thickness of the wiring layer being thinner than the layer thickness of the mesa shape.

Description

TECHNICAL FIELD

[0001] One embodiment of the present application relates to an image display element, and more particularly, to an image display element including micro light emitting elements. BACKGROUND

[0002] A display element including a plurality of micro light emitting elements configuring pixels on a driving circuit substrate is known. Such a display element is not only small, but also has characteristics of high luminance, high durability, and the like. Therefore, the display element is mounted as a display device for a head-mounted terminal, a head-up display (HUD), or the like.

[0003] In addition, it is known that a plurality of mesa structures are formed on the surface of a display element including micro LEDs in an array shape in order to improve light extraction efficiency. There is a method of arranging a cathode within the array of micro LEDs in such a display element, but there is a problem that the smaller the area of the cathode, the smaller the light emitting area, and a problem that the pixel area is large. Therefore, in order to solve such problems, a method of arranging a cathode electrode outside the array has been proposed (US Patent Publication US2018 / 308420A1 and US Patent Publication US2020 / 152693A1).

[0004] In addition, in order to improve light extraction efficiency, a method of filling the space between the mesas with a material having high reflectivity has also been proposed (Francois Olivier, Anis Daami, Ludovic Dupre, Franck Henry, Bernard Aventurier, Francois Templier, "Investigation and Improvement of 10 pm Pixel-pitch GaN-based Micro-LED Arrays with Very High Brightness", SID 2017 DIGEST, P353). SUMMARY

[0005] By arranging a cathode electrode outside the array, the quality of the light source can be improved compared to the method of arranging a cathode electrode within the array.

[0006] However, in the method of US Patent Publication US2018 / 308420A1 and US Patent Publication US2020 / 152693A1 in which a cathode electrode is arranged outside the array, the resistance of the common cathode electrode structure arranged within the pixel area can hinder the improvement of the quality of the light source.

[0007] In addition, in a method in which a space between mesas is filled with a material having high reflectivity, such as in Francois Olivier, Anis Daami, Ludovic Dupre, Franck Henry, Bernard Aventurier, Francois Templier, "Investigation and Improvement of 10 μm Pixel-pitch GaN-based Micro-LED Arrays with Very High Brightness", SID 2017 DIGEST, P353, the material can be a cause of the warping of the light emitting element.

[0008] One embodiment of the present application was made in view of the above problems, and an object thereof is to provide an image display element including a micro light emitting element having high light source quality.

[0009] To address the above problems, an image display element according to an aspect of the present application includes a pixel region in which a plurality of light emitting elements are arranged in an array, and a connection region provided outside the pixel region, a light emitting unit including a plurality of light emitting elements arranged in an array in the pixel region, and a drive circuit substrate arranged opposite to the light emitting unit and configured to drive the plurality of light emitting elements, the light emitting unit including a semiconductor layer including a second conductive layer, a light emitting layer, and a first conductive layer stacked in the pixel region and the connection region, a plurality of mesa shapes in which the semiconductor layer is divided for each of the light emitting elements in the pixel region, and a step portion in the connection region, the step portion being separated from the mesa shapes by a groove formed in the semiconductor layer, the first conductive layer of each of the mesa shapes being connected to a first electrode, the first electrode being connected to a first drive electrode, the first drive electrode being provided on an opposite surface of the drive circuit substrate opposite to the light emitting unit, the light emitting unit further including a wiring layer between adjacent mesa shapes, the wiring layer being a wiring layer that forms a conductive path between the second conductive layers of the mesa shapes, and the wiring layer being thinner than a layer thickness of a portion of the semiconductor layer in which the mesa shapes are formed, the wiring layer being extended to the step portion and connected to a common second electrode provided on the step portion, the common second electrode being connected to a second drive electrode, the second drive electrode being provided on the opposite surface of the drive circuit substrate.

[0010] According to one embodiment of the present application, an image display element including a micro light emitting element having high light source quality can be provided. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a plan view of an image display element according to a first embodiment of the present application.

[0012] Figure 2 is an exploded perspective view showing the configuration of a part of the image display element shown in Figure 1

[0013] Figure 3 Figure 1 and Figure 2 is a cross-sectional view of a pixel region of a light emitting unit provided in the image display element in the section line B-B' shown in

[0014] Figure 4 is a cross-sectional view of a connection region of the light emitting unit provided in the image display element in the section line B-B' shown in Figure 1 and Figure 2

[0015] Figure 5 Figure 1 and Figure 2 is a cross-sectional view of the image display element in the section line B-B' shown in

[0016] Figure 6 is a flowchart showing a manufacturing method of the light emitting unit provided in the image display element shown in Figure 1

[0017] Figure 7 Figure 6 is a cross-sectional view showing a manufacturing step of the light emitting unit corresponding to the flowchart shown in

[0018] Figure 8 is a partial cross-sectional view of an image display element according to a second embodiment of the present application.

[0019] Figure 9 is a partial cross-sectional view of an image display element according to a third embodiment of the present application.

[0020] Figure 10 is a flowchart showing a manufacturing method of the light emitting unit provided in the image display element shown in Figure 9

[0021] Figure 11 Figure 10 is a cross-sectional view showing a manufacturing step of the light emitting unit corresponding to the flowchart shown in

[0022] Figure 12 is a partial plan view of a light emitting unit provided in an image display element according to a fourth embodiment of the present application.

[0023] ​​​​​​​​Figure 13 is Figure 12 is a partial cross-sectional view of the manufacturing process of the light emitting unit shown in

[0024] Figure 14 is a partial cross-sectional view of the light emitting unit provided in the image display element according to the fifth embodiment of the present application.

[0025] Figure 15 is a partial cross-sectional view of the light emitting unit provided in the image display element according to the sixth embodiment of the present application.

[0026] Figure 16 is a flowchart illustrating the manufacturing method of the light emitting unit provided in the image display element according to the seventh embodiment of the present application.

[0027] Figure 17 is a partial cross-sectional view of the light emitting unit provided in the image display element according to the seventh embodiment of the present application. DETAILED DESCRIPTION

[0028] [First Embodiment]

[0029] Hereinafter, one embodiment of the image display element according to the present application will be described in detail.

[0030] (1) Configuration of Image Display Element

[0031] Figure 1 is a plan view of the image display element 3 according to the present embodiment. Figure 2 is an exploded perspective view illustrating the configuration of the image display element 3 within the region A shown in Figure 1 . In addition, the number of each constituent element is not limited to the number illustrated.

[0032] The image display element 3 is an image display element mounting a micro LED unit. Therefore, as shown in Figure 2 , the image display element 3 includes a light emitting unit 200 in which a plurality of micro LED chips (light emitting elements 100) are arranged in an array, and a drive circuit substrate 50 which is disposed in opposition to the light emitting unit 200 and serves to drive the plurality of light emitting elements 100.

[0033] In Figure 1In the plan view, the image display element 3 has a pixel region 1 provided in the center and a connection region 2 provided outside the pixel region 1. In the pixel region 1, a plurality of light emitting elements 100 are arranged in an array, and an anode electrode 51 (first driving electrode) is provided on the surface of the driving circuit substrate 50 opposite to the light emitting unit 200, and the anode electrode 51 is connected to the P electrode 30 (first electrode) provided in each light emitting element 100. In the connection region 2, a common second electrode 32 (N electrode) common to the plurality of light emitting elements 100 is arranged, and a cathode electrode 52 (second driving electrode) is provided on the opposite surface of the driving circuit substrate 50 opposite to the light emitting unit 200, and the cathode electrode 52 is connected to the common second electrode 32.

[0034] Further, the image display element 3 of the present embodiment has a plurality of mesa shapes 113 formed in the pixel region 1 and a step portion 213 formed in the connection region 2 in the layered structure of the semiconductor layer 13 constituting the light emitting unit 200. Then, as will be described later in detail, each of the plurality of mesa shapes 113 constitutes a light emitting element 100, and the P electrode 30 is formed on each mesa shape. On the other hand, the common second electrode 32 is formed on the step portion 213. In addition, the wiring layer 31 connected to the second conductive layer 10 (N-type layer) of the semiconductor layer 13 is provided so as to extend between the mesa shapes 113, and the wiring layer 31 is connected to the common second electrode 32.

[0035] Further, in the image display element 3, as shown in Figure 1 A mark region 4 is provided outside the connection region 2. The mark region 4 is, for example, a mark for alignment when the light emitting element 100 and the driving circuit substrate 50 are attached, and can be a mark for showing the coordinates of the plurality of arrays of the light emitting element 100.

[0036] The image display element 3 is configured such that the light emitted from the light emitting element 100 is emitted to the side opposite to the driving circuit substrate 50. Further, a wavelength conversion layer, a light diffusion layer, a color filter, or the like can be provided on the light emission side, but since it is not directly related to one embodiment of the present application, the description thereof is omitted and not shown.

[0037] Hereinafter, the light emitting unit 200 and the driving circuit substrate 50 will be described in detail.

[0038] (2) Light Emitting Unit

[0039] Figure 3 and Figure 4 is Figure 1 and Figure 2 the cross-sectional view of the cross-sectional line B-B' shown in Figure 3 shows the cross section of the pixel region 1, Figure 4 shows the cross section of the connection region 2. Further, for the sake of convenience in description, inFigure 3 as well as Figure 4 The diagram of the drive circuit board 50 is omitted.

[0040] As described above, the light-emitting unit 200 has a semiconductor layer 13 in the pixel region 1 and the connection region 2, in which a second conductive layer 10, a light-emitting layer 11 and a first conductive layer 12 are stacked.

[0041] <Semiconductor layer 13>

[0042] The semiconductor layer 13 is formed by stacking a second conductive layer 10, a light-emitting layer 11, and a first conductive layer 12.

[0043] exist Figure 3 The pixel region 1 shown has multiple mesa shapes, which retain a portion of the second conductive layer 10 along its thickness direction and divide the semiconductor layer 13 into segments for each light-emitting element 100. Specifically, the second conductive layer 10 is composed of two regions along its thickness direction, with the light-emitting region 10a continuously connected across the entire pixel region 1. On the other hand, another region 10b adjacent to the light-emitting region 10a is configured as multiple mesa shapes 113. The mesa shapes 113 are spaced apart from each other and form an array.

[0044] P electrodes 30 are connected to the first conductive layer 12 of each platform shape 113 via P contact film 14.

[0045] The semiconductor layer 13 is made of a nitride semiconductor such as GaN. Specifically, the second conductive layer 10 can be an N-type layer, and can be an N-type layer composed of a known multilayer structure. The light-emitting layer 11 includes a multi-quantum-well layer composed of an InGaN layer or a GaN layer. The first conductive layer 12 can be a P-type layer, and can be a P-type layer composed of a known multilayer structure.

[0046] Each mesa shape 113 is covered by a protective film 18 except for the connection portion in the P electrode 30 that is connected to the anode electrode 51. Specifically, a protective film 18 made of an insulating material is formed on the side surfaces of the mesa shape 113 extending along the layer thickness direction and at the ends of the mesa shape 113 on the side of the first conductive layer 12. On the other hand, as Figure 3 As shown, no protective film 18 is formed on the surface of the region 10a on the light-emitting side of the second conductive layer 10 located between two adjacent platform shapes 113.

[0047] exist Figure 4The step portion 213 provided in the connection region 2 is formed so as to leave a part of the second conductive layer 10 in the layer thickness direction, and is separated from the mesa shape 113 by the groove 61 formed in the semiconductor layer 13. In general, the layer stack structure constituting the step portion 213 is the same as the layer stack structure constituting the mesa shape 113. In the connection region 2, the region 10a of the second conductive layer 10 on the light exit side of the above-described pixel region 1 is continuous, and the bottom surface of the groove 61 is constituted by the surface of the region 10a on the light exit side. The bottom surface of the groove 61 and the surface of the region 10a on the light exit side are at the same height (position) in the layer thickness direction. In general, the length in the layer stack (layer thickness) direction of the step portion 213 (the height of the step portion 213) and the length in the layer stack (layer thickness) direction of the mesa shape 113 (the height of the mesa shape 113) are equal.

[0048] The step portion 213 is elongated along the end edge of the pixel region 1, and the length in the length direction is substantially the same as the length of the end edge of the quadrangular pixel region 1 when viewed from above. The groove 61 is also provided along the end edge of the pixel region 1.

[0049] The common second electrode 32 is formed on the first conductive layer 12 of the step portion 213. In addition, the contact film 15 is provided between the first conductive layer 12 and the common second electrode 32, and on the side surface of the step portion 213. The contact film 15 is a film formed of the same material as the P contact film 14 formed under the P electrode 30 and by the same process. In addition, the contact film 15 is not necessary for the common second electrode 32, but the contact film 15 is preferably formed from the viewpoint of improving the adhesion of the common second electrode 32 to the first conductive layer 12, and the like.

[0050] The upper surface of the step portion 213 other than the contact film 15 and the side surface are covered with the protective film 18. The protective film 18 is constituted by the same material as the above-described protective film 18. Specifically, SiO2, SiN, or the like.

[0051]

[0052] As shown in FIG. 1, the P electrode 30 is formed in the pixel region 1. Figure 1 and Figure 2 As shown in FIG. 1, the size of the P electrode 30 is smaller than the upper surface of each mesa shape 113 when viewed from above.

[0053] <Common Second Electrode 32>

[0054] As shown in FIG. 1, the P electrode 30 is formed in the pixel region 1. Figure 1 and Figure 2As shown, the common electrode 32 is formed in a strip shape on the upper surface of the step portion 213 in a smaller size than the upper surface when viewed from above. In addition, the size of the common second electrode 32 is larger than the size of the P electrode 30 when viewed from above. Due to the large size, alignment with the cathode electrode 52 of the drive circuit substrate 50 is easy. The common second electrode 32 is connected to the wiring layer 31 at one place. In other words, one common second electrode 32 is provided with one wiring layer 31. However, the present embodiment is not limited thereto, and a plurality of wiring layers 31 can be provided for one common second electrode 32. In addition, the size of the common second electrode 32 can be larger than the size of the upper surface of the step portion 213. For example, the common second electrode 32 can be provided in a manner of covering the step portion 213.

[0055] Here, the common second electrode 32 and the P electrode 30 are at the same height (position) in the layer thickness direction. That is, the position of the connection surface of the common second electrode 32 connected to the second drive electrode and the position of the connection surface of the P electrode 30 connected to the first drive electrode are in the same plane. In other words, the mesa shape 113 and the step portion 213 have the same height (layer thickness). By providing the common second electrode 32 and the P electrode 30 at the same height, it is possible to prevent poor contact with the electrode on the drive circuit substrate side.

[0056] <The wiring layer 31>

[0057] In the pixel region 1, the wiring layer 31 is provided so as to extend between the mesa shapes 113 to the end edge of the pixel region 1. Further, the wiring layer 31 extends from the end edge of the pixel region 1 along the groove 61 into the connection region 2, and is provided so as to extend in a manner of rising from the side surface of the step portion 213, and is connected to the common second electrode 32 above the step portion 213.

[0058] Here, as shown in Figs. 1 and 2, the plurality of mesa shapes 113 arranged in an array are arranged at equal intervals in the row direction and at equal intervals in the column direction. Therefore, as shown in Figs. 1 and 2, the wiring layer 31 is provided so as to extend in the row direction and in the column direction. In other words, the wiring layer 31 is formed in a lattice shape when viewed from above. In addition, the present embodiment is not limited to the manner of the wiring layer 31, and the mesa shapes can be arranged in a staggered manner, and the wiring layer 31 can be arranged in either one of the row direction and the column direction, as described in the embodiments described later. Figure 1 Figure 2 Here, as shown in Figs. 1 and 2, the plurality of mesa shapes 113 arranged in an array are arranged at equal intervals in the row direction and at equal intervals in the column direction. Therefore, as shown in Figs. 1 and 2, the wiring layer 31 is provided so as to extend in the row direction and in the column direction. In other words, the wiring layer 31 is formed in a lattice shape when viewed from above. In addition, the present embodiment is not limited to the manner of the wiring layer 31, and the mesa shapes can be arranged in a staggered manner, and the wiring layer 31 can be arranged in either one of the row direction and the column direction, as described in the embodiments described later. Figure 1 Figure 2 Here, as shown in Figs. 1 and 2, the plurality of mesa shapes 113 arranged in an array are arranged at equal intervals in the row direction and at equal intervals in the column direction. Therefore, as shown in Figs. 1 and 2, the wiring layer 31 is provided so as to extend in the row direction and in the column direction. In other words, the wiring layer 31 is formed in a lattice shape when viewed from above. In addition, the present embodiment is not limited to the manner of the wiring layer 31, and the mesa shapes can be arranged in a staggered manner, and the wiring layer 31 can be arranged in either one of the row direction and the column direction, as described in the embodiments described later.

[0059] Here, as shown in Figs. 1 and 2, the plurality of mesa shapes 113 arranged in an array are arranged at equal intervals in the row direction and at equal intervals in the column direction. Therefore, as shown in Figs. 1 and 2, the wiring layer 31 is provided so as to extend in the row direction and in the column direction. In other words, the wiring layer 31 is formed in a lattice shape when viewed from above. In addition, the present embodiment is not limited to the manner of the wiring layer 31, and the mesa shapes can be arranged in a staggered manner, and the wiring layer 31 can be arranged in either one of the row direction and the column direction, as described in the embodiments described later. Figure 3 Figure 4 ​​​As shown, the wiring layer 31 is connected to a portion of the second conductive layer 10. Specifically, the wiring layer 31 is connected to the surface of the region 10a of the light-exit side of the second conductive layer 10. The wiring layer 31 is composed of the same conductive material as the common second electrode 32. Thus, the wiring layer 31 is electrically connected to the second conductive layer 10, and the current from the P electrode 30 connected to the anode electrode 51 of the drive circuit substrate 50 Figure 2 ) passes through the region 10a of the light-exit side of the second conductive layer 10 and the wiring layer 31 of the mesa shape 113, and reaches the common second electrode 32. In this way, in the present embodiment, even in the configuration in which the common second electrode is provided outside the array, the wiring layer 31 contributes to the reduction in resistance, and the light source quality can be improved compared to the configuration in which the wiring layer 31 is not provided. In addition, by the wiring layer 31 and the common second electrode 32 being composed of the same conductive material, the advantage is that they can be formed at the same time, and the process can be made simpler. Furthermore, the wiring layer 31 is provided on the protective film 18 disposed on the side surface of the step portion 213.

[0060] Here, the P electrode 30, the common second electrode 32, and the wiring layer 31 can be composed of the same conductive material. For example, in addition to being composed of Au (gold), if the wiring layer 31 is formed of a material such as Al (aluminum) or Ag (silver) that has a higher light reflectance than Au (gold), the light extraction efficiency of the light emitting unit 200 can be further improved.

[0061] As shown in FIG. 6, the wiring layer 31 is connected to a portion of the second conductive layer 10. Specifically, the wiring layer 31 is connected to the surface of the region 10a of the light-exit side of the second conductive layer 10. The wiring layer 31 is composed of the same conductive material as the common second electrode 32. Thus, the wiring layer 31 is electrically connected to the second conductive layer 10, and the current from the P electrode 30 connected to the anode electrode 51 of the drive circuit substrate 50 Figure 3 As shown, the layer thickness of the wiring layer 31 is thinner than the layer thickness of the mesa shape 113. In other words, the surface of the wiring layer 31 opposite the surface that is in contact with the surface of the region 10a of the light-exit side of the second conductive layer 10 (hereinafter referred to as the drive circuit substrate side surface) is located lower than the upper surface of the mesa shape 113 toward the light-exit side. In the present embodiment, the layer thickness of the wiring layer 31 is thinner than the layer thickness of the region 10b of the second conductive layer 10 that is composed in the mesa shape 113. Furthermore, as shown, the drive circuit substrate side surface of the wiring layer 31 between the mesa shapes 113 is flat. In other words, in the element separation groove 60 between the adjacent mesa shapes 113, although the depth of the element separation groove 60 is made shallower by disposing the wiring layer 31 on the bottom surface of the element separation groove 60 (the surface of the region 10a of the light-exit side of the second conductive layer 10 on the drive circuit substrate 50 side), it remains between the mesa shapes 113. Figure 3

[0062] The protective film 18 is provided on the wiring layer 31. The protective film 18 can be composed of the same material as the protective film 18 described above.

[0063] ​As described above, in the light-emitting unit 200 of this embodiment, the wiring layer 31 disposed between the mesa shapes 113 helps to reduce resistance, and good light source quality can be achieved even if the common second electrode 32 is placed outside the array.

[0064] Figure 5 It shows Figure 3 and Figure 4 The diagram shows a cross-section of the light-emitting unit 200 and a cross-section of the driving circuit substrate 50. As described above, the upper surfaces of the common second electrode 32 and the P electrode 30 of the light-emitting unit 200 are at the same height (position) along the layer thickness direction. Therefore, good contact between the anode electrode 51 and the cathode electrode 52 of the driving circuit substrate can be achieved.

[0065] (3) Drive circuit board

[0066] like Figure 2 As shown, an anode electrode 51 and a cathode electrode 52 are provided on one surface of the driving circuit board 50. The anode electrode 51 corresponds to the P electrode 30 on each mesa shape and is arranged in an array in the central pixel region. On the other hand, the cathode electrode 52 is provided opposite to the common second electrode 32. Furthermore, known configurations can be used for the specific configuration of the driving circuit board 50 other than those described here.

[0067] (4) Manufacturing method of light-emitting unit 200

[0068] Next, use Figure 6 and Figure 7 The manufacturing method of the light-emitting unit 200 is explained. Figure 6 This is a flowchart illustrating the manufacturing process of the light-emitting unit 200. Figure 7 This is a cross-sectional view showing the manufacturing process of the light-emitting unit 200.

[0069] First, a growth substrate 9 made of sapphire, SiC, or Si is prepared, and a semiconductor layer such as GaN is grown on the growth substrate 9 using an MOCVD device. Figure 6 Step S1 Figure 7 (a) Specifically, firstly, a second conductive layer 10, which is an N-type layer, is grown; then, a light-emitting layer 11 and a first conductive layer 12, which is a P-type layer, are grown. The thickness of the second conductive layer 10 is typically 10 μm or less, and particularly preferably 3 μm or more and 7 μm or less. The thickness of the light-emitting layer 11 is typically 10 nm or less, and particularly preferably 50 nm or more and 100 nm or less. The thickness of the first conductive layer 12 is typically 50 nm or more and 1000 nm or less, and particularly preferably 100 nm or more and 300 nm or less.

[0070] Next, as Figure 7As shown in (b), contact films (P contact film 14, contact film 15) are formed on the first conductive layer 12. Figure 6 Step S2). The P-contact film 14 formed on the upper surface of the portion that subsequently becomes the mesa shape 113 is preferably made of a material with low contact resistance to the first conductive layer 12 and high light reflectivity at the interface with the semiconductor layer 13. Metals such as Pd (palladium) and Ni (nickel) are preferred. The film thickness of the P-contact film 14 is preferably 10 nm or more and 500 nm or less. On the other hand, for the contact film 15 formed on the upper surface of the portion that subsequently becomes the step portion 213, palladium (Pd) or Ni (nickel) is also deposited with a film thickness of approximately 500 nm to 1000 nm. Figure 7 (b)

[0071] Next, as Figure 7 As shown in (c), in pixel region 1, an element separation groove 60 is formed on the outer periphery of the light-emitting element 100. Simultaneously, a groove 61 is formed at the boundary between pixel region 1 and connecting region 2. Figure 6 Step S3). These grooves are formed by a conventional photolithography process, forming a resist pattern with openings in the component separation grooves 60 and 61, and etching the semiconductor layer 13 while retaining a portion of the second conductive layer 10 using a dry etching apparatus. During this etching, it is preferable to provide an inclination on the sidewalls of the component separation grooves 60 and 61, as the angle of inclination can further increase the light extraction efficiency. On the other hand, if the inclination is large, the area required for a mesa shape (= sub-pixel) becomes larger, making miniaturization impossible. Therefore, if the angle between the sidewalls of these grooves (the side of the mesa shape) and the surface of the semiconductor layer 13 is set to θ, then θ is set to a minimum of about 60 degrees, and preferably θ> about 70 degrees. In addition, it is preferable that the width of the groove 61 is equal to or greater than the width of the component separation groove 60. In this way, the mesa shape 113 and the step portion 213 are formed. In summary, the first conductive layer 12 of the platform shape 113 and the first conductive layer 12 of the step portion 213 are made of the same material, the light-emitting layer 11 of the platform shape 113 and the light-emitting layer 11 of the step portion 213 are made of the same material, and the second conductive layer 10 of the platform shape 113 and the second conductive layer 10 of the step portion 213 are made of the same material. Furthermore, the thickness of the first conductive layer 12 of the platform shape 113 is equal to the thickness of the first conductive layer 12 of the step portion 213, the thickness of the light-emitting layer 11 of the platform shape 113 is equal to the thickness of the light-emitting layer 11 of the step portion 213, and the thickness of the second conductive layer 10 of the platform shape 113 is equal to the thickness of the second conductive layer 10 of the step portion 213.

[0072] Next, a protective film 18 is formed. Thus, a protective film 18 is formed on the sides of the tabletop shape 113 and the sides of the step portion 213. Figure 6 Step S4 Figure 7(d).

[0073] Next, etching of the protective film 18 formed in step S3 is performed, and through-holes 24a, 24b, 24c are formed in a portion of the upper surface of the mesa shape 113, a portion of the upper surface of the step portion 213, the element separation groove 60, and the bottom surface of the groove 61 Figure 6 Step S5 of (f), Figure 7 (e).

[0074] Next, as shown in (f) of Figure 7 (f), a conductive material is deposited in the through-holes 24a, 24b, 24c to form the P electrode 30, the common second electrode 32, and the wiring layer 31 Figure 6 Step S6 of (f). The P electrode 30, the common second electrode 32, and the wiring layer 31 are formed of the same electrode material. Therefore, the P electrode 30, the common second electrode 32, and the wiring layer 31 can be formed at the same time. Further, in the through-hole 24a of the upper surface of the mesa shape 113 and the through-hole 24b of the upper surface of the step portion 213, there is the contact film (the P contact film 14, the contact film 15) formed first. The electrode is formed of Ti / Au, and since the NGaN and the Ti make contact, the NGaN-Ti-Au, the PGaN can be formed of PGaN-Pd-Ti-Au.

[0075] In Figure 7 The deposition method of the conductive material into the through-holes 24a, 24b, 24c shown in (f) uses evaporation, sputtering, or the like. The layer thickness of the P electrode 30, the common second electrode 32, and the wiring layer 31 needs to be thicker than the protective film 18 formed first. For example, when the film thickness of the protective film 18 is set to about 0.1 μm, it is formed to a thickness of about 0.2 μm to 0.8 μm.

[0076] Thus, according to the present embodiment, the P electrode 30, the common second electrode 32, and the wiring layer 31 can be formed by an easy process. As a comparative example, for example, a configuration in which the groove between the mesa shape and the mesa shape is completely filled with the material of the wiring layer is cited. In this comparative example, the groove needs to be filled, and the P electrode and the common second electrode cannot be formed at the same time, and the manufacturing process is complicated. In contrast, if the present embodiment is used, the P electrode and the common second electrode can be formed at the same time. The protective film is formed between the wiring layer 31 and the side surface of the semiconductor layer constituting the mesa shape 113.

[0077] Next, as shown in (g) of Figure 7 (g), the protective film 18 is formed except for the respective upper surfaces of the P electrode 30 and the common second electrode 32 and the vicinity thereof Figure 6 Step S7 of (g). The light emitting unit 200 is formed by the above process. Further, step S7 can be omitted.

[0078] (5) Manufacturing method of image display element 3

[0079] The image display element 3 of the present embodiment can be manufactured by bringing the anode electrode of the drive circuit substrate 50 into contact with the upper surface of the P electrode 30 of the light emitting unit 200 manufactured in the above manufacturing process, and bringing the cathode electrode of the drive circuit substrate 50 into contact with the upper surface of the common second electrode 32.

[0080] (6) Effects of the present embodiment

[0081] According to the image display element of the present embodiment, a common second electrode corresponding to the N electrode of the light emitting element is provided outside the pixel region in which the light emitting elements are arranged in an array. In the case where the N electrode is formed using a transparent electrode within the array, it can become a main cause of crosstalk, and is considered to have an influence on the quality of the light source. However, by adopting a configuration in which the cathode is connected outside the array as in the present embodiment, it is possible to achieve an improvement in the quality of the light source and an improvement in light extraction efficiency.

[0082] In addition, the wiring layer provided between the mesa shapes functions as a resistance reduction layer, and thus it is also possible to achieve an improvement in the quality of the light source.

[0083] In addition, in a method in which the spaces between the mesa structures are filled with a material having a high reflectance, the manufacturing method is complicated, and the light emitting element can be likely to be warped. However, according to the present embodiment, the wiring layer does not completely fill the grooves between the mesa shapes, and the surface of the wiring layer on the side of the drive circuit substrate is positioned lower than the upper surfaces of the mesa shapes (a position away from the drive circuit substrate). However, in the present embodiment, the wiring layer is provided only in a part of the element separation groove in contact with the bottom surface of the element separation groove, and thus compared to a configuration in which the grooves are completely filled, it is possible to achieve a suppression of warping of the light emitting element (light emitting unit). Furthermore, compared to the manufacturing process of a method in which the grooves between the mesa shapes are completely filled with the wiring layer material, it also has the advantage that the light emitting unit can be formed with an easy process.

[0084] [Second Embodiment]

[0085] Hereinafter, other embodiments of the present application will be described. Furthermore, in order to facilitate the description, members having the same function as the members described in the above embodiments are denoted by the same reference numerals, and will not be described again.

[0086] Figure 8 is a cross-sectional view of the image display element of the present embodiment. Figure 8 is a cross-sectional view corresponding to the Figure 5 of the first embodiment.

[0087] The present embodiment differs from the first embodiment in the shape of the wiring layer 31A. Specifically, in the present embodiment, the end portion 31a along the long side direction of the wiring layer 31A is raised along the wall surface of the side wall 113a of the mesa shape 113. Also, when the adjacent mesa shapes 113 and the wiring layer 31A disposed between the adjacent mesa shapes 113 are cut along the short side direction of the wiring layer 31A, the cut surface of the wiring layer 31A has a concave shape that is open toward the drive circuit substrate 50. Further, the wiring layer 31A is electrically connected to the upper surface of the region 10a of the second conductive layer 10 on the light exit side, with the protective film 18 provided between the end portion 31a and the side wall 113a of the mesa shape 113.

[0088] The upper surface of the wiring layer 31 of the first embodiment is flat. In contrast, the wiring layer 31A of the present embodiment has a concave profile in which the upper surface is protruded toward the upper surface of the mesa shape 113 at the end portion 31a adjacent to the mesa shape 113 and is recessed between the mesa shapes 113. In summary, the wiring layer 31A of the present embodiment does not completely fill the element separation grooves between the mesa shapes 113, but has a shape that covers the wall surface (also including the bottom surface) of the element separation grooves between the mesa shapes 113 with the undulation along the mesa shapes 113, like the mesa shapes.

[0089] The wiring layer 31A of the present embodiment can be manufactured using the manufacturing method described in the first embodiment.

[0090] The light emitting unit of the present embodiment also has the same effects as the first embodiment. Further, if the wiring layer 31A is formed using a material with high reflectivity, it is expected to improve the light extraction efficiency of the light emitting element. This is because the light that exits outside the mesa shape is reflected by the wiring layer 31A and rises upward.

[0091] 〔Third Embodiment〕

[0092] Hereinafter, other embodiments of the present application will be described. Further, for ease of explanation, components having the same function as those described in the above embodiments are denoted by the same reference numerals and will not be described again.

[0093] Figure 9 is a cross-sectional view of the image display element 3A of the present embodiment. Figure 9 is a corresponding cross-sectional view of the Figure 5 of the first embodiment.

[0094] The present embodiment differs from the first embodiment in the shape of the semiconductor layer 13 and the wiring layer 31B. Specifically, the light emitting unit 200A of the present embodiment has the mesa shape 113 that is not connected to each other by the second conductive layer 10 within the pixel region 1, and the semiconductor layer 13 is broken per light emitting element 100. In addition, within the connection region 2, the semiconductor layer 13 is completely broken in the layer thickness direction by the groove 61A, and the wiring layer 31B is connected to the side surface 10c of the second conductive layer 10 of the mesa shape 113. Hereinafter, the same reference numerals are given to the same components as those of the first embodiment, and the description thereof will be omitted. Figure 9 The present embodiment differs from the first embodiment in the shape of the semiconductor layer 13 and the wiring layer 31B. Specifically, the light emitting unit 200A of the present embodiment has the mesa shape 113 that is not connected to each other by the second conductive layer 10 within the pixel region 1, and the semiconductor layer 13 is broken per light emitting element 100. In addition, within the connection region 2, the semiconductor layer 13 is completely broken in the layer thickness direction by the groove 61A, and the wiring layer 31B is connected to the side surface 10c of the second conductive layer 10 of the mesa shape 113. Hereinafter, the same reference numerals are given to the same components as those of the first embodiment, and the description thereof will be omitted.

[0095] (1) Light emitting unit

[0096] The light emitting unit 200A differs from the first embodiment in that each mesa shape 113 is connected to each other by the region 10a (the region on the light exit side) of the second conductive layer 10 in the first embodiment, and the mesa shape 113 is structurally independent. This is because the element separation groove 60A formed in the semiconductor layer 13 within the pixel region 1 completely breaks the second conductive layer 10 in the layer thickness direction. Figure 3 Figure 5

[0097] In addition, the groove 61A between the connection region 2 and the pixel region 1 is different from the groove 61 of the first embodiment, and is provided to completely break the second conductive layer 10 in the layer thickness direction.

[0098] In the present embodiment, the wiring layer 31B is connected to the side surface 10c of the second conductive layer 10 of the mesa shape 113. As shown in FIG. 6B, the wiring layer 31B is provided in a state in which the side surface 10c of the second conductive layer 10 of the adjacent mesa shape 113 is connected to each other. Thereby, the conductive path is formed between the second conductive layer 10 and the wiring layer 31B. Figure 9 The wiring layer 31B is connected to the side surface 10c of the second conductive layer 10 of the mesa shape 113 in a length shorter than the full length of the side surface 10c. Specifically, the wiring layer 31B can be brought into contact with the full length of the side surface 10c of the second conductive layer 10 (from the lower end of the mesa shape 113) by about 8%, and preferably about 9%. In addition, if the process margin is also included, the wiring layer 31B can be brought into contact with the full length of the side surface 10c of the second conductive layer 10 (from the lower end of the mesa shape 113) by about 8%, and preferably about 9%. In other words, the wiring layer 31B is in contact with most of the full length of the side surface 10c of the second conductive layer 10. Thereby, it is possible to improve the light extraction efficiency of the light emitting element.

[0099]

[0100] ​​​Furthermore, in the region between the mesa shapes 113 in the wiring layer 31B, the thickness of the wiring layer 31B is thinner than the thickness of the semiconductor layer 13 constituting the mesa shape 113. Specifically, the thickness of the region between the mesa shapes 113 in the wiring layer 31B is the same as the thickness of the common second electrode 32.

[0101] In the image display element 3A according to this embodiment, the wiring layer 31B of the light-emitting unit 200A is connected to the side surface 10c of the second conductive layer 10 formed in the mesa shape 113. In this connection portion, the wiring layer 31B is electrically connected to the second conductive layer 10, and the current flowing into the mesa shape 113 from the P electrode 30 connected to the anode electrode 51 of the drive circuit board 50 passes through the wiring layer 31B from the side surface 10c of the second conductive layer 10 to the common second electrode 32. Thus, even in this embodiment, as in the first embodiment, in the configuration with a common second electrode outside the array, the wiring layer 31B helps to reduce resistance, and the light source quality can be improved compared to the configuration without the wiring layer 31B.

[0102] (2) Manufacturing method of light-emitting unit

[0103] Next, use Figure 10 as well as Figure 11 The manufacturing method of the light-emitting unit 200A is described. Figure 10 This is a flowchart showing the manufacturing process of the light-emitting unit 200A. Figure 11 This is a cross-sectional view showing the manufacturing process of the light-emitting unit 200A.

[0104] First, a growth substrate 9 made of sapphire, SiC, or Si as raw materials is prepared, and a semiconductor layer 13 such as GaN is grown on the growth substrate 9 using an MOCVD device. Figure 10 Step S11 Figure 11 (a)). This step S11 is the same as step S1 described in the first embodiment.

[0105] Next, contact films (P contact film 14, contact film 15) are formed on the first conductive layer 12. Figure 10 Step S12 Figure 11 (b)). Step S12 is the same as step S2 described in the first embodiment.

[0106] Next, as Figure 11 As shown in (c), in pixel region 1, an element separation groove 60 is formed on the outer periphery of the light-emitting element 100. Simultaneously, a groove 61 is formed at the boundary between pixel region 1 and connecting region 2. Figure 10S13). These grooves are formed by a general photolithography process of forming a resist pattern having an opening portion in the element separation groove 60 and the groove 61 and etching the semiconductor layer 13 using a dry etching device. At this time, the interface (not shown) to the growth substrate 9 is cut.

[0107] Next, a step of forming the protective film 18 (step S14), a step of forming a via (step S15), a step of forming the P electrode 30, the common second electrode 32, and the wiring layer 31B (step S16) are performed. These steps are the same as the steps S4, S5, and S6 of the first embodiment, so the description thereof is omitted. Figure 10 Figure 10 Next, a step of forming the protective film 18 (step S14), a step of forming a via (step S15), a step of forming the P electrode 30, the common second electrode 32, and the wiring layer 31B (step S16) are performed. These steps are the same as the steps S4, S5, and S6 of the first embodiment, so the description thereof is omitted. Figure 10 Figure 6 The steps S4, S5, and S6 of the first embodiment, so the description thereof is omitted.

[0108] Finally, similarly to the step S7 of the first embodiment, the protective film 18 (step S17) is formed except for the respective upper surfaces of the P electrode 30 and the common second electrode 32 and the vicinity thereof. In this way, the light emitting unit 200A is formed. Figure 6 Figure 10 〔Fourth Embodiment〕

[0109] Hereinafter, other embodiments of the present application will be described. Furthermore, in order to facilitate the description, members having the same function as those described in the above embodiments are denoted by the same reference numerals, and the description thereof will not be repeated.

[0110] is a partial plan view of the light emitting unit 200B of the image display element of the present embodiment.

[0111] is a partial sectional view showing the structure of the light emitting unit 200B of the present embodiment at a middle of the manufacturing process thereof. Figure 12 Figure 13 In the above first embodiment, as shown in

[0112] In the above first embodiment, as shown in Figure 1 Figure 2 In the above first embodiment, as shown in

[0113] In the above first embodiment, as shown in Figure 13 ​​​​As shown, the light emitting unit 200B of the present embodiment sometimes has a groove formed to a position deeper than the boundary of the lower end of the mesa shape. In this way, the shape of the element separation groove 60 formed between the mesa shape and the mesa shape sometimes becomes an undesirable shape that can affect the wiring layer 31 formed in a later process. Here, as in the first embodiment, in a case where the array of the plurality of light emitting elements 100 (the plurality of mesa shapes 113) is not staggered in pitch, the influence can possibly reach both the end portion on the one mesa shape 113 side and the end portion on the other mesa shape 113 side in the wiring layer 31 disposed between the adjacent mesa shapes 113. On the other hand, by being staggered and disposed in pitch as shown in Figure 12 , it is possible to limit the influence to only the single end portion of the wiring layer 31 in 1 / 2 pitch, respectively. Thereby, it is possible to reduce the occurrence of a disconnection or the like of the wiring layer 31.

[0114] [Sixth Embodiment]

[0115] In the above-described first embodiment, as shown in (e) of Figure 7 , the protective film 18 is present on the side surface of the step portion 213. However, one mode of the present application is not limited to this. Hereinafter, as a modification example of the first embodiment, the fifth embodiment will be described.

[0116] Figure 14 is a cross-sectional view showing a part of the manufacturing process of the light emitting unit of the present embodiment. Figure 14 (e)' of Figure 7 corresponds to (e) of Figure 14 (f)' of Figure 7 corresponds to (f) of Figure 14 The difference from the configuration of Figure 7 is that, in Figure 14 , the protective film 18 is not present on the side surface of the step portion 213. In summary, in the step S5 of forming the through hole, in the present embodiment, the protective film 18 is also removed from the side surface of the step portion 213.

[0117] Starting from the state shown in (e)' of Figure 14 , as the step S6, the P electrode 30, the common second electrode 32, and the wiring layer 31 are formed similarly to the step S6 of the first embodiment. Figure 6

[0118] According to the manufacturing method of the present embodiment, since the protective film of the connection region is removed, it is in a state of PN short circuit. The connection region is the N-side electrode of the light emitting element within the array, so there is no problem even in the short circuit state.

[0119] [Sixth Embodiment]

[0120] In the above-described third embodiment, as shown in​Figure 11 As shown in (e), a protective film 18 is provided on the side of the stepped portion 213. However, the present invention is not limited to this. Hereinafter, a sixth embodiment will be described as a variation of the third embodiment.

[0121] Figure 15 This is a cross-sectional view showing a portion of the manufacturing process of the light-emitting unit of this embodiment. Figure 15 (e)' corresponds to Figure 11 (e) Figure 15 (f)' corresponds to Figure 11 (f) Figure 15 and Figure 10 The difference in their composition lies in the fact that... Figure 14 In this embodiment, the protective film 18 is not present on the side of the step portion 213. In summary, in step S15 of forming the through hole, the protective film 18 is also removed from the side of the step portion 213.

[0122] from Figure 15 Starting from the state shown in (e)', as step S16, and in the third embodiment... Figure 10 Step S16 similarly forms the P electrode 30, the common second electrode 32, and the wiring layer 31B.

[0123] According to the manufacturing method of this embodiment, since the protective film of the connection region is removed, it is in a PN short-circuit state. The connection region is the N-side electrode of the light-emitting element in the array, so there is no problem even in the short-circuit state.

[0124] [Seventh Implementation Method]

[0125] In the third embodiment described above, such as Figure 11 As shown in (c), in the via formation step, the second conductive layer 10 between the mesa shapes 113 is completely removed, cutting down to the interface of the growth substrate 9. In summary, in the third embodiment, the mesa shapes 113 are not connected to each other through the second conductive layer 10. In this embodiment, the configuration in which the mesa shapes 113 are not connected to each other through the second conductive layer 10 is the same as in the third embodiment. On the other hand, the difference from the third embodiment is that, before the steps of forming the P electrode 30, the common second electrode 32, and the wiring layer 31B, the mesa shapes 113 are, as in the first embodiment, adjacent to each other through a portion of the second conductive layer 10. Then, in this state, after electrical connection with the drive circuit substrate 50, a portion of the connected second conductive layer 10 is removed, thereby achieving the same method as in the third embodiment. Hereinafter, as a variation of the third embodiment, the seventh embodiment will be described.

[0126] Figure 16 is a flowchart showing a manufacturing process of the light emitting unit 200 (the image display element 3) of the present embodiment, Figure 17 is a cross-sectional view of the light emitting unit 200 (the image display element 3) in the manufacturing process. Further, Figure 16 The steps of steps S21 to S26 of the present embodiment are the same as those of the first embodiment, and thus the description thereof is omitted. Figure 6 The steps S1 to S6 of the present embodiment are the same steps as those of the first embodiment, and thus the description thereof is omitted.

[0127] In the state where the P electrode 30, the common second electrode 32, and the wiring layer 31B are formed in step S26 of the present embodiment Figure 16 In the state of (e) of the present embodiment, the driving circuit substrate 50 is joined. Specifically, the anode electrode 51 of the driving circuit substrate 50 is brought into contact with the upper surface of the P electrode 30, and the cathode electrode 52 of the driving circuit substrate 50 is brought into contact with the upper surface of the common second electrode 32. Further, the gap formed by the joining is filled with the resin portion 70. Figure 17 The step S27 of the present embodiment, Figure 16 (f) of the present embodiment. Figure 17 Next, the growth substrate 9 is peeled off

[0128] The step S28 of the present embodiment, Figure 16 (g) of the present embodiment. Figure 17 Next, the second conductive layer 10 of the semiconductor layer 13 is cut from the side where the growth substrate 9 is peeled off, and the cutting is performed to a state where the adjacent mesa-shaped portions 113 are not connected by the second conductive layer 10 (step S29,

[0129] (h) of the present embodiment. Figure 17 By the above manufacturing process, the same configuration of the light emitting unit 200 as that of the third embodiment can be achieved.

[0130] [SUMMARY]

[0131]

[0132] ​The image display element according to the aspect 1 of the present application includes a light emitting unit in which a plurality of light emitting elements are arranged in an array in a pixel region, and a driving circuit substrate arranged opposite to the light emitting unit and configured to drive the plurality of light emitting elements. The light emitting unit includes a semiconductor layer in which a second conductive layer, a light emitting layer, and a first conductive layer are stacked in the pixel region and the connection region. The pixel region includes a plurality of mesa shapes in which the semiconductor layer is divided for each of the light emitting elements. The connection region includes a step portion separated from the mesa shapes by a groove formed in the semiconductor layer. The first conductive layer of each of the mesa shapes is connected to a first electrode connected to a first driving electrode arranged on an opposite surface of the driving circuit substrate opposite to the light emitting unit. The light emitting unit further includes a wiring layer between adjacent mesa shapes. The wiring layer is a wiring layer forming a conductive path between the second conductive layers of the mesa shapes. The wiring layer has a layer thickness thinner than a layer thickness of a portion of the semiconductor layer in the mesa shapes. The wiring layer is extended to the step portion and connected to a common second electrode arranged on the step portion. The common second electrode is connected to a second driving electrode arranged on the opposite surface of the driving circuit substrate.

[0133] According to the above configuration, an image display element having a micro light emitting element with high light source quality can be provided. Specifically, the configuration in which the region outside the array of light emitting elements in the pixel region (connection region) is connected to the cathode electrode, and there is no N electrode as a non-light emitting portion in the array, can improve the light source quality. In addition, by providing the wiring layer, resistance reduction can be achieved. In addition, by not adopting a configuration in which the wiring layer completely fills the space between the mesa shapes, warping of the light emitting unit can be reduced. In addition, by not adopting a configuration in which the wiring layer completely fills the space between the mesa shapes, the wiring layer can be formed with an easy process compared to a process of completely filling.

[0134] The image display element according to the aspect 2 of the present application can be configured such that, in the aspect 1 described above, in the pixel region, the plurality of mesa shapes divide the semiconductor layer for each of the light emitting elements while leaving a portion of the second conductive layer in a layer thickness direction, and in the connection region, the step portion separates the mesa shapes by the groove formed in the semiconductor layer while leaving a portion of the second conductive layer in the layer thickness direction, and the wiring layer is connected to the portion of the second conductive layer.

[0135] According to the above configuration, since the wiring layer is connected to the portion of the second conductive layer, a resistance reduction function is provided, and light source quality can be improved.

[0136] The image display element according to Mode 3 of the present application can also be configured such that, in the above Mode 1, the mesa shapes are not connected to each other by the second conductive layer within the pixel region, the semiconductor layer is broken per the light emitting element, the semiconductor layer is broken in the layer thickness direction by the groove within the connection region, and the wiring layer is connected to the side surface of the second conductive layer of the mesa shape.

[0137] According to the above configuration, since the wiring layer is connected to the side surface of the second conductive layer, a resistance reduction function is provided, and light source quality can be improved.

[0138] The image display element according to Mode 4 of the present application can also be configured such that, in the above Mode 1 or 2, the end portion of the wiring layer in the long side direction is raised along the wall surface of the side wall of the mesa shape, and when the adjacent mesa shapes and the wiring layer disposed between the adjacent mesa shapes are cut in the short side direction of the wiring layer, the cut surface of the wiring layer has a concave shape that opens toward the drive circuit substrate.

[0139] According to the above configuration, instead of completely filling the mesa shapes with the wiring layer, the wiring layer is provided in a shape that follows the undulations of the mesa shapes, and thus the process can be easily performed compared to a process of completely filling.

[0140] The image display element according to Mode 5 of the present application can also be configured such that, in the above Mode 2, a protective film is formed between the wiring layer and the semiconductor layer formed in the mesa shape.

[0141] According to the above configuration, a path is formed in which current flows from the surface of the portion of the second conductive layer of the mesa shape to the wiring layer.

[0142] The image display element according to Mode 6 of the present application can also be configured such that, in the above Modes 1 to 5, the first electrode and the common second electrode are formed of the same electrode material.

[0143] According to the above configuration, the manufacturing process can be easily implemented.

[0144] The image display element according to Mode 7 of the present application can also be configured such that, in the above Modes 1 to 6, the position of the connection surface of the first electrode that is connected to the first drive electrode and the position of the connection surface of the common second electrode that is connected to the second drive electrode are located on the same plane.

[0145] According to the above configuration, good contact between the first drive electrode and the second drive electrode of the drive circuit substrate can be achieved.

[0146] The image display element according to Mode 8 of the present application can be configured such that, in the above Modes 1 to 7, the layer thickness of the first conductive layer of the mesa shape and the first conductive layer of the step portion is equal, the layer thickness of the light emitting layer of the mesa shape and the light emitting layer of the step portion is equal, and the layer thickness of the second conductive layer of the mesa shape and the second conductive layer of the step portion is equal.

[0147] According to the above configuration, the layers constituting the mesa shape and the layers constituting the step portion can be formed within the same process, and an image display element with improved productivity can be achieved.

[0148] The image display element according to Mode 9 of the present application can be configured such that, in the above Modes 1 to 8, the wiring layer is constituted by a light reflecting material having higher reflectivity than gold (Au).

[0149] According to the above configuration, light extraction efficiency can be improved.

[0150] The image display element according to Mode 10 of the present application can be configured such that, in the above Modes 1 to 9, the array of the light emitting elements constituted in the pixel region is arranged at a certain pitch in m rows by n columns, and the arrangement of the odd-numbered columns in the row direction is shifted by the pitch x 1 / 2 with respect to the arrangement of the even-numbered columns.

[0151] According to the above configuration, the influence of the microgrooves (grooves provided between the mesa shapes and the mesa shapes) formed in the semiconductor layer on the formation of the wiring layer can be reduced.

[0152] The present application is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining the technical means disclosed in the respective embodiments are also included in the technical scope of the present application. Furthermore, new technical features can be formed by combining the technical means disclosed in the respective embodiments.

Claims

1. An image display element having a pixel region in which an image is displayed and a connection region provided outside the pixel region, the image display element characterized by comprising: a light emitting unit in which a plurality of light emitting elements are arranged in an array in the pixel region; and a drive circuit substrate arranged in opposition to the light emitting unit and used for driving the plurality of light emitting elements, in the light emitting unit, having a semiconductor layer in which a second conductive layer, a light emitting layer, and a first conductive layer are laminated in the pixel region and the connection region, having a plurality of mesa shapes in which the semiconductor layer is divided for each of the light emitting elements in the pixel region, and having a step portion in the connection region, the step portion being separated from the mesa shapes by a groove formed in the semiconductor layer, the first conductive layer of each of the mesa shapes having a first electrode connected thereto, the first electrode being connected to a first drive electrode provided on an opposing surface of the drive circuit substrate in opposition to the light emitting unit, the light emitting unit further having a wiring layer between adjacent mesa shapes, the wiring layer being a wiring layer that forms a conductive path between the second conductive layers of the mesa shapes, and the wiring layer being thinner in layer thickness than a portion of the semiconductor layer in which the mesa shapes are formed, the wiring layer being provided so as to extend over the step portion and be connected to a common second electrode provided over the step portion, the common second electrode being connected to a second drive electrode provided on the opposing surface of the drive circuit substrate, a protective film composed of an insulating material being formed on side surfaces of the mesa shapes and end portions of the first conductive layer of the mesa shapes, but not being formed on a surface of a region of the second conductive layer on a light exit side between adjacent mesa shapes, the wiring layer being formed on the protective film so as to be provided so as to extend in a manner of rising from the side surfaces of the mesa shapes and extend to the side surfaces of the mesa shapes, and the wiring layer being composed of a metal.

2. The image display element according to claim 1, characterized in that in the pixel region, the plurality of mesa shapes leave a portion of the second conductive layer in a layer thickness direction and divide the semiconductor layer for each of the light emitting elements, in the connection region, the step portion leaves a portion of the second conductive layer in a layer thickness direction and is separated from the mesa shapes by the groove formed in the semiconductor layer, and the wiring layer is connected to the portion of the second conductive layer.

3. The image display element according to claim 1, characterized in that in the pixel region, the mesa shapes are not connected to each other by the second conductive layer, and the semiconductor layer is disconnected for each of the light emitting elements, in the connection region, the semiconductor layer is disconnected in a layer thickness direction by the groove, and the wiring layer is connected to side surfaces of the second conductive layer of the mesa shapes.

4. The image display element according to claim 1, characterized in that The end portion of the wiring layer in the long side direction is lifted along the wall surface of the side wall of the mesa shape, When the adjacent mesa shapes and the wiring layer disposed between the adjacent mesa shapes are cut along the short side direction of the wiring layer, the cut surface of the wiring layer has a concave shape opening toward the drive circuit substrate.

5. The image display element according to claim 2, wherein A protective film is formed between the wiring layer and the semiconductor layer formed in the mesa shape.

6. The image display element according to claim 1, wherein The first electrode and the common second electrode are formed of the same electrode material.

7. The image display element according to claim 1, wherein The position of the connection surface of the first electrode connected to the first drive electrode and the position of the connection surface of the common second electrode connected to the second drive electrode are located on the same plane.

8. The image display element according to claim 1, wherein The layer thickness of the first conductive layer of the mesa shape and the first conductive layer of the step portion are equal, The layer thickness of the light emitting layer of the mesa shape and the light emitting layer of the step portion are equal, The layer thickness of the second conductive layer of the mesa shape and the second conductive layer of the step portion are equal.

9. The image display element according to claim 1, wherein The wiring layer is formed of a light reflecting material having a higher reflectivity than gold.

10. The image display element according to claim 1, wherein The array of the light emitting elements formed in the pixel region is arranged at a certain pitch in m rows x n columns, The arrangement of the odd-numbered columns in the row direction is shifted from the arrangement of the even-numbered columns by the pitch x 1 / 2.

Images