Semiconductor device and method for manufacturing the same

Abstract

The present invention relates to a semiconductor device and a preparation method thereof, comprising: providing a substrate of a first conductivity type; forming a doped region of a second conductivity type on the substrate, the doped region comprising adjacent first drift regions and second drift regions, the second conductivity type being opposite to the first conductivity type; forming a polysilicon film on the substrate, the polysilicon film covering the doped region; forming a photoresist pattern on the polysilicon film, the photoresist in the photoresist pattern covering the first drift region and the second drift region, and exposing the polysilicon film on a preset region of a body region between the first drift region and the second drift region; performing high-energy ion implantation, forming a body region of a first conductivity type in a preset region of the body region, the upper surface of the body region being flush with the upper surface of the doped region, and the lower surface of the body region being not higher than the lower surface of the doped region. The problem that the morphology of the photoresist changes due to the high temperature during the etching process, thereby affecting the effect of the high-energy ion implantation, is avoided.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for preparing the same. Background Art

[0002] For medium and low voltage 7V~45V NLDMOS semiconductor devices, the channel manufacturing process is basically the same, including: polysilicon growth, P-Body PHO (P-type body region photolithography layer), polysilicon etching, P-Body IMP (P-type body region injection), through the self-alignment process, the channel length of NLDMOS is greatly shortened and the channel length is kept stable. However, with the development of semiconductor technology, in order to further reduce Vt, avoid the triggering of parasitic NPN transistors, and improve the BV_on and TLP (Transmission line pulse) capabilities of NLDMOS, it is necessary to further deepen the injection depth of PB (P-Body, P-type body region). At this time, on the basis of the original process integration method "polysilicon growth + PB PHO + polysilicon etching + PB injection", it is necessary to increase the thickness of the photoresist in PBPHO to achieve the purpose of blocking high-energy ion injection and protecting the photoresist coverage area. However, there are the following problems in high-energy ion implantation: 1. The thickness of the photoresist commonly used in 193nm DUV lithography machines is less than 1.3um. At this time, the thickness of the photoresist is not enough to block the injection of high-energy ions, and the cost of thicker DUV photoresist is too high; 2. During the high-energy ion implantation process, the concentration of P-type implanted ions in the channel area of ​​the LDMOS device increases due to severe changes in the photoresist shrinkage morphology, resulting in a higher Vt; 3. When the pitch changes, the difference in Vt uniformity between LDMOS devices of different gears is quite obvious. Summary of the invention

[0003] Based on this, it is necessary to provide a semiconductor device and a method for manufacturing the same to address the above problems.

[0004] A method for preparing a semiconductor device, comprising:

[0005] providing a substrate of a first conductivity type;

[0006] forming a doped region of a second conductivity type on the substrate, the doped region comprising adjacent first drift regions and second drift regions, the second conductivity type being opposite to the first conductivity type;

[0007] forming a polysilicon film on the substrate, wherein the polysilicon film covers the doped region;

[0008] Forming a photoresist pattern on the polysilicon film, wherein the photoresist in the photoresist pattern covers the first drift region and the second drift region and exposes the polysilicon film on a preset area of ​​the body region between the first drift region and the second drift region;

[0009] High-energy ion implantation is performed to form a body region of the first conductivity type in a preset area of ​​the body region, wherein the upper surface of the body region is flush with the upper surface of the doped region, and the lower surface of the body region is not higher than the lower surface of the doped region.

[0010] In one embodiment, the step of forming a doped region of the second conductivity type on the substrate includes:

[0011] Performing second conductivity type ion implantation to form a doped region on the substrate;

[0012] The doped region includes a first drift region, a second drift region, and a body region preset area located between the first drift region and the second drift region.

[0013] In one embodiment, the step of forming a photoresist pattern on the polysilicon film includes:

[0014] An I-line photoresist pattern is formed on the polysilicon film, wherein the thickness of the photoresist pattern is greater than or equal to 1.6 microns and less than or equal to 2.5 microns.

[0015] In one embodiment, the step of performing high energy ion implantation includes:

[0016] High-energy ion implantation is performed with an implantation energy greater than or equal to 500 keV and less than or equal to 800 keV.

[0017] In one embodiment, the step of forming a photoresist pattern on the polysilicon film includes:

[0018] After adjusting the size deviation of the mask design pattern according to the length of the first drift region and the second drift region, a new mask design pattern is obtained, wherein the direction of the length is the direction of the connection between the first drift region and the second drift region;

[0019] Make a mask plate according to the new mask design pattern;

[0020] Using a mask to form a new photoresist pattern on the polysilicon film;

[0021] After the high-energy ion implantation step, the photoresists on the first drift region and the second drift region in the new photoresist pattern have the same inclination angle, where the inclination angle refers to the angle between the side wall and the bottom of the photoresist.

[0022] In one embodiment, after adjusting the size deviation of the mask design pattern according to the lengths of the first drift region and the second drift region, the step of obtaining a new mask design pattern is achieved by optical proximity effect correction.

[0023] In one embodiment, after the high energy ion implantation, the method further comprises:

[0024] An etching process is performed to remove the polysilicon film on the preset area of ​​the body region to obtain a polysilicon layer composed of the remaining polysilicon film.

[0025] In one embodiment, the length of the upper surface of the body region is greater than the length of the lower surface of the body region.

[0026] A semiconductor device is manufactured by any of the above-mentioned manufacturing methods.

[0027] In one embodiment, the semiconductor device includes a laterally diffused metal oxide semiconductor device.

[0028] The method for preparing the semiconductor device described above forms a photoresist on the polysilicon film to cover the polysilicon film on the first drift region and the second drift region, and after exposing the photoresist pattern of the polysilicon film on the preset area of ​​the body region between the first drift region and the second drift region, forms a body region of the first conductivity type in the preset area of ​​the body region by high-energy ion implantation. Compared with first etching away the polysilicon film on the preset area of ​​the body region and then performing high-energy ion implantation, the method avoids the thickness of the photoresist covering the first drift region and the second drift region from becoming thinner due to etching. Without affecting the blocking effect of the photoresist on the injected ions in the high-energy ion implantation, the thickness of the photoresist needs to be further increased, thereby increasing the preparation cost of the semiconductor device and increasing the process difficulty. At the same time, the method avoids the problem that the morphology of the photoresist changes due to the high temperature during the etching process, thereby affecting the high-energy ion implantation effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0030] Figure 1 is a flow chart of a method for preparing a semiconductor device in one embodiment;

[0031] Figure 2 is a cross-sectional schematic diagram of the semiconductor device after a doped region is formed on the substrate in Example 1;

[0032] Figure 3 for Figure 2 A cross-sectional schematic diagram of a semiconductor device after a corresponding photoresist pattern is formed;

[0033] Figure 4 for Figure 3 A cross-sectional schematic diagram of the semiconductor device after the corresponding body region is formed;

[0034] Figure 5 for Figure 4 A cross-sectional schematic diagram of the semiconductor device after the corresponding photoresist pattern layer is removed;

[0035] Figure 6 A side view of a photoresist pattern formed using a conventional mask in Example 2;

[0036] Figure 7 for Figure 6 A cross-sectional schematic diagram of the semiconductor device after the corresponding polysilicon layer is formed;

[0037] Figure 8 A side view of a photoresist pattern formed by using a mask plate obtained after adjusting the size deviation of the mask design pattern in Example 2;

[0038] Fig. 9 for Figure 8 A cross-sectional schematic diagram of the semiconductor device after the corresponding polysilicon layer is formed;

[0039] Fig.10 Schematic cross-sectional views of 16V, 18V, 24V, and 32V NLDMOS devices after etching to form polysilicon layers. DETAILED DESCRIPTION

[0040] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0042] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0043] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0044] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0045] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic diagrams of ideal embodiments (and intermediate structures) of the invention, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the invention.

[0046] In a typical method for preparing a semiconductor device, the steps for forming a body region are as follows: Step 1, polysilicon film growth: a polysilicon film is grown on a P-type substrate formed with two N-type drift regions. Step 2, forming a body region photoresist pattern: a body region photomask is used to form a photoresist pattern on the polysilicon film that covers the N-type drift region and exposes a preset region of the body region (the substrate between adjacent drift regions) between adjacent N-type drift regions, and the photoresist pattern is used to define the self-aligned injection position of the body region. Step 3, etching to form a polysilicon layer: after etching away the polysilicon film in the preset region of the body region exposed by the photoresist pattern, a polysilicon layer composed of the remaining polysilicon film is obtained. Step 4, body region injection: P-type ion injection is performed using the photoresist pattern and the polysilicon layer as a barrier layer to form a P-type body region in the region between adjacent drift regions.

[0047] In order to further reduce the Vt of semiconductor devices, avoid the triggering of parasitic NPN, and improve the BV_on and TLP capabilities of NLDMOS, it is necessary to deepen the injection depth of the body region. However, when using high-energy injection to increase the injection energy of the body region to deepen the injection depth of the body region, the high-energy injection ions will penetrate the photoresist pattern and the polysilicon layer and enter the N-type drift region, forming a P-type doped region between the N-type drift region and the polysilicon layer; and under high-energy ion injection, the photoresist in the photoresist pattern shrinks severely, the photoresist above the drift region near the body region becomes thinner, and the high-energy injection ions pass through the photoresist near the body region of the drift region and enter the substrate, which increases the length of the body region, thereby affecting the channel length of the semiconductor device.

[0048] See also Figure 1 , is a flow chart of a method for preparing a semiconductor device in one embodiment.

[0049] In order to solve the above problems, the present application provides a method for preparing a semiconductor device, such as Figure 1 As shown, the method includes:

[0050] S102, providing a substrate of a first conductivity type.

[0051] The substrate may be single crystal silicon, silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), germanium on insulator (GeOI), etc., with a first conductive type doped layer formed on the surface, or single crystal silicon, silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), germanium on insulator (GeOI), etc., doped with first conductive type impurities. As an example, in the present embodiment, the substrate is a P-type silicon substrate (P-sub), and its specific doping concentration is not limited by the present invention.

[0052] S104, forming a doped region of a second conductivity type on the substrate.

[0053] The doped region includes a first drift region and a second drift region adjacent to each other, and the second conductivity type is opposite to the first conductivity type; when the first conductivity type is P type, the second conductivity type is N type, and when the first conductivity type is N type, the second conductivity type is P type. In this embodiment, the first conductivity type is P type, and the second conductivity type is N type.

[0054] S106, forming a polysilicon film on the substrate, wherein the polysilicon film covers the doped region.

[0055] S108, forming a photoresist pattern on the polysilicon film.

[0056] The photoresist in the photoresist pattern covers the first drift region and the second drift region, and exposes the polysilicon film on a preset area of ​​the body region between the first drift region and the second drift region; that is, the photoresist covers the polysilicon film on the first drift region and the second drift region, and exposes the polysilicon film above the area between the first drift region and the second drift region.

[0057] S110, performing high energy ion implantation to form a body region of the first conductivity type in a preset area of ​​the body region.

[0058] The upper surface of the body region is flush with the upper surface of the doped region, and the lower surface of the body region is not higher than the lower surface of the doped region.

[0059] Specifically, high-energy ion implantation is performed on a substrate with a photoresist pattern formed on the surface, and doping ions of the first conductivity type are implanted into a region (preset region of the body region) between the first drift region and the second drift region on the substrate to form a body region connecting the first drift region and the second drift region, and the body region is a body region of the first conductivity type. The upper surface of the body region is flush with the upper surface of the doping region, and the lower surface of the body region is not higher than the lower surface of the doping region, that is, the upper surface of the body region is flush with the upper surface of the substrate, the lower surface of the body region is in contact with the substrate below the doping region, one side of the body region is in contact with the first drift region, and the other side of the body region is in contact with the second drift region.

[0060] In one embodiment, step S104 includes: performing second conductive type ion implantation to form a first drift region and a second drift region on the substrate, wherein the first drift region and the second drift region are separated by the substrate located between the first drift region and the second drift region, and at this time, a preset region of the body region that is subsequently formed is doped with the first conductive type and is part of the substrate.

[0061] See also Figure 2 , is a schematic cross-sectional view of the semiconductor device after the doped region is formed on the substrate in Example 1.

[0062] like Figure 2 In one embodiment, step S104 includes:

[0063] The second conductive type ion implantation is performed to form a doped region 200 on the substrate 100. The doped region 200 includes a first drift region 202, a second drift region 204, and a preset body region 206 located between the first drift region 202 and the second drift region 204. At this time, the preset body region 206 is a second conductive type region, and has the same concentration of doped ions of the second conductive type as those in the first drift region 202 and the second drift region 204. Compared with the body region preset area between the first drift region and the second drift region being the substrate, the present solution forms the doping region 200 by implantation, and the doping region 200 is divided into three parts: the first drift region 202, the second drift region 204, and the body region preset area 206 located between the first drift region 202 and the second drift region 204. This can avoid the problem that when different photoresists are used to form photoresist patterns, the alignment control capability of the two sides of the formed body region contacting the edges of the first drift region and the second drift region respectively becomes weak due to the different alignment accuracy of different photolithography machines forming the photoresist patterns. The following is an exemplary description using the doping region 200 divided into the first drift region 202, the second drift region 204, and the body region preset area 206 located between the first drift region 202 and the second drift region 204 as an example.

[0064] In one embodiment, step S108 includes:

[0065] An I-line photoresist pattern is formed on the polysilicon film, wherein the thickness of the photoresist pattern is greater than or equal to 1.6 microns and less than or equal to 2.5 microns.

[0066] See also Figure 3 ,for Figure 2 A schematic cross-sectional view of a semiconductor device after corresponding photoresist patterns are formed.

[0067] like Figure 3 After forming a polysilicon film 300 covering the doping region 200 on the substrate 100, a photoresist pattern 400 is formed on the polysilicon film 300, wherein the photoresist in the photoresist pattern 400 is located on the polysilicon film 300 covering the first drift region and the second drift region, and the polysilicon film 300 on the preset area 206 of the body region is exposed. Specifically, the steps of forming the photoresist pattern 400 include: a first step of coating a photoresist of a preset thickness on the surface of the polysilicon film 300, wherein the preset thickness refers to the thickness of the photoresist that can prevent high-energy ions in subsequent high-energy ion implantation from entering the doping region 200 located below the photoresist. A second step of exposing and developing the photoresist coated on the polysilicon film 300 using a body region mask, and finally obtaining a photoresist pattern 400 exposing the polysilicon film 300 on the preset area 206 of the body region.

[0068] In one embodiment, step S110 includes:

[0069] High-energy ion implantation is performed with an implantation energy greater than or equal to 500 keV and less than or equal to 800 keV.

[0070] See also Figure 4 ,for Figure 3 The cross-sectional schematic diagram of the semiconductor device after the corresponding body region is formed.

[0071] like Figure 4 , using the photoresist pattern 400 as a mask, high-energy ion implantation of the first conductivity type is performed, and the high-energy impurity ions enter the body region preset area 206 to form a body region 208 , and the bottom of the body region 208 is not higher than the bottom of the doped region 200 .

[0072] In one embodiment, the first conductivity type is P type, and the impurity ions implanted by the high-energy ion implantation include boron ions.

[0073] See also Figure 5 ,for Figure 4 The corresponding cross-sectional schematic diagram of the semiconductor device after the photoresist pattern layer is removed.

[0074] In one embodiment, step S110 further includes:

[0075] An etching process is performed to remove the polysilicon film on the preset area of ​​the body region to obtain a polysilicon layer composed of the remaining polysilicon film.

[0076] In one embodiment, after performing an etching process to remove the polysilicon film on the preset area of ​​the body region, the method further includes: removing the photoresist pattern on the surface of the substrate.

[0077] like Figure 5 After forming the body region 208, the polysilicon film 300 exposed by the photoresist pattern 400 is removed by an etching process to obtain a polysilicon layer 302 composed of the remaining polysilicon film 300. Then, the photoresist pattern 400 on the substrate 100 is removed by selecting a method commonly used by those skilled in the art to remove the photoresist pattern. By first forming the body region and then removing the polysilicon film on the body region exposed by the photoresist pattern 400, the etching process is avoided from affecting the thickness and morphology of the photoresist in the photoresist pattern when etching is performed first and then implanting.

[0078] See also Figure 6 , is a side view of a photoresist pattern formed using a conventional mask in Example 2. Figure 7 ,for Figure 6 The corresponding cross-sectional schematic diagram of the semiconductor device after the polysilicon layer is formed. Figure 8 , is a side view of a photoresist pattern formed by using a mask obtained after adjusting the size deviation of the mask design pattern in Example 2. Fig. 9 ,for Figure 8 The cross-sectional schematic diagram of the semiconductor device after the corresponding polysilicon layer is formed.

[0079] like Figure 6 , Figure 7A doping region 20 and a polysilicon film 30 covering the doping region 20 are formed on the substrate 10, wherein the doping region 20 includes a first doping region 201A, a first doping region 201B, a second doping region 203A, a second doping region 203B, a body region preset region 205A, a body region preset region 205B and a body region preset region 205C. The photoresist coated on the polysilicon film 30 is exposed and developed using an existing body region mask 40 to obtain a first photolithography pattern 50. The length D1 of the second doping region 203A is less than the length D2 of the first doping region 201B. With the first photoresist pattern 50 and the polysilicon film 30 as barrier layers, after high-energy ion implantation, a body region 207A is formed in the body region preset region 205A, a body region 207B is formed in the body region preset region 205B, and a body region 207C is formed in the body region preset region 205C. Then, the polysilicon film 30 not covered by the photoresist is etched away to obtain a polysilicon layer 301 composed of the remaining polysilicon film. Since the length D1 of the second doping region 203A is less than the length D2 of the first doping region 201B, during the high-energy ion implantation, the shrinkage amount of the photoresist 501 on the second drift region 203A is less than the shrinkage amount of the photoresist 503 on the first drift region 201B. After the high-energy ion implantation, the angle A between the sidewall and the bottom of the photoresist 501 is greater than the angle B between the sidewall and the bottom of the photoresist 503. After the first conductive type doping ions pass through the photoresist pattern 50 that has shrunk during the high-energy ion implantation, in the body region 207B, the length L1 of the first conductive type doping region formed under the photoresist 501 is less than the length L2 of the first conductive type doping region formed under the photoresist 503. The drift region sizes of NLDMOS devices at different voltage levels are different. The larger the withstand voltage, the larger the drift region size, and the longer the channel between the corresponding drift regions. That is, when the distance between adjacent drift regions is the same, the channel lengths between doped regions are different.

[0080] In one embodiment, step S108 includes:

[0081] The first step is to obtain a new mask design pattern after adjusting the size deviation of the mask design pattern according to the length of the first drift region and the second drift region, wherein the direction of the length is the connection direction of the first drift region and the second drift region. The second step is to make a mask plate according to the new mask design pattern. The third step is to use the mask plate to form a new photoresist pattern on the polysilicon film; wherein, after the high-energy ion implantation step, the inclination angles of the photoresists located on the first drift region and the second drift region in the new photoresist pattern are the same, and the inclination angle refers to the angle between the side wall and the bottom of the photoresist. By adjusting the size deviation of the mask design pattern by the length of the first drift region and the second drift region, the different shrinkage amounts of the photoresist caused by the different lengths of the drift regions can be eliminated, thereby solving the problem of forming body regions (channels of different lengths) of different lengths in the preset area of ​​the body region with the same length after high-energy ion implantation.

[0082] Specifically, see Figure 6 , Figure 8 , Fig. 9 In the first step, the length X1 of the first drift region 201A, the length X2 of the first drift region 201B, the length Y1 of the second drift region 203A, and the length Y2 of the second drift region 203B in the doping region 20 on the substrate 10 are obtained, and then the size deviations of the first figure 401, the second figure 403, the third figure 405, and the fourth figure 407 in the mask plate 40 in the mask design figure are adjusted according to the lengths X1, X2, Y1, and Y2, respectively, to obtain a new mask design figure. In the second step, a mask plate 60 is manufactured according to the new mask design figure, wherein the mask plate 60 includes a new first figure 601, a second figure 603, a third figure 605, and a fourth figure 607. In the third step, the photoresist coated on the polysilicon film 30 is exposed and developed using the mask plate 60 to obtain a second photoresist figure 70. Compared with the first photoresist figure 50, Figure 8 The photoresist between the dotted lines on the body region preset area 205A, the body region preset area 205B and the body region preset area 205C is the newly added photoresist. With the second photolithography pattern 70 and the polysilicon film 30 as the barrier layer, after high-energy ion implantation, the body region 209A is formed in the body region preset area 205A, the body region 209B is formed in the body region preset area 205B, and the body region 209C is formed in the body region preset area 205C. Then, after etching away the polysilicon film not covered by the photoresist, the polysilicon layer 303 composed of the remaining polysilicon film is obtained. At this time, the angle α between the side wall and the bottom of the photoresist 701 on the second drift region 203A is equal to the angle β between the side wall and the bottom of the photoresist 503 on the first drift region 201B.

[0083] Although the length D1 of the second doping region 203A is less than the length D2 of the first doping region 201B, during the high-energy ion implantation, the shrinkage amount of the photoresist 701 on the second drift region 203A is less than the shrinkage amount of the photoresist 703 on the first drift region 201B, but the size deviation added to the mask design pattern corresponding to the mask plate 60 has eliminated the influence of the different shrinkage amounts on the angle between the side wall and the bottom of the photoresist after the high-energy ion implantation. So that in the body region 209B, the length of the first conductive type doping region formed under the photoresist 901 is equal to the length of the first conductive type doping region formed under the photoresist 703. For NLDMOS devices of different voltage levels, although the sizes of the drift regions are different, when the distance between adjacent drift regions is the same, the channel length between the doping regions is also the same.

[0084] Specifically, assuming that the length of the first design pattern corresponding to the first drift region in the mask design pattern is M0, and the length of the second design pattern corresponding to the second drift region is N0. First, the length of the first drift region in the doped region on the substrate is obtained as M1, the length of the second drift region is obtained as N1, the length of the body region in the first drift region is obtained as M2, and the length of the body region in the second drift region is obtained as N2. Secondly, according to the length M0 of the first design pattern, the length N0 of the second design pattern, the length M1 of the first drift region, the length N1 of the second drift region, the length M2 of the body region in the first drift region, and the length N2 of the body region in the second drift region, the length of the first design pattern is adjusted to M and the length of the second design pattern is adjusted to N. For example, the difference between the length M2 of the body region in the first drift region, the length N2 of the body region in the second drift region and the preset value is added to the first design pattern and the second design pattern respectively to obtain the length M of the first design pattern and the length N of the body region in the second drift region; so that the length M of the body region in the first drift region and the length N of the body region in the second drift region are both preset values. Thirdly, a new mask design pattern is obtained with the length M of the first design pattern and the length N of the second design pattern, and then a new mask is manufactured according to the new mask design pattern. Thirdly, a photoresist pattern located on the polysilicon thin film is formed with the new mask, and at this time, the angle between the side wall and the bottom of the photoresist on the first drift region is equal to the angle between the side wall and the bottom of the photoresist on the second drift region.

[0085] See also Fig.10 , schematic cross-sectional views of 16V, 18V, 24V, and 32V NLDMOS devices after etching to form a polysilicon layer, respectively, wherein the spacing refers to the sum of the length of the drift region and the distance between adjacent drift regions. As can be seen from the figure, when the size deviation of the mask design pattern is not adjusted according to the length of the drift region, the size (Top CD) between the photoresists on adjacent drift regions increases with the increase of the length of the drift region (the voltage of the semiconductor device increases or decreases), that is, the channel length of the device increases with the increase of the length of the drift region. After adjusting the size deviation of the mask design pattern according to the length of the drift region, the size (Top CD) between the photoresists on adjacent drift regions is within a preset range and does not change with the change of the length of the drift region (the voltage of the semiconductor device changes), that is, the channel length of the device remains unchanged, and the angle between the side wall and the bottom of the photoresist on the drift region remains basically unchanged.

[0086] In one embodiment, after adjusting the size deviation of the mask design pattern according to the lengths of the first drift region and the second drift region, the step of obtaining a new mask design pattern is achieved by optical proximity effect correction.

[0087] In one embodiment, the length of the upper surface of the body region is greater than the length of the lower surface of the body region, that is, the body region is a structure that is wide at the top and narrow at the bottom.

[0088] A semiconductor device is manufactured by any of the above-mentioned manufacturing methods.

[0089] In one embodiment, the semiconductor device includes a laterally diffused metal oxide semiconductor device.

[0090] The method for preparing the semiconductor device described above forms a photoresist on the polysilicon film to cover the polysilicon film on the first drift region and the second drift region, and after exposing the photoresist pattern of the polysilicon film on the preset area of ​​the body region between the first drift region and the second drift region, forms a body region of the first conductivity type in the preset area of ​​the body region by high-energy ion implantation. Compared with first etching away the polysilicon film on the preset area of ​​the body region and then performing high-energy ion implantation, the method avoids the thickness of the photoresist covering the first drift region and the second drift region from becoming thinner due to etching. Without affecting the blocking effect of the photoresist on the injected ions in the high-energy ion implantation, the thickness of the photoresist needs to be further increased, thereby increasing the preparation cost of the semiconductor device and increasing the process difficulty. At the same time, the method avoids the problem that the morphology of the photoresist changes due to the high temperature during the etching process, thereby affecting the high-energy ion implantation effect.

[0091] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0092] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0093] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing a semiconductor device, characterized in that: include: providing a substrate of a first conductivity type; forming a doped region of a second conductivity type on the substrate, the doped region comprising a first drift region and a second drift region adjacent to each other, the second conductivity type being opposite to the first conductivity type; forming a polysilicon film on the substrate, wherein the polysilicon film covers the doped region; forming a photoresist pattern on the polysilicon film, wherein the photoresist in the photoresist pattern covers the first drift region and the second drift region, and exposes the polysilicon film on a preset area of ​​the body region between the first drift region and the second drift region; Performing high-energy ion implantation to form a body region of the first conductivity type in a preset region of the body region, wherein the upper surface of the body region is flush with the upper surface of the doped region, and the lower surface of the body region is not higher than the lower surface of the doped region; After the high energy ion implantation, the method further comprises: An etching process is performed to remove the polysilicon film on the preset area of ​​the body region to obtain a polysilicon layer composed of the remaining polysilicon film.

2. The preparation method according to claim 1, characterized in that: The step of forming a doped region of a second conductivity type on the substrate comprises: Performing second conductivity type ion implantation to form a doped region on the substrate; The doped region includes a first drift region, a second drift region, and a preset body region located between the first drift region and the second drift region.

3. The preparation method according to claim 1, characterized in that: The step of forming a photoresist pattern on the polysilicon film comprises: An I-line photoresist pattern is formed on the polysilicon film, wherein the thickness of the photoresist pattern is greater than or equal to 1.6 microns and less than or equal to 2.5 microns.

4. The preparation method according to claim 1, characterized in that: The step of performing high energy ion implantation comprises: High-energy ion implantation is performed with an implantation energy greater than or equal to 500 keV and less than or equal to 800 keV.

5. The preparation method according to claim 1, characterized in that: The step of forming a photoresist pattern on the polysilicon film comprises: After adjusting the size deviation of the mask design pattern according to the length of the first drift region and the second drift region, a new mask design pattern is obtained, wherein the direction of the length is the connection direction of the first drift region and the second drift region; Making a mask according to the new mask design pattern; Using the mask to form a new photoresist pattern on the polysilicon film; Wherein, after the high-energy ion implantation step, the photoresists located on the first drift region and the second drift region in the new photoresist pattern have the same inclination angle, and the inclination angle refers to the angle between the side wall and the bottom of the photoresist.

6. The preparation method according to claim 5, characterized in that: The step of obtaining a new mask design pattern after adjusting the size deviation of the mask design pattern according to the lengths of the first drift region and the second drift region is achieved by optical proximity effect correction.

7. The preparation method according to claim 1, characterized in that: The step of forming a doped region of a second conductivity type on the substrate comprises: Performing second conductivity type ion implantation to form a first drift region and a second drift region on the substrate; The first drift region and the second drift region are separated by a substrate located between the first drift region and the second drift region.

8. The preparation method according to claim 5, characterized in that: The length of the upper surface of the body region is greater than the length of the lower surface of the body region.

9. A semiconductor device, characterized in that: The semiconductor device is manufactured by the manufacturing method according to any one of claims 1 to 8.

10. The semiconductor device according to claim 9, characterized in that The semiconductor device comprises a laterally diffused metal oxide semiconductor device.

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