A wafer cutting process

Abstract

The present invention discloses a wafer cutting process, which includes the following steps: S1. Cut a wide and shallow groove A at the scribe line on the front side of the wafer, and grind the back side of the wafer to thin the wafer; S2. Flip the wafer with the front side facing up and place it in the first carrier; S3. Flip the wafer with the back side facing up and place it in the second carrier, and seal the SOG on the outer circle of the side wall of the wafer; S4. Cut a narrow and deep groove B at the position corresponding to the scribe line on the back side of the wafer, and finally perform particle implantation on the back side and back side metal process; S5. Use a crystal ring cutting machine to cut the SOG at the edge of the wafer, and use a dicing and film pulling machine to disconnect the unbroken part of the wafer. The process of the present invention reduces the steps of carrier bonding and debonding, and at the same time uses the groove on the front side to cut the scribe line on the back side, without double-sided exposure. Finally, the dicing technology is used to disconnect the connection between the two grooves on both sides, quickly complete the wafer cutting, improve the efficiency of wafer cutting, and reduce the cost of wafer cutting.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer processing, and specifically to a wafer cutting process. Background Art

[0002] In the semiconductor manufacturing process, it is necessary to cut a wafer into individual chips (dies), and then make these chips into different semiconductor packaging structures. With the development of the semiconductor industry, in order to meet the requirements of miniaturization, multi-functionality, and intelligence of electronic devices, the demand for ultra-thin wafers is increasing.

[0003] The wafer cutting methods in the prior art generally include mainly the back water jet semi-penetrating and die splitting process and the laser process. When the current process operates on ultra-thin wafers, the wafer is prone to warping after grinding, and the wafer is prone to cracking during subsequent processing operations. Especially when using a traditional diamond knife to cut ultra-thin and low dielectric constant wafers, metal layer delamination is likely to occur. Although the laser cutting process produces neat crack edges and is not likely to cause wafer cracking, the cutting speed of the laser for Si wafers and metals is slow, and the production efficiency is low. At the same time, if there is metal on the back of the wafer, the front pattern cannot be seen during laser cutting, so double-sided exposure must be performed, increasing the process steps and production costs. Summary of the Invention

[0004] To solve the deficiencies mentioned in the above background art, the purpose of the present invention is to provide a wafer cutting process, which reduces the steps of carrier bonding and debonding, and at the same time uses the grooves on the front side to cut the back cutting channels, eliminating the need for double-sided exposure. Finally, the die splitting technology is used to disconnect the connection between the two-sided grooves, quickly completing the wafer cutting, improving the efficiency of wafer cutting, and reducing the cost of wafer cutting.

[0005] The purpose of the present invention can be achieved by the following technical solutions:

[0006] A wafer cutting process includes the following steps:

[0007] S1. Cut a wide and shallow groove A at the front cutting channel of the wafer that has completed the front process, and then adhere a grinding tape to the front of the wafer, and grind the back of the wafer to reduce the wafer to the required thickness;

[0008] S2. Attach the back of the thinned wafer to the groove of the first carrier, and then turn over the grinding tape, the wafer, and the first carrier as a whole. After removing the grinding tape, place the wafer face up into the first carrier;

[0009] S3. Attach the front of the wafer to the groove of the second carrier, and then turn over the first carrier, the wafer, and the second carrier as a whole. After removing the first carrier, place the wafer face up into the second carrier, and seal the outer circle of the wafer side wall by spin coating a medium SOG;

[0010] S4. Cut and form a narrow and deep groove B at the corresponding scribe line on the back side of the wafer, and finally perform backside particle implantation and backside metal process.

[0011] S5. Use a wafer outer ring cutter to cut along the SOG at the edge of the wafer, then attach the back side of the wafer to the cutting die frame, flip the cutting die frame, the wafer and the carrier plate as a whole, remove the carrier plate on the front side, and use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

[0012] Further preferably, the width of groove A is 30 - 60 μm, and the depth is 10 - 20 μm.

[0013] Further preferably, the thickness of the wafer after backside thinning is 90 - 120 μm.

[0014] Further preferably, the width of groove B is 10 - 20 μm, and the depth is 50 - 60 μm.

[0015] Further preferably, when the initial thickness of the wafer in step S1 is < 100 μm, first bond the back side of the wafer with a glass carrier plate after completing the front side process, then cut and form a wide and shallow groove A at the front side scribe line, then attach a grinding tape to the front side of the wafer, debond and remove the glass carrier plate on the back side, and grind the back side of the wafer to make the wafer thin to the required thickness.

[0016] Further preferably, the second carrier plate in step S3 can also be a flat carrier plate, and the SOG material coated when using SOG to seal covers the back side edge of the wafer.

[0017] Advantages of the present invention:

[0018] The present invention first opens a wide and shallow groove A at the front side scribe line of the wafer. After completing the backside thinning of the wafer, it is transferred to a carrier plate. The carrier plate is used to carry the thinned wafer without bonding. Then, the first groove is identified from the back side of the wafer and aligned with groove A to cut groove B without secondary exposure. After cutting groove B, particle implantation and backside metal process can be performed on the back side of the wafer. The metal plating will be deposited at the bottom of groove B at the groove B, so the backside metal layer of the wafer will be automatically disconnected. Finally, the wafer is transferred to the cutting die frame and the dicing technology is used to disconnect the connection between groove A and groove B to complete the dicing of the wafer, improving the dicing efficiency of the wafer and reducing the dicing cost of the wafer. Description of the Drawings

[0019] The following further describes the present invention with reference to the drawings.

[0020] Figure 1 is the process flow chart of step S1 in Embodiment 1 of the present invention;

[0021] Figure 2It is the process flow diagram of step S2 in Embodiment 1 of the present invention;

[0022] Figure 3 It is the process flow diagram of step S3 in Embodiment 1 of the present invention;

[0023] Figure 4 It is the process flow diagram of step S4 in Embodiment 1 of the present invention;

[0024] Figure 5 It is the process flow diagram of step S5 in Embodiment 1 of the present invention;

[0025] Figure 6 It is the process flow diagram of step S1 in Embodiment 2 of the present invention;

[0026] Figure 7 It is the process flow diagram of step S3 in Embodiment 3 of the present invention. Detailed implementation manners

[0027] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.

[0028] In the description of the present invention, it should be understood that the "carrier plate" is a carrier for carrying wafers, and its material can be silicon, graphite, glass, sapphire, etc. It is divided into a groove-type carrier plate (see the patent applied by the applicant earlier, patent application number: 2021114160788) and a flat-type carrier plate. The "first carrier plate" and "second carrier plate" used in Embodiment 1 and Embodiment 2 of the present invention are both groove-type carrier plates. The "first carrier plate" used in Embodiment 3 of the present invention is a groove-type carrier plate, and the "second carrier plate" is a flat-type carrier plate. The flat-type carrier plate has no grooves on its surface, but has vent holes in the middle, which are the same as those of the groove-type carrier plate.

[0029] Embodiment 1

[0030] As Figures 1-5 shown, a wafer cutting process includes the following steps:

[0031] S1. Cut a groove A with a size of 60×20μm at the front cutting track of the wafer that has completed the front process, and then adhere a grinding tape to the front of the wafer, and grind the back of the wafer to make the wafer thinner to 120μm;

[0032] S2. Attach the back of the thinned wafer to the groove of the first carrier plate, then turn over the grinding tape, the wafer and the first carrier plate as a whole, and after removing the grinding tape, place the wafer face up into the first carrier plate;

[0033] S3. Place the front side of the wafer in the groove of the second carrier, then flip the first carrier, wafer, and second carrier over as a whole. After removing the first carrier, place the wafer with the back side facing up in the second carrier, and seal the outer ring of the wafer sidewall by spin-coating the SOG medium.

[0034] S4. Cutting a 20×60 μm trench B at the corresponding scribe line on the back side of the wafer, and finally performing back side particle implantation and back side metallization process;

[0035] S5. Use a wafer ring cutter to cut the SOG along the edge of the wafer, then attach the back of the wafer to the cutting template, flip the cutting template, wafer and carrier as a whole, remove the carrier on the front, and use a splitter and film pulling machine to break the unbroken part of the wafer.

[0036] Example 2

[0037] A wafer cutting process comprises the following steps:

[0038] S1. After the front-side wafer has been processed, the back side is bonded to a glass carrier and a 30×10 μm groove A is cut at the front scribe line. The front side of the wafer is then adhered with grinding tape, the back side glass carrier is removed after debonding, and the back side of the wafer is ground to thin the wafer to the desired thickness.

[0039] S2, after thinning, the back side of the wafer is placed in the groove of the first carrier, and then the grinding tape, wafer and first carrier are turned over as a whole. After removing the grinding tape, the wafer is placed face up in the first carrier;

[0040] S3. Place the front side of the wafer in the groove of the second carrier, then flip the first carrier, wafer, and second carrier over as a whole. After removing the first carrier, place the wafer with the back side facing up in the second carrier, and seal the outer ring of the wafer sidewall by spin-coating the SOG medium.

[0041] S4. Cutting a 10×50 μm trench B at the corresponding scribe line on the back side of the wafer, and finally performing back side particle implantation and back side metallization process;

[0042] S5. Use a wafer ring cutter to cut the SOG along the edge of the wafer, then attach the back of the wafer to the cutting template, flip the cutting template, wafer and carrier as a whole, remove the carrier on the front, and use a splitter and film pulling machine to break the unbroken part of the wafer.

[0043] Example 3

[0044] S1. Cut a 40×15 μm groove A on the front side of the wafer after the front side process is completed. Then, adhere a grinding tape to the front side of the wafer and grind the back side of the wafer to thin the wafer to 90 μm.

[0045] S2. Attach the back side of the thinned wafer into the groove of the first carrier, then flip the polishing tape, wafer and the first carrier as a whole. After removing the polishing tape, place the wafer with its front side up into the first carrier;

[0046] S3. Attach the front side of the wafer to the surface of the second carrier, then flip the first carrier, wafer and the second carrier as a whole. After removing the first carrier, place the wafer with its back side up into the second carrier, and seal the edge of the back side of the wafer by spin-coating the medium SOG;

[0047] S4. Cut a groove B of 15×55μm at the corresponding scribe line on the back side of the wafer, and finally perform the particle implantation on the back side and the back side metal process;

[0048] S5. Use a crystal ring cutting machine to cut along the SOG at the edge of the wafer, then attach the back side of the wafer to the cutting die frame, flip the cutting die frame, wafer and the carrier as a whole. After removing the front carrier, use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

[0049] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. What is described in the above embodiments and the specification only illustrates the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed.

Claims

1. A wafer cutting process, characterized in that, Including the following steps: S1. Cut a wide and shallow groove A at the front cutting lane of the wafer after the front process is completed, then adhere a grinding tape to the front of the wafer and grind the back of the wafer to reduce the wafer thickness to the required thickness; S2. Attach the back of the thinned wafer to the groove of the first carrier, then turn over the grinding tape, the wafer and the first carrier as a whole. After removing the grinding tape, place the wafer face-up into the first carrier; S3. Attach the front of the wafer to the groove of the second carrier, then turn over the first carrier, the wafer and the second carrier as a whole. After removing the first carrier, place the wafer face-down into the second carrier, and seal the outer circle of the wafer sidewall by spin-coating a medium SOG; S4. Cut a narrow and deep groove B at the corresponding cutting lane on the back of the wafer, and finally perform backside particle implantation and backside metal process; S5. Use a crystal ring cutter to cut along the SOG at the edge of the wafer, then attach the back of the wafer to the cutting die frame. Turn over the cutting die frame, the wafer and the carrier as a whole. After removing the front carrier, use a dicing and film pulling machine to disconnect the unbroken part of the wafer.

2. The wafer cutting process according to claim 1, characterized in that, The width of the groove A is 30 - 60 μm, and the depth is 10 - 20 μm.

3. The wafer cutting process according to claim 1, wherein The thickness of the back of the wafer after thinning is 90 - 120 μm.

4. The wafer cutting process according to claim 1, characterized in that, The width of the groove B is 10 - 20 μm, and the depth is 50 - 60 μm.

5. The wafer cutting process according to claim 1, wherein, When the initial thickness of the wafer in step S1 is < 100 μm, first bond the back of the wafer after the front process is completed to a glass carrier plate, then cut a wide and shallow groove A at the front cutting lane. Then adhere a grinding tape to the front of the wafer, debond and remove the glass carrier plate on the back, and grind the back of the wafer to reduce the wafer thickness to the required thickness.

6. The wafer cutting process according to claim 1, characterized in that, In step S3, the second carrier can also be a flat carrier. When using SOG to seal, the coated SOG material covers the back edge of the wafer.

Images