A method for monitoring annealing temperature of laser annealing machine

Abstract

The present invention provides a method for monitoring the annealing temperature of a laser annealing machine, forming a zero mark layer pattern on a wafer to be tested; performing ion implantation and laser annealing processes on the surface of the wafer to be tested; measuring the resistance of the wafer to be tested in the Z direction to obtain a resistance measurement value; forming an overlay layer pattern on the wafer to be tested; measuring the overlay accuracy between the zero mark layer pattern and the overlay layer pattern to obtain an X-direction value and a Y-direction value; adjusting the annealing temperature of the laser annealing machine according to the measured X-direction value, Y-direction value and resistance measurement value. The present invention realizes the monitoring of the laser annealing machine in three dimensions, can predict in advance the influence of the laser annealing temperature fluctuation within the chip on the overlay accuracy of the subsequent process photolithography layer, and then timely adjusts the uniformity of the laser annealing temperature, improves the overlay accuracy of the product, and improves the product yield.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to a method for monitoring the annealing temperature of a laser annealing machine. Background Art

[0002] With the continuous development of large-scale integrated circuit technology, the size of CMOS devices continues to decrease, and the junction depth is becoming shallower and shallower, which puts more stringent requirements on thermal diffusion. Dual-wavelength laser annealing has the advantages of high temperature and short residence time and is widely used.

[0003] At present, the industry monitors the temperature fluctuation of laser annealing by measuring the resistance change in the Z direction of the silicon wafer. Figure 1 However, the impact of laser temperature fluctuations on the two-dimensional plane, such as the impact on the overlay accuracy (OVL) of the subsequent lithography process in the X / Y direction, cannot be achieved by simply monitoring the resistance, and the industry currently has no solution to monitor this impact in advance. Summary of the invention

[0004] In view of this, the present invention provides a method for monitoring the annealing temperature of a laser annealing machine, so as to realize the three-dimensional monitoring of the annealing temperature of the laser annealing machine.

[0005] The present invention provides a method for monitoring the annealing temperature of a laser annealing machine, comprising the following steps:

[0006] Step 1: forming a zero mark layer pattern on the wafer to be tested;

[0007] Step 2: performing ion implantation and laser annealing processes on the surface of the wafer to be tested;

[0008] Step 3, measuring the resistance of the wafer to be tested in the Z direction to obtain a resistance measurement value;

[0009] Step 4: forming an overlay layer pattern on the wafer to be tested;

[0010] Step 5, measuring the overlay accuracy between the zero mark layer pattern and the overlay layer pattern to obtain the X direction value and the Y direction value;

[0011] Step 6: Adjust the annealing temperature of the laser annealing machine according to the measured X-direction value, the Y-direction value and the resistance measurement value.

[0012] Preferably, step one comprises the following steps:

[0013] Step a, providing a wafer to be tested, growing a pad oxide layer on the surface of the wafer to be tested, and growing a silicon nitride mask layer on the surface of the pad oxide layer;

[0014] Step b, coating a zero mark layer photoresist on the surface of the silicon nitride mask layer and performing exposure and development;

[0015] Step c, using the zero mark layer photoresist as a mask, etching a groove in the wafer by plasma etching, and then removing the zero mark layer photoresist and etching residues by wet cleaning process;

[0016] Step d: filling the trench with oxide and annealing the oxide, so that the zero mark layer pattern is formed by the oxide filled in the trench.

[0017] Preferably, the liner oxide layer in step a is formed by a furnace tube process, the reaction temperature is 700C-900C, and the thickness is 20A~100A; the silicon nitride mask layer is formed by a furnace tube process, the reaction temperature is 700C-800C, and the thickness is 20A~90A.

[0018] Preferably, the thickness of the zero mark layer photoresist in step b is 12000A to 23000A.

[0019] Preferably, the depth of the groove in step c is 1200A to 3500A.

[0020] Preferably, in step d, while growing the oxide to fill the trench, the oxide also extends to the surface of the silicon nitride mask layer outside the trench;

[0021] Then, the method further includes a step of using a chemical mechanical polishing process using the silicon nitride mask layer as an etching stop layer, wherein the oxide outside the groove is removed after the chemical mechanical polishing process;

[0022] The method further includes the step of removing the silicon nitride mask layer and the pad oxide layer.

[0023] Preferably, the oxide in step d is grown using a high-density plasma process or a high-aspect ratio process, and has a thickness of 3000A to 6000A.

[0024] Preferably, the temperature range of the oxide annealing in step d is 800°C-1200°C, and the time is 0.5h-5h.

[0025] Preferably, the impurity ions implanted in step 2 are boron, the dosage is 1E15-5E15, and the energy is 3K-10K.

[0026] Preferably, the temperature of the laser annealing in step 2 is 1100C-1200C, and the scanning modes include arc scanning and linear scanning.

[0027] Preferably, the resistance is measured in step 3 using a four-probe method.

[0028] Preferably, in step 4, an overlay layer photoresist is coated and then exposed and developed to form an overlay layer pattern composed of the developed overlay layer photoresist.

[0029] Preferably, the thickness of the overlay layer photoresist is 1000A to 4000A.

[0030] Preferably, in step 5, the overlay accuracy is measured using an advanced image measurement type marker.

[0031] Preferably, the zero mark layer pattern and the overlay layer pattern include a plurality of patterns, each of which has a size of 8um to 16um in length and 1um to 5um in width.

[0032] The present invention first forms a zero mark layer pattern on a test wafer, then performs ion implantation and laser annealing processes, then measures the resistance of the wafer to be tested in the Z direction to obtain a resistance measurement value, then forms an overlay layer pattern, then measures the overlay accuracy between the zero mark layer pattern and the overlay layer pattern to obtain an X-direction value and a Y-direction value, thereby realizing the monitoring of the three-dimensional direction of the laser annealing machine. The present invention can predict in advance the influence of the intra-chip laser annealing temperature fluctuation on the subsequent process photolithography layer overlay accuracy, and then timely adjust the uniformity of the annealing temperature of the laser annealing machine according to the measured X-direction value, Y-direction value and resistance measurement value, so as to achieve the technical effect of improving the overlay accuracy of the product and improving the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0034] Figure 1 Displayed is the resistance diagram of the laser annealing machine in offline state;

[0035] Figure 2 Schematic diagram showing that the laser annealing temperature non-uniformity causes abnormal overlay accuracy;

[0036] Figure 3 It is a flow chart showing a method for monitoring the annealing temperature of a laser annealing machine according to an embodiment of the present invention;

[0037] Figure 4-Figure 14 Shown is a schematic diagram of the device structure in each step of the method of the embodiment of the present invention;

[0038] Fig.15 It is a schematic diagram showing that the laser annealing temperature is uniform so that the overlay accuracy is normal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0040] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0041] Unless the context clearly requires otherwise, the words "include", "comprising" and similar words throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is "including but not limited to".

[0042] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0043] The non-uniformity of laser annealing temperature will have a certain degree of response to the subsequent photolithography process overlay accuracy (OVL) in the X / Y direction, such as Figure 1 The laser annealing temperature distribution corresponding to the middle frame 11 causes Figure 2 Abnormal distribution of product OVL X / Y direction. If the laser annealing machine can be monitored in three dimensions by measuring the overlay accuracy in the X / Y direction and the resistance value in the Z direction before the product sheet is laser annealed, and the laser annealing temperature and uniformity can be adjusted in time, not only the overlay accuracy of the product sheet will be improved, but also the yield of the product sheet will be improved. Therefore, the present invention proposes a method for monitoring the annealing temperature of a laser annealing machine. The technical solution of the present invention is further explained below in conjunction with the accompanying drawings and through specific implementation methods.

[0044] like Figure 3 As shown, it is a flow chart of a method for monitoring the annealing temperature of a laser annealing machine according to an embodiment of the present invention; Figures 4 to 13 , which is a device structure diagram in each step of the method of the embodiment of the present invention, the method for monitoring the annealing temperature of the laser annealing machine of the embodiment of the present invention comprises the following steps:

[0045] Step 1: forming a zero mark layer pattern 2 on the wafer 1 to be tested.

[0046] In the embodiment of the present invention, the zero mark layer pattern 2 is formed by the following steps:

[0047] Step a: Figure 4As shown, a wafer 1 to be tested is provided, a pad oxide layer 101 is grown on the surface of the wafer 1 to be tested, and a silicon nitride mask layer 102 is grown on the surface of the pad oxide layer 101 .

[0048] In the embodiment of the present invention, the pad oxide layer 101 is formed by a furnace tube process, the reaction temperature is 700C-900C, and the thickness is 20A~100A. The silicon nitride mask layer 102 is formed by a furnace tube process, the reaction temperature is 700C-800C, and the thickness is 20A~90A.

[0049] Step b: Figure 5 As shown, a zero mark layer photoresist 103 is coated on the surface of the silicon nitride mask layer 102; Figure 6 As shown, a zero mark layer photoresist 103 is coated and exposed and developed. After development, the open area of ​​the zero mark layer photoresist 103 is the formation area of ​​the zero mark layer pattern 2.

[0050] In the embodiment of the present invention, the thickness of the zero mark layer photoresist is 12000 Å to 23000 Å.

[0051] Step c: Figure 7 As shown, the developed zero mark layer photoresist 103 is used as a mask, and a plasma etching method is used to etch a groove 104 in the wafer 1, and then a wet cleaning process is used to remove the zero mark layer photoresist 103 and etching residues.

[0052] In the embodiment of the present invention, the depth of the trench is 1200 Å to 3500 Å. The etching residue is the etching residue of the plasma etching process of the trench 104 .

[0053] Step d: filling the trench 104 with oxide 105 and annealing the oxide 105 , so that the oxide 105 filled in the trench 104 forms a zero mark layer pattern 2 .

[0054] like Figure 8 As shown, while the oxide 105 is grown to fill the trench 104 , the oxide 105 also extends to the surface of the silicon nitride mask layer 102 outside the trench.

[0055] In the embodiment of the present invention, the oxide 105 is grown by high-density plasma process or high aspect ratio process, and the temperature range of annealing the oxide 105 is 800C-1200°C, the time is 0.5h-5h, and the thickness is 3000A-6000A. The annealing of the oxide 105 is furnace annealing or rapid thermal annealing.

[0056] like Fig. 9As shown, the step of using a chemical mechanical polishing process using the silicon nitride mask layer 102 as an etch stop layer is further included. After the chemical mechanical polishing process, the oxide 105 outside the trench 104 is removed.

[0057] like Fig.10 As shown, the process further includes the step of removing the silicon nitride mask layer 102 and the pad oxide layer 101 .

[0058] In the embodiment of the present invention, wet etching is used to remove the silicon nitride mask layer 102 and the pad oxide layer 101 .

[0059] Step 2: Fig.11 As shown, ion implantation and laser annealing processes are performed on the surface of the wafer 1 to be tested.

[0060] In the embodiment of the present invention, the impurity ions implanted are boron, the dosage is 1E15-5E15, and the energy is 3K-10K; the temperature of laser annealing is 1100C-1200C, and the scanning modes include arc scanning and linear scanning.

[0061] Step 3: Measure the resistance of the wafer 1 to be tested in the Z direction to obtain a resistance measurement value.

[0062] In the embodiment of the present invention, the resistance is measured using a four-probe method.

[0063] Step 4: forming an overlay layer pattern 3 on the wafer 1 to be tested.

[0064] In the embodiment of the present invention, the steps of forming the overlay layer pattern 3 include: Fig.12 As shown, a cover layer photoresist 106 is applied; Fig.13 As shown, the overlay layer photoresist 106 is exposed and developed to form an overlay layer pattern 3 composed of the developed overlay layer photoresist 106. The thickness of the overlay layer photoresist is 1000A to 4000A.

[0065] In an embodiment of the present invention, the zero mark layer pattern and the overlay layer pattern include multiple ones, and the zero mark layer pattern 2 and the overlay layer pattern 3 are distributed in the central area and around the wafer 1 to be tested, so that each surface area of ​​the test silicon wafer 1 can be monitored.

[0066] Step 5: Measure the overlay accuracy between the zero mark layer pattern 2 and the overlay layer pattern 3 to obtain the X-direction value and the Y-direction value.

[0067] like Fig.14As shown, in the embodiment of the present invention, the measurement of overlay accuracy adopts the advanced image measurement mrtology (AIM) mark. The single size of the zero mark layer pattern is 8um to 16um in length and 1um to 5um in width. Preferably, the size of the zero mark layer pattern 2 and the overlay pattern 3 is 8um in length and 2um in width.

[0068] Step 6: Adjust the annealing temperature of the laser annealing machine according to the measured X-direction value, Y-direction value and resistance measurement value.

[0069] Specifically, by comparing the difference between the resistance measurement value and the preset value, the stability of the laser temperature of the laser annealing machine is determined, the annealing temperature of the laser annealing machine is characterized, and the annealing temperature of the laser annealing machine is adjusted in time according to the measured X-direction value and Y-direction value. Fig.15 As shown, it is a schematic diagram showing that the laser annealing temperature is uniform so that the overlay accuracy is normal in an embodiment of the present invention. Figure 2 ,Obviously, after the temperature distribution of laser annealing is improved, the overlay accuracy is normal.

[0070] The laser annealing machine annealing temperature monitoring method of the present invention realizes the three-dimensional monitoring of the laser annealing machine by measuring the overlay accuracy in the X / Y direction and the resistance value in the Z direction. The method can predict in advance the influence of the laser annealing temperature fluctuation in the chip on the overlay accuracy of the subsequent process photolithography layer, so as to timely adjust the uniformity of the laser annealing temperature, thereby improving the overlay accuracy of the product and realizing the improvement of the product yield.

[0071] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for monitoring the annealing temperature of a laser annealing machine, characterized in that: The following steps are involved: Step 1: forming a zero mark layer pattern on the wafer to be tested; Step 2: performing ion implantation and laser annealing processes on the surface of the wafer to be tested; Step 3, measuring the resistance of the wafer to be tested in the Z direction to obtain a resistance measurement value; Step 4: forming an overlay layer pattern on the wafer to be tested; Step 5, measuring the overlay accuracy between the zero mark layer pattern and the overlay layer pattern to obtain the X direction value and the Y direction value; Step 6: Adjust the annealing temperature of the laser annealing machine according to the measured X-direction value, the Y-direction value and the resistance measurement value.

2. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: Step 1 includes the following steps: Step a, providing a wafer to be tested, growing a pad oxide layer on the surface of the wafer to be tested, and growing a silicon nitride mask layer on the surface of the pad oxide layer; Step b, coating a zero mark layer photoresist on the surface of the silicon nitride mask layer and performing exposure and development; Step c, using the zero mark layer photoresist as a mask, etching a groove in the wafer by plasma etching, and then removing the zero mark layer photoresist and etching residues by wet cleaning process; Step d, filling the trench with oxide and performing high temperature annealing, so that the oxide filled in the trench forms the zero mark layer pattern.

3. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: The pad oxide layer in step a is formed by a furnace tube process, the reaction temperature is 700C-900C, and the thickness is 20A~100A; the silicon nitride mask layer is formed by a furnace tube process, the reaction temperature is 700C-800C, and the thickness is 20A~90A.

4. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: The thickness of the zero mark layer photoresist in step b is 12000A to 23000A.

5. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: The depth of the groove in step c is 1200A to 3500A.

6. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: In step d, while the oxide is grown to fill the trench, the oxide also extends to the surface of the silicon nitride mask layer outside the trench; Then, the method further includes a step of using a chemical mechanical polishing process using the silicon nitride mask layer as an etching stop layer, wherein the oxide outside the groove is removed after the chemical mechanical polishing process; The method further includes the step of removing the silicon nitride mask layer and the pad oxide layer.

7. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: The oxide in step d is grown using a high-density plasma process or a high aspect ratio process, and has a thickness of 3000A to 6000A.

8. The method for monitoring the annealing temperature of a laser annealing machine according to claim 2, characterized in that: The temperature range of the high temperature annealing in step d is 800C-1200C, and the time is 0.5h-5h.

9. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: The impurity ions implanted in step 2 are boron, the dosage is 1E15-5E15, and the energy is 3K-10K.

10. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: The temperature of the laser annealing in step 2 is 1100C-1200C, and the scanning modes include arc scanning and linear scanning.

11. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: The resistance in step 3 is measured using a four-probe method.

12. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: In step 4, a cover layer photoresist is coated and then exposed and developed to form a cover layer pattern composed of the developed cover layer photoresist.

13. The method for monitoring the annealing temperature of a laser annealing machine according to claim 12, characterized in that: The thickness of the overlay layer photoresist is 1000 Å to 4000 Å.

14. The method for monitoring the annealing temperature of a laser annealing machine according to claim 1, characterized in that: In step 5, the overlay accuracy is measured using advanced image measurement type identification.

15. The method for monitoring the annealing temperature of a laser annealing machine according to claim 14, characterized in that: The zero mark layer pattern and the overlay layer pattern include a plurality of patterns, each of which has a size of 8um to 16um in length and 1um to 5um in width.

Images