Method, electronic device and storage medium for improving PCB board design efficiency

Abstract

The present invention provides a method, electronic device and storage medium for improving the design efficiency of PCB boards. The method first obtains the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device; then, according to the external dimension parameters, the structural device is disassembled into a number of virtual sub-structural devices with regular shapes; finally, according to the external dimension parameters of the several virtual sub-structural devices, a three-dimensional solid model of the structural device is constructed; and according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, whether the structural device interferes with the PCB board is detected. The present invention can reduce the probability of misjudgment of interference, thereby improving the design efficiency of the PCB board; further, since the three-dimensional solid model is obtained according to a plurality of virtual sub-structural devices with regular shapes, the detection efficiency of whether the structural device interferes with the structural device on the PCB board can be improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method for improving PCB design efficiency, an electronic device and a storage medium. Background Art

[0002] As electronic products are increasingly involved in people's daily work and life, how to make electronic products have more functions and smaller size has become an important issue that technicians in this field have to face. In line with this, the difficulty of PCB board space layout has gradually increased, mainly reflected in the packaging establishment of structural devices (including but not limited to electronic components, daughter boards, etc.) and whether the layout of structural devices and PCB board wiring are subject to space restrictions (mutual interference).

[0003] In the prior art, in order to save time and improve work efficiency, when creating PCB package symbols, the structural device is usually drawn (equivalent) as a rectangular entity according to the maximum size given in the specification. Figure 1 , which schematically shows the appearance of an exemplary structural device, from Figure 1 It can be seen that the shape of the structural device is irregular, with one part having a height of 0.8 mm and another part having a height of 2.3 mm. Specifically, the structural parameters of one part of the structural device are shown in Table 1 below:

[0004] Table 1: Some of the dimensions of the structural components

[0005]

[0006] See also Figure 2 , which schematically shows the prior art Figure 1 Schematic diagram of the three-dimensional solid model constructed from the structural devices in the Figure 2 It can be seen that in the prior art, the structural device is equivalent to a regular rectangular parallelepiped. Afterwards, the structural engineer imports the 3D document into the 3D software to perform upper and lower space calibration of the structural devices of multiple PCB boards. If interference is found during the calibration, feedback is given to the PCB engineer. Figure 3 , which schematically shows a schematic diagram of interference in one embodiment of a PCB board design method using the prior art. Figure 3It can be seen that the first structural device 121 planned to be integrated on the PCB board 110 and the original second structural device 122 on the PCB board 110 interfere with each other (the dotted line in the figure shows the interference part). Due to the space limitation of the PCB board 110 (it should be noted that in order to facilitate the understanding of the present invention, the structural device on the PCB board 110 that does not interfere with the first structural device 121 is not shown, and the second structural device 122 is drawn in a perspective manner to present the first structural device 121), it can only move a few millimeters of space. Obviously, it is difficult to solve the problem of interference between the first structural device 121 and the second structural device 122 by micro-movement. It can be seen that this design method of the PCB board in the prior art, although it seems to improve the efficiency in the initial stage of the design stage, has the risk of misjudgment or inability to accurately measure the interference area. If it is misjudged that there is interference between the structural devices, in order to avoid interference, the structural engineer feeds back the interference information to the PCB engineer so that the PCB engineer can increase the size of the PCB board or re-layout the structural devices on the PCB board, which is bound to increase the labor cost and time cost, and even have a negative impact on the efficiency improvement of the entire design process of the PCB board.

[0007] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0008] The purpose of the present invention is to provide a method, electronic device and storage medium for improving the design efficiency of PCB boards, aiming at the possible interference misjudgment problem in the PCB board design method in the prior art, so as to reduce the probability of misjudgment of interference of structural devices on the PCB board, thereby improving the design efficiency of the PCB board and saving manpower and management costs.

[0009] To achieve the above object, the present invention is implemented by the following technical scheme: A method for improving PCB board design efficiency, comprising:

[0010] According to the three-dimensional packaging file of the structural device, obtaining the shape dimension parameters of the structural device;

[0011] According to the outer dimension parameters, the structural device is disassembled into a plurality of virtual sub-structural devices with regular shapes;

[0012] A three-dimensional solid model of the structural device is constructed according to the external dimension parameters of the plurality of virtual sub-structural devices; and whether the structural device interferes with the PCB board is detected according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board.

[0013] Optionally, before disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the external dimension parameters of the structural device, the method further includes:

[0014] According to the dimension parameters of the structural device, it is judged whether the shape of the structural device is a regular shape:

[0015] If yes, constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the structural device;

[0016] If not, disassembling the structural device into at least two virtual sub-structural devices with regular shapes;

[0017] The regular shape includes any one of a cube, a cuboid, a pyramid, a cylinder, a sphere and an ellipsoid.

[0018] Optionally, the shape dimension parameters include three-dimensional coordinate data of each characteristic point of the structural device;

[0019] The step of disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the outer dimension parameters includes:

[0020] Determine a first disassembly direction of the structural device, and arrange the three-dimensional coordinate data in ascending order in the first disassembly direction; wherein the first disassembly direction is one of the X direction, the Y direction, and the Z direction of the three-dimensional coordinate system;

[0021] Determine the number of disassembly layers in the first disassembly direction and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction, and perform a first grouping of the three-dimensional coordinate data according to the maximum and minimum values ​​of the coordinate data of each layer;

[0022] For each group of the three-dimensional coordinate data after the first grouping, the three-dimensional coordinate data are arranged in ascending order in the second disassembly direction or the third disassembly direction, and the number of partitions in the second disassembly direction or the third disassembly direction and the maximum value and minimum value of each partition coordinate data in the disassembly direction are determined according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, and the three-dimensional coordinate data are grouped for the second time according to the maximum value and minimum value of each partition coordinate data; for each group of the three-dimensional coordinate data after the second grouping, the maximum value and minimum value of the three-dimensional coordinate data in the third disassembly direction or the second disassembly direction are determined;

[0023] Determine the three-dimensional coordinate data of eight vertices of each partition according to the maximum value and the minimum value of the three-dimensional coordinate data in the first disassembly direction, the maximum value and the minimum value in the second disassembly direction, and the maximum value and the minimum value in the third disassembly direction after the two groupings;

[0024] The virtual substructure device is determined according to the vertices of each partition.

[0025] Optionally, determining the number of disassembly layers and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction includes:

[0026] The number of the three-dimensional coordinate data in the first disassembly direction is used as the number of disassembly layers;

[0027] The i-th three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the i-th layer, and the i+1-th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the i-th layer; i is an integer greater than or equal to 1;

[0028] The determining, according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, the number of partitions and the maximum and minimum values ​​of the coordinate data of each partition in the second disassembly direction or the third disassembly direction comprises:

[0029] The number of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction is used as the number of partitions;

[0030] The jth three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the jth partition, and the j+1th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the jth partition; j is an integer greater than or equal to 0.

[0031] Optionally, constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the plurality of virtual sub-structural devices includes:

[0032] According to the external dimension parameters of the plurality of virtual sub-structure components, three-dimensional solid models of the plurality of virtual sub-structure components are constructed respectively;

[0033] A three-dimensional solid model of the structural device is obtained according to the three-dimensional solid models of the plurality of virtual sub-structural devices and the three-dimensional spatial positional relationship of each of the virtual sub-structural devices.

[0034] Optionally, the step of constructing the three-dimensional solid model of the structural device further includes:

[0035] Importing the external dimension parameters of several virtual sub-structure components into the three-dimensional software, and drawing the three-dimensional solid model of the structural component in the three-dimensional software;

[0036] Before detecting whether the structural device interferes with the PCB board based on the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, the method further includes: drawing the three-dimensional solid model of the PCB board in the three-dimensional software.

[0037] Optionally, detecting whether the structural device interferes with the PCB board according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board includes:

[0038] According to the spatial position relationship between the PCB board and the structural device, splicing the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board;

[0039] According to the spliced ​​three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, it is determined whether the structural device interferes with the device on the PCB board. If so, the interference information is output; if not, the external dimension parameters of the structural device meet the design requirements.

[0040] Optionally, before obtaining the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device, the method further includes: exporting the three-dimensional packaging file from PCB design software.

[0041] In order to achieve the above-mentioned purpose, the present invention also provides an electronic device, which includes a processor and a memory, and a computer program is stored in the memory. When the computer program is executed by the processor, any of the above-mentioned methods for improving PCB board design efficiency is implemented.

[0042] In order to achieve the above-mentioned purpose, the present invention also provides a readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, any of the above-mentioned methods for improving PCB board design efficiency is implemented.

[0043] Compared with the prior art, the method, electronic device and storage medium for improving PCB board design efficiency provided by the present invention have the following advantages:

[0044] The method for improving the design efficiency of PCB board provided by the present invention first obtains the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device; then, according to the external dimension parameters, the structural device is disassembled into several virtual sub-structural devices with regular shapes; finally, according to the external dimension parameters of several virtual sub-structural devices, a three-dimensional solid model of the structural device is constructed; and according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, whether the structural device interferes with the PCB board is detected. It can be seen that the method for improving the design efficiency of PCB board provided by the present invention, since the three-dimensional solid model of the structural device is constructed according to several virtual sub-structural devices obtained by disassembling the structural device, therefore, the three-dimensional solid model of the structural device is closer to the physical size of the structural device, which lays a foundation for more accurately judging whether the structural device interferes with the PCB board, and can reduce the probability of misjudgment of interference of the structural device on the PCB board, thereby improving the design efficiency of the PCB board, saving manpower and management costs; further, since the three-dimensional solid model is obtained according to multiple virtual sub-structural devices with regular shapes, the detection efficiency of whether the structural device interferes with the structural device on the PCB board can be improved.

[0045] Since the electronic device and storage medium provided by the present invention and the method for improving PCB board design efficiency provided by the present invention belong to the same inventive concept, they at least have the same beneficial effects and will not be described in detail herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 is a schematic diagram of the appearance of an exemplary structural device;

[0047] Figure 2 In the prior art Figure 1 Schematic diagram of a three-dimensional solid model constructed by the structural device in the invention;

[0048] Figure 3 A schematic diagram of interference occurring in one embodiment of a PCB board design method using the prior art;

[0049] Figure 4 A flow chart of a method for improving PCB board design efficiency provided by the first embodiment of the present invention;

[0050] Figure 5 The method for improving PCB board design efficiency provided by the present invention is Figure 1 A schematic diagram of a three-dimensional solid model constructed from the structural device in;

[0051] Figure 6 Method and method for improving PCB board design efficiency provided by the present invention Figure 3a corresponding schematic diagram of the same embodiment without interference;

[0052] Figure 7 A schematic diagram of the block structure of an electronic device provided in Embodiment 2 of the present invention.

[0053] The reference numerals are as follows:

[0054] 110-PCB board, 121-first structural component, 122-second structural component;

[0055] 201 - processor, 202 - communication interface, 203 - memory, 204 - communication bus. DETAILED DESCRIPTION

[0056] The following is a further detailed description of the method, electronic device and storage medium for improving the efficiency of PCB board design proposed by the present invention in conjunction with the accompanying drawings. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the accompanying drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Any modification of the structure, change in the proportional relationship or adjustment of the size, in the case of the same or similar effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical content disclosed by the present invention.

[0057] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0058] Embodiment 1

[0059] This example provides a method for improving the efficiency of PCB board design. Specifically, see 4, which schematically shows a flow chart of the method for improving the efficiency of PCB board design provided by this example. Figure 4 It can be seen that the method for improving PCB board design efficiency provided in this embodiment includes the following steps:

[0060] S100: acquiring the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device;

[0061] S200: disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the outer dimension parameters;

[0062] S300: constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the plurality of virtual sub-structural devices; and detecting whether the structural device interferes with the PCB board according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board.

[0063] It can be seen that the method for improving the design efficiency of PCB boards provided by the present embodiment is that since the three-dimensional solid model of the structural device is constructed based on a plurality of virtual sub-structural devices obtained by disassembling the structural device, the three-dimensional solid model of the structural device is closer to the physical size of the structural device, which lays a foundation for more accurately judging whether the structural device interferes with the PCB board, and can reduce the probability of misjudgment of interference of the structural device on the PCB board, thereby improving the design efficiency of the PCB board and saving manpower and management costs; further, since the three-dimensional solid model is obtained based on a plurality of virtual sub-structural devices with regular shapes, the detection efficiency of whether the structural device interferes with the structural device on the PCB board can be improved.

[0064] Preferably, in one exemplary implementation manner, before obtaining the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device in step S100, the method further includes: exporting the three-dimensional packaging file from PCB design software.

[0065] It should be noted that, as can be understood by those skilled in the art, exporting the three-dimensional package file from the PCB design software is only a description of a preferred embodiment, and is not a limitation of the present invention. In other embodiments, the three-dimensional package file can also be obtained by other means, including but not limited to reading from a readable storage medium or obtaining from a cloud storage via a network.

[0066] Preferably, in one exemplary implementation manner, before step S200 of disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the external dimension parameters of the structural device, the method further includes:

[0067] According to the dimension parameters of the structural device, it is judged whether the shape of the structural device is a regular shape:

[0068] If yes, constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the structural device;

[0069] If not, disassembling the structural device into at least two virtual sub-structural devices with regular shapes;

[0070] The regular shape includes any one of a cube, a cuboid, a pyramid, a cylinder, a sphere and an ellipsoid.

[0071] It can be seen that the method for improving the efficiency of PCB board design provided by the present invention determines whether the appearance of the structural device is a regular shape before disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes. When the appearance of the structural device is a regular shape, the step of disassembling the structural device is not performed, thereby further improving the efficiency of PCB board design.

[0072] It should be particularly noted that, as those skilled in the art can understand, the present invention does not limit the specific method for determining whether the shape of the structural device is a regular shape. For example, for a cube, it can be determined by its shape dimension parameters only including data information of length, width and height, and the values ​​of length, width and height are equal; for a cylinder, it can be determined by its shape dimension parameters only including data information of bottom radius and height, which will not be described one by one.

[0073] Preferably, in one exemplary embodiment, the shape dimension parameters include three-dimensional coordinate data of each characteristic point of the structural device;

[0074] The step of disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the outer dimension parameters includes:

[0075] Determine a first disassembly direction of the structural device, and arrange the three-dimensional coordinate data in ascending order in the first disassembly direction; wherein the first disassembly direction is one of the X direction, the Y direction, and the Z direction of the three-dimensional coordinate system;

[0076] Determine the number of disassembly layers in the first disassembly direction and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction, and perform a first grouping of the three-dimensional coordinate data according to the maximum and minimum values ​​of the coordinate data of each layer;

[0077] For each group of the three-dimensional coordinate data after the first grouping, the three-dimensional coordinate data are arranged in ascending order in the second disassembly direction or the third disassembly direction, and the number of partitions in the second disassembly direction or the third disassembly direction and the maximum and minimum values ​​of each partition coordinate data in the disassembly direction are determined according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, and the three-dimensional coordinate data are grouped for the second time according to the maximum and minimum values ​​of each partition coordinate data; for each group of the three-dimensional coordinate data after the second grouping, the maximum and minimum values ​​of the three-dimensional coordinate data in the third disassembly direction or the second disassembly direction are determined;

[0078] Determine the three-dimensional coordinate data of eight vertices of each partition according to the maximum value and the minimum value of the three-dimensional coordinate data in the first disassembly direction, the maximum value and the minimum value in the second disassembly direction, and the maximum value and the minimum value in the third disassembly direction after the two groupings;

[0079] The virtual substructure device is determined according to the vertices of each partition.

[0080] It can be seen that the method for improving the design efficiency of PCB boards provided by the present invention, for irregular structural devices, first determines the first disassembly direction of the structural device, arranges the three-dimensional coordinate data in ascending order in the first disassembly direction, and then determines the number of disassembly layers and the maximum and minimum values ​​of each layer of coordinate data in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction, and performs the first grouping of the three-dimensional coordinate data according to the maximum and minimum values ​​of each layer of coordinate data. The number of layers of virtual sub-structure devices with regular shapes in the first disassembly direction can be set according to actual needs, thereby simplifying the disassembly difficulty and improving the disassembly efficiency. Furthermore, the method for improving the design efficiency of PCB boards provided by the present invention, on the basis of the first grouping, adopts the same disassembly method as the first disassembly direction for partitioning, thereby significantly reducing the research and development and maintenance costs of the disassembly method, improving efficiency, and saving manpower and material resources.

[0081] It should be particularly noted that, as can be understood by those skilled in the art, as a preferred embodiment, the coordinate system where the three-dimensional coordinate data of each characteristic point of the structural device is located is the coordinate system of the structural device (i.e., a certain characteristic point of the structural device is taken as the origin). Obviously, this is not a limitation of the present invention. In other embodiments, the coordinate system where the three-dimensional coordinate data is located can also be the coordinate system of the PCB board pre-integrated with the structural device (i.e., a certain characteristic point of the PCB board is taken as the origin). Furthermore, it can be understood by those skilled in the art that the dimension parameters should also include its position information on the PCB board.

[0082] Preferably, in one exemplary embodiment, determining the number of disassembly layers and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction includes:

[0083] The number of the three-dimensional coordinate data in the first disassembly direction is used as the number of disassembly layers;

[0084] The i-th three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the i-th layer, and the i+1-th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the i-th layer; i is an integer greater than or equal to 1;

[0085] The determining, according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, the number of partitions and the maximum and minimum values ​​of the coordinate data of each partition in the second disassembly direction or the third disassembly direction comprises:

[0086] The number of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction is used as the number of partitions;

[0087] The jth three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the jth partition, and the j+1th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the jth partition; j is an integer greater than or equal to 0.

[0088] Preferably, in one exemplary embodiment, the constructing of the three-dimensional solid model of the structural device according to the external dimension parameters of the plurality of virtual sub-structural devices comprises:

[0089] According to the external dimension parameters of the plurality of virtual sub-structure components, three-dimensional solid models of the plurality of virtual sub-structure components are constructed respectively;

[0090] A three-dimensional solid model of the structural device is obtained according to the three-dimensional solid models of the plurality of virtual sub-structural devices and the three-dimensional spatial positional relationship of each of the virtual sub-structural devices.

[0091] Specifically, see Figure 5 , which schematically shows the method for improving PCB board design efficiency provided by the present invention. Figure 1 Schematic diagram of the three-dimensional solid model constructed from the structural devices in the figure. Figure 5It can be seen that, in this embodiment, the first disassembly direction is the Z-axis direction, and in the first disassembly direction, it is divided into two layers; the second disassembly direction is the X-axis direction, and each layer has a partition, that is, the structural device is divided into two virtual sub-structural devices 121a and 121b, and the structural device 121 is obtained according to the three-dimensional solid models of the virtual sub-structural devices 121a and 121b and the three-dimensional spatial position relationship between the two.

[0092] Furthermore, in one exemplary embodiment, the constructing of the three-dimensional solid model of the structural device further includes:

[0093] Importing the external dimension parameters of several virtual sub-structure components into the three-dimensional software, and drawing the three-dimensional solid model of the structural component in the three-dimensional software;

[0094] Before detecting whether the structural device interferes with the PCB board based on the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, the method further includes: drawing the three-dimensional solid model of the PCB board in the three-dimensional software.

[0095] With such configuration, the method for improving PCB board design efficiency provided by the present invention can make the positional relationship between the structural device and the structural device on the PCB board clear at a glance by simultaneously drawing the three-dimensional solid models of the structural device and the PCB board in the three-dimensional software, which is more convenient for structural engineers to make judgments, thereby improving the communication efficiency between the structural engineer and the PCB engineer, further saving manpower and material costs, and improving design efficiency.

[0096] Preferably, in one exemplary embodiment, detecting whether the structural component interferes with the PCB board according to the three-dimensional solid model of the structural component and the three-dimensional solid model of the PCB board comprises:

[0097] According to the spatial position relationship between the PCB board and the structural device, splicing the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board;

[0098] According to the spliced ​​three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, it is determined whether the structural device interferes with the device on the PCB board. If so, the interference information is output; if not, the external dimension parameters of the structural device meet the design requirements.

[0099] With such configuration, the method for improving the design efficiency of a PCB board provided by the present invention can detect whether the structural device interferes with the structural device on the PCB board during the design stage of the structural device, thereby verifying the rationality of the design of the structural device. If an unexpected interference occurs, it can be modified in time to ensure the accuracy of the product structure, improve the design efficiency of the PCB board, and further promote the progress of product development.

[0100] It should be particularly noted that the present invention does not limit the method for determining whether the structural device interferes with the PCB board. Preferably, the three-dimensional detection function of the three-dimensional software can be directly used to detect whether the structural device interferes with the device on the PCB, and output interference information such as the interference position and the name of the interfering structural device.

[0101] Specifically, see Figure 6 , which schematically shows the method for improving PCB board design efficiency provided by the present invention and Figure 3 The corresponding schematic diagram of the same embodiment without interference. Figure 3 and Figure 6 It is not difficult to find that the method for improving the design efficiency of PCB boards provided by the present invention can reduce the risk of misjudgment of interference and provide more accurate interference information when space is limited, thereby improving the efficiency of PCB board design and saving manpower and material costs.

[0102] Embodiment 2

[0103] Based on the same inventive concept, the present invention also provides an electronic device, please refer to Figure 7 , which schematically shows a block diagram of an electronic device provided by an embodiment of the present invention. Figure 7 As shown, the electronic device includes a processor 201 and a memory 203, and the memory 203 stores a computer program. When the computer program is executed by the processor 201, the method for improving the design efficiency of the PCB board described above is implemented.

[0104] like Figure 7As shown, the electronic device also includes a communication interface 202 and a communication bus 204, wherein the processor 201, the communication interface 202, and the memory 203 communicate with each other through the communication bus 204. The communication bus 204 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus 204 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus. The communication interface 202 is used for communication between the above-mentioned electronic device and other devices.

[0105] The processor 201 referred to in the present invention may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor 201 is the control center of the electronic device, and various interfaces and lines are used to connect various parts of the entire electronic device.

[0106] The memory 203 may be used to store the computer program. The processor 201 implements various functions of the electronic device by running or executing the computer program stored in the memory 203 and calling the data stored in the memory 203 .

[0107] The memory 203 may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0108] The present invention also provides a readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the method for improving the design efficiency of a PCB board as described above can be implemented.

[0109] The readable storage medium of the embodiment of the present invention can adopt any combination of one or more computer-readable media. The readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer hard disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this article, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, a device or a device or used in combination with it.

[0110] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0111] Computer program code for performing the operation of the present invention may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0112] In summary, the method, electronic device and storage medium for improving the design efficiency of PCB boards provided by the present invention have the following advantages: the method for improving the design efficiency of PCB boards provided by the present invention, the method for improving the design efficiency of PCB boards provided by the present invention, since the three-dimensional solid model of the structural device is constructed based on a number of virtual sub-structural devices obtained by disassembling the structural device, therefore, the three-dimensional solid model of the structural device is closer to the physical size of the structural device, which lays a foundation for more accurately judging whether the structural device interferes with the PCB board, and can reduce the probability of misjudgment of interference of the structural device on the PCB board, thereby improving the design efficiency of the PCB board, saving manpower and management costs; further, since the three-dimensional solid model is obtained based on a plurality of virtual sub-structural devices with regular shapes, it is possible to improve the detection efficiency of whether the structural device interferes with the structural device on the PCB board. Furthermore, since the electronic device and storage medium provided by the present invention belong to the same inventive concept as the method for improving the design efficiency of PCB boards provided by the present invention, therefore, at least all the advantages of the method for improving the design efficiency of PCB boards provided by the present invention are provided, and in order to avoid redundancy, they are not described one by one here.

[0113] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0114] In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0115] The above description is only a description of the preferred implementation of the method for improving the design efficiency of PCB boards, the electronic device and the storage medium provided by the present invention, and is not any limitation on the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosures belong to the protection scope of the present invention. Obviously, technicians in this field can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations belong to the scope of the present invention and its equivalent technology, the present invention is also intended to include these modifications and variations.

Claims

1. A method for improving PCB board design efficiency, characterized in that: include: According to the three-dimensional packaging file of the structural device, obtaining the shape dimension parameters of the structural device; According to the outer dimension parameters, the structural device is disassembled into a plurality of virtual sub-structural devices with regular shapes; The shape dimension parameters include three-dimensional coordinate data of each characteristic point of the structural device; According to the external dimension parameters of the plurality of virtual sub-structural devices, a three-dimensional solid model of the structural device is constructed; and according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, whether the structural device interferes with the PCB board is detected; The step of disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the external dimension parameters includes: Determine a first disassembly direction of the structural device, and arrange the three-dimensional coordinate data in ascending order in the first disassembly direction; wherein the first disassembly direction is one of the X direction, the Y direction, and the Z direction of the three-dimensional coordinate system; Determine the number of disassembly layers in the first disassembly direction and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction according to the distribution of the three-dimensional coordinate data in the first disassembly direction, and perform a first grouping of the three-dimensional coordinate data according to the maximum and minimum values ​​of the coordinate data of each layer; For each group of the three-dimensional coordinate data after the first grouping, the three-dimensional coordinate data are arranged in ascending order in the second disassembly direction or the third disassembly direction, and the number of partitions in the second disassembly direction or the third disassembly direction and the maximum value and minimum value of each partition coordinate data in the disassembly direction are determined according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, and the three-dimensional coordinate data are grouped for the second time according to the maximum value and minimum value of each partition coordinate data; for each group of the three-dimensional coordinate data after the second grouping, the maximum value and minimum value of the three-dimensional coordinate data in the third disassembly direction or the second disassembly direction are determined; Determine the three-dimensional coordinate data of eight vertices of each partition according to the maximum value and the minimum value of the three-dimensional coordinate data after two groupings in the first disassembly direction, the maximum value and the minimum value in the second disassembly direction, and the maximum value and the minimum value in the third disassembly direction; The virtual substructure device is determined according to the vertices of each partition.

2. The method for improving PCB design efficiency according to claim 1, characterized in that: Before disassembling the structural device into a plurality of virtual sub-structural devices with regular shapes according to the external dimension parameters of the structural device, the method further includes: According to the dimension parameters of the structural device, it is judged whether the shape of the structural device is a regular shape: If yes, constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the structural device; If not, disassembling the structural device into at least two virtual sub-structural devices with regular shapes; The regular shape includes any one of a cube, a cuboid, a pyramid, a cylinder, a sphere and an ellipsoid.

3. The method for improving PCB design efficiency according to claim 1, characterized in that: The determining, according to the distribution of the three-dimensional coordinate data in the first disassembly direction, the number of disassembly layers and the maximum and minimum values ​​of the coordinate data of each layer in the first disassembly direction comprises: The number of the three-dimensional coordinate data in the first disassembly direction is used as the number of disassembly layers; The i-th three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the i-th layer, and the i+1-th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the i-th layer; i is an integer greater than or equal to 1; The determining, according to the distribution of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction, the number of partitions and the maximum and minimum values ​​of the coordinate data of each partition in the second disassembly direction or the third disassembly direction comprises: The number of the three-dimensional coordinate data in the second disassembly direction or the third disassembly direction is used as the number of partitions; The jth three-dimensional coordinate data after ascending sorting is used as the minimum value of the coordinate data of the jth partition, and the j+1th three-dimensional coordinate data after ascending sorting is used as the maximum value of the coordinate data of the jth partition; j is an integer greater than or equal to 0.

4. The method for improving PCB design efficiency according to claim 1, characterized in that: The step of constructing a three-dimensional solid model of the structural device according to the external dimension parameters of the plurality of virtual sub-structural devices comprises: According to the external dimension parameters of the plurality of virtual sub-structure components, three-dimensional solid models of the plurality of virtual sub-structure components are constructed respectively; A three-dimensional solid model of the structural device is obtained according to the three-dimensional solid models of the plurality of virtual sub-structural devices and the three-dimensional spatial positional relationship of each of the virtual sub-structural devices.

5. The method for improving PCB design efficiency according to claim 2, characterized in that: The step of constructing the three-dimensional solid model of the structural device further includes: Importing the external dimension parameters of several virtual sub-structure components into the three-dimensional software, and drawing the three-dimensional solid model of the structural component in the three-dimensional software; Before detecting whether the structural device interferes with the PCB board based on the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, the method further includes: drawing the three-dimensional solid model of the PCB board in the three-dimensional software.

6. The method for improving PCB design efficiency according to claim 1, characterized in that: The detecting whether the structural device and the PCB board interfere with each other according to the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board comprises: According to the spatial position relationship between the PCB board and the structural device, splicing the three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board; According to the spliced ​​three-dimensional solid model of the structural device and the three-dimensional solid model of the PCB board, it is determined whether the structural device interferes with the device on the PCB board. If so, the interference information is output; if not, the external dimension parameters of the structural device meet the design requirements.

7. The method for improving PCB design efficiency according to any one of claims 1 to 6, characterized in that: Before obtaining the external dimension parameters of the structural device according to the three-dimensional packaging file of the structural device, the method further includes: exporting the three-dimensional packaging file from PCB design software.

8. An electronic device, characterized in that: The invention comprises a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for improving the design efficiency of a PCB board according to any one of claims 1 to 7 is implemented.

9. A readable storage medium, characterized in that: The readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for improving PCB board design efficiency according to any one of claims 1 to 7 is implemented.

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