Driving circuit of rectifier tube in high frequency resonant converter

Abstract

Disclosed is a drive circuit for a rectifier tube. The rectifier tube has a drain terminal, a source terminal, and a gate terminal, and the voltage between the drain and source terminals of the rectifier tube is a drain-source detection voltage. The drive circuit includes a conduction control circuit, a regulation circuit, and a shutdown control circuit. The conduction control circuit receives the drain-source detection voltage and a conduction threshold voltage and controls the conduction of the rectifier tube based on the drain-source detection voltage and the conduction threshold voltage. When the drain-source detection voltage is less than the conduction threshold voltage, the rectifier tube conducts. The regulation circuit receives the drain-source detection voltage and a forward threshold voltage and controls the gate-source voltage of the rectifier tube based on the drain-source detection voltage and the forward threshold voltage. When the drain-source detection voltage is greater than the forward threshold voltage, the gate-source voltage of the rectifier tube decreases in a step-wise manner. The shutdown control circuit receives the drain-source detection voltage and the shutdown threshold voltage and controls the shutdown of the rectifier tube based on the drain-source detection voltage and the shutdown threshold voltage. When the drain-source detection voltage is greater than the shutdown threshold voltage, the rectifier tube is shut off.

Description

Technical Field

[0001] The present invention relates to electronic circuits, and more particularly to a driving circuit for a rectifier tube in a resonant converter. Background Art

[0002] In existing resonant converters, MOSFETs are usually used as rectifiers, and the drain-source voltage of the MOSFET is sampled to control the on and off of the MOSFET, thereby ensuring efficient operation of the resonant converter.

[0003] Typically, after a MOSFET turns on, if the drain-source voltage of the MOSFET increases to the forward threshold voltage, the gate-source voltage of the MOSFET decreases, increasing the on-resistance of the MOSFET. At this point, even with a relatively low current flowing through the MOSFET, the source-drain voltage of the MOSFET remains constant. When the current flowing through the MOSFET further decreases, causing the source-drain voltage to reverse and reach the turn-off threshold voltage, the MOSFET turns off. As the operating frequency of the resonant converter increases, when the drain-source voltage of the switching tube increases to the forward threshold voltage, how can the gate-source voltage of the MOSFET be quickly reduced without causing excessive perturbations in the drain-source voltage, which could lead to false shutdown? Existing methods use an error amplifier to reduce the gate-source voltage of the MOSFET. However, due to the slow response time of the error amplifier, this cannot achieve such a rapid reduction in the gate-source voltage of the MOSFET.

[0004] Therefore, a driving circuit for a rectifier tube is needed, which can quickly reduce the gate-source voltage of the rectifier tube while reducing the drain-source voltage disturbance of the rectifier tube. Summary of the Invention

[0005] An embodiment of the present invention provides a driving circuit for a rectifier tube, wherein the rectifier tube has a drain terminal, a source terminal, and a gate terminal, and the voltage between the drain terminal and the source terminal of the rectifier tube is a drain-source detection voltage. The driving circuit includes: a conduction control circuit, which receives the drain-source detection voltage and a conduction threshold voltage and controls the conduction of the rectifier tube according to the drain-source detection voltage and the conduction threshold voltage, wherein when the drain-source detection voltage is less than the conduction threshold voltage, the rectifier tube is turned on; a regulation circuit, which receives the drain-source detection voltage and a forward threshold voltage and controls the gate-source voltage of the rectifier tube according to the drain-source detection voltage and the forward threshold voltage, wherein when the drain-source detection voltage is greater than the forward threshold voltage, the gate-source voltage of the rectifier tube decreases in a step-by-step manner; and a shutdown control circuit, which receives the drain-source detection voltage and the shutdown threshold voltage and controls the shutdown of the rectifier tube according to the drain-source detection voltage and the shutdown threshold voltage, wherein when the drain-source detection voltage is greater than the shutdown threshold voltage, the rectifier tube is turned off.

[0006] One embodiment of the present invention provides a driving circuit for a rectifier tube, wherein the rectifier tube has a drain terminal, a source terminal, and a gate terminal. The driving circuit includes: a detection circuit, detecting the voltages at the drain terminal and the source terminal of the rectifier tube and generating a drain-source detection voltage; a conduction control circuit, receiving the drain-source detection voltage and a conduction threshold voltage and controlling the conduction of the rectifier tube according to the drain-source detection voltage and the conduction threshold voltage, wherein the rectifier tube is turned on when the drain-source detection voltage is less than the conduction threshold voltage; a regulation circuit, receiving the drain-source detection voltage and a forward threshold voltage and controlling the gate-source voltage of the rectifier tube according to the drain-source detection voltage and the forward threshold voltage, wherein when the drain-source detection voltage is greater than the forward threshold voltage, the gate-source voltage of the rectifier tube decreases in a step-by-step manner; and a shutdown control circuit, receiving the drain-source detection voltage and the shutdown threshold voltage and controlling the shutdown of the rectifier tube according to the drain-source detection voltage and the shutdown threshold voltage, wherein the rectifier tube is turned off when the drain-source detection voltage is greater than the shutdown threshold voltage.

[0007] According to the driving circuit of the rectifier tube provided by the present invention, when the drain-source voltage of the rectifier tube increases to the forward threshold voltage, the gate-source voltage of the rectifier tube can be quickly reduced without causing severe jitter of the drain-source voltage of the rectifier tube. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to better understand the present invention, embodiments of the present invention will be described with reference to the following drawings, which are for illustration only. The drawings generally only show some features of the embodiments and are not necessarily drawn to scale.

[0009] Figure 1 A circuit structure diagram of a resonant converter 100 according to an embodiment of the present invention is provided.

[0010] Figure 2 A circuit structure diagram of a driving circuit 200 for driving a rectifier tube SR according to an embodiment of the present invention is provided.

[0011] Figure 3 A schematic diagram of the circuit structure of the regulating circuit 21 according to an embodiment of the present invention is given.

[0012] Figure 4 According to an embodiment of the present invention Figure 3 The working waveform diagram of the regulating circuit 21 is shown.

[0013] Figure 5 An embodiment of the present invention is given. Figure 3 The specific circuit structure diagram of the regulation circuit shown.

[0014] Figure 6 A schematic diagram of a circuit structure of a driving circuit for driving a rectifier tube SR according to an embodiment of the present invention is provided.

[0015] Figure 7A schematic diagram of a specific circuit structure of a high-frequency regulation circuit according to an embodiment of the present invention is given.

[0016] The same reference numbers in different drawings indicate the same or similar parts or features. DETAILED DESCRIPTION

[0017] Specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the present invention. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that these specific details are not necessarily required to practice the present invention. In other embodiments, well-known circuits, materials, or methods are not specifically described to avoid obscuring the present invention.

[0018] Throughout the specification and claims of this disclosure, terms such as "left, right, inside, outside, upper, lower, above, below," and the like are used for descriptive purposes only and do not necessarily indicate a fixed or permanent relative position of components or structures. Those skilled in the art will understand that such terms are interchangeable where appropriate, for example, to enable embodiments of the disclosure to operate in orientations other than those depicted. In the context of this disclosure, when a layer or element is referred to as being "on" another layer or element, the layer or element may be directly on the other layer or element, or there may be an intervening layer or element between them. Furthermore, the term "coupled" means connected in a direct or indirect, electrical or non-electrical manner. "One," "the," or "that" are not intended to refer to the singular but may encompass the plural. The phrases "one embodiment," "an embodiment," "an example," and "example" throughout this specification do not necessarily refer to the same embodiment or example. Those skilled in the art will understand that the term "and / or" used in connection with one or more embodiments of this disclosure encompasses any and all combinations of one or more of the associated listed items.

[0019] Figure 1 A circuit diagram of a resonant converter 100 according to an embodiment of the present invention is given. Figure 1 As shown, the resonant converter 100 includes a primary circuit 11, a transformer T, a rectifier SR, and a drive circuit. Specifically, the primary circuit 11 receives an input signal VIN and converts the input signal VIN into an AC signal. The transformer T includes a primary winding TP and a secondary winding TS, wherein the primary winding TP is electrically coupled to the primary circuit 11 to receive the AC signal. The rectifier SR is electrically coupled between the secondary winding TS and the load COUT. Figure 1In the illustrated embodiment, the rectifier SR has a drain terminal D, a source terminal S, and a gate terminal G. The drain terminal D is coupled to one end of the secondary winding TS, and the source terminal S is coupled to one end of the load capacitor COUT and a reference ground. Those skilled in the art will appreciate that, in another embodiment, the source terminal S of the rectifier SR may be coupled to one end of the secondary winding TS, the drain terminal D is coupled to one end of the load capacitor COUT, and the other end of the secondary winding TS and the other end of the load capacitor COUT are coupled to a reference ground.

[0020] The driving circuit is electrically coupled to the gate terminal G of the rectifier tube SR and provides a driving signal VG to control the on / off state and / or the magnitude of the on-resistance of the rectifier tube SR. Figure 1 As shown, the resonant converter 100 has a secondary current I SEC , secondary current I SEC The current flows through the rectifier SR and generates a drain-source detection voltage VDSS between the drain terminal D and the source terminal S of the rectifier SR. In one embodiment, the resonant converter 100 may be an LLC resonant switching power supply. In another embodiment, the rectifier SR is an N-type semiconductor field-effect transistor (NMOSFET).

[0021] Figure 2 A circuit structure diagram of a driving circuit 200 for driving a rectifier tube SR according to an embodiment of the present invention is given. Figure 2 As shown, the rectifier tube SR has a source terminal S, a drain terminal D and a gate terminal G. The gate terminal G of the rectifier tube SR receives the driving signal VG. Figure 2In the illustrated embodiment, the voltage between the drain terminal D and the source terminal S of the rectifier SR is detected to obtain a drain-source detection voltage VDSS. The driver circuit 200 includes a conduction control circuit ON, a regulation circuit 21, and a shutdown control circuit OFF. The conduction control circuit ON has a first input terminal for receiving the drain-source detection voltage VDSS, a second input terminal for receiving a turn-on threshold voltage VON, and an output terminal for outputting a turn-on signal SON to control the conduction of the rectifier SR. When the drain-source detection voltage VDSS is less than the turn-on threshold voltage VON, the rectifier SR is turned on. The shutdown control circuit OFF has a first terminal for receiving the drain-source detection voltage VDSS, a second input terminal for receiving a turn-off threshold voltage VOFF, and an output terminal for outputting a turn-off signal SOFF to control the turn-off of the rectifier SR. When the drain-source detection voltage VDSS is greater than the turn-off threshold voltage VOFF, the rectifier SR is turned off. The regulating circuit 21 has a first input terminal for receiving a drain-source detection voltage VDSS, a second input terminal for receiving a forward threshold voltage VFR, and an output terminal coupled to the gate terminal G of the rectifier SR to control the gate-source voltage VGS of the rectifier SR. When the drain-source detection voltage VDSS is greater than the forward threshold voltage VFR, the gate-source voltage VGS of the rectifier SR decreases in a step-by-step manner until the drain-source detection voltage VDSS of the rectifier SR is greater than the turn-off threshold voltage VOFF. The gate-source voltage VGS of the rectifier SR decreases rapidly to zero, turning off the rectifier SR. Figure 2 In one embodiment, the gate-source voltage VGS of the rectifier SR decreases in a stepwise manner, including: during a first pull-down time, a first current I1 is pulled down from the gate terminal of the rectifier SR, causing the gate-source voltage VGS of the rectifier SR to decrease; during a first waiting time, the current pulled down from the gate terminal of the rectifier SR is zero, and the gate-source voltage VGS of the rectifier SR remains unchanged; during a second pull-down time, the gate-source voltage VGS of the rectifier SR continues to decrease, pulling down a second current I2 from the gate terminal of the rectifier SR; during a second waiting time, the current pulled down from the gate terminal of the rectifier SR is zero, and the gate-source voltage VGS of the rectifier SR remains unchanged; during a third pull-down time, the gate-source voltage VGS of the rectifier SR continues to decrease, pulling down a third current I3 from the gate terminal of the rectifier SR; during a second waiting time, the current pulled down from the gate terminal of the rectifier SR is zero, and the gate-source voltage VGS of the rectifier SR remains unchanged. In one embodiment, the first current I1 is greater than the second current I2, and the second current I2 is greater than the third current I3. In one embodiment, the first current I1, the second current I2, and the third current I3 are related to the gate-source voltage VGS of the rectifier SR. In one embodiment, the first current I1, the second current I2, and the third current I3 decrease as the gate-source voltage VGS of the rectifier SR decreases.

[0022] Figure 3A schematic diagram of the circuit structure of the regulating circuit 21 according to an embodiment of the present invention is given. Figure 3 In the illustrated embodiment, the regulation circuit 21 includes a pull-down switch SC, a comparator CMP, a first current source for providing a first switching current IS1, a second current source for providing a second switching current IS2, and a third current source for providing a third switching current IS3. The first switching current IS1 is greater than the second switching current IS2, and the second switching current IS2 is greater than the third switching current IS3. In one embodiment, the first switching current IS1, the second switching current IS2, and the third switching current IS3 are positively correlated with the gate-source voltage VGS of the rectifier SR. That is, when the gate-source voltage VGS of the rectifier SR increases, the first switching current IS1, the second switching current IS2, and the third switching current IS3 all increase. In one embodiment, the first switching current IS1, the second switching current IS2, and the third switching current IS3 are proportional to the gate-source voltage VGS of the rectifier SR. The comparator CMP has a first terminal for receiving a drain-source sense voltage VDSS, a second terminal for receiving a positive-going threshold voltage VFR, and an output terminal for outputting a pull-down signal SFR. When the drain-source sense voltage VDSS is greater than the positive-going threshold voltage VFR, the pull-down signal SFR transitions from a first state to a second state. The pull-down switch SC has a first terminal and a second terminal, wherein the first terminal is coupled to the gate terminal G of the rectifier SR. The regulation circuit 21 further includes a first switch S1, a second switch S2, a third switch S3, and a counter. The counter receives the pull-down signal SFR and generates a first control signal C1, a second control signal C2, and a third control signal C3 based on the pull-down signal SFR to control the on and off states of the first switch S1, the second switch S2, and the third switch S3, respectively.

[0023] exist Figure 3 In the embodiment, when the pull-down signal SFR transitions from the first state to the second state for the first time, the first switch S1, the second switch S2, and the third switch S3 are all turned on, pulling down a first current I1 from the gate terminal of the rectifier SR. The first current I1 is equal to the sum of the first switch current IS1, the second switch current IS2, and the third switch current IS3. When the pull-down signal SFR transitions from the first state to the second state for the second time, the first switch S1 is turned off, the second switch S2 and the third switch S3 are turned on, pulling down a first current I2 from the gate terminal of the rectifier SR. The first current I2 is equal to the sum of the second switch current IS2 and the third switch current IS3. When the pull-down signal SFR transitions from the first state to the second state for the third time, the first switch S1 and the second switch S2 are turned off, the third switch S3 is turned on, pulling down a first current I3 from the gate terminal of the rectifier SR. The first current I3 is equal to the third switch current IS3.

[0024] Figure 4 According to an embodiment of the present invention Figure 3The working waveform of the regulating circuit 21 is shown in FIG. Figure 4 In the case of a drain-source detection voltage VDSS greater than the forward threshold voltage VFR, the gate-source power supply VGS begins to decrease in a step-by-step manner. STEP During this period, the gate-source power supply VGS decreases in a step-by-step manner. Specifically, when the drain-source detection voltage VDSS is less than the forward threshold voltage VFR, the pull-down signal SFR is in the first state, and when the drain-source detection voltage VDSS is greater than the forward threshold voltage VFR, the pull-down signal SFR is in the second state. Figure 4 In the example, when the pull-down signal SFT increases to the positive threshold voltage VFR for the first time, the pull-down signal SFR jumps from the first state to the second state, the first switch S1, the second switch S2, and the third switch S3 are all turned on, and the first current I1 is pulled down from the gate terminal G of the rectifier tube SR. The first current I1 is equal to the sum of the first switch current IS1, the second switch current IS2, and the third switch current IS3. Figure 4 As shown, during the first pull-down time T1, the gate-source voltage VGS of the rectifier tube SR decreases linearly. When the drain-source detection voltage VDSS is less than the forward threshold voltage VFR, the pull-down signal SFR jumps from the second state to the first state. At this time, the current pulled down from the gate terminal G of the rectifier tube SR is zero. Figure 4 As shown, during the first waiting time P1, the gate-source voltage VGS of the rectifier tube SR remains unchanged. When the pull-down signal SFR jumps from the first state to the second state for the second time, the first switch S1 is turned off, the second switch S2 and the third switch S3 are turned on, and the second current I2 is pulled down from the gate terminal of the rectifier tube SR. The second current I2 is equal to the sum of the second switch current IS2 and the third switch current IS3. Figure 4 As shown, during the second pull-down time T2, the gate-source voltage VGS of the rectifier tube SR decreases linearly. When the drain-source detection voltage VDSS is less than the forward threshold voltage VFR, the pull-down signal SFR jumps from the second state to the first state. At this time, the current pulled down from the gate terminal of the rectifier tube SR is zero. Figure 4 As shown, during the second waiting time P2, the gate-source voltage VGS of the rectifier tube SR remains unchanged. When the pull-down signal SFR jumps from the first state to the second state for the third time, the first switch S1 and the second switch S2 are turned off, and the third switch S3 is turned on, pulling down the third current I3 from the gate terminal of the rectifier tube SR. The third current I3 is equal to the third switch current IS3. Figure 4 As shown, during the third pull-down time T3, the gate-source voltage VGS of the rectifier tube SR decreases linearly. When the drain-source detection voltage VDSS is less than the forward threshold voltage VFR, the pull-down signal SFR jumps from the second state to the first state. At this time, the current pulled down from the gate terminal of the rectifier tube SR is zero. Figure 4As shown, during the third waiting time P3, the gate-source voltage VGS of the rectifier SR remains unchanged. At time t1, when the drain-source detection voltage VDSS is greater than the turn-off threshold voltage VOFF, the gate-source voltage VGS of the rectifier SR decreases rapidly to zero, turning off the rectifier SR.

[0025] Figure 5 An embodiment of the present invention is given. Figure 3 The specific circuit structure diagram of the regulating circuit is shown in FIG. Figure 5 In the embodiment shown, the first current source includes a first transistor M1 and a first resistor R1 coupled in series between a first switch S1 and a reference ground, the second current source includes a second transistor M2 and a second resistor R2 coupled in series between a second switch S2 and a reference ground, and the third current source includes a third transistor M3 and a third resistor R3 coupled in series between a third switch S3 and the reference ground. Figure 5 In the illustrated embodiment, the gate terminal of the first transistor M1 receives a first voltage V1, the gate terminal of the second transistor M2 receives a second voltage V2, and the gate terminal of the third transistor M3 receives a third voltage V3. In one embodiment, the first voltage V1 is greater than the second voltage V2, and the second voltage V2 is greater than the third voltage V3. In another embodiment, the first voltage V1, the second voltage V2, and the third voltage V3 are in a positive relationship with the gate-source voltage VGS of the rectifier SR, and the resistance values of the first resistor R1, the second resistor R2, and the third resistor R3 are equal. In yet another embodiment, the first voltage V1, the second voltage V2, and the third voltage V3 are all equal and equal to the gate-source voltage VGS of the rectifier SR, that is, V1 = V2 = V3 = VGS, the resistance value of the first resistor R1 is less than the resistance value of the second resistor, and the resistance value of the second resistor R2 is less than the resistance value of the third resistor R3. In one embodiment, the first voltage V1, the second voltage V2, and the third voltage V3 are all equal and less than the gate-source voltage VGS of the rectifier SR, i.e., V1 = V2 = V3 < VGS. It should be understood that the first current source, the second current source, and the third current source can adopt any circuit form as long as they can provide the first switching current IS1, the second switching current IS2, and the third switching current IS3.

[0026] Figure 6 A schematic diagram of the circuit structure of a driving circuit according to an embodiment of the present invention is given. Figure 3 Compared with the driving circuit shown, Figure 6The illustrated drive circuit also includes a high-frequency regulation circuit 61, which includes an oscillator for providing a clock signal OT, a high-frequency counter, a first high-frequency switch Sa, a second high-frequency switch Sb, and a third high-frequency switch Sc. The high-frequency regulation circuit also includes a first high-frequency current source, a second high-frequency current source, and a third high-frequency current source. The first high-frequency switch Sa has a first end and a second end, wherein the first end is coupled to a reference ground. The second high-frequency switch Sb has a first end and a second end, wherein the first end is coupled to a reference ground. The third high-frequency switch Sc has a first end and a second end, wherein the first end is coupled to a reference ground. The first high-frequency current source is coupled between the gate terminal of the rectifier SR and the first high-frequency switch and is configured to provide a first high-frequency current Ia. The second high-frequency current source is coupled between the gate terminal of the rectifier SR and the second high-frequency switch Sb and is configured to provide a second high-frequency current Ib. The third high-frequency current source is coupled between the gate terminal of the rectifier SR and the third high-frequency switch Sc and is configured to provide a third high-frequency current Ic. The high-frequency counter receives the clock signal OT and generates a first high-frequency control signal H1, a second high-frequency control signal H2 and a third high-frequency control signal H3 according to the clock signal OT to control the on and off of the first high-frequency switch Sa, the second high-frequency switch Sa and the third high-frequency switch Sc respectively.

[0027] continue Figure 6 In the description, Figure 6In the embodiment, the clock signal OT is counted when the first switch S1, the second switch S2, and the third switch S3 are all turned on, that is, the clock signal OT is counted within the first pull-down time T1. When the first cycle of the clock signal OT arrives, the first high-frequency switch Sa is turned on, and the second high-frequency switch Sb and the third high-frequency switch Sc are turned off. When the second cycle of the clock signal OT arrives, the first high-frequency switch Sa and the second high-frequency switch Sb are turned on, and the third high-frequency switch Sc is turned off. When the third cycle of the clock signal OT arrives, the first high-frequency switch Sa, the second high-frequency switch Sb, and the third high-frequency switch Sc are all turned on. Similarly, when the first switch S1 is turned off and the second switch S2 and the third switch S3 are turned on, the clock signal OT is counted, that is, the clock signal OT is counted during the second pull-down time T2. When the first cycle of the clock signal OT arrives, the first high-frequency switch Sa is turned on, and the second high-frequency switch Sb and the third high-frequency switch Sc are turned off. When the second cycle of the clock signal OT arrives, the first high-frequency switch Sa and the second high-frequency switch Sb are turned on, and the third high-frequency switch Sc is turned off. When the third cycle of the clock signal OT arrives, the first high-frequency switch Sa, the second high-frequency switch Sb, and the third high-frequency switch Sc are all turned on. Similarly, when the first and second switches S1 and S2 are off and the third switch S3 is on, the clock signal OT is counted. That is, the clock signal OT is counted during the third pull-down time T3. When the first cycle of the clock signal OT arrives, the first high-frequency switch Sa is on, and the second and third high-frequency switches Sb and Sc are off. When the second cycle of the clock signal OT arrives, the first and second high-frequency switches Sa and Sb are on, and the third high-frequency switch Sc is off. When the third cycle of the clock signal OT arrives, the first, second, and third high-frequency switches Sa, Sb, and Sc are all on. In one embodiment, the first, second, and third high-frequency currents Ia, Ia, and Ia are all equal. In one embodiment, the period of the clock signal OT is less than the period during which the first, second, and third switches S1, S2, and S3 are all on. In another embodiment, the period of the clock signal OT is less than the first pull-down time T1. In yet another embodiment, the period of the clock signal OT is less than the first pull-down time T1, less than the second pull-down time T2, and less than the third pull-down time T3. In one embodiment, the period of the clock signal OT is less than 40 ns.

[0028] Figure 7 The specific circuit structure of the high frequency adjustment circuit according to one embodiment of the present invention is given. Figure 7In the figure, the first high-frequency switch Sa includes a first high-frequency transistor Ma, the gate terminal of the first high-frequency transistor Ma receives a first high-frequency control signal H1, and the source terminal is coupled to the reference ground. The first high-frequency current source Ia includes a first high-frequency resistor R1 coupled between the gate terminal of the rectifier tube SR and the drain terminal of the first high-frequency transistor Ma. The second high-frequency switch Sb includes a second high-frequency transistor Mb, the gate terminal of the second high-frequency transistor Mb receives a second high-frequency control signal H2, and the source terminal is coupled to the reference ground. The second high-frequency current source Ib includes a second high-frequency resistor R2 coupled between the gate terminal of the rectifier tube SR and the drain terminal of the second high-frequency transistor Mb. The third high-frequency switch Sc includes a third high-frequency transistor Mc, the gate terminal of the third high-frequency transistor Mc receives a third high-frequency control signal H3, and the source terminal is coupled to the reference ground. The third high-frequency current source Ic includes a third high-frequency resistor Rc coupled between the gate terminal of the rectifier tube SR and the drain terminal of the third high-frequency transistor Mc. It should be understood that the specific circuit structure of the high-frequency regulation circuit is not limited to Figure 7 As shown, any circuit that can realize the function of a high-frequency regulation circuit is covered by the present invention.

[0029] By adopting the driving circuit of the present invention, when the drain-source voltage of the rectifier tube increases to the forward threshold voltage, the gate-source voltage of the rectifier tube can be quickly reduced without causing severe jitter of the drain-source voltage of the rectifier tube.

[0030] The specific embodiments described above are merely illustrative of the high-voltage device and its manufacturing method according to the present invention. These embodiments are not exhaustive and are not intended to limit the scope of the present invention. Variations and modifications to the disclosed embodiments are possible, and other feasible alternative embodiments and equivalent variations of the elements in the embodiments will be apparent to those skilled in the art. Other variations and modifications to the disclosed embodiments do not exceed the spirit of the present invention and the scope of protection defined by the claims.

Claims

1. A driving circuit for a rectifier tube, wherein the rectifier tube has a drain terminal, a source terminal, and a gate terminal, wherein the voltage between the drain terminal and the source terminal of the rectifier tube is a drain-source detection voltage, and the voltage between the gate terminal and the source terminal of the rectifier tube is a gate-source voltage of the rectifier tube, the driving circuit comprising: a conduction control circuit, receiving a drain-source detection voltage and a conduction threshold voltage and controlling the conduction of the rectifier tube according to the drain-source detection voltage and the conduction threshold voltage, wherein the rectifier tube is turned on when the drain-source detection voltage is less than the conduction threshold voltage; a regulating circuit receiving a drain-source detection voltage and a forward threshold voltage and controlling a gate-source voltage of the rectifier tube according to the drain-source detection voltage and the forward threshold voltage, wherein when the drain-source detection voltage is greater than the forward threshold voltage, the gate-source voltage of the rectifier tube decreases in a step-by-step manner; as well as The shutdown control circuit receives the drain-source detection voltage and the shutdown threshold voltage and controls the shutdown of the rectifier tube according to the drain-source detection voltage and the shutdown threshold voltage, wherein when the drain-source detection voltage is greater than the shutdown threshold voltage, the rectifier tube is turned off.

2. The driving circuit of the rectifier tube as claimed in claim 1 , wherein the gate-source voltage of the rectifier tube is reduced in a step-by-step manner, comprising: During the first pull-down time, the gate-source voltage of the rectifier tube decreases, during the first waiting time, the gate-source voltage of the rectifier tube remains unchanged, during the second pull-down time, the gate-source voltage of the rectifier tube continues to decrease, and during the second waiting time, the gate-source voltage of the rectifier tube remains unchanged.

3. The driving circuit of a rectifier tube as claimed in claim 2 , wherein during a first pull-down time, a first current is pulled down from the gate terminal of the rectifier tube, during a second pull-down time, a second current is pulled down from the gate terminal of the rectifier tube, and during a first waiting time and a second waiting time, the current pulled down from the gate terminal of the rectifier tube is zero.

4. The driving circuit of the rectifier tube as claimed in claim 3, wherein the first current is greater than the second current.

5. The driving circuit of the rectifier tube as claimed in claim 2 , wherein the gate-source voltage of the rectifier tube is reduced in a step-by-step manner further comprising: During the third pull-down time, the gate-source voltage of the rectifier tube decreases, and during the third waiting time, the gate-source voltage of the rectifier tube remains unchanged.

6. The driving circuit of a rectifier tube as claimed in claim 5 , wherein during a first pull-down time, a first current is pulled down from the gate terminal of the rectifier tube, during a second pull-down time, a second current is pulled down from the gate terminal of the rectifier tube, during a third pull-down time, a third current is pulled down from the gate terminal of the rectifier tube, and during a first waiting time, a second waiting time and a third waiting time, the current pulled down from the gate terminal of the rectifier tube is zero. 7 . The driving circuit of the rectifier tube as claimed in claim 6 , wherein the first current is greater than the second current, and the second current is greater than the third current.

8. The driving circuit of the rectifier tube as claimed in claim 1 , wherein the regulating circuit comprises: A pull-down switch having a first end and a second end, wherein the first end is coupled to the gate end of the rectifier tube; a comparator having a first terminal receiving a drain-source detection voltage, a second terminal receiving a positive threshold voltage, and an output terminal generating a pull-down signal to control the on and off of a pull-down switch, wherein the pull-down switch is turned on when the drain-source detection voltage is greater than the positive threshold voltage; A first current source, configured to provide a first switching current; a second current source, configured to provide a second switching current; a third current source, configured to provide a third switching current; a first switch coupled between the second terminal of the pull-down switch and the first current source; a second switch coupled between the second terminal of the pull-down switch and the second current source; a third switch coupled between the second terminal of the pull-down switch and the third current source; as well as The counter receives the pull-down signal and controls the on and off of the first switch, the second switch, and the third switch according to the pull-down signal.

9. The rectifier tube driving circuit as claimed in claim 8, wherein when the drain-source detection voltage is greater than the forward threshold voltage, the pull-down signal jumps from the first state to the second state, wherein when the pull-down signal jumps from the first state to the second state for the first time, the first switch, the second switch and the third switch are all turned on, when the pull-down signal jumps from the first state to the second state for the second time, the first switch is turned off, and the second switch and the third switch are both turned on, and when the pull-down signal jumps from the first state to the second state for the third time, the first switch and the second switch are turned off, and the third switch is turned on.

10. The driving circuit of the rectifier tube according to claim 8, wherein: The first switch current, the second switch current and the third switch current are in a positive relationship with the gate-source voltage of the rectifier tube.

11. The driving circuit of the rectifier tube according to claim 8, wherein: The first switch current is greater than the second switch current, and the second switch current is greater than the third switch current.

12. The rectifier tube driving circuit as described in claim 8, wherein the first current source includes a first transistor and a first resistor coupled in series between the first switch and the reference ground, the second current source includes a second transistor and a second resistor coupled in series between the second switch and the reference ground, and the third current source includes a third transistor and a third resistor coupled in series between the third switch and the reference ground.

13. The driving circuit of the rectifier tube according to claim 8, further comprising a high-frequency regulating circuit, wherein the high-frequency regulating circuit comprises: an oscillator, used to provide a clock signal; A first high frequency switch having a first terminal and a second terminal, wherein the first terminal is coupled to a reference ground; A second high frequency switch has a first terminal and a second terminal, wherein the first terminal is coupled to a reference ground; A third high frequency switch has a first terminal and a second terminal, wherein the first terminal is coupled to the reference ground; A first high-frequency current source is coupled between the gate terminal of the rectifier tube and the first high-frequency switch, and is used to provide a first high-frequency current; A second high-frequency current source is coupled between the gate terminal of the rectifier tube and the second high-frequency switch, and is used to provide a second high-frequency current; A third high-frequency current source is coupled between the gate terminal of the rectifier tube and the third high-frequency switch, and is used to provide a third high-frequency current; as well as The high-frequency counter receives a clock signal and controls the on and off of the first high-frequency switch, the second high-frequency switch, and the third high-frequency switch according to the clock signal.

14. The rectifier tube driving circuit as claimed in claim 13, wherein the clock signal is counted when the first switch, the second switch and the third switch are all turned on; when a first cycle of the clock signal comes, the first high-frequency switch is turned on, and the second high-frequency switch and the third high-frequency switch are turned off; when a second cycle of the clock signal comes, the first high-frequency switch and the second high-frequency switch are turned on, and the third high-frequency switch is turned off; when a third cycle of the clock signal comes, the first high-frequency switch, the second high-frequency switch and the third high-frequency switch are all turned on. 15 . The driving circuit for a rectifier tube as claimed in claim 13 , wherein a period of the clock signal is shorter than a time during which the first switch, the second switch and the third switch are all turned on.

16. The rectifier tube driving circuit as claimed in claim 13, wherein the first high-frequency current, the second high-frequency current and the third high-frequency current are equal.

17. A resonant converter comprising: The primary circuit receives the input signal and generates an AC signal; a transformer including a primary winding and a secondary winding, the primary winding being electrically coupled to the primary circuit to receive an AC signal; a rectifier tube coupled between the secondary winding and a load; as well as The driving circuit for a rectifier tube according to any one of claims 1 to 16, used for controlling a rectifier tube.

18. A driving circuit for a rectifier tube, the rectifier tube having a drain terminal, a source terminal, and a gate terminal, the driving circuit comprising: A detection circuit detects the voltages at the drain and source ends of the rectifier tube and generates a drain-source detection voltage; a conduction control circuit, receiving a drain-source detection voltage and a conduction threshold voltage and controlling the conduction of the rectifier tube according to the drain-source detection voltage and the conduction threshold voltage, wherein the rectifier tube is turned on when the drain-source detection voltage is less than the conduction threshold voltage; a regulating circuit receiving a drain-source detection voltage and a forward threshold voltage and controlling a gate-source voltage of the rectifier tube according to the drain-source detection voltage and the forward threshold voltage, wherein when the drain-source detection voltage is greater than the forward threshold voltage, the gate-source voltage of the rectifier tube decreases in a step-by-step manner; as well as The shutdown control circuit receives the drain-source detection voltage and the shutdown threshold voltage and controls the shutdown of the rectifier tube according to the drain-source detection voltage and the shutdown threshold voltage, wherein when the drain-source detection voltage is greater than the shutdown threshold voltage, the rectifier tube is turned off.

19. The driving circuit of the rectifier tube as claimed in claim 18, wherein the gate-source voltage of the rectifier tube is reduced in a step-by-step manner comprising: During the first pull-down time, the gate-source voltage of the rectifier tube decreases, during the first waiting time, the gate-source voltage of the rectifier tube remains unchanged, during the second pull-down time, the gate-source voltage of the rectifier tube continues to decrease, and during the second waiting time, the gate-source voltage of the rectifier tube remains unchanged.

20. The driving circuit of a rectifier tube as claimed in claim 19, wherein a first current is pulled down from the gate terminal of the rectifier tube during a first pull-down time, a second current is pulled down from the gate terminal of the rectifier tube during a second pull-down time, and the current pulled down from the gate terminal of the rectifier tube is zero during a first waiting time and a second waiting time.

Images