Video encoding and decoding method, device, computer readable medium and electronic device

Abstract

The embodiments of the present application provide a video encoding and decoding method, device, computer-readable medium and electronic device. The video decoding method includes: obtaining a coding block of a video image frame; if the coding block needs to be transformed into a sub-block, determining the division mode that the coding block can adopt according to the maximum allowed sub-block size ratio and the size of the coding block; based on the division mode that the coding block can adopt, determining the target division mode used when performing sub-block transformation on the coding block; dividing the coding block based on the target division mode, and decoding the multiple sub-blocks obtained by the division. The technical solution of the embodiment of the present application can avoid the generation of overly narrow sub-blocks when using SBT technology, thereby ensuring the performance of the hardware.

Description

Technical Field

[0001] The present application relates to the field of computer and communication technology, and in particular to a video encoding and decoding method, device, computer-readable medium and electronic device. Background Art

[0002] The Sub-Block Transform (SBT) technology is mentioned in the AVS (Audio Video coding Standard) 3 standard. Specifically, the coding block is divided into multiple sub-blocks in a certain way for encoding. However, according to the current AVS3 standard, there may be too narrow sub-blocks when dividing the coding block (too narrow sub-blocks are sub-blocks with too large a difference between width and height), which will reduce hardware performance and affect encoding and decoding efficiency. Summary of the invention

[0003] The embodiments of the present application provide a video encoding and decoding method, apparatus, computer-readable medium and electronic device, which can avoid the generation of overly narrow sub-blocks when using SBT technology, at least to a certain extent, thereby ensuring the performance of the hardware.

[0004] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0005] According to one aspect of an embodiment of the present application, a video decoding method is provided, comprising: obtaining a coding block of a video image frame; if the coding block needs to be sub-block transformed, determining a partitioning mode that can be adopted by the coding block according to an allowed maximum sub-block size ratio and a size of the coding block; based on the partitioning mode that can be adopted by the coding block, determining a target partitioning mode to be adopted when performing sub-block transformation processing on the coding block; partitioning the coding block based on the target partitioning mode, and decoding the multiple sub-blocks obtained by the partitioning.

[0006] According to one aspect of an embodiment of the present application, a video encoding method is provided, comprising: obtaining a residual coefficient block of a video image frame; determining a division mode that can be adopted for the residual coefficient block according to an allowed maximum sub-block size ratio and a size of the residual coefficient block; selecting a target division mode for the residual coefficient block from the division modes that can be adopted; and encoding information of the target division mode into a bitstream.

[0007] According to one aspect of an embodiment of the present application, a video decoding device is provided, comprising: an acquisition unit, configured to acquire a coding block of a video image frame; a first processing unit, configured to determine a division mode that can be adopted by the coding block according to an allowed maximum sub-block size ratio and a size of the coding block if the coding block needs to be sub-block transformed; a second processing unit, configured to determine a target division mode to be adopted when performing sub-block transformation on the coding block based on the division mode that can be adopted by the coding block; and a third processing unit, configured to perform division processing on the coding block based on the target division mode, and perform decoding processing on the multiple sub-blocks obtained by the division.

[0008] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit is configured as follows: if the width of the coding block is greater than or equal to 8, and twice the height of the coding block is less than or equal to the product of the width and the maximum size ratio of the sub-block, then the coding block is allowed to adopt a vertical binary division mode; otherwise, the coding block is prohibited from adopting the vertical binary division mode.

[0009] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit is configured as follows: if the width of the coding block is greater than or equal to 16, and 4 times the height of the coding block is less than or equal to the product of the width and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the vertical quartering mode; otherwise, the coding block is prohibited from adopting the vertical quartering mode.

[0010] In some embodiments of the present application, based on the aforementioned solution, the maximum sub-block size ratio is the maximum height-to-width ratio of the sub-block.

[0011] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit is configured as follows: if the height of the coding block is greater than or equal to 8, and twice the width of the coding block is less than or equal to the product of the height and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the horizontal binary division mode; otherwise, the coding block is prohibited from adopting the horizontal binary division mode.

[0012] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit is configured as follows: if the height of the coding block is greater than or equal to 16, and 4 times the width of the coding block is less than or equal to the product of the height and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the horizontal quartering mode; otherwise, the coding block is prohibited from adopting the horizontal quartering mode.

[0013] In some embodiments of the present application, based on the aforementioned solution, the maximum sub-block size ratio is the maximum aspect ratio of the sub-block.

[0014] In some embodiments of the present application, based on the aforementioned scheme, the maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is equal to the value of the maximum height-to-width ratio; the video decoding device also includes: a first decoding unit, configured to decode the value of the maximum sub-block size ratio from the sequence header of the video image frame.

[0015] In some embodiments of the present application, based on the aforementioned scheme, the maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is not equal to the value of the maximum height-to-width ratio; the video decoding device also includes: a second decoding unit, configured to respectively decode the value of the maximum aspect ratio and the value of the maximum height-to-width ratio from the sequence header of the video image frame.

[0016] In some embodiments of the present application, based on the aforementioned scheme, the value of the maximum sub-block size ratio is the same as the value of the allowed maximum coding block size ratio.

[0017] In some embodiments of the present application, based on the aforementioned solution, the third processing unit is configured to: perform a transform skip operation or an inverse transform operation during the decoding process of the multiple sub-blocks obtained by division.

[0018] According to one aspect of an embodiment of the present application, a video encoding device is provided, including: an acquisition unit, configured to acquire a residual coefficient block of a video image frame; a fourth processing unit, configured to determine a division mode that can be adopted by the residual coefficient block based on the maximum allowed sub-block size ratio and the size of the residual coefficient block; a selection unit, configured to select a target division mode for the residual coefficient block from the division modes that can be adopted; and an encoding unit, configured to encode information about the target division mode into a bitstream.

[0019] According to one aspect of an embodiment of the present application, a computer-readable medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the video decoding method as described in the above embodiment is implemented.

[0020] According to one aspect of an embodiment of the present application, an electronic device is provided, comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the video decoding method as described in the above embodiments.

[0021] According to one aspect of the embodiments of the present application, a computer program product or a computer program is provided, the computer program product or the computer program includes computer instructions, the computer instructions are stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the video decoding method provided in the above various optional embodiments.

[0022] In the technical solutions provided in some embodiments of the present application, when a coding block needs to be transformed into a sub-block, the division mode that can be adopted by the coding block is determined according to the maximum allowed sub-block size ratio and the size of the coding block, so that the division mode of the coding block can be restricted by the maximum allowed sub-block size ratio and the size of the coding block, thereby avoiding division into sub-blocks that are too narrow, and effectively ensuring the performance of the hardware.

[0023] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0025] Figure 1 A schematic diagram showing an exemplary system architecture to which the technical solution of the embodiments of the present application can be applied;

[0026] Figure 2 A schematic diagram showing the placement of a video encoding device and a video decoding device in a streaming transmission system;

[0027] Figure 3 shows a basic flow chart of a video encoder;

[0028] Figure 4 shows the analytical graph derived from SBT partitioning;

[0029] Figure 5 A schematic diagram of the partitioning pattern of SBT is shown;

[0030] Figure 6 A schematic diagram of transformation combination in sub-block transformation technology is shown;

[0031] Figure 7 A flowchart of a video decoding method according to an embodiment of the present application is shown;

[0032] Figure 8 A block diagram of a video decoding device according to an embodiment of the present application is shown;

[0033] Fig. 9 A schematic diagram of the structure of a computer system suitable for implementing an electronic device of an embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0035] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0036] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0037] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0038] It should be noted that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0039] Figure 1 A schematic diagram of an exemplary system architecture to which the technical solution of the embodiments of the present application can be applied is shown.

[0040] like Figure 1As shown, the system architecture 100 includes a plurality of terminal devices, which can communicate with each other through, for example, a network 150. For example, the system architecture 100 may include a first terminal device 110 and a second terminal device 120 interconnected through the network 150. Figure 1 In the embodiment of the present invention, the first terminal device 110 and the second terminal device 120 perform unidirectional data transmission.

[0041] For example, the first terminal device 110 may encode video data (e.g., a video picture stream captured by the terminal device 110) for transmission to the second terminal device 120 via the network 150. The encoded video data is transmitted in the form of one or more encoded video code streams. The second terminal device 120 may receive the encoded video data from the network 150, decode the encoded video data to restore the video data, and display the video picture based on the restored video data.

[0042] In one embodiment of the present application, the system architecture 100 may include a third terminal device 130 and a fourth terminal device 140 that perform bidirectional transmission of encoded video data, which may occur during a video conference, for example. For bidirectional data transmission, each of the third terminal device 130 and the fourth terminal device 140 may encode video data (e.g., a video picture stream collected by the terminal device) to transmit to the other terminal device of the third terminal device 130 and the fourth terminal device 140 through the network 150. Each of the third terminal device 130 and the fourth terminal device 140 may also receive the encoded video data transmitted by the other terminal device of the third terminal device 130 and the fourth terminal device 140, and may decode the encoded video data to restore the video data, and may display the video picture on an accessible display device according to the restored video data.

[0043] exist Figure 1 In the embodiment of the present invention, the first terminal device 110, the second terminal device 120, the third terminal device 130 and the fourth terminal device 140 may be servers, personal computers and smart phones, but the principles disclosed in the present application may not be limited thereto. The embodiments disclosed in the present application are applicable to laptop computers, tablet computers, media players and / or dedicated video conferencing equipment. The network 150 represents any number of networks that transmit encoded video data between the first terminal device 110, the second terminal device 120, the third terminal device 130 and the fourth terminal device 140, including, for example, wired and / or wireless communication networks. The communication network 150 may exchange data in circuit switching and / or packet switching channels. The network may include a telecommunications network, a local area network, a wide area network and / or the Internet. For the purpose of the present application, unless explained below, the architecture and topology of the network 150 may be irrelevant to the operation disclosed in the present application.

[0044] In one embodiment of the present application, Figure 2 The placement of the video encoding device and the video decoding device in the streaming environment is shown. The subject matter disclosed in the present application can be equally applicable to other video-supported applications, including, for example, video conferencing, digital TV (television), storing compressed video on digital media including CD, DVD, memory stick, etc.

[0045] The streaming system may include an acquisition subsystem 213, which may include a video source 201 such as a digital camera, which creates an uncompressed video picture stream 202. In an embodiment, the video picture stream 202 includes samples taken by a digital camera. The video picture stream 202 is depicted as a thick line to emphasize the high data volume of the video picture stream compared to the encoded video data 204 (or the encoded video code stream 204), and the video picture stream 202 can be processed by an electronic device 220, which includes a video encoding device 203 coupled to the video source 201. The video encoding device 203 may include hardware, software, or a combination of hardware and software to implement or implement various aspects of the disclosed subject matter as described in more detail below. Compared to the video picture stream 202, the encoded video data 204 (or the encoded video code stream 204) is depicted as a thin line to emphasize the lower data volume of the encoded video data 204 (or the encoded video code stream 204), which can be stored on the streaming server 205 for future use. One or more streaming client subsystems, such as Figure 2 The client subsystem 206 and the client subsystem 208 in the streaming server 205 can access the streaming server 205 to retrieve the copy 207 and the copy 209 of the encoded video data 204. The client subsystem 206 may include, for example, a video decoding device 210 in the electronic device 230. The video decoding device 210 decodes the incoming copy 207 of the encoded video data and generates an output video picture stream 211 that can be presented on a display 212 (e.g., a display screen) or another presentation device. In some streaming systems, the encoded video data 204, the video data 207, and the video data 209 (e.g., a video bitstream) may be encoded according to certain video encoding / compression standards. Examples of these standards include ITU-T H.265. In an embodiment, the video coding standard under development is informally referred to as Versatile Video Coding (VVC), and the present application may be used in the context of the VVC standard.

[0046] It should be noted that the electronic device 220 and the electronic device 230 may include other components not shown in the figure. For example, the electronic device 220 may include a video decoding device, and the electronic device 230 may also include a video encoding device.

[0047] In one embodiment of the present application, taking the international video coding standards HEVC (High Efficiency Video Coding), VVC (Versatile Video Coding), and China's national video coding standard AVS as examples, after a video frame image is input, the video frame image will be divided into several non-overlapping processing units according to a block size, and each processing unit will perform similar compression operations. This processing unit is called CTU (Coding Tree Unit), or LCU. CTU can continue to be divided more finely to obtain one or more basic coding units CU, which is the most basic element in a coding link. The following introduces some concepts when encoding CU:

[0048] Predictive Coding: Predictive coding includes intra-frame prediction and inter-frame prediction. The original video signal is predicted by the selected reconstructed video signal to obtain the residual video signal. The encoder needs to decide which predictive coding mode to choose for the current CU and inform the decoder. Intra-frame prediction means that the predicted signal comes from the encoded and reconstructed area in the same image; inter-frame prediction means that the predicted signal comes from other images that have been encoded and different from the current image (called reference images).

[0049] Transform & Quantization: After the residual video signal is transformed by DFT (Discrete Fourier Transform), DCT and other transformation operations, the signal is converted into the transform domain, which is called the transform coefficient. The transform coefficient is further subjected to lossy quantization operation, which loses a certain amount of information, making the quantized signal conducive to compression expression. In some video coding standards, there may be more than one transform method to choose from, so the encoder also needs to select one of the transform methods for the current CU and inform the decoder. The degree of quantization is usually determined by the quantization parameter (QP). A larger QP value means that coefficients with a larger value range will be quantized to the same output, which usually results in greater distortion and lower bit rate; on the contrary, a smaller QP value means that coefficients with a smaller value range will be quantized to the same output, which usually results in less distortion and a higher bit rate.

[0050] Entropy Coding or Statistical Coding: The quantized transform domain signal will be statistically compressed and encoded according to the frequency of occurrence of each value, and finally output as a binary (0 or 1) compressed bit stream. At the same time, the encoding generates other information, such as the selected coding mode, motion vector data, etc., which also need to be entropy encoded to reduce the bit rate. Statistical coding is a lossless coding method that can effectively reduce the bit rate required to express the same signal. Common statistical coding methods include variable length coding (VLC) or context-based binary arithmetic coding (CABAC).

[0051] Loop Filtering: The changed and quantized signal will be reconstructed through inverse quantization, inverse transformation and prediction compensation operations to obtain a reconstructed image. Compared with the original image, due to the influence of quantization, some information of the reconstructed image is different from the original image, that is, the reconstructed image will produce distortion. Therefore, the reconstructed image can be filtered, such as deblocking filter (DB), SAO (Sample Adaptive Offset) or ALF (Adaptive Loop Filter) and other filters, which can effectively reduce the degree of distortion caused by quantization. Since these filtered reconstructed images will be used as a reference for subsequent encoded images to predict future image signals, the above filtering operation is also called loop filtering, that is, filtering operation within the encoding loop.

[0052] In one embodiment of the present application, Figure 3 The basic flow chart of a video encoder is shown in FIG. 1 , in which intra-frame prediction is used as an example for explanation. In which the original image signal s k [x,y] and predicted image signal Perform difference operation to obtain the residual signal u k [x,y], residual signal u k [x,y] is transformed and quantized to obtain the quantized coefficients. The quantized coefficients are entropy coded to obtain the encoded bit stream, and the reconstructed residual signal u' is obtained through inverse quantization and inverse transformation. k [x,y], predicted image signal and reconstructed residual signal u' k [x,y] superposition generates image signal Image signal On the one hand, it is input to the intra-frame mode decision module and the intra-frame prediction module for intra-frame prediction processing, and on the other hand, the reconstructed image signal s' is output through loop filtering k [x,y], reconstructed image signal s' k [x,y] can be used as the reference image for the next frame for motion estimation and motion compensation prediction. Then based on the result of motion compensation prediction s' r [x+m x ,y+m y ] and intra prediction results Get the predicted image signal of the next frame And continue to repeat the above process until the encoding is completed.

[0053] Based on the above encoding process, at the decoding end, for each CU, after obtaining the compressed code stream (i.e., bit stream), entropy decoding is performed to obtain various mode information and quantization coefficients. The quantization coefficients are then dequantized and inversely transformed to obtain a residual signal. On the other hand, based on the known encoding mode information, the prediction signal corresponding to the CU can be obtained, and then the residual signal and the prediction signal are added to obtain the reconstructed signal. The reconstructed signal is then subjected to loop filtering and other operations to generate the final output signal.

[0054] In the above encoding and decoding process, the transformation processing of the residual signal makes the energy of the residual signal concentrated in fewer low-frequency coefficients, that is, most of the coefficient values ​​are small. Then after the subsequent quantization module, the smaller coefficient values ​​will become zero values, which greatly reduces the cost of encoding the residual signal. However, due to the diversity of residual distribution, a single DCT transform cannot adapt to all residual characteristics. Therefore, transform cores such as DST7 and DCT8 are introduced into the transformation processing process, and different transform cores can be used for the horizontal and vertical transformations of the residual signal. Taking AMT (Adaptive multiple core transform) technology as an example, the transform combinations that may be selected for transform processing of a residual signal are as follows: (DCT2, DCT2), (DCT8, DCT8), (DCT8, DST7), (DST7, DCT8) and (DST7, DST7).

[0055] At the same time, AVS3 also mentions the sub-block transform (SBT) technology. Among them, SBT has 8 sub-block division results, and only the gray part (non-zero residual sub-block) in the sub-block is transform-encoded, while the white part (zero residual sub-block) is forcibly cleared. Specifically, the following Table 1 shows the relevant description of SBT in the AVS3 standard:

[0056]

[0057] Table 1

[0058] As shown in Table 1, when the enable flag SbtEnableFlag of SBT is enabled and the width (width) and height (height) of the coding block are met, sbt_cu_flag will be parsed and assigned to SbtCuFlag (the value is 0 or 1). If SbtCuFlag is 1, the conditional assignments SbtVerHalf=width>=8, SbtVerQuad=width>=16, SbtHorHalf=height>=8 and SbtHorQuad=height>=16 are executed. Among them, SbtVerHalf represents the vertical binary mode flag, SbtVerQuad represents the vertical four-division mode flag, SbtHorHalf represents the horizontal binary mode flag, and SbtHorQuad represents the horizontal four-division mode flag.

[0059] That is, in the current AVS3 standard, the size of the coding block that can execute SBT should meet the following conditions: (width <= 64) && (height <= 64) && (width> 4||height> 4). And on this basis, the size of the coding block of different partitioning modes has further restrictions, as shown below:

[0060] For the horizontal four-division mode: SbtHorQuad=height>=16?1:0, where the SbtHorQuad value is 1, indicating that the horizontal four-division mode is allowed, and the SbtHorQuad value is 0, indicating that the horizontal four-division mode is prohibited.

[0061] For the horizontal binary division mode: SbtHorHalf=height>=8?1:0, where the SbtHorHalf value of 1 indicates that the horizontal binary division mode is allowed, and the SbtHorHalf value of 0 indicates that the horizontal binary division mode is prohibited.

[0062] For the vertical quarter mode: SbtVerQuad=width>=16?1:0, where the SbtVerQuad value of 1 indicates that the vertical quarter mode is allowed, and the SbtVerQuad value of 0 indicates that the vertical quarter mode is prohibited.

[0063] For the vertical binary division mode: SbtVerHalf=width>=8?1:0, where the SbtVerHalf value of 1 indicates that the vertical binary division mode is allowed, and the SbtVerHalf value of 0 indicates that the vertical binary division mode is prohibited.

[0064] Continuing with Table 1, if the value of SbtVerHalf or SbtHorHalf is 1, and the value of SbtVerQuad or SbtHorQuad is 1, then sbt_quad_flag (value 0 or 1) will be parsed. If the values ​​of SbtQuadFlag, SbtVerQuad, and SbtHorQuad are all 1, or! The values ​​of SbtQuadFlag, SbtVerHalf, and SbtHorHalf are all 1, then sbt_dir_flag (value 0 or 1) will be parsed.

[0065] Based on Table 1, combined Figure 4 As shown in the figure, if the value of quad is 1, the value of dir is 0, and the value of pos is 0, the vertical quartering mode is adopted, and only the left sub-block (gray part) is transform coded, while the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 1, the value of dir is 0, and the value of pos is 1, the vertical quartering mode is adopted, and only the right sub-block (gray part) is transform coded, while the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 1, the value of dir is 1, and the value of pos is 0, the horizontal quartering mode is adopted, and only the upper sub-block (gray part) is transform coded, while the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 1, the value of dir is 1, and the value of pos is 1, the horizontal quartering mode is adopted, and only the lower sub-block (gray part) is transform coded, while the other sub-blocks (white part) are forcibly cleared Zero; if the value of quad is 0, the value of dir is 0, and the value of pos is 0, the vertical binary division mode is adopted, and only the left sub-block (gray part) is transform coded, and the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 0, the value of dir is 0, and the value of pos is 1, the vertical binary division mode is adopted, and only the right sub-block (gray part) is transform coded, and the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 0, the value of dir is 1, and the value of pos is 0, the horizontal binary division mode is adopted, and only the upper sub-block (gray part) is transform coded, and the other sub-blocks (white part) are forcibly cleared to zero; if the value of quad is 0, the value of dir is 1, and the value of pos is 1, the horizontal binary division mode is adopted, and only the lower sub-block (gray part) is transform coded, and the other sub-blocks (white part) are forcibly cleared to zero.

[0066] in, Figure 4 The quad in can be regarded as the syntax for controlling the size of the sub-block, and dir and pos can be regarded as the syntax for controlling the position of the sub-block. In other words, quad determines the size (area) of the sub-block, while dir and pos determine the position of the sub-block. Figure 4The quad, dir and pos in the AVS3 text correspond to sbt_quad_flag, sbt_dir_flag and sbt_pos_flag respectively. sbt_quad_flag and sbt_dir_flag can be directly parsed from the bitstream (see Table 1), and sbt_pos_flag is implicitly derived through coefficient statistics. sbt_quad_flag, sbt_dir_flag and sbt_pos_flag jointly determine the specific SBT partitioning mode.

[0067] based on Figure 4 It can be seen that the eight division modes of SBT can be divided into the following categories according to the division method and division direction: Figure 5 The horizontal mode and the vertical mode divide the current coding block in the horizontal direction and the vertical direction respectively, and the four-division mode and the two-division mode respectively divide the 1 / 4 and 1 / 2 sub-blocks along the corresponding division direction for encoding.

[0068] Among the eight division modes of SBT, the gray sub-blocks are not further divided and coefficient encoding is performed directly.

[0069] Regarding the transformation combination selection of sub-blocks, when the width or height of the non-zero residual sub-block is 64, the horizontal and vertical transforms of the non-zero residual sub-block are both DCT-2; in other cases, the selection of horizontal and vertical transforms is as follows Figure 6 As shown. Figure 6 In the case of a sub-block, the gray part will be transformed horizontally and vertically according to the transformation mode indicated, while the white part will be forcibly cleared. Figure 6 Here, w1 can be 1 / 2 of w (width) or 1 / 4 of w; h1 can be 1 / 2 of h (height) or 1 / 4 of h.

[0070] In addition, the encoder may be configured to skip transformation during residual coding of the gray part and directly perform quantization and coefficient coding.

[0071] Although the current SBT scheme in the AVS3 standard imposes certain restrictions on the size of the coding block, after the coding block is divided, it may still produce too narrow sub-blocks. For example, for a 64×8 (width×height) coding block, horizontal binary division will produce a 64×4 transform block, which is too narrow in the horizontal direction; for a 64×16 (width×height) coding block, horizontal quadruple division will produce a 64×4 transform block, which is too narrow in the horizontal direction. Because too narrow transform blocks will reduce hardware performance and affect encoding and decoding efficiency. Therefore, the technical solution of the embodiment of the present application proposes a solution to further limit the coding blocks using SBT technology, avoiding the division of too narrow sub-blocks and effectively ensuring the performance of the hardware. The detailed description is as follows:

[0072] Figure 7 A flowchart of a video decoding method according to an embodiment of the present application is shown. The video decoding method can be executed by a device with a computing and processing function, such as a terminal device or a server. Figure 7 As shown, the video decoding method at least includes steps S710 to S740, which are described in detail as follows:

[0073] In step S710, a coding block of a video image frame is obtained.

[0074] In one embodiment of the present application, a video image frame sequence includes a series of images, each of which can be further divided into slices, which can be further divided into a series of LCUs (or CTUs), and the LCU contains several CUs. When encoding, the video image frame is encoded in blocks. In some new video coding standards, such as the H.264 standard, there are macroblocks (MB), which can be further divided into multiple prediction blocks (prediction) that can be used for predictive coding. In the HEVC standard, basic concepts such as coding units CU, prediction units (PU) and transform units (TU) are used to functionally divide various block units and describe them using a new tree-based structure. For example, CU can be divided into smaller CUs according to a quadtree, and the smaller CU can be further divided to form a quadtree structure. The coding block in the embodiment of the present application can be a CU, or a smaller block than a CU, such as a smaller block obtained by dividing a CU.

[0075] In step S720, if the coding block needs to be transformed into a sub-block, the partitioning mode that can be adopted by the coding block is determined according to the maximum allowed sub-block size ratio and the size of the coding block.

[0076] In one embodiment of the present application, whether a coding block needs to adopt a sub-block transformation technology can be determined according to an explicit index and / or an implicit derived index contained in the coding block.

[0077] In one embodiment of the present application, the maximum sub-block size ratio may include a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is equal to the value of the maximum height-to-width ratio. In this case, the value of the maximum sub-block size ratio may be decoded from a sequence header of a video image frame.

[0078] In one embodiment of the present application, the maximum sub-block size ratio may include a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is not equal to the value of the maximum height-to-width ratio. In this case, the value of the maximum aspect ratio and the value of the maximum height-to-width ratio can be decoded from the sequence header of the video image frame, respectively.

[0079] In one embodiment of the present application, the value of the maximum sub-block size ratio may reuse the value of the maximum coding block size ratio allowed in the standard, that is, the value of the maximum sub-block size ratio may be the same as the value of the allowed maximum coding block size ratio.

[0080] In one embodiment of the present application, the process of determining the division mode that can be adopted by the coding block according to the maximum allowed sub-block size ratio and the size of the coding block specifically includes: if the width of the coding block is greater than or equal to 8, and the 2 times height of the coding block is less than or equal to the product of the width and the maximum sub-block size ratio, then the coding block is allowed to adopt the vertical binary division mode, otherwise the coding block is prohibited from adopting the vertical binary division mode. In this embodiment, the maximum sub-block size ratio is the maximum aspect ratio.

[0081] In one embodiment of the present application, the process of determining the division mode that can be adopted by the coding block according to the maximum allowed sub-block size ratio and the size of the coding block specifically includes: if the width of the coding block is greater than or equal to 16, and 4 times the height of the coding block is less than or equal to the product of the width and the maximum sub-block size ratio, then the coding block is allowed to adopt the vertical quartering mode, otherwise the coding block is prohibited from adopting the vertical quartering mode. In this embodiment, the maximum sub-block size ratio is the maximum aspect ratio.

[0082] In one embodiment of the present application, the process of determining the division mode that can be adopted by the coding block according to the maximum allowed sub-block size ratio and the size of the coding block specifically includes: if the height of the coding block is greater than or equal to 8, and the 2 times width of the coding block is less than or equal to the product of the height and the maximum sub-block size ratio, then the coding block is allowed to adopt the horizontal binary division mode, otherwise the coding block is prohibited from adopting the horizontal binary division mode. In this embodiment, the maximum sub-block size ratio is the maximum aspect ratio.

[0083] In one embodiment of the present application, the process of determining the division mode that can be adopted by the coding block according to the maximum allowed sub-block size ratio and the size of the coding block specifically includes: if the height of the coding block is greater than or equal to 16, and the 4 times width of the coding block is less than or equal to the product of the height and the maximum sub-block size ratio, then the coding block is allowed to adopt the horizontal quartering mode, otherwise the coding block is prohibited from adopting the horizontal quartering mode. In this embodiment, the maximum sub-block size ratio is the maximum aspect ratio.

[0084] Continue to refer to Figure 7 As shown, in step S730, based on the partitioning modes that can be adopted by the coding block, the target partitioning mode adopted when performing sub-block transformation processing on the coding block is determined.

[0085] In one embodiment of the present application, the target partitioning mode used by the coding block when performing sub-block transformation processing can be specifically determined by referring to the technical solutions of the above embodiments (such as Table 1 and Figure 4 The scheme shown in FIG. 1 is not described in detail here.

[0086] In step S740, the coding block is divided based on the target division mode, and a plurality of sub-blocks obtained by the division are decoded.

[0087] In one embodiment of the present application, in the process of decoding the multiple sub-blocks obtained by division, the sub-blocks can perform both a transform skip operation and an inverse transform operation. This process is the inverse process of the encoding end. If the encoding end performs a transform skip operation on the sub-block, the decoding end also performs a transform skip operation on the sub-block; if the encoding end performs a transform operation on the sub-block, the decoding end also performs an inverse transform operation on the sub-block.

[0088] In summary, the technical solution of the embodiment of the present application further adds the following restrictions on the existing coding block size restriction of SBT:

[0089] For the horizontal four-part mode: SbtHorQuad=(width×4<=height×MaxPartRatio)?SbtHorQuad:0, where the SbtHorQuad value is 1, indicating that the horizontal four-part mode is allowed, and the SbtHorQuad value is 0, indicating that the horizontal four-part mode is prohibited.

[0090] For the horizontal binary division mode: SbtHorHalf=(width×2<=height×MaxPartRatio)?SbtHorHalf:0, where the value of SbtHorHalf is 1, indicating that the horizontal binary division mode is allowed, and the value of SbtHorHalf is 0, indicating that the horizontal binary division mode is prohibited.

[0091] For the vertical four-part mode: SbtVerQuad=(height×4<=width×MaxPartRatio)?SbtVerQuad:0, where the SbtVerQuad value is 1, indicating that the vertical four-part mode is allowed, and the SbtVerQuad value is 0, indicating that the vertical four-part mode is prohibited.

[0092] For the vertical binary division mode: SbtVerHalf=(height×2<=width×MaxPartRatio)?SbtVerHalf:0, where the SbtVerHalf value is 1, indicating that the vertical binary division mode is allowed, and the SbtVerHalf value is 0, indicating that the vertical binary division mode is prohibited.

[0093] Among them, MaxPartRatio represents the maximum allowed sub-block size ratio, which includes the maximum aspect ratio and the maximum height-to-width ratio (both are non-zero integers). Usually, the maximum aspect ratio and the maximum height-to-width ratio are equal. If the maximum aspect ratio and the maximum height-to-width ratio are not equal, then for the horizontal four-partition mode and the horizontal two-partition mode, the maximum size ratio can use the maximum aspect ratio; for the vertical four-partition mode and the vertical two-partition mode, the maximum size ratio can use the maximum height-to-width ratio.

[0094] In one embodiment of the present application, if the maximum aspect ratio and the maximum height-to-width ratio are equal, then when SBT is turned on, they can be encoded in the sequence header, and the maximum aspect ratio of the coding block allowed in the existing AVS3 standard can also be reused, that is, the value of the maximum sub-block size ratio can be the same as the value of the maximum allowed coding block size ratio. If the maximum aspect ratio and the maximum height-to-width ratio are not equal, then when SBT is turned on, they can be encoded separately in the sequence header.

[0095] Based on the restrictions added in the embodiments of the present application, the relevant description of SBT can be modified as shown in Table 2:

[0096]

[0097] Table 2

[0098] Based on the relevant restrictions shown in Table 2, in one embodiment of the present application, if MaxPartRatio=8, then for an 8×64 coding block, vertical binary division into 4×64 sub-blocks is prohibited; for a 16×64 coding block, vertical quartering division into 4×64 sub-blocks is prohibited; for a 64×8 coding block, horizontal binary division into 64×4 sub-blocks is prohibited; for a 64×16 coding block, horizontal quartering division into 64×4 sub-blocks is prohibited. It can be seen that the technical solution of the embodiment of the present application can limit the division mode of the coding block by the maximum allowed sub-block size ratio and the size of the coding block, avoiding the division into too narrow sub-blocks and effectively ensuring the performance of the hardware.

[0099] It should be noted that, for the encoding end, after obtaining the residual coefficient block of the video image frame, the division mode that can be adopted by the residual coefficient block can be determined according to the size of the residual coefficient block and the maximum sub-block size ratio allowed, and then the target division mode for the residual coefficient block can be selected from the division modes that can be adopted, and the information of the target division mode can be encoded into the bitstream.

[0100] Optionally, the encoder may select an optimal partitioning mode as a target partitioning mode from the partitioning modes that can be adopted by the residual coefficient block based on RDO (Rate Distortion Optimization).

[0101] The following describes an apparatus embodiment of the present application, which can be used to execute the video decoding method in the above-mentioned embodiment of the present application. For details not disclosed in the apparatus embodiment of the present application, please refer to the above-mentioned embodiment of the video decoding method of the present application.

[0102] Figure 8 A block diagram of a video decoding device according to an embodiment of the present application is shown. The video decoding device can be set in a device with a computing and processing function, such as a terminal device or a server.

[0103] Reference Figure 8 As shown, a video decoding device 800 according to an embodiment of the present application includes: an acquisition unit 802 , a first processing unit 804 , a second processing unit 806 and a third processing unit 808 .

[0104] Among them, the acquisition unit 802 is configured to acquire the coding block of the video image frame; the first processing unit 804 is configured to determine the division mode that can be adopted by the coding block according to the maximum allowed sub-block size ratio and the size of the coding block if the coding block needs to be sub-block transformed; the second processing unit 806 is configured to determine the target division mode adopted when performing sub-block transformation on the coding block based on the division mode that can be adopted by the coding block; the third processing unit 808 is configured to divide the coding block based on the target division mode, and decode the multiple sub-blocks obtained by the division.

[0105] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit 804 is configured as follows: if the width of the coding block is greater than or equal to 8, and twice the height of the coding block is less than or equal to the product of the width and the maximum size ratio of the sub-block, then the coding block is allowed to adopt a vertical binary division mode; otherwise, the coding block is prohibited from adopting the vertical binary division mode.

[0106] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit 804 is configured as follows: if the width of the coding block is greater than or equal to 16, and 4 times the height of the coding block is less than or equal to the product of the width and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the vertical quartering mode; otherwise, the coding block is prohibited from adopting the vertical quartering mode.

[0107] In some embodiments of the present application, based on the aforementioned solution, the maximum sub-block size ratio is the maximum aspect ratio.

[0108] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit 804 is configured as follows: if the height of the coding block is greater than or equal to 8, and twice the width of the coding block is less than or equal to the product of the height and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the horizontal binary division mode; otherwise, the coding block is prohibited from adopting the horizontal binary division mode.

[0109] In some embodiments of the present application, based on the aforementioned scheme, the first processing unit 804 is configured as follows: if the height of the coding block is greater than or equal to 16, and 4 times the width of the coding block is less than or equal to the product of the height and the maximum size ratio of the sub-block, then the coding block is allowed to adopt the horizontal quartering mode; otherwise, the coding block is prohibited from adopting the horizontal quartering mode.

[0110] In some embodiments of the present application, based on the aforementioned solution, the maximum sub-block size ratio is the maximum aspect ratio of the sub-block.

[0111] In some embodiments of the present application, based on the aforementioned scheme, the maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is equal to the value of the maximum height-to-width ratio; the video decoding device 800 also includes: a first decoding unit, configured to decode the value of the maximum sub-block size ratio from the sequence header of the video image frame.

[0112] In some embodiments of the present application, based on the aforementioned scheme, the maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is not equal to the value of the maximum height-to-width ratio; the video decoding device 800 also includes: a second decoding unit, configured to respectively decode the value of the maximum aspect ratio and the value of the maximum height-to-width ratio from the sequence header of the video image frame.

[0113] In some embodiments of the present application, based on the aforementioned scheme, the value of the maximum sub-block size ratio is the same as the value of the allowed maximum coding block size ratio.

[0114] In some embodiments of the present application, based on the above-mentioned solution, the third processing unit 808 is configured to: perform a transform skip operation or perform an inverse transform operation during the decoding process of the multiple sub-blocks obtained by division.

[0115] Fig. 9 A schematic diagram of the structure of a computer system suitable for implementing an electronic device of an embodiment of the present application is shown.

[0116] It should be noted that Fig. 9 The computer system 900 of the electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0117] like Fig. 9 As shown, the computer system 900 includes a central processing unit (CPU) 901, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 902 or the program loaded from the storage part 908 to the random access memory (RAM) 903, such as executing the method described in the above embodiment. In the RAM 903, various programs and data required for system operation are also stored. The CPU 901, ROM 902 and RAM 903 are connected to each other through a bus 904. An input / output (I / O) interface 905 is also connected to the bus 904.

[0118] The following components are connected to the I / O interface 905: an input section 906 including a keyboard, a mouse, etc.; an output section 907 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN (Local Area Network) card, a modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the I / O interface 905 as needed. A removable medium 911, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 910 as needed so that a computer program read therefrom is installed into the storage section 908 as needed.

[0119] In particular, according to an embodiment of the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a computer program for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication section 909, and / or installed from a removable medium 911. When the computer program is executed by a central processing unit (CPU) 901, various functions defined in the system of the present application are executed.

[0120] It should be noted that the computer-readable medium shown in the embodiment of the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, - but not limited to - an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by an instruction execution system, device or device or used in combination with it. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, wherein a computer-readable computer program is carried. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, which may send, propagate, or transmit programs for use by or in conjunction with an instruction execution system, apparatus, or device. The computer program contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0121] The flowchart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operations of the system, method and computer program product according to various embodiments of the present application. Wherein, each box in the flowchart or block diagram can represent a module, a program segment, or a part of the code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0122] The units involved in the embodiments described in this application may be implemented by software or hardware, and the units described may also be set in a processor. The names of these units do not, in some cases, constitute limitations on the units themselves.

[0123] As another aspect, the present application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiment; or may exist independently without being assembled into the electronic device. The above computer-readable medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the method described in the above embodiment.

[0124] It should be noted that, although several modules or units of the equipment for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into being embodied by multiple modules or units.

[0125] Through the description of the above implementation methods, it is easy for those skilled in the art to understand that the example implementation methods described here can be implemented by software or by combining software with necessary hardware. Therefore, the technical solution according to the implementation methods of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to execute the method according to the implementation methods of the present application.

[0126] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the embodiments disclosed herein. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common knowledge or customary technical means in the art that are not disclosed in the present application.

[0127] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A video decoding method, characterized in that: include: Obtaining a coding block of a video image frame; If the coding block needs to be transformed into a sub-block, determining a partitioning mode that can be used for the coding block according to an allowed maximum sub-block size ratio and a size of the coding block; Determining, based on the partition modes that can be used by the coding block, a target partition mode used when performing sub-block transformation processing on the coding block; Dividing the coding block based on the target division mode, and decoding the multiple sub-blocks obtained by the division; The division mode that can be adopted by the coding block is determined according to the maximum allowed sub-block size ratio and the size of the coding block, including at least one of the following methods: If the width of the coding block is greater than or equal to 8, and twice the height of the coding block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the coding block is allowed to adopt the vertical binary division mode, otherwise the coding block is prohibited from adopting the vertical binary division mode; If the width of the coding block is greater than or equal to 16, and 4 times the height of the coding block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the coding block is allowed to adopt the vertical quartering mode, otherwise the coding block is prohibited from adopting the vertical quartering mode; If the height of the coding block is greater than or equal to 8, and the 2 times width of the coding block is less than or equal to the product of the maximum size ratio of the second sub-block and the height, the coding block is allowed to adopt the horizontal binary division mode, otherwise the coding block is prohibited from adopting the horizontal binary division mode; If the height of the coding block is greater than or equal to 16, and the 4 times width of the coding block is less than or equal to the product of the second sub-block maximum size ratio and the height, the coding block is allowed to adopt the horizontal quartering mode; otherwise, the coding block is prohibited from adopting the horizontal quartering mode.

2. The video decoding method according to claim 1, characterized in that: The first sub-block maximum size ratio is a maximum height-to-width ratio of the sub-block.

3. The video decoding method according to claim 1, characterized in that: The second sub-block maximum size ratio is a maximum aspect ratio of the sub-block.

4. The video decoding method according to claim 1, characterized in that: The maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is equal to the value of the maximum height-to-width ratio; The video decoding method further includes: decoding the value of the sub-block maximum size ratio from a sequence header of the video image frame.

5. The video decoding method according to claim 1, characterized in that: The maximum sub-block size ratio includes a maximum aspect ratio and a maximum height-to-width ratio, and the value of the maximum aspect ratio is not equal to the value of the maximum height-to-width ratio; The video decoding method further includes: respectively decoding the value of the maximum aspect ratio and the value of the maximum height-to-width ratio from a sequence header of the video image frame.

6. The video decoding method according to claim 1, characterized in that: The value of the maximum sub-block size ratio is the same as the value of the allowed maximum coding block size ratio.

7. The video decoding method according to claim 1, characterized in that: In the process of decoding the multiple sub-blocks obtained by division, a transform skip operation is performed or an inverse transform operation is performed.

8. A video encoding method, characterized in that: include: Obtaining a residual coefficient block of a video image frame; Determining a partitioning mode that can be adopted by the residual coefficient block according to the maximum allowed sub-block size ratio and the size of the residual coefficient block; Selecting a target partitioning mode for the residual coefficient block from the partitioning modes that can be adopted; Encoding information of the target partitioning mode into a bit stream; The partitioning mode that can be adopted by the residual coefficient block is determined according to the maximum allowed sub-block size ratio and the size of the residual coefficient block, including at least one of the following methods: If the width of the residual coefficient block is greater than or equal to 8, and twice the height of the residual coefficient block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the residual coefficient block is allowed to adopt the vertical binary division mode, otherwise the residual coefficient block is prohibited from adopting the vertical binary division mode; If the width of the residual coefficient block is greater than or equal to 16, and the 4 times height of the residual coefficient block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the residual coefficient block is allowed to adopt the vertical quartering mode, otherwise the residual coefficient block is prohibited from adopting the vertical quartering mode; If the height of the residual coefficient block is greater than or equal to 8, and the double width of the residual coefficient block is less than or equal to the product of the second sub-block maximum size ratio and the height, the residual coefficient block is allowed to adopt the horizontal binary mode, otherwise the residual coefficient block is prohibited from adopting the horizontal binary mode; If the height of the residual coefficient block is greater than or equal to 16, and the 4 times width of the residual coefficient block is less than or equal to the product of the maximum size ratio of the second sub-block and the height, the residual coefficient block is allowed to adopt the horizontal quartering mode; otherwise, the residual coefficient block is prohibited from adopting the horizontal quartering mode.

9. A video decoding device, characterized in that: include: An acquisition unit configured to acquire a coding block of a video image frame; A first processing unit is configured to determine a partitioning mode that can be used for the coding block according to an allowed maximum sub-block size ratio and a size of the coding block if the coding block needs to be sub-block transformed; A second processing unit is configured to determine a target partitioning mode used when performing sub-block transformation processing on the coding block based on the partitioning modes that can be used by the coding block; A third processing unit is configured to perform a partition process on the coding block based on the target partition mode, and perform a decoding process on the multiple sub-blocks obtained by the partition; The division mode that can be adopted by the coding block is determined according to the maximum allowed sub-block size ratio and the size of the coding block, including at least one of the following methods: If the width of the coding block is greater than or equal to 8, and twice the height of the coding block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the coding block is allowed to adopt the vertical binary division mode, otherwise the coding block is prohibited from adopting the vertical binary division mode; If the width of the coding block is greater than or equal to 16, and 4 times the height of the coding block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the coding block is allowed to adopt the vertical quartering mode, otherwise the coding block is prohibited from adopting the vertical quartering mode; If the height of the coding block is greater than or equal to 8, and the 2 times width of the coding block is less than or equal to the product of the maximum size ratio of the second sub-block and the height, the coding block is allowed to adopt the horizontal binary division mode, otherwise the coding block is prohibited from adopting the horizontal binary division mode; If the height of the coding block is greater than or equal to 16, and the 4 times width of the coding block is less than or equal to the product of the second sub-block maximum size ratio and the height, the coding block is allowed to adopt the horizontal quartering mode; otherwise, the coding block is prohibited from adopting the horizontal quartering mode.

10. A video encoding device, characterized in that: include: An acquisition unit configured to acquire a residual coefficient block of a video image frame; a fourth processing unit, configured to determine a partitioning mode that can be adopted by the residual coefficient block according to the maximum allowed sub-block size ratio and the size of the residual coefficient block; A selection unit, configured to select a target partitioning mode for the residual coefficient block from the partitioning modes that can be adopted; An encoding unit, configured to encode information of the target partitioning mode into a bit stream; The partitioning mode that can be adopted by the residual coefficient block is determined according to the maximum allowed sub-block size ratio and the size of the residual coefficient block, including at least one of the following methods: If the width of the residual coefficient block is greater than or equal to 8, and twice the height of the residual coefficient block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the residual coefficient block is allowed to adopt the vertical binary division mode, otherwise the residual coefficient block is prohibited from adopting the vertical binary division mode; If the width of the residual coefficient block is greater than or equal to 16, and the 4 times height of the residual coefficient block is less than or equal to the product of the maximum size ratio of the first sub-block and the width, the residual coefficient block is allowed to adopt the vertical quartering mode, otherwise the residual coefficient block is prohibited from adopting the vertical quartering mode; If the height of the residual coefficient block is greater than or equal to 8, and the double width of the residual coefficient block is less than or equal to the product of the second sub-block maximum size ratio and the height, the residual coefficient block is allowed to adopt the horizontal binary mode, otherwise the residual coefficient block is prohibited from adopting the horizontal binary mode; If the height of the residual coefficient block is greater than or equal to 16, and the 4 times width of the residual coefficient block is less than or equal to the product of the maximum size ratio of the second sub-block and the height, the residual coefficient block is allowed to adopt the horizontal quartering mode; otherwise, the residual coefficient block is prohibited from adopting the horizontal quartering mode.

11. An electronic device, characterized in that: include: one or more processors; A storage device for storing one or more programs, which, when executed by the one or more processors, enables the one or more processors to implement the method according to any one of claims 1 to 8.

12. A computer readable medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

13. A computer program product, characterized in that The computer program product comprises a computer program, the computer program is stored in a computer-readable storage medium, a processor of a computer device reads and executes the computer program from the computer-readable storage medium, so that the computer device executes the method according to any one of claims 1 to 8.

14. A method for processing a video code stream, characterized in that: The video code stream is decoded based on the video decoding method according to any one of claims 1 to 7.

15. A method for processing a video code stream, characterized in that: The video code stream is generated according to the video encoding method according to claim 8.

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