Flyback circuit and method for energy recovery thereof

Abstract

An energy recovery circuit for a flyback circuit. The flyback circuit includes a transformer having a primary winding. The energy recovery circuit includes an energy recovery branch coupled in parallel to the primary winding and a recovery control integrated circuit having a plurality of pins. The energy recovery branch includes an auxiliary switch and a clamping capacitor coupled in series. Wherein a first pin receives an external supply voltage, a second pin is for a power ground different from a primary ground. A third pin is for sensing a current flowing through the energy recovery branch. A fourth pin is for controlling operation of the auxiliary switch. A fifth pin is coupled to an external resistor for setting a maximum on-time threshold of the auxiliary switch.

Description

Technical Field

[0001] This invention relates to electronic circuits, and more particularly to an energy recovery circuit for flyback circuits and a method for energy recovery thereof. Background Technology

[0002] Flyback circuits are widely used in AC-to-DC converters, and much research has focused on eliminating voltage spikes and reducing voltage stress in flyback circuits. Snubber circuits are widely used due to their simple structure and low cost.

[0003] Figure 1 An RCD buffer 11 of a conventional flyback circuit 100 is shown. The RCD buffer 11 includes a clamping capacitor Csn, a buffer resistor Rsn, and a diode Dsn. When the primary-side control signal GP provided by the primary-side controller 10 turns off the primary-side switch MP coupled to the primary-side winding Np, the leakage inductance of the transformer T transfers its leakage inductance energy to charge the clamping capacitor Csn through the diode Dsn. After the charging process of the clamping capacitor Csn is complete, the energy stored in the clamping capacitor Csn is consumed by the buffer resistor Rsn. Although voltage spikes in the flyback circuit 100 can thus be suppressed, the efficiency of the flyback circuit is reduced because the leakage inductance energy is depleted rather than recovered.

[0004] Therefore, it is necessary to provide a simple and low-cost solution to recover leakage inductance energy. Summary of the Invention

[0005] To achieve the above and other objectives, an embodiment of the present invention provides a simple and low-cost circuit and method for recovering leakage inductance energy.

[0006] According to an embodiment of the present invention, an energy recovery circuit for a flyback circuit is provided. The flyback circuit includes a transformer having a primary winding. The energy recovery circuit includes an energy recovery branch and a recovery control integrated circuit. The energy recovery branch includes an auxiliary switch and a clamping capacitor connected in series, wherein a first terminal of the clamping capacitor is coupled to a first terminal of the primary winding, a second terminal of the clamping capacitor is coupled to a first terminal of the auxiliary switch, and a second terminal of the auxiliary switch is coupled to a second terminal of the primary winding. The recovery control integrated circuit includes a plurality of pins, wherein a first pin is used to receive an externally supplied voltage, a second pin is coupled to power ground, a third pin is used to sense the branch current flowing through the energy recovery branch, a fourth pin is coupled to the control terminal of the auxiliary switch, and a fifth pin is coupled to an external resistor to set a maximum on-time threshold for the auxiliary switch.

[0007] According to another embodiment of the present invention, a method for recovering energy using a flyback circuit is provided. The flyback circuit includes a transformer having a primary winding. The method includes the following steps: An energy recovery branch is coupled in parallel to the primary winding, wherein the energy recovery branch includes an auxiliary switch and a clamping capacitor coupled in series. The auxiliary switch is controlled by a first pin of a control circuit integrated as a recovery control integrated circuit. A maximum on-time threshold of the auxiliary switch is set by coupling an external resistor to a second pin of the recovery control integrated circuit. A branch current flowing through the energy recovery branch is sensed by a third pin of the recovery control integrated circuit. The auxiliary switch is turned on in response to a current detection signal characterizing the branch current decreasing to a first value. After the auxiliary switch is turned on, a timing is started. When the on-time of the auxiliary switch reaches the maximum on-time threshold, a maximum on-time control signal is generated.

[0008] According to another embodiment of the present invention, a flyback circuit is provided. The flyback circuit includes the primary winding of a transformer, a primary switch, and the energy recovery circuit as described above.

[0009] According to embodiments of the present invention, the energy recovery circuit of the present invention can recover leakage inductance energy, thereby increasing the efficiency of the flyback circuit. Furthermore, the energy recovery circuit of the present invention has the advantages of simple structure and low cost. On the other hand, the recovery control integrated circuit of the present invention can be selectively paired with any primary-side controller to form a flyback circuit and improve the reliability of the flyback circuit. Attached Figure Description

[0010] The invention will be further understood by referring to the following detailed description and accompanying drawings, wherein similar components have similar reference numerals. The following drawings are for illustrative purposes only and may show only a portion of the device, and are not necessarily drawn to scale.

[0011] Figure 1 The RCD buffer 11 of a conventional flyback circuit 100 is shown.

[0012] Figure 2 A schematic diagram of a flyback circuit 200 according to an embodiment of the present invention is shown.

[0013] Figure 3 An embodiment of the present invention is shown for use in Figure 2 A schematic diagram of the recovery control integrated circuit 20A of the flyback circuit 200 is shown.

[0014] Figure 4 An embodiment of the present invention is shown. Figure 3 The waveform diagram of the recycling control integrated circuit 20A shown is shown.

[0015] Figure 5 An embodiment of the present invention is shown for use in Figure 3The schematic diagram shows the maximum on-time control circuit 203A of the recycling control integrated circuit 20A.

[0016] Figure 6 A method for using according to another embodiment of the present invention is shown. Figure 2 A schematic diagram of integrated circuit 20B of flyback circuit 200 is shown.

[0017] Figure 7 An embodiment of the present invention is shown. Figure 6 The waveform diagram of the recycling control integrated circuit 20B is shown.

[0018] Figures 8a to 8c Schematic diagrams of three states of the current path of a flyback circuit 200 according to an embodiment of the present invention are shown.

[0019] Figure 9 An embodiment of the present invention is shown. Figures 8a to 8c Waveform diagrams of the three states.

[0020] Figure 10 A schematic diagram of a flyback circuit 200A according to another embodiment of the present invention is shown.

[0021] Figure 11 An embodiment of the present invention is shown for use in Figure 10 The schematic diagram shows the maximum on-time control circuit 203B of the recycling control integrated circuit 20C.

[0022] Figure 12 A flowchart of a method 700 for recovering energy using a flyback circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0023] Several different embodiments of the present invention are described below. In the following description, certain specific details, such as exemplary circuits and exemplary values ​​for those circuit components, are included to provide a detailed understanding of the embodiments. However, it will be understood by those skilled in the art that these one or more specific details are not necessarily required to practice the invention, or that other methods, components, materials, etc., may be used to practice the invention. In other instances, known structures, materials, processes, or operations have not been described or shown in detail to avoid obscuring the invention.

[0024] Throughout this specification and claims, terms such as “left,” “right,” “inner,” “outer,” “front,” “back,” “up,” “above,” “above,” “below,” “under,” and similar terms are used for descriptive purposes only and are not intended to describe permanently fixed relative relationships. It should be understood that these terms are interchangeable where appropriate, allowing embodiments of the technology described herein to operate, for example, in directions other than those shown or otherwise described herein. Terms such as “coupled” and “connected” described herein are defined as a direct or indirect connection, either electrically or non-electrically. Terms such as “a,” “the,” and “described” include a plurality of them. The phrase “in one embodiment” as used herein does not necessarily refer to the same embodiment, but may refer to the same embodiment. Those skilled in the art should understand that the meaning of the foregoing terms is not limiting, but merely illustrative examples.

[0025] Figure 2 A schematic diagram of a flyback circuit 200 according to an embodiment of the present invention is shown. The flyback circuit 200 includes a transformer T, a primary-side switch MP, a primary-side controller 10, a recovery control integrated circuit 20, an energy recovery branch 30, and an output circuit 40. The transformer T has a primary winding Np and a secondary winding Ns. The transformer T is coupled to and receives an input voltage Vin, and generates an output voltage Vout supplied to the load through a rectifier D1 and an output capacitor Cout of the output circuit 40. The primary-side switch MP is coupled between a first terminal of the primary winding Np and primary ground, and is controlled by a primary-side drive signal P_DRV provided by the primary-side controller 10. The energy recovery branch 30 includes a clamping capacitor Csn and an auxiliary switch MA.

[0026] exist Figure 2 In this embodiment, the energy recovery branch 30 is coupled in parallel to the primary winding Np. Specifically, the first terminal of the clamping capacitor Csn is coupled to the second terminal of the primary winding Np, and the second terminal of the clamping capacitor is coupled to the first terminal of the auxiliary switch MA. The second terminal of the auxiliary switch MA is coupled to the first terminal of the primary winding Np. The control terminal of the auxiliary switch MA is coupled to the VG pin of the recovery control integrated circuit 20 and is controlled by the recovery control integrated circuit 20 to recover the leakage inductance energy of the transformer T.

[0027] In addition, the recycling control integrated circuit 20 may include multiple pins, such as VCC, VSS, CS, and SET pins. The VCC pin is coupled to and receives the external supply voltage VS via diode D0, and is also coupled to a second ground via power supply capacitor C0. The VSS pin is coupled to a second ground different from the primary ground. Both the primary ground and the second ground are power grounds. The CS pin is used to sense the branch current flowing through the energy recovery branch 30 to provide a current detection signal VCS characterizing the branch current. Figure 2 In one embodiment, the branch current is sensed by a current-sensing resistor Rcs, which is connected in series with the energy recovery branch 30 within the energy recovery branch 30. In other embodiments, other suitable methods may be used to sense the branch current flowing through the energy recovery branch 30. The SET pin is coupled to an external resistor Rset to set the maximum on-time threshold of the auxiliary switch MA. In one embodiment, the maximum on-time threshold of the auxiliary switch MA can be programmed by selecting the resistance value of the external resistor Rset. In one embodiment, the leakage inductance Lk of the transformer T and the capacitance Csn of the clamping capacitor resonate to generate a resonant period Tr, and the maximum on-time threshold does not exceed three-quarters of the resonant period Tr. Figure 2 In this embodiment, the external resistor Rset is placed outside the recycling control integrated circuit 20 and coupled between the SET pin and the VSS pin.

[0028] Figure 3 An embodiment of the present invention is shown for use in Figure 2 A schematic diagram of the recovery control integrated circuit 20A of the flyback circuit 200 is shown.

[0029] In one embodiment, the auxiliary switch MA is turned on in response to detecting an increase in the amplitude of the branch current to a first value, and turned off in response to detecting a decrease in the amplitude of the branch current to a second value (e.g., 0A), wherein the first value is less than the second value and is a negative value. In another embodiment, the auxiliary switch MA is turned off in response to detecting an increase in the branch current to a third value (overcurrent threshold).

[0030] exist Figure 3 In this embodiment, the recycling control integrated circuit 20A includes a first comparator circuit 201, a second comparator circuit 202, a maximum on-time control circuit 203, a logic circuit 205, and multiple pins. For example... Figure 2 As shown, pin VCC is used to receive the supply voltage to power the chip. Pin VSS is coupled to a second ground different from the primary ground of the primary-side controller 10. Pin CS is used to sense the branch current flowing through the energy recovery branch 30. Pin VG is coupled to the auxiliary switch MA to provide the auxiliary control signal VVG. Pin SET is coupled to the external resistor Rset to set the maximum on-time threshold of the auxiliary switch MA.

[0031] exist Figure 3In one embodiment, the first comparator circuit 201 includes a first comparator CMP1. The first comparator CMP1 has an inverting input, a non-inverting input, and an output. The inverting input of the first comparator CMP1 is coupled to the CS pin to receive the VCS voltage on the CS pin, and the non-inverting input is coupled to the on-state voltage threshold VCS_ON. The first comparator circuit 201 compares the VCS voltage with the on-state voltage threshold VCS_ON and generates a first comparison signal COP1 at the output. In one embodiment, the on-state voltage threshold VCS_ON is -20mV.

[0032] The second comparator circuit 202 includes a second comparator CMP2 and a falling-edge single-trigger circuit 2021. The second comparator CMP2 has an inverting input, a non-inverting input, and an output. The non-inverting input of the second comparator CMP2 is coupled to the CS pin to receive the VCS voltage on the CS pin, and the inverting input is coupled to the zero-crossing detection threshold VCS_ZCD. The second comparator circuit 202 compares the VCS voltage with the zero-crossing detection threshold VCS_ZCD. The falling-edge single-trigger circuit 2021 has an input and an output. The input of the falling-edge single-trigger circuit 2021 is coupled to the output of the second comparator CMP2 and generates a falling-edge pulse signal at the output as the second comparison signal COP2. In one embodiment, the zero-crossing detection threshold VCS_ZCD is 20mV. When the output of the second comparator 202 changes from high to low, the falling-edge single-trigger circuit 2021 provides the second comparison signal COP2 with a single pulse.

[0033] The maximum on-time control circuit 203 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the maximum on-time control circuit 203 is coupled to the VG pin, and the second input terminal is coupled to the SET pin. After the auxiliary switch MA is turned on and the maximum on-time threshold has elapsed, the maximum on-time control circuit 203 generates a maximum on-time control signal OFF1 at its output terminal.

[0034] The logic circuit 205 has a first input terminal, a second input terminal, a third input terminal, and an output terminal. The first input terminal of the logic circuit 205 is coupled to the output terminal of the first comparator circuit 201 to receive a first comparator signal COP1; the second input terminal of the logic circuit 205 is coupled to the output terminal of the second comparator circuit 202 to receive a second comparator signal COP2; and the third input terminal of the logic circuit 205 is coupled to the output terminal of the maximum on-time control circuit 203 to receive a maximum on-time control signal OFF1. The logic circuit 205 turns on the auxiliary switch MA based on the first comparator signal COP1 and turns off the auxiliary switch MA based on the second comparator signal COP2 or the maximum on-time control signal OFF1.

[0035] exist Figure 3 In this embodiment, the logic circuit 205 includes an OR gate circuit OR1 and an RS flip-flop FF1. The OR gate circuit OR1 has a first input terminal for receiving a second comparison signal COP2, a second input terminal for receiving a maximum on-time control signal OFF1, and an output terminal. The RS flip-flop FF1 has a set terminal, a reset terminal, and an output terminal, wherein the set terminal is coupled to the first comparison circuit 201 to receive the first comparison signal COP1, the reset terminal is coupled to the output terminal of the OR gate circuit OR1, and the output terminal is coupled to the VG pin.

[0036] Figure 4 An embodiment of the present invention is shown. Figure 3 The waveform diagram of the recycling control integrated circuit 20A shown is shown.

[0037] like Figure 4 As shown, at time t1, the VCS voltage on the CS pin is lower than the turn-on voltage threshold VCS_ON, and the first comparator signal COP1 at the set terminal of the RS flip-flop FF1 goes high. Therefore, the auxiliary control signal VVG changes from low to high, turning on the auxiliary switch MA. At time t2, the VCS voltage on the CS pin drops to the zero-crossing detection threshold VCS_ZCD, for example, 20mV. The output of the second comparator CMP2 changes from high to low, and the falling-edge single-trigger circuit 2021 is triggered to output a single pulse as the second comparator signal COP2. The OR gate circuit OR1 also provides a single pulse to trigger the reset terminal of the RS flip-flop FF1. Therefore, the auxiliary control signal VVG changes from high to low, turning off the auxiliary switch MA.

[0038] When the auxiliary switch is turned on, the maximum on-time control circuit 203 starts timing. At time t3, after the maximum on-time threshold has elapsed since the auxiliary switch MA was turned on, the maximum on-time control circuit 203 generates a high-level maximum on-time control signal OFF1. In some cases, if no zero-crossing is detected, the auxiliary switch MA may remain on. In such cases, the maximum on-time control signal OFF1 will turn off the auxiliary switch MA to ensure that the maximum on-time of the auxiliary switch MA does not exceed the maximum on-time threshold.

[0039] Figure 5 An embodiment of the present invention is shown for use in Figure 3 The schematic diagram shows the maximum on-time control circuit 203A of the recycling control integrated circuit 20A.

[0040] exist Figure 5In this embodiment, the maximum on-time control circuit 203A includes a first current source 231, a second current source 232, a first capacitor C1, a first transistor S1, and a comparator circuit CMPT. The first current source 231 has a first terminal and a second terminal, wherein the first terminal of the first current source 231 is coupled to receive an internal supply voltage VDD, and its second terminal is coupled to the SET pin, wherein the first current source 231 provides a first current Iset at its second terminal. An external resistor Rset is disposed outside the recycling control integrated circuit 20A and coupled between the SET pin and the VSS pin. The second current source 232 has a first terminal and a second terminal, wherein the first terminal of the second current source 232 is coupled to the VDD pin, and the second current source 232 provides a second current Ich at its second terminal, and the second current Ich is proportional to the first current Iset. The first capacitor C1 has a first terminal and a second terminal, wherein the first terminal of the first capacitor C1 is coupled to the second terminal of the second current source 232, and its second terminal is coupled to the VSS pin. The first transistor S1 has a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor S1 is coupled to the first terminal of the first capacitor C1, its second terminal is coupled to the VSS pin, and its control terminal is coupled to the VG pin through a single trigger circuit 233. The comparator circuit CMPT has an inverting input terminal, a non-inverting input terminal, and an output terminal. The inverting input terminal of the comparator circuit CMPT is coupled to the SET pin, the non-inverting input terminal is coupled to the first terminal of the first capacitor C1, and the comparator circuit CMPT generates a maximum on-time control signal OFF1 at its output terminal.

[0041] Figure 6 A method for using according to another embodiment of the present invention is shown. Figure 2 The schematic diagram shows the recovery control integrated circuit 20B of the flyback circuit 200.

[0042] exist Figure 6 In the embodiments, with Figure 3 Compared to the recycling control integrated circuit 20A shown, the recycling control integrated circuit 20B further includes a third comparator circuit 204, and Figure 6 The logic circuit 205A shown is Figure 3 The logic circuit 205 shown is different.

[0043] The third comparator circuit 204 includes a third comparator CMP3. The third comparator CMP3 has an inverting input, a non-inverting input, and an output. The non-inverting input is coupled to the CS pin to receive the VCS voltage on the CS pin, and the inverting input is coupled to the overcurrent threshold VCS_OCP. The third comparator circuit 204 compares the VCS voltage and the overcurrent threshold VCS_OCP and generates a third comparison signal COP3. In one embodiment, the overcurrent threshold VCS_OCP is 0.8V.

[0044] Logic circuit 205A has a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, and an output terminal. The first input terminal of logic circuit 205A is coupled to the output terminal of a first comparator circuit 201 to receive a first comparator signal COP1; its second input terminal is coupled to the output terminal of a second comparator circuit 202 to receive a second comparator signal COP2 with a single pulse; its third input terminal is coupled to the output terminal of a maximum on-time control circuit 203 to receive a maximum on-time control signal OFF1; and its fourth input terminal is coupled to the output terminal of a third comparator circuit 204. Logic circuit 205A turns on the auxiliary switch MA based on the first comparator signal COP1 and turns off the auxiliary switch MA based on the second comparator signal COP2, the third comparator signal COP3, or the maximum on-time control signal OFF1.

[0045] exist Figure 6 In this embodiment, the logic circuit 205A includes an OR gate circuit OR2 and an RS flip-flop FF2. The OR gate circuit OR2 has a first input terminal, a second input terminal, a third input terminal, and an output terminal. The first input terminal of the OR gate circuit OR2 is used to receive a second comparison signal COP2, its second input terminal is used to receive a maximum on-time control signal OFF1, and its third input terminal is used to receive a third comparison signal COP3. The RS flip-flop FF2 has a set terminal, a reset terminal, and an output terminal. The set terminal of the RS flip-flop FF2 is coupled to the first comparison circuit 201 to receive the first comparison signal COP1, its reset terminal is coupled to the output terminal of the OR gate circuit OR2, and its output terminal is coupled to the VG pin.

[0046] Figure 7 An embodiment of the present invention is shown. Figure 6 The waveform diagram of the recycling control integrated circuit 20B is shown.

[0047] like Figure 7 As shown, at time t1, the VCS voltage on the CS pin is lower than the turn-on voltage threshold VCS_ON, and the first comparison signal COP1 at the set terminal of the RS flip-flop FF2 goes high. Therefore, the auxiliary control signal VVG changes from low to high, turning on the auxiliary switch MA.

[0048] At time t2, the VCS voltage on the CS pin increases to the overcurrent threshold VCS_OCP, for example, 0.8V. The third comparator signal COP3 goes high, and the output signal at the output of the OR gate OR2 also goes high. Therefore, the auxiliary control signal VVG changes from high to low to turn off the auxiliary switch MA.

[0049] When the auxiliary switch is turned on, the maximum on-time control circuit 203 starts timing. At time t3, when the on-time of the auxiliary switch MA reaches the maximum on-time threshold, the maximum on-time control circuit 203 generates a high-level maximum on-time control signal OFF1 to ensure that the maximum on-time of the auxiliary switch MA does not exceed the maximum on-time threshold.

[0050] At time t4, the VCS voltage on the CS pin falls below the turn-on voltage threshold VCS_ON again, and the first comparison signal COP1 at the set terminal of the RS flip-flop FF2 goes high. Therefore, the auxiliary control signal VVG changes from low to high, turning on the auxiliary switch MA.

[0051] At time t5, the VCS voltage on the CS pin drops to the zero-crossing detection threshold VCS_ZCD, for example, 20mV. The output of the second comparator CMP2 changes from high to low. The falling-edge single-trigger circuit 2021 is then triggered to output a single pulse as the second comparison signal COP2, and the OR gate circuit OR1 also provides a single pulse to trigger the reset terminal of the RS flip-flop FF2. Therefore, the auxiliary control signal VVG changes from high to low to turn off the auxiliary switch MA.

[0052] Figures 8a to 8c Schematic diagrams of three states of the current path of a flyback circuit 200 according to an embodiment of the present invention are shown. Figure 9 An embodiment of the present invention is shown. Figures 8a to 8c Waveform diagrams of the three states.

[0053] Please refer to Figure 8a and Figure 9 In state a, the primary switch MP is on and the auxiliary switch is off. In state a, current flows through the primary winding Np and the primary switch MP. Therefore, energy is stored in the transformer T and the leakage inductance Lk. The leakage inductance Lk of the transformer T and the capacitance Csn of the clamping capacitor resonate, generating a resonant period Tr.

[0054] Please refer to Figure 8b and Figure 9 In state b (1 / 4 of a resonant cycle Tr), the primary switch MP is off, and the leakage inductance Lk of transformer T transfers energy to the clamping capacitor Csn and the secondary output. In state b, current flows from the primary winding Np through the body diode of the auxiliary switch MA to charge the clamping capacitor Csn. Once the current flows through the body diode of the auxiliary switch MA, the auxiliary switch MA will quickly turn on.

[0055] Please refer to Figure 8c and Figure 9In state c (1 / 2 resonant cycle Tr), the energy stored in the clamping capacitor Csn is released to the secondary output through the transformer T. In state c, the discharge of the clamping capacitor Csn causes current to flow from the auxiliary switch MA through the leakage inductance Lk. Finally, the energy stored in the leakage inductance Lk is completely released to the secondary output through the transformer T.

[0056] Therefore, the maximum conduction time is three-quarters of the resonant period Tr.

[0057] The recycling control integrated circuit of the present invention can be selectively paired with any primary-side controller to form a flyback circuit and improve the reliability of the flyback circuit.

[0058] Figure 10 A schematic diagram of a flyback circuit 200A according to another embodiment of the present invention is shown. The flyback circuit 200A includes a transformer T, a primary-side switch MP, a primary-side controller 10A, a energy recovery control integrated circuit 20C, an energy recovery branch, and an output circuit 40. The transformer T has a primary-side winding Np and a secondary-side winding Ns. The primary-side switch MP is controlled by a primary-side drive signal P_DRV provided by the primary-side controller 10A. The energy recovery branch includes a clamping capacitor Csn and an auxiliary switch MA.

[0059] The control terminal of the auxiliary switch MA is coupled to the VG pin of the recycling control integrated circuit 20C and is controlled by the recycling control integrated circuit 20C to recover the leakage inductance energy of the transformer T.

[0060] In addition, the recycling control integrated circuit 20C may include multiple pins, such as VCC, VSS, CS, and SET pins. The VCC pin is coupled to and receives the external supply voltage VS via diode D0, and is also coupled to a second ground via power supply capacitor C0. The VSS pin is coupled to a second ground different from the primary ground. The CS pin is used to sense the branch current flowing through the energy recovery branch. Figure 10 In this embodiment, the branch current is sensed by a current-sensing resistor Rcs, which is connected in series with the energy recovery branch within the energy recovery branch. The SET pin is coupled to an external resistor Rset to set the maximum on-time threshold of the auxiliary switch MA. Figure 10 In this embodiment, the external resistor Rset is placed outside the recycling control integrated circuit 20C and coupled between the SET pin and the VCC pin.

[0061] Figure 11 An embodiment of the present invention is shown for use in Figure 10 The schematic diagram shows the maximum on-time control circuit 203B of the recycling control integrated circuit 20C.

[0062] exist Figure 11In this embodiment, the maximum on-time control circuit 203B includes a second capacitor C2, a second transistor S2, and a comparator circuit CMPT. An external resistor Rset is located outside the recycling control integrated circuit 20C and coupled between the SET pin and the VCC pin. The second capacitor C2 has a first end and a second end, wherein the first end of the second capacitor C2 is coupled to the SET pin, and the second end is coupled to the VSS pin. The second transistor S2 has a first end, a second end, and a control end, wherein the first end of the second transistor S2 is coupled to the first end of the second capacitor C2, its second end is coupled to the VSS pin, and its control end is coupled to the VG pin via a second single-trigger circuit 234. The comparator circuit CMPT has an inverting input, a non-inverting input, and an output, wherein the inverting input of the comparator circuit CMPT is coupled to receive a reference voltage Vth, the non-inverting input is coupled to the first end of the second capacitor C2, and the comparator circuit CMPT generates a maximum on-time control signal OFF1 at its output.

[0063] Figure 12 A flowchart of a method 700 for recovering energy using a flyback circuit according to an embodiment of the present invention is shown.

[0064] exist Figure 12 In this embodiment, the flyback circuit includes the primary winding of a transformer. The method includes steps 701–707. In step 701, an energy recovery branch is coupled in parallel with the primary winding, wherein the energy recovery branch includes an auxiliary switch and a clamping capacitor coupled in series. In step 702, the auxiliary switch is controlled via a first pin of the recovery control integrated circuit, such as the VG pin. In step 703, a maximum on-time threshold for the auxiliary switch is set by coupling an external resistor to a second pin of the recovery control integrated circuit, such as the SET pin. In step 704, a branch current flowing through the energy recovery branch is sensed via a third pin of the recovery control integrated circuit, such as the CS pin. In step 705, the auxiliary switch is turned on in response to a current detection signal characterizing the branch current decreasing to a first value. In step 706, after the auxiliary switch is turned on, a timer starts counting. In step 707, after the time has elapsed past the maximum on-time threshold, a maximum on-time control signal is generated.

[0065] In this document, terms of relative relations such as "first," "second," and similar terms are used only to distinguish multiple entities or actions and do not limit or indicate any actual relationship or order between these entities or actions. Ordinal numbers such as "first," "second," and "third" simply indicate one of the different sub-numbers and do not limit or indicate any order unless specifically defined in the claims. Unless specifically defined in the wording of the claims, the word order of the claims does not imply that the process steps must be performed in chronological or logical order. The order of the operation steps may be interchanged or adjusted without departing from the scope of the invention, without conflicting with the description of the claims, and provided that it is logically reasonable.

[0066] Those skilled in the art will recognize that this invention is not limited to the specific examples shown and described herein. Rather, the scope of protection of this invention is defined by the claims and includes combinations and partial combinations of the various features described above, as well as combinations and partial combinations of variations and modifications of these features that are not prior art and can be discerned by those skilled in the art from the above description.

Claims

1. An energy recovery circuit for a flyback circuit, the flyback circuit including a transformer having a primary winding, the energy recovery circuit comprising: The energy recovery branch includes an auxiliary switch and a clamping capacitor connected in series, wherein a first end of the clamping capacitor is coupled to a first end of the primary winding, a second end of the clamping capacitor is coupled to a first end of the auxiliary switch, and a second end of the auxiliary switch is coupled to a second end of the primary winding. as well as A recycling control integrated circuit includes a first pin, a second pin, a third pin, a fourth pin, and a fifth pin. The first pin is used to receive an externally supplied voltage. The second pin is coupled to power ground. The third pin is used to sense the branch current flowing through the energy recovery branch. The fourth pin is coupled to the control terminal of the auxiliary switch. The fifth pin is coupled to an external resistor to set a maximum on-time threshold of the auxiliary switch. The maximum on-time threshold of the auxiliary switch is programmed by selecting the resistance value of the external resistor. The recycling control integrated circuit further includes: A first comparison circuit is coupled to the third pin, wherein the first comparison circuit compares the voltage on the third pin with a first voltage threshold and generates a first comparison signal; A second comparison circuit is coupled to the third pin, wherein the second comparison circuit compares the voltage on the third pin with a second voltage threshold and generates a second comparison signal; A maximum on-time control circuit is coupled to the fourth pin and the fifth pin, wherein when the on-time of the auxiliary switch reaches the maximum on-time threshold, the maximum on-time control circuit generates a maximum on-time control signal; as well as A logic circuit is coupled to the first comparison circuit, the second comparison circuit, and the maximum on-time control circuit, wherein the logic circuit turns on the auxiliary switch based on the first comparison signal and turns off the auxiliary switch based on the second comparison signal or the maximum on-time control signal.

2. The energy recovery circuit as described in claim 1, wherein the leakage inductance of the transformer and the capacitance of the clamping capacitor resonate to generate a resonant period, and the maximum conduction time threshold of the auxiliary switch is three-quarters of the resonant period.

3. The energy recovery circuit of claim 1, wherein the auxiliary switch is turned on in response to detecting that a current detection signal characterizing the branch current decreases to a first value, and is turned off in response to detecting that the current detection signal decreases to a second value, wherein the first value is less than the second value.

4. The energy recovery circuit as described in claim 1, wherein the logic circuit comprises: An OR gate circuit has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is used to receive the second comparison signal, and the second input terminal is used to receive the maximum on-time control signal; An RS flip-flop has a set terminal, a reset terminal, and an output terminal, wherein the set terminal is coupled to the first comparator circuit to receive the first comparator signal, the reset terminal is coupled to the output terminal of the OR gate circuit, and the output terminal is coupled to the fourth pin.

5. The energy recovery circuit as described in claim 1, wherein the maximum on-time control circuit comprises: A first current source, wherein a first terminal of the first current source is coupled to a supply voltage, a second terminal of the first current source is coupled to the fifth pin, wherein the first current source provides a first current at its second terminal, and the external resistor is disposed outside the recycling control integrated circuit and coupled between the second pin and the fifth pin; A second current source has a first terminal and a second terminal, wherein the first terminal of the second current source is coupled to the supply voltage, and wherein the second current source provides a second current at its second terminal, and the second current is proportional to the first current. A first capacitor has a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the second terminal of the second current source, and the second terminal of the first capacitor is coupled to the second pin; A first transistor has a first terminal, a second terminal, and a control terminal, wherein the first terminal of the first transistor is coupled to the first terminal of the first capacitor, the second terminal of the first transistor is coupled to the second pin, and the control terminal of the first transistor is coupled to the fourth pin through a first single trigger circuit. as well as The fourth comparator circuit has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the fourth comparator circuit is coupled to the fifth pin, the second input terminal of the fourth comparator circuit is coupled to the first terminal of the first capacitor, and the fourth comparator circuit generates the maximum on-time control signal at the output terminal.

6. The energy recovery circuit as described in claim 1, wherein the maximum on-time control circuit comprises: The second capacitor has a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the fifth pin, the second terminal of the second capacitor is coupled to the second pin, and wherein the external resistor is disposed outside the recycling control integrated circuit and coupled between the second pin and the fifth pin; The second transistor has a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is coupled to the first terminal of the second capacitor, the second terminal of the second transistor is coupled to the second pin, and the control terminal of the second transistor is coupled to the fourth pin through a second single trigger circuit. as well as The fifth comparator circuit has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the fifth comparator circuit is coupled to the fifth pin, the second input terminal of the fifth comparator circuit is coupled to receive a reference voltage, and the fifth comparator circuit generates the maximum on-time control signal at the output terminal.

7. An energy recovery circuit for a flyback circuit, the flyback circuit including a transformer having a primary winding, the energy recovery circuit comprising: The energy recovery branch includes an auxiliary switch and a clamping capacitor connected in series, wherein a first end of the clamping capacitor is coupled to a first end of the primary winding, a second end of the clamping capacitor is coupled to a first end of the auxiliary switch, and a second end of the auxiliary switch is coupled to a second end of the primary winding. as well as A recycling control integrated circuit includes a first pin, a second pin, a third pin, a fourth pin, and a fifth pin. The first pin is used to receive an externally supplied voltage. The second pin is coupled to power ground. The third pin is used to sense the branch current flowing through the energy recovery branch. The fourth pin is coupled to the control terminal of the auxiliary switch. The fifth pin is coupled to an external resistor to set a maximum on-time threshold of the auxiliary switch. The maximum on-time threshold of the auxiliary switch is programmed by selecting the resistance value of the external resistor. The recycling control integrated circuit further includes: A first comparison circuit is coupled to the third pin, wherein the first comparison circuit compares the voltage on the third pin with a first voltage threshold and generates a first comparison signal; A second comparison circuit is coupled to the third pin, wherein the second comparison circuit compares the voltage on the third pin with a second voltage threshold and generates a second comparison signal; A maximum on-time control circuit is coupled to the fourth pin and the fifth pin, wherein when the on-time of the auxiliary switch reaches the maximum on-time threshold, the maximum on-time control circuit generates a maximum on-time control signal; A third comparison circuit is coupled to the third pin, wherein the third comparison circuit compares the voltage on the third pin with a third voltage threshold and generates a third comparison signal, wherein the third voltage threshold is greater than the second voltage threshold. as well as A logic circuit is coupled to the first comparison circuit, the second comparison circuit, the third comparison circuit, and the maximum on-time control circuit, wherein the logic circuit turns on the auxiliary switch based on the first comparison signal and turns off the auxiliary switch based on the second comparison signal, the maximum on-time control signal, or the third comparison signal.

8. A flyback circuit, comprising: The primary winding of a transformer; A primary-side switch has a first end and a second end, wherein the first end of the primary-side switch is coupled to a first end of the primary-side winding, and the second end of the primary-side winding is coupled to a first end of a clamping capacitor. as well as The energy recovery circuit as described in any one of claims 1 to 7.

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