A silicon-based terahertz quintuple frequency multiplier based on a semi-closed coupling structure

Abstract

The invention discloses a silicon-based terahertz quintuple frequency multiplier based on a semi-closed coupling structure, comprising an input balun, a fourth harmonic frequency multiplication unit, an interstage transformer, a single-balanced mixer unit and an output balun. A single-ended fundamental wave signal is converted into a differential signal by the input balun and injected into the frequency multiplication unit. At the same time, a differential signal is split from the differential port of the input balun as the local oscillator of the mixer unit. The frequency multiplication unit generates a fourth harmonic and injects it into the source end of the mixer unit in a single-ended mode as an intermediate frequency signal. The mixer unit mixes the fundamental wave and the fourth harmonic to generate a five-fold frequency differential signal, and the output balun converts the differential signal into a single-ended output. Both the input balun and the output balun adopt a semi-closed coupling structure to reduce the coupling loss of passive devices. The structure has the characteristics of strong coupling and high design freedom, solves the problem of large loss of the passive coupling structure of the silicon-based millimeter-wave terahertz circuit, and improves the output power of the terahertz frequency multiplier.

Description

Technical Field

[0001] The invention relates to the field of terahertz frequency multiplier and mixer integrated circuit design, and in particular to a silicon-based terahertz frequency quintuple based on a semi-closed coupling structure. Background Art

[0002] The terahertz (THz) frequency band is between microwaves and optics in the electromagnetic spectrum, and its frequency range is usually 0.1-10THz. Terahertz has unique performance. Compared with microwaves, terahertz has the characteristics of broadband and good directionality; compared with optical frequency bands, terahertz has the characteristics of high efficiency and good penetration. Due to its special spectral characteristics, terahertz has become one of the most promising electromagnetic frequency bands for 6G communications and has been put on the research agenda by scientific researchers from various countries.

[0003] The first prerequisite for the application of terahertz is the generation of terahertz signals. For a long time, the terahertz frequency band has been called the "terahertz gap" in the electromagnetic spectrum. There are two mainstream methods for generating terahertz signals: one is to use electronic means to upconvert microwaves to terahertz; the other is to use optical means to downconvert optical frequency bands to terahertz. At present, mainstream terahertz signal sources are expensive and bulky, and some signal sources even need to operate in a low-temperature environment, resulting in poor robustness, short life, poor mobility, and high prices of terahertz signal sources. With the continuous development of silicon-based processes, especially low-cost CMOS technology, it has become possible to use electronic means to achieve room temperature operation, low cost, and movable terahertz signal sources.

[0004] Although silicon-based manufacturing technology has made great progress, the unit power gain frequency f of transistors max However, when the frequency approaches f maxWhen the gain is too low, the transistor can no longer provide sufficient gain. Therefore, the power of terahertz signals generated by standard CMOS process is extremely limited. In addition, the substrate of standard CMOS process is low-resistance silicon, which cannot prevent the signal from coupling to the substrate, resulting in large substrate loss. At the same time, the metal wire of this process is thinner and has a lower quality factor, which will cause large metal loss. In silicon-based millimeter-wave terahertz circuits, differential circuits are the most commonly used structures. Therefore, transformers and baluns based on coupled lines are also the most commonly used differential passive devices in silicon-based millimeter-wave terahertz circuits. When working above 300GHz, transistors can no longer provide gain. Reducing the loss of passive devices is one of the most effective ways to increase output power. For passive devices based on coupled lines, the insertion loss of the entire device can be reduced by reducing both conductor loss and coupling loss. Since conductor loss is related to the manufacturing process and is difficult to reduce, the most convenient way is to use appropriate coupling structures to reduce coupling loss to improve the performance of the entire passive device. Therefore, how to realize a coupling structure with strong coupling and high design freedom in a standard CMOS process has become a key issue in the application of terahertz technology. Summary of the invention

[0005] Technical purpose: In view of the defects in the prior art, the present invention discloses a silicon-based terahertz quintuple frequency multiplier based on a semi-closed coupling structure. Both the input and output baluns adopt a semi-closed coupling structure, which can effectively reduce the coupling loss of on-chip passive devices, retain a high degree of design freedom, and improve the output power of the terahertz frequency multiplier.

[0006] Technical solution: In order to achieve the above technical objectives, the present invention adopts the following technical solution.

[0007] A silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure comprises an input matching network, a fourth harmonic frequency doubling unit, an interstage transformer, a single balanced mixer unit, and an output matching network, wherein the baluns in the input matching network and the output matching network both adopt a semi-closed coupling structure.

[0008] The input matching network is used to convert the input signal into two differential signals and inject them into the fourth harmonic frequency doubling unit, and at the same time separate one signal as the local oscillator of the single balanced mixer; the fourth harmonic frequency doubling unit outputs a single-ended fourth harmonic signal, which is led out by the interstage transformer and injected from the source end of the single balanced mixer; the single balanced mixer mixes the fundamental wave and the fourth harmonic, and the generated five-fold frequency signal is led out from the drain end of the single balanced mixer in a differential mode; the output matching network converts the differential five-fold frequency signal into a single-ended signal for output; the semi-closed coupling structure is composed of a primary top metal, a through hole, a secondary top metal, and a secondary top metal to form a semi-closed coupling structure.

[0009] Furthermore, the input matching network includes an input balun Balun-1, a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2 based on a semi-closed coupling structure; the positive end of the capacitor C1 is connected to the signal line, and the negative end is grounded; the transistor gate bias voltage Vbias is loaded at the center tap of the secondary coil of the input balun Balun-1; the positive and negative ends of the capacitor C2 are connected across the two ends of the secondary coil of the input balun Balun-1; the inductor L1 and the inductor L2 are respectively connected in series at the two ends of the differential signal line, the positive end is connected to the two output ends of the input balun Balun-1, and the negative end is connected to the fourth harmonic frequency doubling unit.

[0010] Furthermore, the fourth harmonic frequency multiplication unit includes a transistor Q1 and a transistor Q2; the gates of the transistors Q1 and Q2 are respectively connected to the negative ends of the inductors L1 and L2, the sources of the transistors Q1 and Q2 are grounded at the same time, and the drains of the transistors Q1 and Q2 are connected together to the positive end of the primary coil of the interstage transformer.

[0011] Furthermore, the positive end of the primary coil of the interstage transformer is connected to the drain end of the fourth harmonic frequency multiplication unit, and the negative end is loaded with the drain voltage Vdd1, the positive end of the secondary coil is connected to the ground, and the negative end is connected to the source end of the single balanced mixer unit.

[0012] Furthermore, the single balanced mixer unit includes a transistor Q3 and a transistor Q4; the gates of the transistors Q3 and Q4 are connected to the gates of the transistors Q1 and Q2 respectively, the sources of the transistors Q3 and Q4 are connected together to the negative end of the secondary coil of the interstage transformer, and the drains of the transistors Q3 and Q4 are led out in a differential mode.

[0013] Furthermore, the output matching network includes an output balun Balun-2 based on a semi-closed coupling structure and a capacitor C3; the differential port of the primary coil of the output balun Balun-2 is connected to the differential output port of the single balanced mixer unit, the center tap of the primary coil is connected to the drain voltage Vdd2, one end of the secondary coil is open, and the other end is connected to the RF signal output port RFoutput.

[0014] Beneficial effects:

[0015] 1. The present invention proposes a semi-closed coupling structure, which can improve the coupling coefficient of the coupled transmission line, reduce the coupling loss, and retain a high degree of design freedom.

[0016] 2. The semi-enclosed coupling structure proposed in the present invention can be applied to on-chip passive devices including but not limited to: transformers, Marchand baluns, coupled line filters, Lange couplers, etc., and has broad application prospects.

[0017] 3. The self-mixing scheme adopted in the present invention can improve the input linearity of the frequency multiplier to the greatest extent, thereby improving the maximum output power of the terahertz frequency multiplier operating at more than 300 GHz.

[0018] 4. The present invention is implemented using standard CMOS technology and has the characteristics of high integration and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the self-mixing scheme of the terahertz quintuple frequency multiplier in the present invention;

[0020] Figure 2 The circuit structure and coupled passive structure of the terahertz quintuple frequency multiplier in the present invention;

[0021] Figure 3 is the insertion loss of the output balun in the present invention;

[0022] Figure 4 is the large signal S parameter of the terahertz quintupler in the present invention;

[0023] Figure 5 is the frequency conversion gain of the terahertz quintupler in the present invention. DETAILED DESCRIPTION

[0024] The present invention is further explained below in conjunction with the accompanying drawings.

[0025] like Figure 1 As shown, in a silicon-based terahertz quintuple frequency multiplier based on a semi-closed coupling structure of this embodiment, a fundamental signal is input into the fourth harmonic frequency multiplication unit II to generate a quadruple frequency signal, a fundamental signal is led out from the input end, and these two signals are respectively loaded onto the single balanced mixer unit IV, which outputs the quintuple frequency. The input linearity of the frequency multiplier will restrict the maximum output power of the frequency multiplier. Compared with the traditional push-push quintuple frequency multiplier, the present invention improves the input linearity of the terahertz frequency multiplier in terms of topological structure, thereby improving the maximum output power.

[0026] like Figure 2 As shown, a silicon-based terahertz quintuple frequency multiplier based on a semi-closed coupling structure specifically includes an input matching network I, a fourth harmonic frequency multiplication unit II, an interstage transformer III, a single balanced mixer IV, and an output matching network V, wherein the baluns in the input matching network I and the output matching network V both adopt a semi-closed coupling structure VI. The semi-closed coupling structure VI is composed of a primary top metal 1, a through hole 2, a secondary top metal 3, and a secondary top metal 4.

[0027] The input matching network I includes an input balun Balun-1 based on a semi-closed coupling structure, capacitors C1, C2, inductors L1 and L2; the positive end of capacitor C1 is connected to the signal line, and the negative end is grounded; the transistor gate bias voltage Vbias is loaded at the center tap of the secondary coil of the input balun Balun-1; the positive and negative ends of capacitor C2 are connected across the two ends of the secondary coil of the input balun Balun-1; inductors L1 and L2 are respectively connected in series at the two ends of the differential signal line, with the positive end connected to the two output ends of the input balun Balun-1, and the negative end connected to the fourth harmonic frequency multiplication unit II.

[0028] The fourth harmonic frequency multiplication unit II includes a transistor Q1 and a transistor Q2; the gates of the transistors Q1 and Q2 are connected to the negative ends of the inductors L1 and L2 respectively, the sources of the transistors Q1 and Q2 are grounded at the same time, and the drains of the transistors Q1 and Q2 are connected together to the positive end of the primary coil of the interstage transformer III.

[0029] The positive end of the primary coil of the interstage transformer III is connected to the drain end of the fourth harmonic frequency multiplication unit II, and the negative end is loaded with the drain voltage Vdd1. The positive end of the secondary coil is connected to the ground, and the negative end is connected to the source end of the single balanced mixer unit IV.

[0030] The single balanced mixer unit IV includes a transistor Q3 and a transistor Q4; the gates of the transistors Q3 and Q4 are connected to the gates of the transistors Q1 and Q2 respectively, the sources of the transistors Q3 and Q4 are connected together to the negative end of the secondary coil of the interstage transformer III, and the drains of the transistors Q3 and Q4 are led out in a differential mode.

[0031] The output matching network V includes an output balun Balun-2 based on a semi-closed coupling structure and a capacitor C3; the differential port of the primary coil of the output balun Balun-2 is connected to the differential output port of the single balanced mixer unit IV, the center tap of the primary coil is connected to the drain voltage Vdd2, and one end of the secondary coil is open.

[0032] In the above structure, the fundamental signal enters the input matching network I from the RFinput port, and the single-ended signal is converted into two differential signals by the input balun Balun-1 and injected into the fourth harmonic frequency multiplication unit II. At the same time, one signal is split into two differential signals as the local oscillator signal of the single balanced mixer IV. The fourth harmonic frequency multiplication unit II outputs a single-ended fourth harmonic signal, which is injected into the source stage of the single balanced mixer IV by the interstage transformer III as the intermediate frequency signal of the mixer. The single balanced mixer IV mixes the fundamental signal and the fourth harmonic signal to generate a fifth harmonic signal, which is led out by the drain stage of the single balanced mixer IV in a differential mode. The output balun Balun-2 of the output matching network V realizes the function of converting differential to single-ended and outputs the fifth harmonic signal from the RFoutput port.

[0033] In this embodiment, the transistor Q1 , the transistor Q2 , the transistor Q3 , and the transistor Q4 should all be NMOS transistors. Based on the 40 nm CMOS process, the present invention simulates the above circuit structure and passive structure.

[0034] Figure 3 The insertion loss of the output balun is given. The differential impedance of the differential port is set to 33Ω based on the actual circuit. At 300-400GHz, the insertion loss is less than 2.5dB, and the minimum insertion loss is 1.27dB, which is extremely superior for standard CMOS technology. Figure 4 The large signal S parameters of the input and output ports of the terahertz quintupler are given. The return loss of the input port is greater than 8.5dB at an input frequency of 64-80GHz, and the return loss of the output port is greater than 10dB at 300-400GHz. Figure 5 The conversion gain of the terahertz quintuple frequency multiplier is given. In the frequency range of 320-374 GHz, the conversion gain is -25.6-28.6 dB, and the 3 dB bandwidth is 18.7%.

[0035] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure, characterized in that: The terahertz quintuple frequency multiplier comprises an input matching network (I), a fourth harmonic frequency multiplication unit (II), an interstage transformer (III), a single balanced mixer unit (IV), and an output matching network (V), wherein the baluns in the input matching network (I) and the output matching network (V) both adopt a semi-closed coupling structure (VI); The input matching network (I) is used to convert the input signal into two differential signals and inject them into the fourth harmonic frequency multiplication unit (II), and at the same time separate one signal as the local oscillator of the single balanced mixer unit (IV); The fourth harmonic frequency multiplication unit (II) outputs a single-ended fourth harmonic signal, which is led out by the interstage transformer (III) and injected from the source end of the single balanced mixer unit (IV); The single balanced mixer (IV) mixes the fundamental wave and the fourth harmonic to generate a five-fold frequency signal which is led out from the drain end of the single balanced mixer (IV) in a differential mode; The output matching network (V) converts the differential five-fold frequency signal into a single-ended signal output; The semi-enclosed coupling structure (VI) is composed of a primary top metal (1), a through hole (2), a secondary top metal (3), and a secondary top metal (4); The input matching network (I) includes an input balun Balun-1 based on a semi-closed coupling structure, a capacitor C1, a capacitor C2, an inductor L1, and an inductor L2; the positive end of the capacitor C1 is connected to the signal line, and the negative end is grounded; the transistor gate bias voltage Vbias is loaded at the center tap of the secondary coil of the input balun Balun-1; the positive and negative ends of the capacitor C2 are connected across the two ends of the secondary coil of the input balun Balun-1; the inductor L1 and the inductor L2 are respectively connected in series at the two ends of the differential signal line, the positive end is connected to the two output ends of the input balun Balun-1, and the negative end is connected to the fourth harmonic frequency multiplication unit (II).

2. The silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure according to claim 1, characterized in that: The fourth harmonic frequency multiplication unit (II) includes a transistor Q1 and a transistor Q2; the gates of the transistors Q1 and Q2 are respectively connected to the negative ends of the inductors L1 and L2, the sources of the transistors Q1 and Q2 are simultaneously grounded, and the drains of the transistors Q1 and Q2 are connected together to the positive end of the primary coil of the interstage transformer (III).

3. The silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure according to claim 1, characterized in that: The positive end of the primary coil of the interstage transformer (III) is connected to the drain end of the fourth harmonic frequency multiplication unit (II), and the negative end is loaded with the drain voltage Vdd1. The positive end of the secondary coil is connected to the ground, and the negative end is connected to the source end of the single balanced mixer unit (IV).

4. The silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure according to claim 1, characterized in that: The single balanced mixer unit (IV) comprises a transistor Q3 and a transistor Q4; the gates of the transistors Q3 and Q4 are connected to the gates of the transistors Q1 and Q2 respectively, the sources of the transistors Q3 and Q4 are connected together to the negative end of the secondary coil of the interstage transformer (III), and the drains of the transistors Q3 and Q4 are led out in a differential mode.

5. The silicon-based terahertz quintuple frequency generator based on a semi-closed coupling structure according to claim 1, characterized in that: The output matching network (V) includes an output balun Balun-2 based on a semi-closed coupling structure and a capacitor C3; the differential port of the primary coil of the output balun Balun-2 is connected to the differential output port of the single balanced mixer unit (IV), the center tap of the primary coil is connected to the drain voltage Vdd2, one end of the secondary coil is open, and the other end is connected to the radio frequency signal output port RFoutput.

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