Semiconductor structure and its manufacturing method and wafer bonding method
By forming a damaged layer on the surface of the conductive contact pad and performing recrystallization treatment, the problem of poor fusion degree of metal conductive contact pads is solved, the diffusion speed and diffusion depth of metal atoms are improved, the electrical and thermal conductivity are optimized, and wafer bonding is improved Effect.
Patent Information
- Application Number
- CN202110481317.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-04-30
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2041-04-30
AI Technical Summary
During wafer bonding, the fusion degree of metal conductive contact pads is poor, which affects the electrical and thermal conductivity of the device.
By forming a damaged layer on the surface of the conductive contact pad and recrystallization treatment, a recrystallization layer with smaller grains is formed, and the diffusion speed and diffusion depth of metal atoms are improved, thereby improving the fusion effect of metal contact surfaces.
It effectively improves the diffusion speed and diffusion depth of metal atoms during the bonding of conductive contact pads, enhances the fusion effect of metal contact surfaces, optimizes the electrical and thermal conduction performance, and improves the wafer bonding effect.
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Figure CN115274459B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of integrated circuit manufacturing, and in particular to a semiconductor structure capable of improving wafer bonding effect, a manufacturing method thereof, and a wafer bonding method. Background Art
[0002] The bonding between wafers is achieved by connecting the metal conductive contact pads on the wafers. During bonding, the metal between the metal conductive contact pads fuses together to achieve a conductive connection. When hybrid bonding is performed between conductive contact pads, the metal (usually copper) has large grains and poor fusion, which affects the electrical and thermal conduction inside the device.
[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention
[0004] The purpose of the present disclosure is to provide a semiconductor structure and a manufacturing method thereof and a wafer bonding method, which are used to at least to a certain extent solve the problem of poor fusion of metal conductive contact pads during the bonding process.
[0005] According to a first aspect of the present disclosure, a method for manufacturing a semiconductor structure is provided, comprising: providing a substrate, wherein a conductive line is formed in the substrate; forming a conductive contact pad on a surface of the conductive line, wherein the cross-sectional area of the conductive contact pad is greater than the cross-sectional area of the conductive line; forming a damaged layer on a surface of the conductive contact pad; and processing the damaged layer to recrystallize the damaged layer to form a recrystallized layer.
[0006] In an exemplary embodiment of the present disclosure, forming a damaged layer on the surface of the conductive contact pad includes: forming the damaged layer on the surface of the conductive contact pad by ion implantation.
[0007] In an exemplary embodiment of the present disclosure, the processing the damaged layer includes: processing the damaged layer using a laser.
[0008] In an exemplary embodiment of the present disclosure, the depth of the recrystallized layer corresponding to the position of the conductive connection is greater than the depth of other positions of the recrystallized layer.
[0009] In an exemplary embodiment of the present disclosure, the depth of the recrystallized layer is less than the depth of the damaged layer.
[0010] In an exemplary embodiment of the present disclosure, the depth of the recrystallized layer is equal to the height of the conductive contact pad.
[0011] According to a second aspect of the present disclosure, a semiconductor structure is provided, which is manufactured using the manufacturing method as described above, and the semiconductor structure includes: a substrate; a conductive connection, wherein the conductive connection is located in the substrate; and a conductive contact pad, wherein the conductive contact pad is connected to the conductive connection, and a recrystallization layer is provided on the surface of the conductive contact pad, and the grains of the recrystallization layer are smaller than the grains of the conductive connection.
[0012] In an exemplary embodiment of the present disclosure, the depth of the recrystallized layer is equal to the height of the conductive contact pad.
[0013] According to a third aspect of the present disclosure, a wafer bonding method is provided, including: providing a first wafer, the first wafer including a first substrate, a first conductive line, and a first conductive contact pad, the first conductive line is located in the first substrate, a first surface of the first conductive contact pad is connected to the first conductive line, a first recrystallization layer is provided on the surface of the first conductive contact pad, and grains of the first recrystallization layer are smaller than grains of the first conductive line; providing a second wafer, the second wafer including a second substrate, a second conductive line, and a second conductive contact pad, the second conductive line is located in the second substrate, and a first surface of the second conductive contact pad is connected to the second conductive line; controlling the first conductive contact pad and the second conductive contact pad so that the first recrystallization layer of the first recrystallization layer contacts the second surface of the second conductive contact pad to bond the first wafer and the second wafer.
[0014] In an exemplary embodiment of the present disclosure, a second recrystallization layer is provided on the surface of the second conductive contact pad, and the grains of the second recrystallization layer are smaller than the grains of the second conductive connection line, and the controlling of the first recrystallization layer of the first conductive contact pad and the second surface of the second conductive contact pad to be in contact with each other includes: controlling the first recrystallization layer of the first conductive contact pad and the second conductive contact pad to be in contact with each other.
[0015] In an exemplary embodiment of the present disclosure, the grain size of the first recrystallized layer is equal to the grain size of the second recrystallized layer, or the grain size of the first recrystallized layer is not equal to the grain size of the second recrystallized layer.
[0016] In an exemplary embodiment of the present disclosure, a depth of the first recrystallized layer corresponding to a position of the first conductive connection line is greater than a depth of the first recrystallized layer at other positions.
[0017] In an exemplary embodiment of the present disclosure, a first damaged layer is disposed below the first recrystallized layer.
[0018] In an exemplary embodiment of the present disclosure, an area of the first conductive contact pad is greater than an area of the second conductive contact pad, and an area of the first recrystallized layer is the same as an area of the second conductive contact pad.
[0019] The disclosed embodiment performs damage and recrystallization treatment on the surface of the conductive contact pad to form a recrystallization layer with smaller grains, thereby effectively improving the diffusion speed and diffusion depth of metal atoms in the bonding process of the conductive contact pad, avoiding the poor fusion degree of the conductive contact pad in the related technology, achieving better fusion effect of the metal contact surface, more optimized electrical and thermal conductivity, and better wafer bonding effect.
[0020] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.
[0022] Figure 1 is a flow chart of a method for manufacturing a semiconductor structure in an exemplary embodiment of the present disclosure.
[0023] Figure 2A to Figure 2C In the embodiment of the present disclosure, Figure 1 The method shown is a schematic diagram of the process of manufacturing a semiconductor structure.
[0024] Figure 3A to Figure 3E In the embodiment of the present disclosure, Figure 1 or Figure 2A to Figure 2C Schematic diagram of a semiconductor structure manufactured by the method shown.
[0025] Figure 4 is a flow chart of a wafer bonding method provided by an exemplary embodiment of the present disclosure.
[0026] Figure 5A to Figure 5F Schematic diagram of the first wafer and the second wafer before bonding in the embodiment of the present disclosure.
[0027] Reference numerals:
[0028] 1 Substrate
[0029] 2 Conductive wires
[0030] 3 Conductive contact pads
[0031] 31 Damage layer
[0032] 32 Recrystallization layer
[0033] 51 First Wafer
[0034] 510 First Substrate
[0035] 511 First conductive connection
[0036] 512 first conductive contact pad
[0037] 5121 First recrystallization layer
[0038] 52 Second Wafer
[0039] 520 Second substrate
[0040] 521 Second conductive connection
[0041] 522 second conductive contact pad
[0042] 5221 Second recrystallization layer DETAILED DESCRIPTION
[0043] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present disclosure will be more comprehensive and complete, and the concepts of the example embodiments are fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present disclosure.
[0044] In addition, the accompanying drawings are only schematic diagrams of the present disclosure, and the same reference numerals in the drawings represent the same or similar parts, so their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities, which do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.
[0045] The exemplary embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
[0046] Figure 1is a flow chart of a method for manufacturing a semiconductor structure in an exemplary embodiment of the present disclosure.
[0047] refer to Figure 1 , the manufacturing method 100 may include:
[0048] Step S1, providing a substrate, wherein a conductive line is formed in the substrate;
[0049] Step S2, forming a conductive contact pad on the surface of the conductive connection line, wherein the cross-sectional area of the conductive contact pad is larger than the cross-sectional area of the conductive connection line;
[0050] Step S3, forming a damaged layer on the surface of the conductive contact pad;
[0051] Step S4, treating the damaged layer to form a recrystallized layer.
[0052] The method provided in the embodiment of the present disclosure can refine the grains of the metal in the bonding portion of the conductive contact pad, thereby increasing the diffusion speed and distance of the metal atoms during the bonding process, making the metal surface more fused and the electrical and thermal conductivity better.
[0053] In one embodiment of the present disclosure, in step S3, a damaged layer may be formed on the surface of the conductive contact pad by ion implantation. By externally implanting ions, lattice defects are generated on the surface of the conductive contact pad, promoting crystal nucleus recombination, increasing the number of crystal nuclei in the conductive contact pad portion, and improving the crystal nucleus formation rate. When the conductive contact pad portion is made of copper, the implanted ions may be, for example, boron ions, phosphorus ions, etc., and the implantation concentration is controlled to not change the performance of the conductive contact pad, so as to destroy the crystalline structure of copper and form a texture inside the grains.
[0054] Generally speaking, the grain refinement process requires heat treatment. However, in the semiconductor manufacturing scenario, it is not convenient to perform separate heat treatment on the conductive contact pad area to prevent affecting the ion distribution morphology of the active area. Therefore, in step S4 of the present disclosure, the damaged layer can be treated with laser to form a recrystallized layer. The duration of laser irradiation on the damaged layer is related to the laser intensity. In the present disclosure, when the laser intensity is 10W / cm 2 -50W / cm 2 When the laser irradiation time is set to 5s-30s, the grain refinement can be achieved. Since the higher the heat treatment temperature and the longer the time, the larger the grains, in order to prevent the grains from increasing (the growth rate of the crystal nucleus increases) due to the long treatment time, in the exemplary embodiment of the present disclosure, the laser irradiation time is, for example, less than or equal to 15s.
[0055] In addition, in some embodiments, the metal cooling rate can be accelerated to reduce the grain size by common means, for example, the metal cooling rate can be accelerated by a rapid annealing process.
[0056] In the embodiments of the present disclosure, the depth of the recrystallized layer is preferably equal to the depth of the damaged layer to prevent the remaining nuclei of the damaged layer from reforming into large grains. In some embodiments, the depth of the recrystallized layer may also be less than the depth of the damaged layer. In this case, there is a damaged layer below the recrystallized layer. Since the lattice reorganization of the damaged layer will have a lattice difference with the metal region of the conductive contact pad, this lattice mismatch can have a certain inhibitory effect on the expansion of the metal region of the conductive contact pad during the bonding process. In these embodiments, the depth of the damaged layer may be greater than the depth of the recrystallized layer and less than or equal to the height of the conductive contact pad, that is, the depth of the damaged layer may be equal to the height of the conductive contact pad.
[0057] The ratio of the depth of the recrystallized layer to the height of the conductive contact pad may be, for example, greater than or equal to a preset value, which may be, for example, 40%, so that the two conductive contact pads can achieve good fusion during the bonding process. Further, if the process conditions permit, the depth of the recrystallized layer may be equal to the height of the conductive contact pad, that is, the entire conductive contact pad is a recrystallized layer, so as to achieve a better bonding effect.
[0058] After the recrystallization layer is formed, the surface of the conductive contact pad may be further subjected to a CMP (chemical mechanical polishing) process for subsequent bonding.
[0059] Figure 2A to Figure 2C In the embodiment of the present disclosure, Figure 1 Schematic diagram of the process of manufacturing a semiconductor structure according to the method shown.
[0060] refer to Figure 2A First, a substrate 1 is provided, and a conductive connection line 2 and a conductive contact pad 3 are made in the substrate 1. In the embodiment of the present disclosure, the substrate 1 may include but is not limited to a silicon substrate.
[0061] refer to Figure 2B A damaged layer 31 is formed on the surface of the conductive contact pad 3 . The height of the damaged layer 31 is less than or equal to the height of the conductive contact pad 3 .
[0062] refer to Figure 2C , the damaged layer 31 is processed to form a recrystallized layer 32. The depth of the recrystallized layer 32 is less than or equal to the depth of the damaged layer 31.
[0063] exist Figure 3A to Figure 3CIn the illustrated embodiment, the depth of the damaged layer 31 is greater than the depth of the recrystallized layer 32, and is less than or equal to the height of the conductive contact pad 3, that is, the depth of the damaged layer 31 may be equal to the height of the conductive contact pad 3. The depth of the recrystallized layer 32 may be equal to the depth of the damaged layer 31, or may be less than the depth of the damaged layer 31. When the depth of the damaged layer 31 is equal to the height of the conductive contact pad 3, the depth of the recrystallized layer 32 may also be equal to the height of the conductive contact pad 3.
[0064] Figure 3A to Figure 3E In the embodiment of the present disclosure, Figure 1 or Figure 2A to Figure 2C Schematic diagram of a semiconductor structure manufactured by the method shown.
[0065] refer to Figure 3A to Figure 3E , the semiconductor structure 300 may include:
[0066] Substrate 1;
[0067] A conductive connection line 2, wherein the conductive connection line 2 is located in the substrate 1;
[0068] A conductive contact pad 3 is connected to the conductive connection line 2 . A recrystallized layer 32 is disposed on the surface of the conductive contact pad 3 . The grains of the recrystallized layer 32 are smaller than the grains of the conductive connection line 2 .
[0069] In the embodiments of the present disclosure, the substrate 1 may include but is not limited to a silicon substrate. For example, the conductive connection 2 may be located in a dielectric layer, and the entire semiconductor structure including the dielectric layer is referred to as the substrate 1; in addition, the substrate 1 may also include all or part of other semiconductor structures (such as other conductive connections or active regions of transistors). Since the substrate 1 is not the focus of the description, the present disclosure will not focus on it here. The conductive connection 2 may be, for example, a through silicon via. The material manufacturing material of the conductive connection 2 and the conductive contact pad 3 may include, for example, metals such as copper and tungsten. Among them, the outer insulating material of the conductive connection 2 is, for example, an insulating material such as silicon oxide and silicon nitride, and the cross-section of the conductive connection 2 is, for example, circular, elliptical or rectangular. A barrier layer (not shown in the figure) is provided at the junction of the conductive contact pad 3 and the substrate 1. The material of the barrier layer may be one or a combination of two or more of TiN, Ti, TaN, or Ta, in order to prevent the metal material in the conductive contact pad from diffusing to the surrounding substrate during the injection and subsequent laser irradiation, resulting in leakage and short circuit.
[0070] exist Figure 3A In the illustrated embodiment, the depth of the recrystallized layer 32 is smaller than the height of the conductive contact pad 3 .
[0071] exist Figure 3BIn the illustrated embodiment, the depth of the recrystallized layer 32 is equal to the height of the conductive contact pad 3. In other embodiments of the present disclosure, the recrystallized layer 32 may also extend to the upper portion of the conductive connection line 2, and the present disclosure does not impose any particular limitation on this.
[0072] exist Figure 3C In the illustrated embodiment, the depth of the recrystallized layer 32 is smaller than the height of the conductive contact pad 3 , and the width of the recrystallized layer 32 is smaller than the width of the conductive contact pad 3 .
[0073] exist Figure 3D In the illustrated embodiment, the depth of the recrystallized layer 32 is different at different locations. For example, the middle location corresponding to the conductive line 2 may be relatively deep, and other locations may be relatively shallow.
[0074] exist Figure 3E In the embodiment shown, there is a damaged layer 31 below the recrystallized layer 32, that is, the depth of the recrystallized layer 32 is less than the depth of the damaged layer 31. Figure 3E In the illustrated embodiment, the depth of the damaged layer 31 is less than the height of the conductive contact pad 3 . However, in some other embodiments of the present disclosure, the depth of the damaged layer 31 may also be equal to the height of the conductive contact pad 3 , and the present disclosure does not impose any particular limitation on this.
[0075] Figure 4 is a flow chart of a wafer bonding method provided by an exemplary embodiment of the present disclosure. Figure 4 The illustrated embodiment can be Figure 3A to Figure 3E The semiconductor structure shown in FIG. Figure 1 or Figure 2A to Figure 2C The method of the embodiment shown is used for manufacturing.
[0076] refer to Figure 4 , the wafer bonding method 400 may include:
[0077] Step S41, providing a first wafer, wherein the first wafer comprises a first substrate, a first conductive line, and a first conductive contact pad, wherein the first conductive line is located in the first substrate, a first surface of the first conductive contact pad is connected to the first conductive line, a first recrystallized layer is disposed on a surface of the first conductive contact pad, and grains of the first recrystallized layer are smaller than grains of the first conductive line;
[0078] Step S42, providing a second wafer, wherein the second wafer comprises a second substrate, a second conductive line, and a second conductive contact pad, wherein the second conductive line is located in the second substrate, and a first surface of the second conductive contact pad is connected to the second conductive line;
[0079] Step S43 , controlling the first recrystallized layer of the first conductive contact pad to contact the second surface of the second conductive contact pad to bond the first wafer to the second wafer.
[0080] In the embodiments of the present disclosure, "wafer" refers to semiconductor materials that require bonding processes, and is not limited to silicon substrates. During the bonding process, different wafers are connected through metal contact pads to form complex circuits with multi-layer structures. In order to complete the wafer bonding process, the surfaces of the wafers to be bonded to each other must first be flat, smooth and clean for successful bonding.
[0081] Figure 5A to Figure 5F Schematic diagram of the first wafer and the second wafer before bonding in the embodiment of the present disclosure.
[0082] refer to Figure 5A to Figure 5F , a first substrate 510, a first conductive line 511, and a first conductive contact pad 512 are disposed on the first wafer 51; a second substrate 520, a second conductive line 521, and a second conductive contact pad 522 are disposed on the second wafer 52. A first recrystallized layer 5121 is disposed on the surface of the first conductive contact pad 512. In one embodiment, both the first conductive line 511 and the second conductive line 521 are through silicon vias (TSV, Through Silicon Via).
[0083] In one embodiment, the second surfaces of the first conductive contact pad 512 and the second conductive contact pad 522 have the same shape and area. In another embodiment, the second surfaces of the first conductive contact pad 512 and the second conductive contact pad 522 have the same shape and different areas. In yet another embodiment, the second surfaces of the first conductive contact pad 512 and the second conductive contact pad 522 have different shapes and different areas. The shapes of the second surfaces of the first conductive contact pad 512 and the second conductive contact pad 522 can be, for example, circular, elliptical, rectangular, etc., but the present disclosure is not limited thereto.
[0084] exist Figure 5A In the illustrated embodiment, no recrystallization layer is provided on the surface of the second conductive contact pad 522. At this time, since the grains of the first recrystallization layer 5121 are smaller and the grains of the second conductive contact pad are larger, the smaller grains can diffuse more quickly in the second conductive contact pad, thereby improving the connection strength of the conductive contact pad.
[0085] In some other embodiments of the present disclosure, a second recrystallized layer 5221 is disposed on the surface of the second conductive contact pad 522. Figure 4 The step S43 shown may be to control the first recrystallized layer 5121 of the first conductive contact pad 512 and the second recrystallized layer 5221 of the second conductive contact pad 522 to be in contact with each other.
[0086] exist Figure 5B In the illustrated embodiment, the grain size of the first recrystallized layer 5121 is equal to the grain size of the second recrystallized layer 5221 , the depth of the first recrystallized layer 5121 is less than the height of the first conductive contact pad 512 , and the depth of the second recrystallized layer 5221 is less than the height of the second conductive contact pad 522 .
[0087] exist Figure 5C In the illustrated embodiment, the grains of the first recrystallized layer 5121 are smaller than the grains of the second recrystallized layer 5221 , the depth of the first recrystallized layer 5121 is smaller than the height of the first conductive contact pad 512 , and the depth of the second recrystallized layer 5221 is smaller than the height of the second conductive contact pad 522 .
[0088] exist Figure 5D In the illustrated embodiment, the grain size of the first recrystallized layer 5121 is equal to the grain size of the second recrystallized layer 5221, the depth of the first recrystallized layer 5121 is less than the height of the first conductive contact pad 512, and the width is equal to the width of the first conductive contact pad 512; the depth of the second recrystallized layer 5221 is equal to the height of the second conductive contact pad 522, and the width is equal to the width of the second conductive contact pad 522.
[0089] exist Figure 5E In the illustrated embodiment, the width of the first conductive contact pad 512 is greater than the width of the second conductive contact pad 522, the grains of the first recrystallized layer 5121 are greater than the grains of the second recrystallized layer 5221, the depth of the first recrystallized layer 5121 is less than the height of the first conductive contact pad 512, the width is less than the width of the first conductive contact pad 512, and the width of the first recrystallized layer 5121 is equal to the width of the second conductive contact pad 522; the depth of the second recrystallized layer 5221 is less than the height of the second conductive contact pad 522, and the width is equal to the width of the second conductive contact pad 522. The width of the first recrystallized layer 5121 is equal to the width of the second recrystallized layer 5221.
[0090] exist Fig. 5F In the illustrated embodiment, the thickness of the first recrystallized layer 5121 and the second recrystallized layer 5221 are both non-uniform, and each has a deeper recrystallized layer at a position corresponding to the conductive connection line in the respective structure.
[0091] In other embodiments of the present disclosure, the recrystallization layer may be disposed in a more flexible manner, as long as it is located on the surface of the conductive contact pad, and the present disclosure does not impose any special limitation on this.
[0092] pass Figure 5A to Figure 5FThe wafers bonded in the embodiment shown can achieve better bonding effect. Since the conductive contact pads connected to each other during the bonding process have a contact surface with smaller grains, the movement and diffusion speed of metal grains can be increased, forming a more delicate and more completely fused contact surface, achieving better bonding effect, and avoiding the occurrence of voids at the metal contact interface during the bonding process that affect electrical and thermal conductivity.
[0093] To summarize, in order to achieve better bonding between copper conductive contact pads (Bonding Cu Pad) and copper conductive contact pads (Bonding Cu Pad) during wafer heterogeneous bonding (Hybrid bonding), the embodiment of the present disclosure first forms a damage layer on the bonding surface of the conductive contact pad of the conductive connection by ion implantation, and then recrystallizes the damage layer by laser irradiation to form smaller metal (such as Cu) grains, thereby facilitating better bonding of the metal contact pads.
[0094] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are to be considered exemplary only, and the true scope and concept of the present disclosure are indicated by the claims.
Claims
1. A method for manufacturing a semiconductor structure, characterized in that: include: Providing a substrate, wherein a conductive line is formed in the substrate; forming a conductive contact pad on the surface of the conductive connection line, wherein the cross-sectional area of the conductive contact pad is greater than the cross-sectional area of the conductive connection line; forming a damaged layer on the surface of the conductive contact pad by ion implantation; The damaged layer is processed using laser light to form a recrystallized layer.
2. The manufacturing method according to claim 1, characterized in that The depth of the recrystallized layer corresponding to the conductive connection line is greater than the depth of other positions of the recrystallized layer.
3. The manufacturing method according to claim 1, characterized in that: The depth of the recrystallized layer is smaller than the depth of the damaged layer.
4. The manufacturing method according to claim 1, characterized in that: The depth of the recrystallized layer is equal to the height of the conductive contact pad.
5. A semiconductor structure, characterized in that: The semiconductor structure is manufactured using the manufacturing method according to any one of claims 1 to 4, comprising: substrate; A conductive connection line, wherein the conductive connection line is located in the substrate; A conductive contact pad is connected to the conductive connection line, a recrystallized layer is provided on a surface of the conductive contact pad, and grains of the recrystallized layer are smaller than grains of the conductive connection line.
6. The semiconductor structure according to claim 5, characterized in that The depth of the recrystallized layer is equal to the height of the conductive contact pad.
7. A wafer bonding method, characterized in that: include: Providing a first wafer, the first wafer comprising a first substrate, a first conductive line, and a first conductive contact pad, wherein the first conductive line is located in the first substrate, a first surface of the first conductive contact pad is connected to the first conductive line, a first recrystallized layer is disposed on a surface of the first conductive contact pad, and grains of the first recrystallized layer are smaller than grains of the first conductive line; Providing a second wafer, the second wafer comprising a second substrate, a second conductive line, and a second conductive contact pad, the second conductive line is located in the second substrate, and a first surface of the second conductive contact pad is connected to the second conductive line; The first recrystallized layer of the first conductive contact pad and the second conductive contact pad are controlled to contact the second surface of the second conductive contact pad to bond the first wafer and the second wafer.
8. The wafer bonding method according to claim 7, characterized in that: A second recrystallized layer is provided on the surface of the second conductive contact pad, and grains of the second recrystallized layer are smaller than grains of the second conductive connection line, and controlling the first recrystallized layer of the first conductive contact pad to contact the second surface of the second conductive contact pad comprises: The first recrystallized layer and the second recrystallized layer of the first conductive contact pad and the second conductive contact pad are controlled to contact each other.
9. The wafer bonding method according to claim 8, characterized in that: The grain size of the first recrystallized layer is equal to the grain size of the second recrystallized layer, or the grain size of the first recrystallized layer is not equal to the grain size of the second recrystallized layer.
10. The wafer bonding method according to claim 7, characterized in that: The depth of the first recrystallized layer at a position corresponding to the first conductive connection line is greater than the depth of other positions of the first recrystallized layer.
11. The wafer bonding method according to claim 7, characterized in that: The depth of the first recrystallized layer is equal to the height of the first conductive contact pad.
12. The wafer bonding method according to claim 7, wherein: A first damaged layer is disposed below the first recrystallized layer.
13. The wafer bonding method according to claim 7, characterized in that: An area of the first conductive contact pad is greater than an area of the second conductive contact pad, and an area of the first recrystallized layer is the same as an area of the second conductive contact pad.
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