Method for determining an inspection strategy for a set of substrates in a semiconductor manufacturing process

By employing an inspection strategy based on predictive models and machine learning in the semiconductor manufacturing process, the problems of low efficiency and high cost in inspection decision-making in existing technologies have been solved, achieving more efficient and accurate substrate inspection and reducing yield loss and production costs.

CN115398345BActive Publication Date: 2025-11-04ASML NETHERLANDS BV
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Patent Information

Application Number
CN202180026334.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-09-28
Filing Date
2021-03-01
Publication Date
2025-11-04
Estimated Expiration
2041-03-01

AI Technical Summary

Technical Problem

In the prior art, the methods used to determine whether to inspect the substrate in the semiconductor manufacturing process are inefficient, costly, and unable to effectively prevent yield loss, especially since existing strategies fail to make inspection decisions based on quality-related measurements.

Method used

An inspection strategy based on a prediction model is adopted, which uses preprocessed and postprocessed data to quantify compliance indicators. Combining the expected cost and target value of the inspection strategy, the quality compliance of the substrate is predicted by machine learning algorithm, and the inspection strategy is determined based on the prediction results.

Benefits of technology

It improves the efficiency and accuracy of inspection decisions, reduces unnecessary inspections and yield losses, optimizes production costs, and enables a more flexible and automated inspection process.

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Abstract

A method for determining an inspection strategy for at least one substrate is described, the method comprising: using a prediction model, quantifying a compliance indicator value of a compliance indicator related to a prediction of compliance with quality requirements based on one or both of pre-processing data associated with the substrate and any available post-processing data associated with the at least one substrate; and deciding on an inspection strategy for the at least one substrate based on: the compliance indicator value, an expected cost associated with the inspection strategy, and at least one target value describing an expected value of the inspection strategy at least one target requirement related to the prediction model.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority to European Application 20167648.3, filed on April 2, 2020; European Application 20174335.8, filed on May 13, 2020; and European Application 20198754.2, filed on September 28, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This invention relates to semiconductor manufacturing processes, and more particularly, to methods for making decisions during semiconductor manufacturing processes, such as whether a substrate should be inspected. Background Technology

[0004] A lithography apparatus is a machine configured to apply a desired pattern onto a substrate. Lithography apparatuses can be used, for example, in the manufacture of integrated circuits (ICs). A lithography apparatus can project a pattern (also often referred to as a “design layout” or “design”) from a patterning apparatus (e.g., a mask) onto a radiation-sensitive material (resist) layer disposed on a substrate (e.g., a wafer).

[0005] To project a pattern onto a substrate, photolithography equipment can use electromagnetic radiation. The wavelength of this radiation determines the minimum size of the feature that can be formed on the substrate. Typical wavelengths currently in use are 365 nm (i-line), 248 nm, 193 nm, and 13.5 nm. Compared to photolithography equipment using radiation with a wavelength of, for example, about 193 nm, photolithography equipment using extreme ultraviolet (EUV) radiation with wavelengths in the range of 4 nm to 20 nm (e.g., 6.7 nm or 13.5 nm) can be used to form smaller features on the substrate.

[0006] Low-ki lithography can be used to process features with dimensions smaller than the classical resolution limit of a lithographic apparatus. In such process, the resolution formula can be expressed as CD = kixX / NA, where l is the wavelength of the radiation used, NA is the numerical aperture of the projection optics in the lithographic apparatus, CD is the "critical dimension" (generally the smallest feature size that is printed, but in this case the half-pitch), and ki is an empirical resolution factor. In general, the smaller ki the more difficult it becomes to reproduce the shape and dimensions planned by a circuit designer in the substrate. To overcome these difficulties, sophisticated fine-tuning steps can be applied to the lithographic projection apparatus and / or the design layout. These include, for example, but are not limited to, optimization of NA, customized illumination schemes, use of phase- shift patterning devices, various optimizations of the design layout such as optical proximity correction (OPC), sometimes also called "optical and process correction", in the design layout, or other methods generally defined as "resolution enhancement techniques" (RET). Alternatively, tight control loops used to control the stability of the lithographic apparatus can be used to improve the reproduction of patterns at low ki.

[0007] These tight control loops are generally based on metrology data obtained using a metrology tool that measures a characteristic of the applied pattern or a metrology target representing the applied pattern. Typically, the metrology tool is based on optical measurements of the position and / or dimensions of the pattern and / or target. It is essentially assumed that these optical measurements are representative of the quality of the manufacturing process of the integrated circuit.

[0008] In addition to the control based on optical measurements, also electron beam based measurements can be performed; among the electron beam based measurements, a so-called low voltage measurement using an electron beam tool (as provided by HMI) can be applied. This low voltage contrast measurement is indicative of the quality of the electrical contact between the layers applied to the substrate.

[0009] Any metrology or inspection takes a significant amount of time and therefore only a small fraction of the processed wafers can be inspected in a real system. The overall benefit of the inspection process of different wafers will vary from wafer to wafer. As such, an improved method for making decisions such as which wafers should be inspected is desired. SUMMARY

[0010] It is an object of the present inventors to solve the mentioned drawbacks of the prior art.

[0011] In a first aspect of the application, there is provided a method for determining an inspection strategy for at least one substrate, the method comprising: using a prediction model, quantifying a compliance indicator related to a prediction made for compliance with quality requirements, based on one or both of pre-processing data associated with the substrate, and any available post-processing data associated with the at least one substrate; and deciding on an inspection strategy for the at least one substrate based on: the compliance indicator value, an expected cost associated with the inspection strategy, and at least one target value describing an expected value of the inspection strategy in at least one target aspect related to the prediction model. BRIEF DESCRIPTION OF DRAWINGS

[0012] Embodiments of the application will now be described, by way of example only, with reference to the accompanying schematic drawings in which:

[0013] Figure 1 A schematic overview of a lithographic apparatus is depicted;

[0014] Figure 2 A schematic overview of a lithographic cell is depicted;

[0015] Figure 3 A schematic representation of overall lithography is depicted, representing the collaboration between three key technologies for optimizing semiconductor manufacturing;

[0016] Figure 4 is a flowchart of a decision making method according to a first embodiment of the application;

[0017] Figure 5 is a flowchart of a decision making method according to a second embodiment of the application;

[0018] Figure 6 is a flowchart of a reinforcement learning implementation of the second embodiment; and

[0019] Figure 7 comprises (a) a flowchart of a prediction method of the machine learning model (e.g. neural network) implementation of the second embodiment and (b) a flowchart of the machine learning model implementation of the second embodiment. DETAILED DESCRIPTION

[0020] In this document, the terms“radiation” and“beam” are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (e.g. with a wavelength of 365, 248, 193, 157 or 126 nm) and EUV (extreme ultra-violet radiation, e.g. having a wavelength in the range of about 5-100 nm).

[0021] The terms“reticle,”“mask,” or“patterning device” as used herein can be broadly interpreted to refer to any patterning device that can be used to impart a pattern to a beam of radiation, which can be patterned cross-section corresponding to a desired pattern to be created in a target portion of the substrate; the term“optical valve” can also be used in this context. Examples of other such patterning devices include:

[0022] - programmable mirror arrays. U.S. Patent Nos. 5,296,891 and 5,523,193, which are incorporated herein by reference, teach the fabrication of matrices of tiny mirrors, each acting as a programmable reflection point.

[0023] - programmable LCD arrays. An example of such a construction is given in U.S. Patent No. 5,229,872, incorporated herein by reference.

[0024] Figure 1 A lithographic apparatus LA is schematically depicted. The lithographic apparatus LA includes an illumination system (also referred to as illuminator) IL configured to condition a radiation beam B (e.g., UV, DUV or EUV radiation), a support structure (e.g., a mask table) MT constructed to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device MA in accordance with certain parameters, a substrate table (e.g., a wafer table) WT constructed to hold a substrate (e.g., a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate in accordance with certain parameters, and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g., including one or more dies) of the substrate W.

[0025] In operation, the illuminator IL receives a radiation beam from a radiation source SO, e.g., via a beam delivery system BD. The illumination system IL can include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, for directing, shaping, or controlling the radiation. The illuminator IL can be used to adjust the

[0026] The term "projection system" PS used herein should be interpreted as broadly encompassing various types of projection system, including refractive, reflective, catadioptric, anamorphic, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term "projection lens" herein can be considered as synonymous with the more general term "projection system" PS.

[0027] The lithography apparatus can be of a type in which at least a portion of the substrate can be covered by a liquid having a relatively high refractive index (e.g., water) to fill a space between the projection system and the substrate - often referred to as immersion lithography. Further details of immersion techniques can be found, for example, in U.S. Patent No. 6,952,253 and PCT Publication No. WO 99 / 49504, which are incorporated herein by reference.

[0028] The lithography apparatus LA can also be of a type having two (dual stage) or more substrate tables WT and two or more support structures MT (not shown in the figures) for example. In such "multi-stage" machines, the additional table(s) / structure(s) can be used in parallel or preparatory steps can be carried out on one or more tables while one or more other tables are being used for exposing a design layout of a patterning device MA to a substrate W.

[0029] In operation, the radiation beam B is incident on the patterning device (e.g., mask MA) held by the support structure (e.g., mask table MT), and patterned by said patterning device MA. Having traversed the mask MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. The substrate table WT is accurately positionable by means of the second positioner PW and position sensor IF (e.g., an interferometer, a linear encoder, a 2D encoder, or a capacitive sensor), for example, so as to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and possibly another position sensor (not explicitly depicted in the figures) can be used to accurately position the mask MA in the path of the radiation beam B. Figure 1 Mask and substrate alignment marks M1, M2 and P1, P2 can be used to align the mask MA and the substrate W. While the substrate alignment marks occupy dedicated target portions as illustrated, the substrate alignment marks can be located in spaces between target portions (these marks are referred to as scribe-lane alignment marks).

[0030] As Figure 2As shown in Figure 1, the lithography apparatus LA can form part of a lithocell LC (sometimes also referred to as a litho cell or (litho) cluster), which often also includes apparatus for performing pre-exposure and post-exposure processes on the substrate W. Typically, these apparatus include a spin coater SC for depositing a coating of resist on the substrate W, a developer DE for developing the resist after it has been exposed, chill plates CH and bake plates BK, e.g. for adjusting the temperature of the substrate W (e.g. for adjusting the solvent in the resist layer). A substrate handling apparatus or robot RO picks up substrates W from input / output ports I / OI, I / O2, moves them between the different process apparatus and delivers them to a load deck LB of the lithography apparatus LA. The devices in the lithocell, often also collectively referred to as a track or track and develop system, are typically controlled by a track or track and develop system control unit TCU, which itself can be controlled by a supervisory control system SCS, which can also control the lithography apparatus LA, e.g. via a lithography control unit LACU.

[0031] For correct and consistent exposure of substrates W exposed by the lithography apparatus LA, it is desirable to inspect the substrates to measure properties of the patterned structures, such as overlay error between subsequent layers, line thickness, critical dimension (CD), etc. For this purpose, an inspection tool (not shown in the Figures) can be included in the lithocell LC. If errors are detected, the exposure of subsequent substrates or other processing steps to be performed on the substrates W can be adjusted, e.g. before other substrates W of the same batch or lot are still to be exposed or processed, especially in case of inspection.

[0032] An inspection apparatus, which can also be referred to as a metrology apparatus, is used to determine properties of the substrates W, and in particular how properties of different substrates W vary or how properties associated with different layers of the same substrate W vary from layer to layer. The inspection apparatus is alternatively configured to identify defects on the substrates W and can for example be part of the lithocell LC, or can be integrated into the lithography apparatus LA, or even be a separate device. The inspection apparatus can measure properties on a latent image (image in a resist layer after exposure), or on a semi-latent image (image in a resist layer after an exposure post-exposure bake step PEB), or on a developed resist image (where either the exposed or unexposed parts of the resist have been removed), or even on an etched image (after a pattern transfer step such as etching).

[0033] Typically, the patterning process in the lithography apparatus LA is one of the most important steps in the process, which requires high accuracy in the sizing and placement of structures on the substrate W. To ensure such high accuracy, three systems can be combined in a so-called "holistic" control environment, as Figure 3Schematically depicted, one of these systems is a lithography apparatus LA which is (in effect) connected to a metrology tool MT (a second system) and to a computer system CL (a third system). The key to this "overall" environment is to optimize the cooperation between these three systems to enhance the overall process window and to provide a tight control loop, ensuring that the patterning performed by the lithography apparatus LA stays within the process window. The process window defines a range of process parameters (e.g. dose, focus, overlay) within which a certain manufacturing process results in a defined outcome (e.g. functional semiconductor devices) - typically within the process parameter range, the process parameters in the lithography or patterning process are allowed to vary.

[0034] The computer system CL can use (part of) the design layout to be patterned to predict which resolution enhancement techniques to use and to perform computational lithography simulations and calculations to determine which mask layouts and lithography apparatus settings achieve the largest overall process window for the patterning process (in Figure 3 by the double white arrow in the first scale SCI). Typically, the resolution enhancement techniques are arranged to match the patterning possibilities of the lithography apparatus LA. The computer system CL can also be used to detect where within the process window the lithography apparatus LA is currently operating (e.g. using input from the metrology tool MT) in order to predict whether defects can exist due to e.g. sub-optimal processing (in Figure 3 by the arrow pointing to "0" in the second scale SC2).

[0035] The metrology tool MT can provide input to the computer system CL to enable accurate simulations and predictions, and can provide feedback to the lithography apparatus LA to identify possible drifts in e.g. the calibration status of the lithography apparatus LA (in Figure 3 by the multiple arrows in the third scale SC3).

[0036] The lithography apparatus LA is configured to apply a desired pattern to a substrate. The position and dimensions of the applied features need to be within certain tolerances. Positional errors can arise due to overlay errors (often referred to as "overlay"). Overlay is the error in placing a first feature during a first exposure relative to placing a second feature during a second exposure. The lithography apparatus minimizes overlay errors by accurately aligning each wafer with a reference before patterning. This is done by measuring the position of alignment marks on the substrate using alignment sensors. More information on the alignment process can be found in U.S. Patent Application Publication No. US20100214550, which is incorporated by reference herein. Pattern dimension design (e.g., CD) errors can arise, for example, when the substrate is not correctly positioned with respect to the focal plane of the lithography apparatus. These focus position errors can be associated with non-flatness of the substrate bottom surface. The lithography apparatus minimizes these focus position errors by measuring the substrate bottom surface topography before patterning using a level sensor. A substrate height correction is applied during subsequent patterning to ensure correct imaging (focusing) of the patterning device onto the substrate. More information on the level sensor system can be found in U.S. Patent Application Publication No. US20070085991, which is incorporated by reference herein.

[0037] In addition to the lithography apparatus LA and the metrology apparatus MT, other processing apparatuses can be used during IC production. An etching station (not shown in the figures) post-processes a substrate after the pattern is exposed in resist. The etching station transfers the pattern from the resist into one or more layers below the resist layer. Typically, the etching is based on applying a plasma medium. The local etching characteristics can be controlled from, for example, using temperature control of the substrate or using a voltage controlled ring to direct the plasma medium. More information on etching control can be found in International Patent Application Publication No. WO2011081645 and U.S. Patent Application Publication No. US20060016561, which are incorporated by reference herein.

[0038] During the manufacturing of ICs, it is very important that the process conditions under which a substrate is processed using a processing apparatus, such as a lithography apparatus or an etching station, remain stable so that the properties of the features remain within certain control limits. The stability of the process is especially important for the features of the functional part of the IC, i.e. the product features. To ensure stable processing, process control capabilities need to be in place. Process control involves monitoring of processing data and implementation of means for process correction, e.g. controlling the processing apparatus based on characteristics of the processing data. Process control can be based on periodic measurements by a metrology apparatus MT, often referred to as “advanced process control” (also referred to as APC). More information on APC can be found in US patent application publication no. US20120008127, which is incorporated herein by reference. A typical APC implementation involves periodic measurements of metrology features on the substrate, thereby monitoring and correcting drifts associated with one or more processing apparatuses. The metrology features reflect the response of the process variations to the product features. The sensitivity of the metrology features to process variations can be different from the sensitivity of the product features. In that case, a so-called “metrology-to-device” offset (also referred to as MTD) can be determined. To mimic the behavior of the product features, the metrology targets can incorporate segmented features, auxiliary features, or features with specific geometrical shapes and / or dimensions. Carefully designed metrology targets should respond to process variations in a similar way as the product features. More information on metrology target design can be found in international patent application publication no. WO 2015101458, which is incorporated herein by reference.

[0039] The term fingerprint can refer to a dominant (systematic) contribution factor (“latent factor”) of a measured signal, and in particular to a contribution factor related to a performance impact on the wafer or related to a previous processing step. Such a fingerprint can refer to a substrate (lattice) pattern (e.g. from alignment, leveling, overlay, focus, CD), a field pattern (e.g. from in-field alignment, leveling, overlay, focus, CD), a substrate area pattern (e.g. outermost radius of wafer measurement), or even a pattern in a scanner measurement related to wafer exposure (e.g. from batch-to-batch heating signatures of reticle alignment measurements, temperature / pressure / servo wheel profiles, etc.). The fingerprint can be included in a set of fingerprints, and can be encoded homogenously, i.e. uniformly, or heterogeneously, i.e. non-uniformly, therein.

[0040] Electrical measurement data is typically obtained after processing the substrate. Typically, when electrical metrology is performed to obtain electrical measurement data, a probe is used to measure all dies on the substrate, the probe being in (proximity) contact with the electrical circuitry formed during processing. Various types of measurements can be performed; for example, voltage, current, resistance, capacitance and inductance measurements. These measurements can be performed under different conditions (e.g. frequency, voltage, current) and at multiple sites across the die. The electrical measurements can include an assessment of whether a particular structure / feature or device is functional (e.g. within specification). Alternatively or additionally, the electrical measurements can be classified according to a "bin code". An electrical measurement associated with a certain measured parameter (current, voltage, resistance, capacitance, inductance etc.) under a certain condition is typically referred to as a separate "bin code". Thus, a typical electrical measurement across a die can be represented by a plurality of plots, each plot representing the spatial distribution of values associated with a particular bin code. Throughout this document, "bin code" and "electrical characteristic" are used synonymously, such that the value of a bin code associated with the substrate is referred to as the value of an electrical characteristic of the substrate. Electrical measurement data can also include bit asymmetry data or any other yield parameter.

[0041] The nature of the measured electrical characteristic (minimum, maximum, variance or any other statistical measure) is an important indicator / index related to the probability that a certain circuit on the die will be functional. Thus, there is a strong relationship between the electrical characteristic and the yield of the process. Electrical characteristic measurements are therefore essential for yield control. However, electrical characteristic measurements are also time consuming and are performed only at the end stage of the semiconductor process (e.g. when options for correcting non-functional circuitry are almost non-existent).

[0042] Deciding which substrates should be inspected and / or reworked after exposure is an important consideration which will have an impact on throughput and yield. Errors in classification will result in yield loss, as out-of-specification / non-functional devices will be processed undetected, or else trigger excessive false alarms, resulting in unnecessary inspection and inefficiency. The rework decision is based on costly and time consuming metrology measurements (inspections). Furthermore, the inspection capacity of a wafer fab, i.e. the inspection capability, is typically limited; for example, up to 5% or 10% of the throughput. As a result, only a small number of all wafers produced are inspected. Typically, the vast majority of wafers inspected are found to be within specification (OK). The rework decision should occur within a short time period, typically within a few minutes. Inspection under such a scenario can refer to post-exposure metrology actions (e.g. expensive metrology, where the cost can be measured in time), such as measurements by scatterometry equipment or scanning electron microscope equipment (e.g. e-beam equipment).

[0043] Currently, there are different selection strategies for deciding which wafers should be inspected. These strategies include random selection or fixed selection (e.g. every nth wafer of a batch). Another strategy can be a selection based on measurements and experience. Subject matter experts (SMEs) decide whether a wafer should be inspected based on custom key performance indicators or key performance indicators (KPIs) values and their experience. Such strategies can be implemented individually or in any combination.

[0044] Random or fixed selection strategies can result in unnecessarily high operational expenses (OPEX). This is because wafers are not inspected based on quality related measurements. At the same time, these strategies cannot prevent yield loss because the selection criteria are not designed to inspect abnormal wafers. For the expert based strategy, the SMEs are likely to introduce high variability and bias in the rework decisions. Therefore, a systematic and reliable rework decision process is not possible. Depending on the bias, this strategy can result in large Type I (false positive) or Type II (false negative) errors, resulting in high OPEX or yield loss, respectively.

[0045] In addition to the described strategies, published application WO2018133999 (incorporated herein by reference) describes a method to facilitate the evaluation of wafers by using a utility model trained to learn a mapping between pre-processed wafer data (e.g. context data) and wafer / device performance (e.g. yield). The pre-processed data or context data can describe which tool or combination of tools was used to process the wafer and / or include scanner metrology data such as alignment and leveling data. This pre-processed wafer data can be considered as “cheap” metrology data, or essentially free, in comparison to the cost of post-processed metrology, because it is performed for every wafer in any case. The output of this utility model is used by a semi-supervised algorithm that makes performance predictions based on fab and lithography context data. All wafers are then visualized to the SME by using data transformation and clustering techniques. The performance of wafers is predicted by the utility model or the semi-supervised algorithm; labeled wafers belonging to one or more of these clusters provide an indication of the performance of unlabeled wafers belonging to the same cluster. The SME then makes the decision to inspect wafers based on the visualization.

[0046] As semiconductor factories evolve, timely inspection decisions become a constraint. In cases where decisions use expert input, the SME cannot find patterns that lead to identifying potential not-OK (NOK) root causes due to the amount of data / KPIs that must be analyzed. In addition, the expert cannot inspect and analyze such a large amount of data in a given time, even if provided with visualization tools such as described in WO2018133999. While this approach provides cluster visualization for the SME, it is not automated in the sense that all rework decisions still depend on the expert.

[0047] It is proposed to use a machine learning strategy for predicting wafer quality (e.g. rework decisions) based on available per-wafer data (e.g. pre-processed data). Supervised or unsupervised predictors or prediction algorithms can be selected to derive yield-related predictions; for example, a prediction of whether a wafer is NOK or OK. In addition, an associated probability value of the wafer being NOK / OK can be provided.

[0048] Based on the probabilities, one or more other objectives and metrology costs, one or more wafers can be selected for inspection. These objectives can relate to obtaining values (e.g. in terms of one or more informative metrics) of metrology data for one or more of: a) verifying that wafers are correctly characterized (accuracy of the model), b) accelerating the learning process (maturity of the model), c) discovering new patterns; for example OK / NOK patterns (scope of the model) and d) selecting appropriate wafers for APC feedback loops. The architecture balances these objectives in view of the estimated final yield versus metrology costs (OPEX). The relative importance of the objectives versus the costs can be configurable to enable a flexible architecture for rework prediction and wafer selection.

[0049] Figure 4 is a flowchart describing an example of a method according to an embodiment. In such an embodiment, a machine learning strategy predicts whether each instance (e.g. each wafer) is OK or NOK. Such a strategy leverages active learning to cope with the dual challenges of small labeled dataset (as few wafers are inspected) and unbalanced dataset of OK wafers versus NOK wafers (as there are typically very few defective wafers). In an embodiment, the strategy is not static and can be adjusted and / or evolve over time according to needs. In this way, it can improve overall performance (e.g. classification or performance metrics such as the area under the receiver-operating characteristic curve (ROC AUC)) while minimizing wafer yield loss and customer engineering OPEX.

[0050] The method embeds a predictor PD or prediction algorithm and can quantify the prediction uncertainty to optimize the decision of which wafers to inspect. These wafers can be optimally selected for inspection, with the dual purpose of accelerating the learning of the embedded predictor PD and / or discovering new OK / NOK patterns. The embedded predictor PD can be supervised or unsupervised, or even a combination of both.

[0051] The lithography apparatus LA or scanner processes a set of wafers or wafer lot LT. Pre-processing data or context data for each wafer of the wafer lot LT, e.g. describing the processing history and / or including scanner metrology data, is passed to the predictor PD, e.g. a machine learning / machine learning model, which outputs a probability value P NOK describing the probability of each wafer to be defective. Based on the probability value P NOK , a decision INS? is made whether the wafer should be inspected. This decision can be configurable, e.g. via adjusting / selecting parameters a, b of a beta function used to make the decision. This will be discussed in more detail below. Those (few) wafers that are sent for inspection MET are inspected using suitable metrology tools, with the metrology data, e.g. confirmation of OK / NOK status, used to label these wafers W L . Those wafers that are not inspected are labeled by class (e.g. OK / NOK) based on the probability value P NOK assigned by the predictor PD, e.g. by comparing this value to a threshold value indicating non-functionality. For example, instances of this probability above a certain threshold can be labeled as “NOK”; instances of this probability below the threshold can be labeled as “OK”. This step has the purpose of building a set of pseudo-labeled wafers W PL for retraining purposes.

[0052] Regarding the model used by the predictor PD, highly unbalanced datasets can use a suitable unsupervised machine learning model. For example, an autoencoder architecture can be used, trained only on the majority / large class (e.g. OK wafers). For example, the majority / large class can correspond to a class that can be described as normal behavior, where the autoencoder is trained only using data belonging to this class. In this way, it will learn a basis representation of the normal class, and will efficiently reconstruct examples belonging to it with low reconstruction error (or other uncertainty metric). The autoencoder will not be able to capture the underlying structure of classes that were never observed before, and will not be able to reconstruct instances belonging to it, resulting in high reconstruction error. In this way, instances not belonging to the large class can be detected, as the autoencoder is not expected to efficiently reconstruct them, acting as an anomaly detector. Additionally, the reconstruction error can be mapped to a probability that an instance is NOK; for example by means of a parametric model (like an exponential law) or a non-parametric model (e.g. kernel density estimation).

[0053] In the case of more balanced datasets, a supervised predictor PD is employed instead. The output of a supervised algorithm can be a probability that each instance is not NOK; support for probability prediction can be added to the algorithm if needed.

[0054] The inspection capacity of a wafer fab, i.e. the ability to inspect, is usually limited to a fraction of the production, i.e. a part, and inspection is cost intensive. This fact affects the size of the dataset that is usually available, and the rate at which the dataset can be enriched, ultimately affecting the speed at which a prediction method can be learned from scratch or from a small initial dataset.

[0055] The decision INS? which wafers to inspect can be made by solving an optimization problem on the probability values P NOK under the constraint that no more wafers are inspected than the capacity of the fab allows. The objective function can incorporate at least the following contributions:

[0056] • a separate wafer inspection value (e.g. first objective value) on the prediction accuracy in spec, i.e. within the specification (e.g. first objective);

[0057] • a separate wafer inspection value (e.g. second objective value) on accelerating the learning process (e.g. second objective);

[0058] • a separate wafer inspection value (e.g. third objective value) on discovering new OK / NOK patterns (e.g. third objective);

[0059] • a cost on the amount of wafers inspected until the decision time, exceeding the nominal inspection capacity.

[0060] The aforementioned published application WO2018133999 describes, for example, a general architecture for controlling the measurements to be performed based on the (expected) informativeness of the measurements to be performed.

[0061] An example of a suitable objective function to be minimized can be:

[0062]

[0063] where:

[0064] • the brackets denote a scalar product;

[0065] • ξ∈{0,1} 25 denotes the i-th wafer selected if and only if ξ i ≡ 1;

[0066] • π∈[0,1] 25 is a vector of estimated NOK probabilities;

[0067] • is a beta function of the parameters a, β;

[0068] • γ t is a parameter constraining the solution to prevent too many wafers being selected.

[0069] The scalar product serves the purpose of forming an indicator / index ξ i (i = 1, 2,..., 25) weighted by the coefficients . The contribution of a wafer to the objective function is a positive uniform cost associated to the wafer inspection capability minus a cost depending on the value of inspecting the particular wafer.

[0070] The parameters a and β determine a reweighting based on a transformation of the interval [0, 1], where the estimated NOK probabilities are live. When a = β, equal weights are placed on the interval and above, where if a = β > 1 (or, a = β < 1), the extreme values (approximately 0 and 1) are more heavily weighted (or, less heavily weighted). If more weight is placed on wafers with |P |, then learning will speed up; if more weight is placed on wafers with |P NOK | > 0, then focus will shift on production control and discovery of new failure modes. By choosing a ≠ β appropriate values, it is also possible to reweight in an asymmetric manner (e.g., wafers with |P have more weight than wafers with |P |). In this way, any corresponding quantile of the probability of the substrate conforming to the quality requirement can be biased.

[0071] The pair a, b can be set according to one or more of the following methods. The first method can rely on a set of predefined pairs a, b, each pair addressing a specific purpose. For example, a specific pair a, b can include the pair:

[0072] i) improving the performance of the algorithm by selecting wafers for inspection that cannot be easily classified;

[0073] ii) improving a desired metric such as AUC;

[0074] iii) detecting as many bad wafers as possible.

[0075] The second method relies on reinforcement learning. A reinforcement learning agent aims at adjusting the pair a, b parameters, taking into account the following reinforcement learning settings:

[0076] • State: corresponds to the predicted probability of each wafer being NOK and to the current combination of a, b.

[0077] • Action: adjust a, b and decide which wafers should be inspected.

[0078] • Reward: improve the performance metric of the classification algorithm. The reward can also be based on any cost related to the metrology tool being idle due to the agent not sending wafers for inspection.

[0079] Parameter g t Prevents having too many selected wafers in the optimal solution. The subscript t indicates that the parameter can vary over time. For example, while the aforementioned exemplary 5% inspection capacity translates into roughly 1 wafer per batch, the system can decide not to inspect any wafer in a batch and instead inspect more wafers in a subsequent batch. For existing methods relying on expert decision, the optimal selection of N wafers to be inspected, where N is not necessarily 1, is a very challenging task. In addition to the aforementioned potential bias, the selection is combinatorially complex for a human: choosing only 2 wafers from a batch requires comparing 300 candidate wafer pairs. In addition, the automatic inspection decision performed by the proposed machine learning strategy is superior to time-constrained decisions such as needed in a fab after an exposure batch, as there are no human factors in the loop. This formulation has the advantage that the relative weight of these contributions in the objective function can be varied according to the needs, thus providing the user with the freedom to build their own custom product. The presence of the parameter g t in the objective function enables to dynamically deliver the inspection capacity.

[0080] In embodiments, there can be periodic retraining to improve the performance of the machine learning policy and / or learn new OK / NOK patterns. The machine learning policy contributes to the amplification / generation of two datasets: one containing labeled OK / NOK wafers W L and the other containing predicted OK / NOK wafers W PL The retraining is performed on these periodic amplified datasets. This retraining is manifested in Figure 4 by a feedback loop from labeled wafers W L and pseudo-labeled wafers W PL to a weighted loss function WLF that evaluates the performance of the prediction based on actual labeled wafers W L If this performance does not satisfy an acceptability threshold, a trigger TRIG can be generated to trigger a retraining of the predictor PD. In addition, the loss function WLF can be adapted to focus on the most recent patterns in the data or to take into account the uncertainty of the predicted pseudo-labels.

[0081] The nature of the semiconductor manufacturing process causes the data to evolve over time, resulting in a change of the underlying data distribution. This scenario, where the distribution of features and labels p(X,y) is not stationary but drifts from time to time, is called concept drift. Various scenarios that illustrate this situation will now be presented:

[0082] When a new unseen substrate is exposed, the objective function can be automatically adapted by reverting to the initial settings. For example, if it is considered important to accelerate the learning process for unseen wafers (i.e., described in terms of a contribution factor: individual wafer inspection value with respect to accelerating the learning process), then upon identification of a new substrate, the substrate ID from the scanner data can be used to increase the weight for this contribution factor.

[0083] In another example, concept drift, for example due to a change in the underlying data distribution, which can be caused by a change in the process or scanner natural behavior, can be addressed by monitoring the performance of the predictor PD. After making the prediction, the true label (inspected wafer W LSome of the embodiments described above can be used, which can trigger periodic retraining steps in order to provide up-to-date models. The prediction performance increment can be quantified to provide a measure of the amount of change in the data distribution. Based on this prediction performance increment, the contribution factors of the objective function can be changed / adapted: for example, the larger the decrease in performance, the more the weights can change towards the initial settings, as this indicates a new initial state with a new data distribution. The parameters a and b can be maintained proportional to the prediction performance (e.g. classification or performance metric, such as AUC): for example, the better the performance, the more focus on selecting only NOK wafers. When the prediction performance is below a (e.g. custom-defined) performance threshold, then the TRIG classification model retraining can be triggered.

[0084] Another embodiment for metrology control based on weighting / balancing of values for metrology data (for improving yield prediction) and cost (measurement time) of metrology data will now be described. Such a method can be an improvement of the method described above or a separate embodiment. This embodiment can include a multi-layer aspect and is not limited to the decision on whether to measure the entire substrate; instead, the decision can include deciding whether to measure a specific target or mark, or group thereof (e.g. on an incremental basis), and / or deciding which targets of a substrate to measure (e.g. deciding on a sampling scheme or sampling strategy).

[0085] The embodiment can use a measurement collector model to decide on wafer and / or target selection for measurement, e.g. in order to minimize the number of (expensive) metrology actions while maintaining a sufficiently accurate (final) yield prediction. It should also be noted that the previously described embodiments can also use such a measurement collector model. For example, the collector model can evaluate the current state of the metrology data measured so far, other pre-processed wafer data (e.g. context data) and / or yield prediction data, and score the state according to the quality of the yield prediction based on the existing data. The collector model can be trained to evaluate which additional data (state transition) provides the largest gain in yield prediction accuracy. For example, the data collection can end if the yield prediction quality meets the requirements.

[0086] As previously described, a machine learning approach is proposed for collecting costly measurements (e.g. after development inspection (ADI) and / or after etch / clean inspection (AEI / ACI)) of the parameters of interest (e.g. overlay and / or CD) at each layer, such that the measurements taken optimally allow to predict yield in a cost-effective way. This can include identifying and performing only those costly measurements for each layer that are deemed to significantly improve the yield prediction. This setup is an active feature collection in terms of prediction time. The solution works online and provides recommendations on measurement collection for each layer while the wafers are being processed.

[0087] Figure 5 is a flow chart illustrating the interaction between the two main components (yield predictor PD and measurement collector CL) according to such an embodiment. In addition, the yield predictor PD can optionally comprise an imputer IM to perform imputation for missing or sparse data.

[0088] The yield correlator / predictor PD can comprise a model for predicting the yield by stacking. Such a model can use cheap and can be used for all wafers pre-processed wafer data (e.g. alignment, leveling and context data), and any expensive metrology data that can have been collected at each layer to predict the yield. While using as much cheap metrology MET as possible, the predicted yield can be optimized to closely reflect the actual yield. In addition, such a model can update its yield prediction PD as wafers are being processed in successive layers and new data becomes progressively available. Thus, the yield predictor can output multiple intermediate yield predictions IPD per wafer based on partial information from expensive data as each wafer is being processed and additional measurements are taken and added. The last of these intermediate yield predictions IPD becomes the final yield prediction; e.g. when the intermediate yield prediction IPD is deemed accurate enough, e.g. according to a suitable indicator such as a collection score SC.

[0089] The yield predictor PD can also comprise an imputer IM. The imputer is an optional component that improves practicality by deriving missing expensive measurements for non-critical layers from existing measurement data, avoiding the need to work with missing data or to stop measurement collection prematurely due to limited resources.

[0090] The measurement collector CL can receive a state as input and decide on an inspection decision INS?. The state summarizes the information or data DATc that has been collected so far, e.g. all expensive metrology data collected, all relevant context data (and other cheap metrology data) and any previous predictions. When an imputer is used, the state can be extended with imputed values (imputed metrology data). Its output is the action to be taken next. Possible actions can include 1) collect more information, i.e. perform another inspection action MET to obtain one or more additional expensive measurements; or 2) stop and output the current prediction as the final prediction FP. The measurement collector CL is the decision making function (i.e. the hint INS?). It learns when to collect more information according to some criteria of the collection score SC.

[0091] The objective can be to obtain the most certain yield prediction for the wafer while incurring the minimum cost in terms of inspection or information gathering. A gathering score SC can be a function that summarizes the criteria for information gathering into a single number per state transition (e.g., each time the state changes between successive gathering). This gathering score SC can be used by the measurement collector CL as a basis for the decision INS? about taking more information.

[0092] As an example, the gathering criteria can include:

[0093] • Quality of the intermediate yield prediction IPD. If the yield predictor PD cannot make a confident prediction (e.g., in terms of a confidence metric) based on the current state (e.g., the information gathered and the imputed values), additional expensive information should be performed for the wafer (e.g., one or more additional metrology steps). The goal is to minimize the prediction uncertainty, but not at too great a cost.

[0094] • Cost of information gathering. Gathering of expensive measurements is costly. This cost can vary between different tiers and / or can depend on the type of measurement, e.g., whether it includes ADI overlay, ACI overlay, or CD measurements. Thus, the quality and confidence should be balanced against this cost; e.g., to balance maximizing the confidence in the yield prediction and minimizing the cost of information gathering.

[0095] • Expected utility and highest information gain (optional). Expensive measurements can also be gathered for learning purposes only. That is, measurements that improve the yield predictor PD and the measurement collector CL can be gathered.

[0096] Different machine learning methods can be utilized to implement the proposed scheme. A first example using a reinforcement learning architecture and a second example using more conventional machine learning techniques will be described.

[0097] The proposed arrangement can be implemented naturally within a reinforcement learning architecture. Figure 6 Such an architecture is illustrated. In such an arrangement, a Markov decision process (MDP) can be defined that includes an agent (e.g., the measurement collector CL) in an environment EV, a set of states, and a set of actions per state. In state S t The agent CL selects an action A t When the agent CL decides to change state INS?, a reward RWis produced and an updated reward value R t+1 (relative to the previous reward R t is received by the agent CL for the next iteration. The goal of the agent CL is to maximize its total reward RW.

[0098] The agent determining the decision making process for information collection INS can correspond to the measurement collector CL of Figure 5 As already described, the possible actions the agent CL can choose are: 1) performing a check action MET, i.e. an expensive measurement for collecting additional data AD associated with the updated state S t+1 or 2) stopping and outputting the current prediction FP.

[0099] The state comprises all information collected so far, the importance of features not collected can be estimated from the features already acquired and the yield predictor PD.

[0100] The environment EV consists of all possible states and all state transitions in the system. The environment EV interacts with the agent CL providing state updates and rewards RW. The rewards RW correspond to the collection score. The final reward RW can depend on the confidence of the yield prediction IPD and the cost C of the collected expensive information. A negative reward C is incurred when collecting an expensive measurement in each state. In this way, a trade-off between optimizing the yield prediction and minimizing the information acquired can be achieved.

[0101] The agent CL can learn an optimal strategy for information collection. To learn the optimal strategy, any state-of-the-art regression learning algorithm can be used to learn the optimal strategy, e.g. Q-learning. The strategy can be trained simultaneously with training the yield predictor and the imputer.

[0102] Figure 7 Another embodiment based on other machine learning principles is illustrated. Figure 7 (a) An implementation of a yield predictor is illustrated as a series of models, such that the base model M0 only uses cheap context data CX (e.g. zero layers) to predict the yield PY0, and each additional model Mi (i = 1 to n) uses the expensive measurements MT i in addition to the layers i (with i = 0 to n) of cheap context data CX i to predict the yield PY i In this way, the yield predictor via the stack can comprise a cascade of models (M0 to M n ) at each layer i of each wafer. The model Mi can be used to predict the yield, and based on this collection score, a decision can be made to collect an expensive measurement MT i i ​the decision of the metrology collector. If the metrology resources in the fab are fixed, then the wafer measurement with the highest collection score can be selected for collection of the corresponding expensive measurement. In a more flexible setup, when the collection score is above a threshold, then the cost high measurement for the wafer can be collected.

[0103] Figure 7 (b) illustrates an architecture for a yield predictor arrangement such as Figure 7 (a) is illustrated. During exposure of successive layers 0, 1, 2,... n, the model M0, M1, M2... M n is determined for each wafer instance until its prediction is sufficiently positive, at which point it can be decided that no further measurements are needed for the wafer. Thus, for example, during exposure of layer i, if the model M i-1 is not sufficiently positive, then the model M i is used to model the wafer; for example, based on a comparison of the confidence metric to a confidence threshold. The cost can also be minimized with respect to the confidence threshold. In this way, additional measurements are only collected for new exposures as needed.

[0104] In Figure 7 (b), the active acquisition of a cost high measurement at the prediction time of layer i is determined. All previous data DAT i-1 is input to the prediction model M i-1 , which outputs the predicted yield PY i-1 and the corresponding collection score SC. A decision INS? is made by the measurement collector about whether to collect more information. The decision can evaluate whether the predicted yield PY i-1 satisfies one or more prediction criteria. If so, the final prediction FP is output and the process ends. Otherwise, metrology MET i is performed on layer i and the process is repeated for the next layer.

[0105] A filler can optionally be used and is part of the yield predictor (for any of the embodiments described herein). The filler at layer i can be used to attempt a fill-in for the expensive measurement of that wafer. The filler can perform a simple rule-based filling of missing values (such as extrapolation and / or interpolation), or can include another predictive machine learning model or generative model. In such a case, the collection score can be computed based on the confidence of the fill-in and its impact on the yield prediction. The filler can be co-trained with the yield predictor.

[0106] The collector and yield predictor can be co-trained; for example, the first neural network layers of the collector agent and the yield predictor can be common and trained together. The model architecture can be transferred to other products, so that there is no need to start from scratch for each product.

[0107] In summary, therefore, an architecture for making decisions is described that optimizes inspection decision making based on cost optimization and subject to wafer fab capacity constraints, thereby reducing engineering OPEX. The yield loss occurrence is expected to decrease because the rework decisions are based on anomalies detected by the proposed machine learning strategy. In addition, the control can be more stable. The machine learning strategy can handle both small and / or unbalanced datasets, which is a normal scenario in the lithography industry. The proposed strategy provides a good performing OK / NOK predictor faster than any existing solution. The proposed method delivers consistently faster recommendations compared to experts, which is required in the evolving semiconductor industry. The human factor (and the bias introduced by it) has a reduced impact on the inspection decisions because the evaluation of the wafer is automated and based on machine learning.

[0108] The optimization problem is flexible and can be adapted to specific requirements, so the optimization problem can be used to achieve good performance faster or to keep learning from "known" situations. The progress in explainability of machine learning can also pinpoint exactly why a wafer was labeled OK or NOK and extend the understanding of the wafer quality assessment.

[0109] The transfer learning approach can facilitate the rapid prototyping and development of machine learning algorithms that require less training data and can support rework decisions on new systems. The mutual patterns between OK wafers and NOK wafers exist in many systems that are expected to be captured by the proposed machine learning strategy.

[0110] Retraining can be deployed so that the algorithm training is more focused on the understanding of the structure for recent anomalies compared to the anomalies observed in the past. This does not mean that past anomalies cannot continue to be detected, only that the algorithm prioritizes the understanding of recent anomalies compared to anomalies observed very long ago. In this way, the system can handle one of the main challenges in the industry: concept drift.

[0111] Further embodiments of the present application are disclosed in the following numbered list of aspects:

[0112] 1. A method for determining an inspection strategy for at least one substrate, the method comprising:

[0113] quantifying, using a prediction model, a compliance indicator value of a compliance indicator related to a prediction of compliance with a quality requirement based on one or both of pre-processing data associated with the substrate and any available post-processing data associated with the at least one substrate; and

[0114] deciding on an inspection strategy for the at least one substrate based on the compliance indicator value, an expected cost associated with the inspection strategy, and at least one target value describing an expected value of the inspection strategy in at least one target related to the prediction model.

[0115] 2. The method of aspect 1, wherein the at least one target comprises at least one of:

[0116] monitoring and / or improving performance of the prediction model according to one or more performance indicators;

[0117] accelerating learning of the prediction model;

[0118] discovering new patterns to be identified by the prediction model.

[0119] 3. The method of aspect 1 or 2, wherein the at least one substrate comprises a set of substrates and the compliance indicator comprises a probability value describing a probability of compliance with a quality requirement; the method further comprising:

[0120] assigning, using the prediction model, a respective probability value to each substrate of the set of substrates based on the pre-processing data corresponding to the substrate.

[0121] 4. The method of aspect 3, wherein the step of deciding on an inspection strategy comprises deciding whether to inspect each substrate of the set of substrates.

[0122] 5. The method of aspect 3 or 4, wherein the deciding step is configurable such that the decision can be configured to:

[0123] apply a bias towards a corresponding quantile of the probability of the substrate complying with the quality requirement.

[0124] 6. The method of aspect 5, wherein the configurability of the deciding step is achieved via a configurable parameter of an objective function used in the deciding step.

[0125] 7. The method of aspect 6, wherein the objective function comprises a binary vector indicating which substrates are selected for inspection, the binary vector being weighted by coefficients dependent on the probability values, expected costs and the configurable parameter.

[0126] 8. The method of aspect 7, wherein the binary vector and weighting are defined for each substrate in the set of substrates.

[0127] 9. The method of aspect 7 or 8, wherein the step of deciding comprises minimising the objective function for different candidate binary vectors subject to a constraint based on the expected cost.

[0128] 10. The method of aspect 9, wherein the constraint imposes a maximum number of substrates that can be inspected over a time period.

[0129] 11. The method of aspect 9 or 10, wherein the constraint is enforced by a constraint parameter in the weighting.

[0130] 12. The method of aspect 9, 10 or 11, wherein the constraint is configurable and / or variable over time.

[0131] 13. The method of any of aspects 6 to 12, wherein the weighting depends on a beta function of the configurable parameter.

[0132] 14. The method of any of aspects 6 to 13, wherein a set of the configurable parameters is selected from a plurality of predefined sets of the configurable parameters in order to select and / or configure the objective.

[0133] 15. The method of any of aspects 6 to 14, comprising using a reinforcement learning agent to adjust the configurable parameters in order to improve a performance metric and / or a cost metric of the model.

[0134] 16. The method of aspect 1 or 2, wherein the compliance metric comprises a confidence metric describing a level of confidence that the prediction is valid.

[0135] 17. The method of aspect 16, comprising:

[0136] iteratively performing one or more metrology actions to obtain additional post-processing data; and

[0137] updating the prediction based on the additional post-processing data and evaluating the confidence metric or a related metric;

[0138] until one or more criteria for the confidence metric or a related metric are met.

[0139] 18. The method of aspect 17, performed over a plurality of layers of the at least one substrate until the one or more criteria for the confidence metric or a related metric are met.

[0140] 19. The method of aspect 16, 17 or 18, comprising:

[0141] determining a collection score based on the confidence indicator and a cost of an additional metrology action; and

[0142] deciding whether to perform the additional metrology action based on the collection score.

[0143] 20. The method of aspect 19, wherein the collection score is further based on an expected utility and / or a highest information gain of an additional metrology action.

[0144] 21. The method of any of aspects 16 to 20, wherein the step of deciding on a checking policy is performed by a measurement collector.

[0145] 22. The method of aspect 21, wherein the prediction model and the measurement collector are implemented within a reinforcement learning architecture in which the measurement collector acts as the agent.

[0146] 23. The method of aspect 21, wherein the prediction model and the measurement collector are implemented as trained neural networks.

[0147] 24. The method of aspect 23, wherein at least some layers of the prediction model and the measurement collector have been co-trained.

[0148] 25. The method of aspect 23 or 24, wherein the prediction model comprises a plurality of models, each model relating to a different layer of the at least one substrate.

[0149] 26. The method of any preceding aspect, wherein the prediction model comprises an imputer operable to perform imputation on the post-processing data.

[0150] 27. The method of any preceding aspect, wherein the deciding step is configurable such that the at least one target is configurable and / or selectable.

[0151] 28. The method of any preceding aspect, further comprising:

[0152] labeling the selected substrates according to the results of the checking;

[0153] labeling the remaining substrates according to the expected value of the checking policy assigned thereto; and

[0154] evaluating the performance of the prediction model based on the labeling.

[0155] 29. The method of aspect 28, further comprising triggering retraining of the prediction model based on the step of evaluating performance.

[0156] 30. The method of any preceding aspect, wherein the pre-processing data comprises one or both of:

[0157] context data describing a processing history of each substrate; and

[0158] pre-processing metrology data performed on each substrate prior to the exposure step.

[0159] 31. The method of aspect 30, wherein the pre-processing metrology data comprises one or both of alignment data and leveling data.

[0160] 32. The method of any preceding aspect, further comprising inspecting the at least one substrate according to the inspection recipe using an inspection tool.

[0161] 33. A computer program comprising program instructions operable to perform the method of any of aspects 1 to 31 when run on a suitable device.

[0162] 34. A non-transitory computer program carrier comprising the computer program of aspect 33.

[0163] 35. A processing system comprising: a processor; and a storage device comprising the computer program of aspect 33.

[0164] 36. A lithographic apparatus comprising the processing system of aspect 35.

[0165] 37. A metrology apparatus comprising the processing system of aspect 35 and further operable to perform the method of aspect 32.

[0166] Although specific reference can be made in this text to the use of the lithographic apparatus in the manufacture of ICs, it should be understood that the lithographic apparatus described herein can have other applications. Possible other applications include the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat-panel displays such as liquid-crystal displays (LCDs), thin-film magnetic heads, etc.

[0167] Although specific reference can be made in this text to the use of embodiments of the application in the context of optical lithography, it should be understood that the application has more general applications. Embodiments of the application can be used in other devices such as mask inspection devices, metrology devices or any device that measures or processes objects such as wafers (or other substrates) or masks (or other patterning devices). Such devices can generally be referred to as lithographic tools. Such lithographic tools can use vacuum conditions or ambient (non-vacuum) conditions.

[0168] While the foregoing can specifically refer to the use of embodiments of the application in the context of optical lithography, it will be appreciated that the application is not limited to optical lithography and can be used in other applications (e.g. imprint lithography) where the context permits.

[0169] While specific embodiments of the application have been described above, it will be appreciated that the application can be practiced otherwise than as described. The description is intended to be illustrative, not restrictive. Accordingly, modifications can be made by people of skill in the art without departing from the scope of the claims as expressed in the following claims section.

Claims

1. A method for determining an inspection policy for at least one substrate, the method comprising: quantifying, using a prediction model, a compliance indicator value of a compliance indicator related to a prediction of compliance with a quality requirement based on one or both of pre-processing data associated with the substrate and any available post-processing data associated with the at least one substrate; and deciding an inspection policy for the at least one substrate based on the compliance indicator value, an expected cost associated with the inspection policy, and at least one target value describing an expected value of the inspection policy in terms of at least one target related to the prediction model.

2. The method of claim 1, wherein, The at least one target comprises at least one of: monitoring and / or improving performance of the prediction model according to one or more performance indicators; accelerating learning of the prediction model; discovering new patterns to be identified by the prediction model.

3. The method of claim 1, wherein, The at least one substrate comprises a set of substrates, the step of deciding an inspection policy comprises deciding whether to inspect each substrate of the set of substrates, and the compliance indicator comprises a probability value describing a probability of compliance with a quality requirement.

4. The method of claim 3, further comprising: The prediction model is used to assign a respective probability value to each substrate of the set of substrates based on the pre-processing data corresponding to each substrate.

5. The method of claim 3, wherein, The deciding step is configurable such that decisions made by the deciding step can be configured to: bias the probability of a substrate complying with the quality requirement towards a corresponding quantile of the probability.

6. The method of claim 5, wherein, The configurability of the deciding step is achieved via configurable parameters of an objective function used in the deciding step.

7. The method of claim 6, wherein, The objective function comprises a binary vector indicating which substrates are selected for inspection, the binary vector is weighted by coefficients dependent on the probability values, expected costs and the configurable parameters, and the deciding step comprises minimizing the objective function for different candidate binary vectors subject to a constraint based on the expected costs.

8. The method of claim 7, wherein, The constraint imposes a maximum number of substrates that can be inspected within a time period.

9. The method of claim 7, wherein, The constraint is implemented in the weighting by a constraint parameter.

10. The method of claim 6, comprising: A reinforcement learning agent is used to adjust the configurable parameters to improve performance indicators and / or cost indicators of the model.

11. The method of claim 1, wherein, The compliance indicator comprises a confidence indicator describing a level of confidence that the prediction model is valid, and the method comprises: iteratively performing one or more metrology actions to obtain additional post-processing data; and updating the prediction model based on the additional post-processing data and evaluating the confidence indicator or a related indicator until one or more criteria for the confidence indicator or a related indicator are met.

12. The method of claim 11, comprising: determining a collection score based on the confidence indicator and a cost of additional metrology actions; and deciding whether to perform additional metrology actions based on the collection score.

13. The method of claim 3, further comprising: labeling selected substrates according to results of an inspection performed on the selected substrates; labeling remaining substrates according to the probability values assigned to the remaining substrates; and to evaluate performance of the prediction model based on the annotations.

14. The method of claim 13, further comprising triggering retraining of the prediction model based on the step of evaluating performance.

15. The method of claim 1, wherein, The pre-processing data comprises one or both of: context data describing a processing history of the at least one substrate; and pre-processing metrology data acquired prior to an exposure step on the at least one substrate.

16. A computer program comprising program instructions operable to perform the method of claim 1 when run on a suitable device.

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