A multi-stage VCO calibration method and circuit under different frequency error scenarios

Abstract

The present invention discloses a calibration method and circuit for a multi-segment VCO in different frequency error scenarios. The method includes a supplement to a band n highest frequency calibration sub-process and a supplement to a band n lowest frequency calibration sub-process. In the supplement to the band n highest frequency calibration sub-process, the lowest frequency of band n is first calibrated to obtain the lowest frequency of band n, and then the highest frequency of band n is calibrated again; in the supplement to the band n lowest frequency calibration sub-process, the calibrated highest frequency of band n has already been obtained by an existing method, and only the method needs to be used to calibrate to obtain the lowest frequency of band n. The present invention ensures that multi-segment VCOs from different batches and multi-segment VCO frequency segments of the same batch under full temperature (high temperature, low temperature, normal temperature) can fully cover a broadband frequency range, and increases the application scenarios of the phase-locked loop frequency calibration method of the multi-segment VCO. The calibration method reduces the known information requirements of the multi-segment VCO.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency microwave technology, and in particular to a calibration method and circuit for a multi-segment VCO in different frequency error scenarios. Background Art

[0002] The phase-locked loop circuit is a closed-loop system. The three most critical components of the system are: phase detector, loop filter, and VCO. VCO is an important component of the circuit. In recent years, a multi-stage VCO has begun to be used in phase-locked loops, such as Figure 1 shown.

[0003] Compared to traditional wideband VCOs, multi-band VCOs offer lower phase noise. Their key feature is their ability to divide the frequency into several segments. Therefore, selecting the right frequency band combination to fully cover all bands is crucial for circuit design. However, there is an unavoidable drawback: due to material and process limitations, frequency band divisions may vary between batches of products, necessitating frequency calibration for each band.

[0004] The principle block diagram of the existing phase-locked loop frequency calibration circuit based on multi-stage VCO is as follows: Figure 2 The existing frequency calibration method can complete the frequency calibration of multi-stage VCO or conventional broadband VCO. For details, see patent: CN202110448664.4. The frequency calibration method flow chart of the patent can be sorted out. Figure 3 The figure shows a simplified diagram of a conventional phase-locked loop frequency calibration method based on a multi-segment VCO.

[0005] For multi-band VCO, if the manufacturing error exceeds the difference between the nominal maximum frequency and the nominal minimum frequency in the product manual of a certain frequency band, the relative position relationship between the actual maximum frequency and the actual minimum frequency of a certain frequency band and the nominal maximum frequency and the nominal minimum frequency of the frequency band in the product manual will be different. Figure 4 Several scenarios are shown (there may be other scenarios that are not listed in full, but they do not affect the explanation of the idea of the patent of this invention). Figure 4 The actual minimum and maximum frequencies within a multi-segment VCO frequency band are denoted by SD and SG, respectively. The nominal minimum and maximum frequencies within a multi-segment VCO frequency band are denoted by BD and BG, respectively. SPAN[XX,XX] is defined as the length of the interval [XX,XX], which physically represents the frequency bandwidth of XX and XX. XX can be any variable of SD, SG, BD, or BG.

[0006] Figure 4 In scenario A, the actual minimum frequency and the actual maximum frequency of the multi-stage VCO are included between the nominal minimum frequency and the nominal maximum frequency, that is, And the frequency bandwidth of the actual minimum frequency and the actual maximum frequency is much smaller than the frequency bandwidth of the nominal minimum frequency and the nominal maximum frequency (less than twice is considered to be much smaller), that is, SPAN[SD,SG]<2×SPAN[BD,BG]. In this scenario, if the scaling factor selected by the existing calibration method is too large, it will be executed continuously. Figure 3 The Band n Lowest Frequency Calibration sub-process or the Band n Highest Frequency Calibration sub-process cannot obtain the correct frequency calibration value.

[0007] Figure 4 In scenarios B and C, the range of the actual minimum frequency and the actual maximum frequency of the multi-segment VCO does not intersect with the range of the nominal minimum frequency and the nominal maximum frequency, that is, In this scenario, no matter how the scaling factor is chosen, there will always be a frequency value that cannot be calibrated: the lowest frequency calibration in scenario B will always be performed Figure 3 The lowest frequency calibration sub-process of frequency band n, the highest frequency calibration in scenario C will be executed continuously Figure 3 The highest frequency calibration sub-process of frequency band n will continue to execute if the program is not interrupted.

[0008] Therefore, it is necessary to provide a calibration method for a multi-segment VCO in different frequency error scenarios to eliminate the problem that the existing multi-segment VCO phase-locked loop frequency calibration method cannot perform accurate calibration when calibrating for the above application scenarios. Summary of the Invention

[0009] The main purpose of the present invention is to provide a calibration method and circuit for a multi-segment VCO in different frequency error scenarios, aiming to solve the technical problem that the existing multi-segment VCO phase-locked loop frequency calibration method cannot perform accurate calibration when calibrating for special application scenarios.

[0010] To achieve the above object, the present invention provides a multi-stage VCO calibration method under different frequency error scenarios, the method comprising the following steps:

[0011] S101: Assigning n=n+1, the controller of the control unit sends an instruction to the multi-segment VCO to control the multi-segment VCO to operate in frequency band n;

[0012] S102: Set variable k, k is an integer, and the initial value k=0;

[0013] S103: Assign k=k+1;

[0014] S104: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be: F max_nk =f max_n -(f max_n -f min_n)×a×k;

[0015] S105: The phase detector reports to the control unit whether the phase-locked loop is locked;

[0016] S106: The controller of the control unit determines whether the phase-locked loop is locked. If so, the locked frequency value is recorded in the memory of the control unit. The frequency value is the highest frequency F of the calibrated frequency band n. max_n ; If not, go to step S107;

[0017] S107: Judge F max_nk <f min Is it true? If so, go to step S108; if not, go to step S103;

[0018] S108: assign k=-1;

[0019] S109: Assign k=k+1;

[0020] S110: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_nk =f max_n +(f max_n -f min_n )×a×k;

[0021] S111: The phase detector reports to the control unit whether the phase-locked loop is locked;

[0022] S112: The controller of the control unit determines whether the phase-locked loop is locked. If so, step S115 is executed; if not, step S113 is executed;

[0023] S113: Judge F min_nk >f max Is it established? If so, go to step S114; if not, go to step S109;

[0024] S114: Reduce a by a first preset ratio and execute step S103;

[0025] S115: Record the locked frequency value in the memory of the control unit. The frequency value is the lowest frequency F of the calibrated frequency band n. min_n ;

[0026] S116: Set variable m, m is an integer, and the initial value is m=-1;

[0027] S117: Assign m=m+1;

[0028] S118: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_nm =F min_n +(fmax_n -f min_n )×b×m;

[0029] S119: The phase detector reports to the control unit whether the phase-locked loop is locked;

[0030] S120: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S117; if not, execute step S121;

[0031] S121: Record the locked frequency value closest to the unlocked frequency in the memory of the control unit. This frequency value is the highest frequency F of the calibrated frequency band n. max_n ;

[0032] Optionally, after step S121 or step S1065, the method further includes: determining whether all frequency bands have been calibrated, and if so, terminating the calibration; if not, executing step S101.

[0033] In addition, to achieve the above-mentioned purpose, the present application also provides a multi-segment VCO calibration method under different frequency error scenarios, the method comprising the following steps:

[0034] S201: Assigning n=n+1, the controller of the control unit sends an instruction to the multi-segment VCO to control the multi-segment VCO to operate in frequency band n;

[0035] S202: Set variable k, k is an integer, and the initial value k=0;

[0036] S203: Assign k=k+1;

[0037] S204: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be: F max_nk =f max_n -(f max_n -f min_n )×a×k;

[0038] S205: The phase detector reports to the control unit whether the phase-locked loop is locked;

[0039] S206: The controller of the control unit determines whether the phase-locked loop is locked. If so, the locked frequency value is recorded in the memory of the control unit. The frequency value is the highest frequency F of the calibrated frequency band n. max_n ; If not, execute step S203;

[0040] S207: Set variable m, m is an integer, and the initial value is m=0;

[0041] S208: m=m+1;

[0042] S209: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_nm =f min_n +(f max_n -f min_n )×b×m;

[0043] S210: The phase detector reports to the control unit whether the phase-locked loop is locked. If so, execute step S211; if not, execute step S212;

[0044] S211: Record the locked frequency value in the memory of the control unit, which is the lowest frequency F of the calibrated frequency band n. min_n ;

[0045] S212: Judge F min_nm >f max Is it established? If so, go to step S213; if not, go to step S208;

[0046] S213: Assign m=-1;

[0047] S214: Assign m=m+1;

[0048] S215: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_nm =f min_n -(f max_n -f min_n )×b×m;

[0049] S216: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S219; if not, execute step S217;

[0050] S217: Judge F min_nm <f min Is it true? If so, go to step S218; otherwise, go to step S214;

[0051] S218: Reduce b by a certain ratio and execute step S207;

[0052] S219: Assign m=m+1;

[0053] S220: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_nm =f min_n -(f max_n -f min_n )×b×m;

[0054] S221: The phase detector reports to the control unit whether the phase-locked loop is locked;

[0055] S222: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S223; if not, execute step S219;

[0056] S223: Record the locked frequency value closest to the unlocked frequency in the memory of the control unit. This frequency value is the lowest frequency F of the calibrated frequency band n. min_n .

[0057] Optionally, after step S211 or step S223, the method further includes: determining whether all frequency bands have been calibrated; if so, terminating the calibration; if not, executing step S201.

[0058] In addition, in order to achieve the above-mentioned purpose, the present application also provides a calibration circuit for a multi-segment VCO in different frequency error scenarios, wherein the circuit includes a phase detector, a loop filter, a multi-segment VCO and a control unit, wherein the control unit includes a controller and a memory. When performing calibration of the multi-segment VCO in different frequency error scenarios, the circuit executes the calibration method for the multi-segment VCO in different frequency error scenarios as described above.

[0059] The present invention has the following beneficial effects:

[0060] 1. In response to the segmented frequency offset of the multi-segment VCO caused by factors such as materials and processes, the calibration method proposed in this patent can solve the problem that "the frequency band combination selected for batch A can fully cover batch A, but cannot fully cover the products of batch B."

[0061] 2. In response to the segmented frequency offset of the multi-segment VCO caused by factors such as materials and processes, the calibration method proposed in this patent can solve the problem that "the frequency band division of products in the same batch will drift at high temperature, low temperature and room temperature."

[0062] 3. The multi-segment VCO frequency calibration method proposed in this patent is beneficial to the widespread use of multi-segment VCO in engineering applications.

[0063] 4. The multi-segment VCO frequency calibration method proposed in this patent is beneficial to increasing the application scenarios of multi-segment VCO frequency calibration and can solve the problem that the frequency of multi-segment VCO cannot be calibrated under special circumstances.

[0064] 5. The multi-segment VCO frequency calibration method proposed in this patent does not require prior knowledge of information such as the nominal minimum frequency and the nominal maximum frequency of a certain frequency band of the multi-segment VCO. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Figure 1 It is a typical single-loop phase-locked loop principle block diagram.

[0066] Figure 2 The present invention is a block diagram of the principle of a phase-locked loop frequency calibration circuit based on a multi-segment VCO.

[0067] Figure 3 The figure is a schematic diagram of an existing phase-locked loop frequency calibration method based on a multi-segment VCO.

[0068] Figure 4 This is a schematic diagram of different application scenarios of the actual frequency and nominal frequency of the multi-stage VCO.

[0069] Figure 5 This is a schematic diagram of the supplementary method for the highest frequency calibration sub-process of frequency band n in this application.

[0070] Figure 6 This is a schematic diagram of the supplementary method for the minimum frequency calibration sub-process of frequency band n in this application.

[0071] Figure 7 FIG. 4 is a schematic diagram of the frequency distribution of the multi-segment VCO frequency band 3 in a specific example.

[0072] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0073] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0074] Currently, in the relevant technical field, the existing multi-segment VCO phase-locked loop frequency calibration method has the problem of being unable to perform accurate calibration when calibrating for special application scenarios.

[0075] To address this issue, various embodiments of the present invention are provided for a multi-segment VCO calibration method in different frequency error scenarios. By supplementing the band n highest frequency calibration sub-process and the band n lowest frequency calibration sub-process, the present invention ensures that frequency segments of multi-segment VCOs from different batches and within the same batch at all temperatures (high, low, and room temperature) fully cover the broadband frequency range. Furthermore, the present invention expands the application scenarios of the multi-segment VCO phase-locked loop frequency calibration method, and reduces the calibration method's requirement for known information about the multi-segment VCO.

[0076] The embodiment of the present invention provides a multi-stage VCO calibration method under different frequency error scenarios, referring to Figure 5 and Figure 6 , Figure 5 and Figure 6 FIG. 4 is a flow chart of an embodiment of a multi-stage VCO calibration method in different frequency error scenarios according to the present invention.

[0077] In this embodiment, the calibration method of the multi-stage VCO in different frequency error scenarios includes the following steps:

[0078] Step S1: Press Figure 2 The circuit logic relationship shown is connected to the circuit, and the multi-stage VCO frequency n highest frequency calibration sub-process is performed according to the existing method;

[0079] Step S2: Working process of the supplementary method of the sub-process for calibrating the highest frequency of frequency band n;

[0080] Step S3: executing the multi-stage VCO frequency n lowest frequency calibration sub-process according to the existing method;

[0081] Step S4: The working process of the supplementary method of the sub-process for calibrating the lowest frequency of frequency band n.

[0082] In some possible implementations, it is necessary to perform the calibration process of step S2, such as Figure 5 As shown, step S2 specifically includes the following steps:

[0083] Step S201: Determine F max_nk <f min Is it established: If not, go to step S1 and continue to execute according to the existing method; if yes, go to step S202.

[0084] Step S202: Assign k=-1.

[0085] Step S203: Assign k=k+1.

[0086] Step S204: The controller of the control unit sends an instruction to the phase detector, and the output frequency of the phase detector is calculated by formula 3.

[0087] Step S205: The phase detector reports to the control unit whether the phase-locked loop is locked.

[0088] Step S206: The controller of the control unit determines whether the phase-locked loop is locked. If not, the process proceeds to step S207; if locked, the process proceeds to step S209.

[0089] Step S207: Determine F min_nk >f max Is it true: If not, go to step S203; if yes, go to step S208.

[0090] Step S208: Reduce a by a certain ratio, for example, a=a / 10, and then go to step S1 and continue to execute according to the existing method.

[0091] Step S209: Record the locked frequency value in the memory of the control unit, which is the lowest frequency F of the calibrated frequency band n. min_n .

[0092] Step S210: Set the variable m, where m is an integer and the initial value is m=-1.

[0093] Step S211: Assign m=m+1.

[0094] Step S212: The controller of the control unit sends an instruction to the phase detector, and the output frequency of the phase detector is calculated by formula 4.

[0095] Step S213: The phase detector reports to the control unit whether the phase-locked loop is locked.

[0096] Step S214: The controller of the control unit determines whether the phase-locked loop is locked. If not, the process proceeds to step S115; if locked, the process proceeds to step S211.

[0097] Step S215: Record the locked frequency value closest to the unlocked frequency in the memory of the control unit. This frequency value is the highest frequency F of the calibrated frequency band n. max_n .

[0098] In some possible implementations, it is necessary to perform the calibration process of step S4, such as Figure 6 As shown, step S4 specifically includes the following steps:

[0099] Step S401: Determine F min_nm >f max Is it established: If not, proceed to step S3 and continue to execute according to the existing method; if yes, proceed to step S402.

[0100] Step S402: Assign m=-1.

[0101] Step S403: Assign m=m+1.

[0102] Step S404: The controller of the control unit sends an instruction to the phase detector, and the output frequency of the phase detector is calculated by formula 5.

[0103] Step S405: The phase detector reports to the control unit whether the phase-locked loop is locked.

[0104] Step S406: The controller of the control unit determines whether the phase-locked loop is locked. If not, the process proceeds to step S407; if locked, the process proceeds to step S409.

[0105] Step S407: Determine F min_nm <f minIs it true: If not, go to step S303; if yes, go to step S408.

[0106] Step S408: Reduce b by a certain ratio, for example, b=b / 10, and then go to step S3 and continue to execute according to the existing method.

[0107] Step S409: Assign m=m+1.

[0108] Step S410: The controller of the control unit sends an instruction to the phase detector, and the output frequency of the phase detector is calculated by formula 5.

[0109] Step S411: The phase detector reports to the control unit whether the phase-locked loop is locked.

[0110] Step S412: The controller of the control unit determines whether the phase-locked loop is locked. If not, the process proceeds to step S413; if locked, the process proceeds to step S409.

[0111] Step S413: Record the most recent locked frequency value in the memory of the control unit, which is the lowest frequency F of the calibrated frequency band n. min_n .

[0112] It should be noted that the degree of reduction of a and b in step S208 and step S408 can be selected according to actual conditions. This article lists the case of " / 10", and you can also choose " / 2", " / 4", " / 8", etc. Reducing or increasing the scale factor does not affect the core idea of this application.

[0113] It should be noted that, in this embodiment, the formula characters have the following meanings:

[0114] Definition 1: VCO selection control code: The code value that selects the segmented VCO to operate in a certain frequency band.

[0115] Definition 2: f min_n : The lowest frequency specified in the product manual for multi-segment VCO frequency band n. This frequency is the initial lowest frequency that has not been calibrated. For example, the lowest frequency specified in the product manual for frequency band 3 is f min_3 .

[0116] Definition 3: f max_n : The maximum frequency specified in the product manual for multi-segment VCO frequency band n. This frequency is the initial maximum frequency without calibration.

[0117] Definition 4: F max_n : The highest frequency after calibration of the multi-segment VCO band n.

[0118] Definition 5: F min_n: The calibrated lowest frequency of multi-segment VCO band n.

[0119] Definition 6: f min : The nominal minimum frequency of the multi-band VCO.

[0120] Definition 7: f max : The nominal maximum frequency of the multi-band VCO.

[0121] Definition 8: Figure 5 and Figure 6 The “=” in “n=n+1, k=k+1, m=m+1, a=a / 10, b=b / 10” indicates operation and assignment, but does not necessarily mean that the formula is an equality.

[0122] Formula 1: F max_nk =f max_n -(f max_n -f min_n )×a×k

[0123] Formula 2: F min_nm =f min_n +(f max_n -f min_n )×b×m

[0124] Formula 3: F min_nk =f max_n +(f max_n -f min_n )×a×k

[0125] Formula 4: F max_nm =F min_n +(f max_n -f min_n )×b×m

[0126] Formula 5: F min_nm =f min_n -(f max_n -f min_n )×b×m

[0127] Among them, F max_nk 、F min_nm 、F min_nk 、F max_nm is the intermediate frequency value of the calibration process;

[0128] k and m are the calibration times, which are intermediate variables in the calibration process;

[0129] a and b are scaling factors, with a∈[0,1] and b∈[0,1]. Smaller values of a or b result in closer calibration to the actual frequency, but this increases the number of calibrations k or m, and the calibration time. For example, for a multi-stage VCO, a value of a or b of 5% to 10% (not limited to this value) is chosen to balance calibration accuracy and time. The values of a and b can be the same or different.

[0130] It should be noted that Figure 5 The method shown is a supplementary method to the sub-process of calibrating the highest frequency of frequency band n. If in certain scenarios, the program enters this method and does not jump out of this method because the scale factor a is too large, this method is used to first calibrate to obtain the lowest frequency of frequency band n, and then calibrate to obtain the highest frequency of frequency band n.

[0131] Figure 6 The method shown is a supplementary method to the sub-process of calibrating the lowest frequency of band n. If in some scenarios, the program enters this method and does not jump out of this method because the scale factor b is too large, then the highest frequency of band n after calibration has passed Figure 6 The existing method in (band n highest frequency calibration sub-process) is obtained by simply using Figure 6 The method proposed in this embodiment can be used to calibrate and obtain the lowest frequency of frequency band n.

[0132] Figure 5 The method shown and Figure 6 The cores of the methods shown can be designed to be basically the same, but in order to save resources, this is not necessary. An important factor that leads to the difference between them is the calibration order of the highest frequency of band n and the lowest frequency of band n. If the lowest frequency of band n is calibrated first, then Figure 6 The core of the method can be designed as Figure 5 The core of the method is the same, and vice versa. This embodiment will not be described in detail, and this situation also falls within the scope of protection of this embodiment.

[0133] This patent proposes a method to solve the problem that the frequency of multi-stage VCO cannot be calibrated under special circumstances. The starting point is to solve Figure 4 The multi-stage VCO frequency calibration is for an extreme application scenario, but is not limited thereto. In a preferred embodiment, the present embodiment can also be applied to the following two situations.

[0134] Case 1: If you don’t know the nominal minimum frequency f of a certain VCO in a certain frequency band min_n and the nominal maximum frequency f max_n , using the method proposed in this application, the multi-segment VCO frequency calibration can be completed, and it is only necessary to calibrate the frequency of the multi-segment VCO at the nominal lowest frequency F in the full frequency band. min_n And the full-band nominal maximum frequency F max_nAny two initial values between the two are used as the nominal minimum frequency f of a certain frequency band min_n and the nominal maximum frequency f max_n , the method proposed in this application can be used to complete the frequency calibration of the multi-segment VCO in this frequency band.

[0135] Case 2: Even if you don’t know the full-band nominal minimum frequency F of a certain VCO min_n And the full-band nominal maximum frequency F max_n According to common sense of current device level, the frequency of RF VCO will not be lower than 0Hz and will not exceed 40GHz, and the frequency of phase detector can work normally does not exceed 30GHz. (This is just an example, and it may change with the development of device level, but it does not affect the core idea of this embodiment.) Therefore, the nominal minimum frequency of the full band can be F min_n The initial value is set to 0Hz, and the highest frequency of the full frequency band is F max_n If the frequency band is set to 30 GHz, the method proposed in this application can be used to complete the frequency calibration of the multi-segment VCO in this frequency band.

[0136] In order to explain the present application more clearly, a specific example of a calibration method for a multi-segment VCO under different frequency error scenarios is proposed.

[0137] This application proposes a method for resolving frequency calibration issues with multi-segment VCOs under special circumstances. A frequency calibration implementation example is presented for the following scenario. Selecting one segment of a multi-segment VCO demonstrates the core concept of this application. The implementation example uses both existing and proposed methods to calibrate the multi-segment VCO frequency, comparing the differences between the two.

[0138] The frequency band 3 of a multi-band VCO meets the following conditions: Figure 4 The frequency distribution of the corresponding scenario B is shown in Figure 7 As shown, the specific parameters are as follows: the actual minimum frequency of band 3 is 12890MHz, the actual maximum frequency is 12950MHz, and the nominal minimum frequency is f min_3 =13200MHz, nominal maximum frequency f max_3 =15200MHz, the nominal minimum frequency of the multi-segment VCO full band is f min =10000MHz, multi-segment VCO full-band nominal maximum frequency f max =16000MHz.

[0139] Method 1:

[0140] For this scenario, the existing method is used for calibration, and the calibration scale factor a=b=0.4 is selected.

[0141] Program 1 starts:

[0142] Step S11: k=0, k=1, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_31 =15200 - (15200 - 13200) × 0.4 × 1 = 15120 MHz. 15120 MHz exceeds the actual maximum frequency of 12950 MHz in multi-segment VCO Band 3. Therefore, the PLL cannot lock, and the phase detector reports a lock failure to the control unit. k is assigned a value of k + 1 = 2, and the program continues.

[0143] Step S12: k=2, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_32 =15200 - (15200 - 13200) × 0.4 × 2 = 15040 MHz. 15040 MHz exceeds the actual maximum frequency of 12950 MHz in multi-segment VCO Band 3. Therefore, the PLL cannot lock, and the phase detector reports a lock failure to the control unit. k is assigned a value of k + 1 = 3, and the program continues.

[0144] Step S13: ..., repeat the above step S12.

[0145] Step S14: k=28, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_313 =15200 - (15200 - 13200) × 0.4 × 28 = 12960 MHz. 12960 MHz exceeds the actual maximum frequency of 12950 MHz in multi-segment VCO Band 3. Therefore, the PLL cannot lock, and the phase detector reports a lock failure to the control unit. k is assigned a value of k + 1 = 14, and the program continues.

[0146] Step S15: k=29, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_314 =15200 - (15200 - 13200) × 0.4 × 29 = 12880 MHz. 12880 MHz is lower than the actual minimum frequency of 12890 MHz in multi-segment VCO Band 3. Therefore, the PLL cannot lock, and the phase detector reports a lock failure to the control unit. k is assigned a value of k + 1 = 30, and the program continues.

[0147] Step S16: ..., repeat the above step S15, F max_ 3k will become smaller and smaller, the phase-locked loop will never be able to lock, the program will execute consistently, and the program will not end until the computing resources are exhausted.

[0148] Method 2:

[0149] The method proposed in this patent is used for calibration in this scenario, and the calibration scale factor a=b=0.4 is also selected.

[0150] Program 2 starts:

[0151] Step S201: k=0, k=1, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_31 =15200-(15200-13200)×0.4×1=15120MHz. 15120MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. max_31 >f min , assign k=k+1=2, and the program continues to execute.

[0152] Step S202: k=2, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_32 =15200-(15200-13200)×0.4×2=15040MHz. 15040MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. max_32 >f min , assign k=k+1=3, and the program continues to execute.

[0153] Step S203: ..., repeat the above step S202.

[0154] Step S204: k=65, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_365 =15200-(15200-13200)×0.4×65=10000MHz. 10000MHz is lower than the actual minimum frequency of the multi-segment VCO band 3, 12890MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. max_ 365<f min , assign k=-1, k=k+1=0, and the program continues to execute.

[0155] Step S205: k=0, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F m in_ 30 =15200-(15200-13200)×0.4×0=15200MHz. 15200MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. mi n_ 30 <f max, assign k=k+1=1, and the program continues to execute.

[0156] Step S206: ..., repeat the above step S205.

[0157] Step S207: k=10, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F mi n_ 310 =15200-(15200-13200)×0.4×10=16000MHz. 16000MHz exceeds the actual maximum frequency of 12950MHz in the multi-segment VCO frequency band 3. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. mi n_ 310 >f max , assign a=a / 10=0.04, and the program continues to execute.

[0158] Step S208: k=0, k=1, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_31 =15200-(15200-13200)×0.04×1=15192MHz. 15192MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. max_31 >f min , assign k=k+1=2, and the program continues to execute.

[0159] Step S209: ..., repeat the above step S208.

[0160] Step S210: k=282, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F max_3281 =15200-(15200-13200)×0.04×282=12944MHz. 12944MHz is between the actual lowest frequency of 12890MHz and the actual highest frequency of 12950MHz in the multi-segment VCO frequency band 3. Therefore, the phase-locked loop is locked, and the phase detector reports the lock to the control unit. It is determined that k>1, and the locked frequency value is recorded in the memory of the control unit. This frequency value is the highest frequency F of the calibrated frequency band n. max_n =12944MHz. The program continues to execute.

[0161] Step S211: m=0, m=1, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_31=13200+(15200-13200)×0.4×1=13280MHz. 13280MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_31 <f max , assign m=m+1=2, and the program continues to execute.

[0162] Step S212: ..., repeat the above step S211.

[0163] Step S213: m=35, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_335 =13200+(15200-13200)×0.4×35=16000MHz. 16000MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_335 >f max , assign m=-1, m=m+1=0, and the program continues to execute.

[0164] Step S214: m=0, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_30 =13200-(15200-13200)×0.4×0=13200MHz. 13200MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_30 >f min , assign m=m+1=1, and the program continues to execute.

[0165] Step S215: ..., repeat the above step S214.

[0166] Step S216: m=3, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_33 =13200-(15200-13200)×0.4×3=12960MHz. 12960MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_33 >f min , assign m=m+1=4, and the program continues to execute.

[0167] Step S217: m=4, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_34=13200-(15200-13200)×0.4×4=12880MHz. 12880MHz is lower than the actual minimum frequency of the multi-segment VCO band 3, 12890MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_34 >f min , assign m=m+1=5, and the program continues to execute.

[0168] Step S218: ..., repeat the above step S217.

[0169] Step S219: m=40, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_340 =13200-(15200-13200)×0.4×40=10000MHz. 10000MHz is lower than the actual minimum frequency of the multi-segment VCO band 3, which is 12890MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_340 <f min , assign b = b / 10 = 0.04, and the program continues to execute.

[0170] Step S220: m=0, m=1, the controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be F min_31 =13200+(15200-13200)×0.04×1=13192MHz. 13192MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_31 <f max , assign m=m+1=2, and the program continues to execute.

[0171] Step S221: ..., repeat the above step S220.

[0172] Step S222: m=350, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_350 =13200+(15200-13200)×0.04×350=16000MHz. 16000MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_31 >f max , assign m=-1, m=m+1=0, and the program continues to execute.

[0173] Step S223: m=0, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be Fmin_30 =13200-(15200-13200)×0.04×0=13200MHz. 13200MHz exceeds the actual maximum frequency of the multi-segment VCO band 3, which is 12950MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. min_30 >f min , assign m=m+1=1, and the program continues to execute.

[0174] Step S224: ..., repeat the above step S223.

[0175] Step S225: m=32, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_332 = 13200 - (15200 - 13200) × 0.04 × 32 = 12944 MHz. 12944 MHz is between the actual minimum frequency of 12890 MHz and the actual maximum frequency of 12950 MHz in multi-segment VCO band 3. Therefore, the phase-locked loop is locked, and the phase detector reports lock to the control unit. m is assigned to m + 1 = 33, and the program continues.

[0176] Step S226: ..., repeat the above step S225.

[0177] Step S227: m=38, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_338 = 13200 - (15200 - 13200) × 0.04 × 38 = 12896 MHz. 12896 MHz is between the actual minimum frequency of 12890 MHz and the actual maximum frequency of 12950 MHz in multi-segment VCO band 3. Therefore, the phase-locked loop is locked, and the phase detector reports lock to the control unit. m is assigned a value of m + 1 = 39, and the program continues.

[0178] Step S228: m=39, the controller of the control unit sends a command to the phase detector to control the output frequency of the phase detector to be F min_339 =13200-(15200-13200)×0.04×39=12888MHz, which is lower than the actual minimum frequency of the multi-segment VCO band 3, 12890MHz. Therefore, the phase-locked loop cannot lock, and the phase detector reports to the control unit that it is not locked. The locked frequency value of the most recent unlocked frequency (m=m-1=38) is recorded in the memory of the control unit. This frequency value is the lowest frequency F of band 3 after calibration. min_n =F min_338 =12896MHz.

[0179] At this point, the frequency of the multi-segment VCO band 3 has been calibrated. The lowest frequency after calibration is 12896MHz, and the highest frequency after calibration is 12944MHz. Figure 7 The middle shaded area is the lowest and highest frequency ranges after calibration.

[0180] The above examples show that, compared with existing methods, the method proposed in this patent can complete the frequency calibration of multi-segment VCOs in certain extreme situations.

[0181] The above are only preferred embodiments of the invention and are not intended to limit the patent scope of the invention. Any equivalent structure or equivalent process transformation made using the contents of the invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the invention.

Claims

1. A multi-stage VCO calibration method under different frequency error scenarios, characterized in that: The method comprises the following steps: S101: Assigning n=n+1, the controller of the control unit sends an instruction to the multi-segment VCO to control the multi-segment VCO to operate in frequency band n; S102: Set variable k, k is an integer, and the initial value k=0; S103: Assign k=k+1; S104: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be: ； S105: The phase detector reports to the control unit whether the phase-locked loop is locked; S106: The controller of the control unit determines whether the phase-locked loop is locked. If so, the locked frequency value is recorded in the memory of the control unit. The frequency value is the highest frequency of the calibrated frequency band n. ; If not, go to step S107; S107: Judgment Is it true? If so, go to step S108; if not, go to step S103; S108: assign k = -1; S109: Assign k=k+1; S110: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be ； S111: The phase detector reports to the control unit whether the phase-locked loop is locked; S112: The controller of the control unit determines whether the phase-locked loop is locked. If so, step S115 is executed; if not, step S113 is executed; S113: Judgment Is it established? If so, go to step S114; if not, go to step S109; S114: Reduce a by a first preset ratio and execute step S103; S115: Record the locked frequency value in the memory of the control unit. This frequency value is the lowest frequency of the calibrated frequency band n. ; S116: Set variable m, m is an integer, and the initial value is m=-1; S117: Assign m=m+1; S118: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be ； S119: The phase detector reports to the control unit whether the phase-locked loop is locked; S120: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S117; if not, execute step S121; S121: Record the locked frequency value closest to the unlocked frequency in the memory of the control unit. This frequency value is the highest frequency of the calibrated frequency band n. .

2. The multi-stage VCO calibration method under different frequency error scenarios according to claim 1, characterized in that: After step S121 or step S1065, the method further includes: determining whether all frequency bands have been calibrated; if so, the calibration ends; if not, executing step S101.

3. A multi-stage VCO calibration method under different frequency error scenarios, characterized in that: The method comprises the following steps: S201: Assigning n=n+1, the controller of the control unit sends an instruction to the multi-segment VCO to control the multi-segment VCO to operate in frequency band n; S202: Set variable k, k is an integer, and the initial value k=0; S203: Assign k=k+1; S204: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be: ； S205: The phase detector reports to the control unit whether the phase-locked loop is locked; S206: The controller of the control unit determines whether the phase-locked loop is locked. If so, the locked frequency value is recorded in the memory of the control unit. The frequency value is the highest frequency of the calibrated frequency band n. ; If not, execute step S203; S207: Set variable m, m is an integer, and the initial value is m=0; S208: m=m+1; S209: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be ； S210: The phase detector reports to the control unit whether the phase-locked loop is locked. If so, execute step S211; if not, execute step S212; S211: Record the locked frequency value in the memory of the control unit. This frequency value is the lowest frequency of the calibrated frequency band n. ; S212: Judgment Is it established? If so, go to step S213; if not, go to step S208; S213: assign m=-1; S214: Assign m=m+1; S215: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be ； S216: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S219; if not, execute step S217; S217: Judgment Is it true? If so, go to step S218; otherwise, go to step S214; S218: Reduce b by a certain ratio and execute step S207; S219: Assign m=m+1; S220: The controller of the control unit sends an instruction to the phase detector to control the output frequency of the phase detector to be ； S221: The phase detector reports to the control unit whether the phase-locked loop is locked; S222: The controller of the control unit determines whether the phase-locked loop is locked. If so, execute step S223; if not, execute step S219; S223: Record the most recent locked frequency value in the memory of the control unit. This frequency value is the lowest frequency of the calibrated frequency band n. .

4. The multi-stage VCO calibration method under different frequency error scenarios according to claim 3, characterized in that: After step S211 or step S223, the method further includes: determining whether all frequency bands have been calibrated; if so, the calibration ends; if not, executing step S201.

5. A multi-stage VCO calibration circuit under different frequency error scenarios, the circuit comprising a phase detector, a loop filter, a multi-stage VCO, and a control unit, the control unit comprising a controller and a memory, characterized in that: When performing calibration of the multi-segment VCO in different frequency error scenarios, the circuit executes the calibration method of the multi-segment VCO in different frequency error scenarios according to any one of claims 1 to 3.

6. A multi-stage VCO calibration circuit under different frequency error scenarios, the circuit comprising a phase detector, a loop filter, a multi-stage VCO, and a control unit, the control unit comprising a controller and a memory, characterized in that: When performing calibration of the multi-segment VCO in different frequency error scenarios, the circuit executes the calibration method of the multi-segment VCO in different frequency error scenarios according to any one of claims 4 to 5.

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