A resolver analog signal generating device

Abstract

The present invention relates to a resolver analog signal generating device, which includes a resolver carrier generating module, a resolver excitation generating module, and a resolver analog signal generating module; the resolver carrier generating module is used to generate rotating magnetic field signals with different speeds in N channels; by performing positive and cosine signal sampling and channel gating on the rotating magnetic field signals, the coarse-channel positive and cosine carrier signals and the fine-channel positive and cosine carrier signals are output; the resolver excitation generating module is used to generate a resolver excitation signal with a set frequency; the resolver analog signal generating module is used to generate coarse-channel positive and cosine resolver analog signals according to the coarse-channel positive and cosine carrier signals and the resolver excitation signal; and is used to generate fine-channel positive and cosine resolver analog signals according to the fine-channel positive and cosine carrier signals and the positive and cosine excitation signals. The present invention replaces the traditional wound resolver to generate resolver analog carrier signals, and can be widely applied to high-precision shaft angle conversion test and control systems.

Description

Technical Field

[0001] The present invention relates to the technical field of measurement and control, and particularly to a resolver analog signal generating device. Background Art

[0002] An axis angle - digital converter can convert the analog signals of a synchro / resolver into digital angle signals in real time. As a key component for axis angle measurement and control, it has become a general basic device in the field of modern high - precision measurement and control. With the wide application of axis angle - digital converters, the demand for high - precision axis angle - digital converters is continuously increasing, thus imposing higher requirements on the accuracy of the axis angle signal source for measuring this converter.

[0003] In high - precision measurement and control, there are strict restrictions on volume and weight. Using a real resolver to generate resolver analog signals has the disadvantages of complex winding, high manufacturing cost, long cycle, large volume and mass, and is not conducive to simulating various motion states such as analog step, step - by - step, constant speed, square wave, and sine. However, using a high - precision axis angle signal source to generate resolver analog signals, currently, the main high - precision axis angle signal sources are SIM - 31200 of DDC, 5300 and 5330A of NAII, SDC1740 / 1742 or RDC1740 of ADI. Although their resolutions reach 20 bits, 21 bits, and 18 bits respectively, and the technology is relatively mature and can meet the requirements of high - precision measurement, the price of high - precision axis angle signal sources is expensive. Summary of the Invention

[0004] In view of the above analysis, the present invention aims to provide a resolver analog signal generating device to solve the problem of signal simulation of resolvers.

[0005] The technical solution provided by the present invention is as follows:

[0006] The present invention discloses a resolver analog signal generating device, including a resolver carrier generating module, a resolver excitation generating module, and a resolver analog signal generating module;

[0007] The resolver carrier generating module is used to generate rotating magnetic field signals of N channels with different rotation speeds; by sampling the positive and cosine signals of the rotating magnetic field signals and performing channel gating, it outputs the coarse - channel positive and cosine carrier signals and fine - channel positive and cosine carrier signals required for resolver analog;

[0008] The resolver excitation generating module is used to generate a resolver excitation signal with a set frequency required for resolver analog;

[0009] A resolver analog signal generation module is used to generate coarse-channel sine and cosine resolver analog signals based on the positive and negative cosine carrier signals and the resolver excitation signal of the coarse channel; and is used to generate fine-channel sine and cosine resolver analog signals based on the positive and negative cosine carrier signals and the sine and cosine excitation signals of the fine channel.

[0010] Further, the resolver carrier generation module includes a rotating magnetic field generation module, a rotating magnetic field acquisition module, and a channel gating module;

[0011] The rotating magnetic field generation module is used to generate rotating magnetic field signals of N channels with different rotation speeds; among them, the rotating magnetic field signal with the lowest rotation speed is used as the rotating magnetic field signal of the coarse channel, and the rotating magnetic field signals of other rotation speeds are used as the rotating magnetic field signals of the fine channels with different speed ratios from the coarse channel.

[0012] The rotating magnetic field acquisition module includes N magnetic field collectors; each magnetic field collector corresponds to a channel rotating magnetic field signal and is used to collect the rotating magnetic field signal and convert it into positive and negative cosine acquisition signals.

[0013] The channel gating module is used to select and output the positive and negative cosine acquisition signals of a fine channel as the positive and negative cosine carrier signals of the fine channel under the control of an external instruction.

[0014] Further, the rotating magnetic field generation module includes an N-stage reduction gear transmission mechanism and N radially magnetized cylindrical magnets;

[0015] Among them, a cylindrical magnet is installed at the axis position of each stage of reduction gear in the N-stage reduction gear transmission mechanism, and the magnetization direction of the cylindrical magnet coincides with the axial direction of the reduction gear; each cylindrical magnet rotates following the axis of each stage of speed gear; rotating magnetic field signals of N channels with different rotation speeds are generated.

[0016] Further, the 1st to N-1st stage reduction gears of the N-stage reduction gear transmission mechanism are external meshing gears, the Nth stage reduction gear is an internal meshing gear, and the axis of the 1st stage reduction gear is connected to a DC motor; the reduction ratio between adjacent two stages of reduction gears is 2; starting from the 2nd stage reduction gear, each stage of reduction gear reduces the motor speed by 2:1.

[0017] Further, the magnetic field collector includes two linear Hall sensors; both linear Hall sensors are located on the radial side of a radially magnetized cylindrical magnet, and the relative angle between them is 90°; the two linear Hall sensors respectively collect the rotating magnetic field generated by the rotation of a cylindrical magnet and convert it into two induction signals with a phase difference of 90°, which are respectively used as sine and cosine acquisition signals.

[0018] Further, the channel gating module includes a coarse channel signal conditioning module, an odd channel gating and conditioning module, an even channel gating and conditioning module, and a fine channel output module;

[0019] The signal input end of the coarse channel signal conditioning module is connected to the output end of the magnetic field collector of the coarse channel, and is used for conditioning the sine and cosine acquisition signals of the coarse channel, and then outputting the conditioned sine and cosine acquisition signals of the coarse channel from the signal output end as the coarse channel sine and cosine carrier signals;

[0020] The signal input end of the odd channel gating and conditioning module is connected to the output end of the magnetic field collector of the odd fine channel; under the control of an external instruction, the sine and cosine acquisition signals of the corresponding odd fine channel are gated, and the signals are conditioned respectively, and the conditioned sine and cosine acquisition signals of the odd fine channel are output from the signal output end;

[0021] The signal input end of the even channel gating and conditioning module is connected to the output end of the magnetic field collector of the even fine channel. Under the control of an external instruction, the sine and cosine acquisition signals of the selected even fine channel are gated, and the signals are inverted and conditioned respectively, and the conditioned sine and cosine acquisition signals of the even fine channel are output from the signal output end;

[0022] The signal input end of the fine channel output module is respectively connected to the output ends of the odd and even channel gating and conditioning modules. Under the control of an external instruction, the sine and cosine acquisition signals of the corresponding odd or even channel are gated and output as the fine channel sine and cosine carrier signals.

[0023] Further, the resolver analog signal generation module includes four analog multiplier modules;

[0024] Among them, the first analog multiplier module executes the operation rule (X cs 1 - X cs 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Z c 1 - Z c 2), and outputs the coarse channel sine resolver analog signal;

[0025] The second analog multiplier module executes the operation rule (X cc 1 - X cc 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Z c 1 - Z c 2), and outputs the coarse channel cosine resolver analog signal;

[0026] Among them, X cs 1 is the coarse channel sine carrier signal, X cs 2 is the GND signal; where Xcc 1 is the coarse channel cosine carrier signal, X cc 2 is the GND signal;

[0027] Y1 is the positive signal of the resolver excitation signal; Y2 is the negative signal of the resolver excitation signal; U c 1 is the first coarse channel amplitude conditioning voltage; U c 2 is the second coarse channel amplitude conditioning voltage; Z c 1 is the coarse channel amplitude offset voltage; Z c 2 is the GND signal;

[0028] The third analog multiplier module executes the algorithm (X js 1 - X js 2)*(Y1 - Y2) / (U j 1 - U j 2)+(Z j 1 - Z j 2), and outputs the fine channel sine resolver analog signal;

[0029] The fourth analog multiplier module executes the algorithm (X jc 1 - X jc 2)*(Y1 - Y2) / (U j 1 - U j 2)+(Z j 1 - Z j 2), and outputs the fine channel cosine resolver analog signal;

[0030] Among them, X js 1 is the fine channel sine carrier signal, X js 2 is the GND signal; X jc 1 is the fine channel cosine carrier signal, X jc 2 is the GND signal; U j 1 is the first fine channel amplitude conditioning voltage; U j 2 is the second fine channel amplitude conditioning voltage; Z j 1 is the fine channel amplitude offset voltage; Z j 2 is the GND signal.

[0031] Furthermore, the resolver analog signal generation module further includes four low - pass filter networks respectively connected to the four analog multiplier modules;

[0032] Each of the low - pass filter networks includes an active Butterworth low - pass filter circuit, an RC filter circuit, and a follower circuit;

[0033] The active Butterworth low - pass filter circuit is used to filter out the high - frequency components in the resolver analog signal;

[0034] The RC filter circuit is used to filter out the power frequency interference signal in the resolver analog signal;

[0035] The follower circuit is used to improve the driving ability of the resolver analog signal.

[0036] Further, the resolver excitation generation module includes an excitation signal generation module, a conditioning and amplification module, and a variable-frequency filter network;

[0037] The excitation signal generation module is used to generate a positive sine excitation signal and a negative sine excitation signal with a frequency range between 2 kHz and 20 kHz;

[0038] The conditioning and amplification module is used to amplify and follow the sine excitation signal to increase its output ability;

[0039] The variable-frequency filter network is used to perform variable-frequency filtering on the sine excitation signal, and the filter cut-off frequency is 40 kHz.

[0040] Further, it also includes an RDC signal acquisition and parameter adjustment module;

[0041] The RDC signal acquisition and parameter adjustment module is connected to the resolver analog signal generation module, and is used to perform analog-to-digital conversion and shaft angle calculation on the positive and negative cosine resolver analog signals of the output coarse and fine channels respectively, and verify the functions and performance of the RDC angle simulation; and according to the shaft angle calculation result, obtain the filter adjustment parameter and voltage adjustment parameter of the resolver analog signal generating device, and adjust the filter parameter and voltage parameter; so that the resolver analog signal generating device is applicable to occasions with different RDC signal requirements.

[0042] The present invention can at least achieve one of the following beneficial effects:

[0043] A resolver analog signal generating device provided by the present invention uses a mechanical transmission mechanism and a magnetic encoder to replace the traditional wound resolver to generate a resolver analog carrier signal, which improves the test efficiency, and can generate positive and negative cosine carrier signals with multiple different precisions in the fine channel, making it easier to expand multiple RDC signals.

[0044] The present invention gets rid of the dependence problem of the RDC signal acquisition system on the high-cost resolver, is composed of integrated digital devices, has a small volume and low power consumption, saves the test cost, reduces the test time, can realize high-precision, wide-frequency, and wide-voltage shaft angle simulation and acquisition, and can realize programmable setting of parameters such as frequency, amplitude, rotational speed, phase shift, and signal type, and can be widely applied to high-precision shaft angle conversion test and control systems. Description of the Drawings

[0045] The accompanying drawings are only for the purpose of illustrating specific embodiments and are not considered to be a limitation of the present invention. Throughout the drawings, the same reference signs denote the same components.

[0046] Figure 1 It is a connection block diagram of the resolver analog signal generating device in the embodiment of the present invention.

[0047] Figure 2 It is a schematic structural diagram of the N-stage reduction gear transmission mechanism in the embodiment of the present invention;

[0048] Figure 3 It is a schematic circuit diagram of the coarse channel signal conditioning module in the embodiment of the present invention;

[0049] Figure 4 It is a schematic circuit diagram of the channel gating module in the embodiment of the present invention;

[0050] Figure 5 It is a schematic circuit diagram of the resolver excitation generating module in the embodiment of the present invention;

[0051] Figure 6 It is a schematic circuit diagram of the resolver analog signal generating module in the embodiment of the present invention;

[0052] Figure 7 It is a schematic circuit diagram of the high-precision amplitude-adjustable power supply in the embodiment of the present invention;

[0053] Figure 8 It is a schematic circuit diagram of the amplitude offset voltage circuit in the embodiment of the present invention;

[0054] Figure 9 It is a schematic circuit diagram of the RDC signal acquisition and parameter adjustment module in the embodiment of the present invention;

[0055] Figure 10 It is a schematic circuit diagram of the drive circuit of the DC motor in the embodiment of the present invention. Detailed Embodiments

[0056] The preferred embodiments of the present invention will be specifically described below with reference to the accompanying drawings, in which the accompanying drawings form a part of this application and are used together with the embodiments of the present invention to explain the principles of the present invention.

[0057] This embodiment discloses a resolver analog signal generating device, as Figure 1 shown, which includes a resolver carrier generating module, a resolver excitation generating module, an analog signal conditioning module, and a resolver analog signal generating module;

[0058] The resolver carrier generation module is used to generate rotating magnetic field signals of N channels with different speeds; by sampling the positive and cosine signals of the rotating magnetic field signals and selecting channels, it outputs the coarse-channel positive and cosine carrier signals and the fine-channel positive and cosine carrier signals required for resolver simulation.

[0059] The resolver excitation generation module is used to generate a resolver excitation signal with a set frequency required for resolver simulation.

[0060] The resolver analog signal generation module is used to generate coarse-channel positive and cosine resolver analog signals according to the coarse-channel positive and cosine carrier signals and the resolver excitation signal; and generate fine-channel positive and cosine resolver analog signals according to the fine-channel positive and cosine carrier signals and the positive and cosine excitation signals.

[0061] Specifically, the resolver carrier generation module includes a rotating magnetic field generation module, a rotating magnetic field acquisition module, and a channel selection module.

[0062] The rotating magnetic field generation module is used to generate rotating magnetic field signals of N channels with different speeds; among them, the rotating magnetic field signal with the lowest speed is used as the rotating magnetic field signal of the coarse channel, and the rotating magnetic field signals of other speeds are used as the rotating magnetic field signals of the fine channels with different speed ratios from the coarse channel.

[0063] The rotating magnetic field acquisition module includes N magnetic field collectors; each magnetic field collector corresponds to a channel rotating magnetic field signal and is used to collect the rotating magnetic field signal and convert it into positive and cosine acquisition signals.

[0064] The channel selection module is used to select, under the control of an external instruction, the positive and cosine acquisition signals of a fine channel as the fine-channel positive and cosine carrier signals for output.

[0065] As Figure 2 shown, the rotating magnetic field generation module includes an N-stage reduction gear transmission mechanism and N radially magnetized cylindrical magnets; by way of example, N = 6 in the figure is only for more clearly showing its composition and connection relationship and does not limit the protection scope.

[0066] Among them, a cylindrical magnet is installed at the axial center position of each stage of reduction gear in the N-stage reduction gear transmission mechanism, and the magnetizing direction of the cylindrical magnet coincides with the axial direction of the reduction gear; each cylindrical magnet rotates following the axial center of each stage of speed gear; rotating magnetic field signals of N channels with different speeds are generated.

[0067] Among them, the 1st to N-1st stage reduction gears (sorted from small to large) of the N-stage reduction gear transmission mechanism are external meshing gears, the Nth stage reduction gear (the largest gear) is an internal meshing gear, and the axis of the 1st stage reduction gear is connected to the DC motor; the reduction ratio between adjacent two-stage reduction gears is 2; starting from the 2nd stage reduction gear, each stage of reduction gear reduces the motor speed by 2:1. Due to the relationship of gear meshing transmission, the rotation directions of odd-stage reduction gears are opposite to those of even-stage reduction gears, so the directions of rotation magnetic field signals of odd channels and even channels are opposite.

[0068] In addition, the DC motor connected to the axis of the 1st stage reduction gear can be used to simulate the motion curve of the combination of angle, angular velocity, and angular acceleration.

[0069] Among them, Figure 2 the magnetic field collector in includes two linear Hall sensors; the two linear Hall sensors are located on the radial sides of a radially magnetized cylindrical magnet, and the relative angle between them is 90°; the two linear Hall sensors respectively collect the rotating magnetic field generated by the rotation of a cylindrical magnet and convert it into two induction signals with a phase difference of 90°, which are respectively used as sine and cosine acquisition signals.

[0070] Specifically, the channel gating module includes a coarse channel signal conditioning module, an odd channel gating conditioning module, an even channel gating conditioning module, and a fine channel output module;

[0071] The signal input end of the coarse channel signal conditioning module is connected to the output end of the magnetic field collector of the coarse channel, and is used to condition the sine and cosine acquisition signals of the coarse channel and then output the conditioned sine and cosine acquisition signals of the coarse channel from the signal output end;

[0072] Specifically, as Figure 3 shown, the coarse channel signal conditioning module includes interfaces U01, U02, a dual operational amplifier AD8056 chip U13, resistors R01, R02, variable resistors R03, R04, and filter capacitors C16 and C17;

[0073] Among them, the operational amplifier AD8056 of U13A and the resistor R01 and the variable resistor R03 form a proportional amplifier (the amplification ratio is: 1 + R03 / R01), and its non-inverting input terminal inputs the sine acquisition signal of the coarse channel through the 2nd pin of U01, proportionally amplifies the sine acquisition signal of the coarse channel, and the output amplitude of the sine acquisition signal of the coarse channel can be adjusted through the variable resistor R03.

[0074] Among them, the operational amplifier AD8056 of U13B, resistor R02, and variable resistor R04 form a proportional amplifier (amplification ratio: 1 + R04 / R02). Its non-inverting input terminal inputs the sine acquisition signal of the coarse channel through pin 2 of U02, proportionally amplifies the cosine acquisition signal of the coarse channel, and the output amplitude of the cosine acquisition signal of the coarse channel can be adjusted through variable resistor R03.

[0075] Specifically, the signal input terminal of the odd-channel gating conditioning module is connected to the output terminal of the magnetic field collector of the odd-numbered fine channels; under the control of an external instruction, the positive and cosine acquisition signals of the corresponding odd-numbered fine channels are gated and signal conditioning is performed respectively, and the conditioned positive and cosine acquisition signals of the odd-numbered fine channels are output from the signal output terminal;

[0076] The signal input terminal of the even-channel gating conditioning module is connected to the output terminal of the magnetic field collector of the even-numbered fine channels. Under the control of an external instruction, the positive and cosine acquisition signals of the selected even-numbered fine channels are phase-inverted and conditioned respectively, and the conditioned positive and cosine acquisition signals of the even-numbered fine channels are output from the signal output terminal;

[0077] The signal input terminals of the fine-channel output module are respectively connected to the output terminals of the odd- and even-channel gating conditioning modules. Under the control of an external instruction, the positive and cosine acquisition signals of the corresponding odd or even channels are gated and output as the positive and cosine carrier signals of the fine channels.

[0078] More specifically, as Figure 4 shown, the odd-channel gating conditioning module includes an analog switch ADG1609 chip U03, a dual operational amplifier AD8056 chip U11, resistors R05, R06, variable resistors R07, R08;

[0079] The even-channel gating conditioning module includes an analog switch ADG1609 chip U04, a dual operational amplifier AD8056 chip U12, resistors R75, R76, variable resistors R77, R78;

[0080] The fine-channel output module includes an analog switch ADG1636 chip U09;

[0081] Among them, S1A, S2A, S3A, and S4A of the analog switch ADG1609 chip U03 are respectively connected to the sine acquisition signals of the four odd channels 3, 5, 7, and 9, and S1B, S2B, S3B, and S4B are respectively connected to the cosine acquisition signals of the four odd channels 3, 5, 7, and 9. The output terminal DA of the analog switch is connected to the non-inverting input terminal of U11A of the dual operational amplifier AD8056 chip U11; the output terminal DB of the analog switch is connected to the non-inverting input terminal of U11B of the dual operational amplifier AD8056 chip U11;

[0082] The control terminals EN, A0, A1, and A2 receive external instructions. Under the action of the external enable signal and address signal, a positive and cosine acquisition signal of an odd channel is selected and output to the dual operational amplifier AD8056 chip U11;

[0083] The resistor R05 and variable resistor R07 of U11A of the dual operational amplifier AD8056 chip U11 form a proportional amplification circuit to proportionally amplify the sine acquisition signal of the odd channel;

[0084] The resistor R06 and variable resistor R08 of U11B of the dual operational amplifier AD8056 chip U11 form a proportional amplification circuit to proportionally amplify the cosine acquisition signal of the odd channel.

[0085] Among them, S1A, S2A, S3A, and S4A of the analog switch ADG1609 chip U04 are respectively connected to the sine acquisition signals of four even channels 2, 4, 6, and 8, and S1B, S2B, S3B, and S4B are respectively connected to the cosine acquisition signals of four even channels 2, 4, 6, and 8. The output terminal DA of the analog switch is connected to the inverting input terminal of U12A of the dual operational amplifier AD8056 chip U12; the output terminal DB of the analog switch is connected to the inverting input terminal of U12B of the dual operational amplifier AD8056 chip U12;

[0086] The control terminals EN, A0, A1, and A2 receive external instructions. Under the action of the external enable signal and address signal, a positive and cosine acquisition signal of an even channel is selected and output to the dual operational amplifier AD8056 chip U12;

[0087] The resistor R75 and variable resistor R77 of U12A of the dual operational amplifier AD8056 chip U12 form an inverting proportional amplification circuit to inversely proportionally amplify the sine acquisition signal of the even channel; make the sine signal of the even channel in phase with the sine signal of the odd channel;

[0088] The resistor R76 and variable resistor R78 of U12B of the dual operational amplifier AD8056 chip U12 form a proportional amplification circuit to proportionally amplify the cosine acquisition signal of the odd channel, making the cosine signal of the even channel in phase with the cosine signal of the odd channel.

[0089] The input terminals S1A and S2A of the analog switch ADG1636 chip U09 are respectively connected to a positive and a cosine acquisition signal of an odd channel output by the dual operational amplifier AD8056 chip U11, and S1B and S2B are respectively connected to a positive and a cosine acquisition signal of an even channel output by the dual operational amplifier AD8056 chip U12; the output terminal DA of the analog switch outputs a sine carrier signal of the fine channel; the output terminal DB of the analog switch outputs a cosine carrier signal of the fine channel; the control terminals IN1 and IN2 receive external instructions, and under an external enabling signal, select the positive and cosine acquisition signals of the odd channel to output the positive and cosine carrier signals of the fine channel or select the positive and cosine acquisition signals of the even channel to output the positive and cosine carrier signals of the fine channel.

[0090] The precision extension coupling relationship between the coarse and fine channels in this embodiment is (taking a 6-stage reduction gear transmission mechanism): when the fine channel takes 64 (2 6 ) pairs of pole signals, the coarse channel can be divided into 360° / 2 6 , the linear Hall measurement accuracy for each analog signal period of the fine channel is 2 14 , then the actual RDC accuracy after coarse-fine coupling is 2 6 *2 14 = 2 20 , that is, the measurement accuracy is 360° / 2 20 . Figure 2 For the convenience of display, only a 5-stage 2:1 reduction ratio transmission mechanism is drawn, which can represent 2 5 pairs of pole signals of the fine channel. When a higher accuracy requirement for the RDC signal output is needed, the total reduction ratio of the rotating shaft where the sensor is located can be increased in a ratio of 2, and in cooperation with Figure 3 、 Figure 4 the circuits in

[0091] Specifically, the resolver excitation generation module includes an excitation signal generation module, a conditioning and amplification module, and a variable-frequency filtering network;

[0092] The excitation signal generation module is used to generate a positive and a negative sine excitation signal with a frequency range between 2 kHz and 20 kHz;

[0093] The conditioning and amplification module is used to amplify and follow the sine excitation signal to increase its output ability;

[0094] The variable-frequency filtering network is used to perform variable-frequency filtering on the sine excitation signal, and the filtering cut-off frequency is 40 kH.

[0095] More specifically, as Figure 5As shown, the resolver excitation generation module is based on the AD2S1210 chip. The AD2S1210 generates sine and cosine signals with a frequency of (2 kHz to 20 kHz). The voltage is adjusted to (range) through the amplifier circuit composed of AD8056 (U18) and signal following is performed to increase its output capacity. The subsequent stage is connected to a variable frequency filter network composed of the operational amplifier AD8056 and variable resistors (R11, R12), with a cut-off frequency of (40 kHz). The frequency can be set by the cooperation of the variable resistor and the capacitor. Finally, the RDC angle signal is generated to synthesize the required fundamental signals ATE+ and ATE-.

[0096] Specifically, the resolver analog signal generation module includes four analog multiplier modules;

[0097] Among them, the first analog multiplier module executes the algorithm (X cs 1 - X cs 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Zcs1 - Zcs2), and outputs the coarse channel sine resolver analog signal;

[0098] The second analog multiplier module executes the algorithm (X cc 1 - X cc 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Z c 1 - Z c 2), and outputs the coarse channel cosine resolver analog signal;

[0099] Among them, X cs 1 is the coarse channel sine carrier signal, and X cs 2 is the GND signal; among them, X cc 1 is the coarse channel cosine carrier signal, and X cc 2 is the GND signal;

[0100] Y1 is the positive signal of the resolver excitation signal; Y2 is the negative signal of the resolver excitation signal; U c 1 is the first coarse channel amplitude conditioning voltage; U c 2 is the second coarse channel amplitude conditioning voltage; Z c 1 is the coarse channel amplitude offset voltage; Z c 2 is the GND signal;

[0101] The third analog multiplier module executes the algorithm (X js 1 - X js 2) * (Y1 - Y2) / (U j 1 - U j 2) + (Z j 1 - Z j2), output the sine resolver analog signal of the fine channel;

[0102] The fourth analog multiplier module performs the algorithm (X jc 1 - X jc 2) * (Y1 - Y2) / (U j 1 - U j 2) + (Z j 1 - Z j 2), output the cosine resolver analog signal of the fine channel;

[0103] Among them, X js 1 is the sine carrier signal of the fine channel, X js 2 is the GND signal; X jc 1 is the cosine carrier signal of the fine channel, X jc 2 is the GND signal; U j 1 is the first amplitude conditioning voltage of the fine channel; U j 2 is the second amplitude conditioning voltage of the fine channel; Z j 1 is the amplitude offset voltage of the fine channel; Z j 2 is the GND signal.

[0104] The resolver analog signal generation module further includes four low - pass filter networks connected to the analog multiplier module;

[0105] The low - pass filter network includes an active Butterworth low - pass filter circuit, an RC filter circuit, and a follower circuit;

[0106] The active Butterworth low - pass filter circuit is used to filter out the high - frequency components in the resolver analog signal;

[0107] The RC filter circuit is used to filter out the power - frequency interference signals in the resolver analog signal;

[0108] The follower circuit is used to improve the driving ability of the resolver analog signal.

[0109] More specifically, as Figure 6 shown,

[0110] The first analog multiplier module uses the analog multiplier AD734 circuit. The active Butterworth low - pass filter circuit is formed by connecting U23A of the dual - operational amplifier AD8056 chip U23, capacitors C12, C13, resistors R22, R23, R24, and R25. The RC filter circuit is composed of capacitor C15 and resistor R61. The follower circuit is constituted by U23B of the dual - operational amplifier AD8056 chip U23.

[0111] Among them, pin 1 of the multiplier AD734 is connected to the coarse-channel sine carrier signal AMR_CSIN; pin 2 is connected to GND_A; pins 6 and 7 are respectively connected to the positive signal ATE+ and the negative signal ATE- of the resolver excitation signal; pin 10 is connected to the coarse-channel amplitude bias voltage V_CBIAS; pin 11 is connected to GND_A; pin 4 is connected to 5V, and pin 4 is connected to GND_A; pin 12 serves as the multiplier output. See the connection relationship in the low-pass filter network in Figure 6 for the specific connection.

[0112] The connection relationships of the second, third, and fourth analog multiplier modules and the related low-pass filter network are similar to those of the first analog multiplier module. Please specifically refer to Figure 6 for the specific connection, and will not be elaborated here one by one.

[0113] Specifically, the conditioning circuits in the above figures all adopt dual power supplies V_REF+ and V_REF-, and the amplitude regulation function of analog signals is realized by adjusting the amplitudes of the dual power supplies V_REF+ and V_REF-.

[0114] Therefore, this embodiment also includes a high-precision amplitude-adjustable power supply circuit, such as Figure 7 shown, the isolated DC / DC power supply URA2415S-6WR2 module is used to generate ±12V to supply power to the operational amplifier AD8056. The voltage regulator reference REF192ES produces a high-precision reference voltage of REF2.5V. After being amplified proportionally by the operational amplifier circuit AD8056, the dual power supplies V_REF+ and V_REF- are used to realize the amplitude regulation function of analog signals.

[0115] Specifically, Figure 6 the coarse-channel amplitude bias voltage V_CBIAS and the fine-channel amplitude bias voltage V_JBIAS in

[0116] can be used to adjust the bias of the positive and negative cosine resolver analog signals of the coarse and fine channels, Figure 8 as shown, in the generation circuits of the coarse-channel amplitude bias voltage V_CBIAS and the fine-channel amplitude bias voltage V_JBIAS, high-precision reference voltages are respectively produced based on two voltage regulator references REF192ES. After passing through the adjustable voltage output networks composed of resistor R13 and variable resistor R26, and the adjustable voltage output network composed of resistor R14 and variable resistor R27, the coarse-channel amplitude bias voltage V_CBIAS and the fine-channel amplitude bias voltage V_JBIAS are respectively adjusted to generate bias voltages that meet the requirements of the resolver analog signals.

[0117] In a preferred solution, the resolver analog signal generating device further includes an RDC signal acquisition and parameter adjustment module;

[0118] The RDC signal acquisition and parameter adjustment module is connected to the resolver analog signal generation module, and is used to perform analog-to-digital conversion and shaft angle calculation on the positive and cosine resolver analog signals of the coarse and fine channels output respectively, and verify the functions and performance of the RDC angle analog; and according to the shaft angle calculation result, obtain the filter adjustment parameter and voltage adjustment parameter of the resolver analog signal generating device, and adjust the filter parameter and voltage parameter; so that the resolver analog signal generating device is applicable to occasions with different RDC signal requirements.

[0119] Specifically, as Figure 9 shown, the RDC signal acquisition and parameter adjustment module includes two AD2S1210 chips U6 and U7 and the ARM processor STM32F103;

[0120] Among them, the AD2S1210 chip is used to perform analog-to-digital conversion to achieve shaft angle calculation; it can also be used to generate the excitation signal necessary for the resolver analog signal.

[0121] The ARM processor STM32F103 receives the calculated shaft angle, and according to the shaft angle calculation result, obtains the filter adjustment parameter and voltage adjustment parameter of the resolver analog signal generating device, and adjusts the filter parameter and voltage parameter; so that the resolver analog signal generating device is applicable to occasions with different RDC signal requirements.

[0122] The ARM processor STM32F103 is also used to generate an external instruction for controlling the channel gating module to select the positive and cosine carrier signals of the fine channel and a frequency control word for the excitation signal frequency generated by the AD2S1210 chip.

[0123] More specifically, in order to drive the DC motor connected to the axis of the first-stage reduction gear; this embodiment also discloses the drive circuit of the DC motor as Figure 10 shown. The drive signal can be output according to the externally input MCU_PWM1 and MCU_DIR1 signals to drive the DC motor, and is used to simulate the motion curve of the combination of angle, angular velocity, and angular acceleration.

[0124] In summary, the resolver analog signal generating device according to the embodiments of the present invention uses a mechanical transmission mechanism in cooperation with a magnetic encoder to replace the traditional wound resolver to generate a resolver analog carrier signal, which improves the test efficiency. Moreover, it can generate positive and cosine carrier signals with multiple different precisions in the fine channels, making it easier to expand multiple RDC signals; it gets rid of the dependence of the RDC signal acquisition system on high-cost resolvers, is composed of integrated digital devices, has a small volume and low power consumption, saves test costs, reduces test time, can achieve high-precision, wide-frequency, and wide-voltage shaft angle simulation and acquisition, and can programmatically set parameters such as frequency, amplitude, rotational speed, phase shift, and signal type, and can be widely applied to high-precision shaft angle conversion test and control systems.

[0125] As described above, the above are only the preferred specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A resolver analog signal generating device, characterized in that, It includes a resolver carrier generation module, a resolver excitation generation module, and a resolver analog signal generation module; The resolver carrier generation module is used to generate rotating magnetic field signals of N channels with different rotational speeds; by sampling the positive and cosine signals of the rotating magnetic field signals and performing channel gating, it outputs the coarse-channel positive and cosine carrier signals and the fine-channel positive and cosine carrier signals required for resolver analog; The resolver excitation generation module is used to generate a resolver excitation signal with a set frequency required for resolver analog; The resolver analog signal generation module is used to generate coarse-channel positive and cosine resolver analog signals based on the coarse-channel positive and cosine carrier signals and the resolver excitation signal; and is used to generate fine-channel positive and cosine resolver analog signals based on the fine-channel positive and cosine carrier signals and the positive and cosine excitation signals.

2. The resolver analog signal generating device according to claim 1, wherein The resolver carrier generation module includes a rotating magnetic field generation module, a rotating magnetic field acquisition module, and a channel gating module; The rotating magnetic field generation module is used to generate rotating magnetic field signals of N channels with different rotational speeds; among them, the rotating magnetic field signal with the lowest rotational speed is used as the rotating magnetic field signal of the coarse channel, and the rotating magnetic field signals of other rotational speeds are used as the rotating magnetic field signals of the fine channels with different speed ratios from the coarse channel; The rotating magnetic field acquisition module includes N magnetic field collectors; each magnetic field collector corresponds to a channel rotating magnetic field signal and is used to collect the rotating magnetic field signal and convert it into positive and cosine acquisition signals; The channel gating module is used to, under the control of an external instruction, gate a positive and cosine acquisition signal of a fine channel as the output of the fine-channel positive and cosine carrier signal.

3. The resolver analog signal generating device according to claim 2, wherein, The rotating magnetic field generation module includes an N-stage reduction gear transmission mechanism and N radially magnetized cylindrical magnets; Among them, a cylindrical magnet is installed at the axial center of each stage of the N-stage reduction gear transmission mechanism, and the magnetization direction of the cylindrical magnet coincides with the axis of the reduction gear; each cylindrical magnet rotates following the axis of each stage of the reduction gear; generating rotating magnetic field signals of N channels with different rotational speeds.

4. The resolver analog signal generating device according to claim 3, wherein The 1st to N-1st stage reduction gears of the N-stage reduction gear transmission mechanism are external meshing gears, the Nth stage reduction gear is an internal meshing gear, and the axis of the 1st stage reduction gear is connected to a DC motor; the reduction ratio between adjacent two-stage reduction gears is 2; starting from the 2nd stage reduction gear, each stage of reduction gear reduces the motor speed by 2:

1.

5. The resolver analog signal generating device according to claim 2, wherein The magnetic field collector includes two linear Hall sensors; both linear Hall sensors are located on the radial side of a radially magnetized cylindrical magnet, and the relative angle between them is 90°; the two linear Hall sensors respectively collect the rotating magnetic field generated by the rotation of a cylindrical magnet and convert it into two induction signals with a phase difference of 90°, which are respectively used as the sine and cosine acquisition signals.

6. The resolver analog signal generating device according to claim 5, characterized in that, The channel gating module includes a coarse-channel signal conditioning module, an odd-channel gating conditioning module, an even-channel gating conditioning module, and a fine-channel output module; The signal input end of the coarse channel signal conditioning module is connected to the output end of the magnetic field collector of the coarse channel, and is used to condition the sine and cosine acquisition signals of the coarse channel, and then output the conditioned sine and cosine acquisition signals of the coarse channel from the signal output end as the sine and cosine carrier signals of the coarse channel; The signal input end of the odd channel gating conditioning module is connected to the output end of the magnetic field collector of the odd-numbered fine channel; under the control of an external instruction, the sine and cosine acquisition signals of the corresponding odd-numbered fine channel are gated, and signal conditioning is performed respectively, and the conditioned sine and cosine acquisition signals of the odd-numbered fine channel are output from the signal output end; The signal input end of the even channel gating conditioning module is connected to the output end of the magnetic field collector of the even-numbered fine channel. Under the control of an external instruction, the sine and cosine acquisition signals of the selected even-numbered fine channel are subjected to signal inversion and conditioning respectively, and the conditioned sine and cosine acquisition signals of the even-numbered fine channel are output from the signal output end; The signal input end of the fine channel output module is respectively connected to the output ends of the odd and even channel gating conditioning modules. Under the control of an external instruction, the sine and cosine acquisition signals of the corresponding odd or even channel are selected and output as the sine and cosine carrier signals of the fine channel.

7. The resolver analog signal generating device according to claim 1, characterized in that, The resolver analog signal generation module includes four analog multiplier modules; Among them, the first analog multiplier module executes the algorithm (X cs 1 - X cs 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Z c 1 - Z c 2), and outputs a coarse-channel sine resolver analog signal; The second analog multiplier module executes the algorithm (X cc 1 - X cc 2) * (Y1 - Y2) / (U c 1 - U c 2) + (Z c 1 - Z c 2), and outputs the coarse channel cosine resolver analog signal; Among them, X cs 1 is the coarse channel sine carrier signal, X cs 2 is the GND signal; among them X cc 1 is the coarse channel cosine carrier signal, X cc 2 is the GND signal; Y1 is the positive signal of the resolver excitation signal; Y2 is the negative signal of the resolver excitation signal; U c 1 is the amplitude conditioning voltage of the first coarse channel; U c 2 is the amplitude conditioning voltage of the second coarse channel; Z c 1 is the amplitude offset voltage of the coarse channel; Z c 2 is the GND signal; The third analog multiplier module executes the algorithm (X js 1 - X js 2) * (Y1 - Y2) / (U j 1 - U j 2) + (Z j 1 - Z j 2), and outputs the sine resolver analog signal of the fine channel; The fourth analog multiplier module executes the algorithm (X jc 1 - X jc 2) * (Y1 - Y2) / (U j 1 - U j 2) + (Z j 1 - Z j 2), and outputs the fine channel cosine resolver analog signal; Among them, X js 1 is the fine-channel sine carrier signal, X js 2 is the GND signal; X jc 1 is the fine-channel cosine carrier signal, X jc 2 is the GND signal; U j 1 is the first fine-channel amplitude conditioning voltage; U j 2 is the second fine-channel amplitude conditioning voltage; Z j 1 is the fine-channel amplitude offset voltage; Z j 2 is the GND signal.

8. The resolver analog signal generating device according to claim 1, wherein The resolver analog signal generation module further includes four low-pass filter networks respectively connected to the four analog multiplier modules; Each of the low-pass filter networks includes an active Butterworth low-pass filter circuit, an RC filter circuit, and a follower circuit; The active Butterworth low-pass filter circuit is used to filter out high-frequency components in the resolver analog signal; The RC filter circuit is used to filter out power frequency interference signals in the resolver analog signal; The follower circuit is used to improve the driving ability of the resolver analog signal.

9. The resolver analog signal generating device according to claim 1, wherein The resolver excitation generation module includes an excitation signal generation module, a conditioning and amplification module, and a variable-frequency filter network; The excitation signal generation module is used to generate a positive signal and a negative signal of a sine excitation signal with a frequency range between 2 kHz and 20 kHz; The conditioning and amplification module is used to amplify and follow the sine excitation signal to increase its output ability; The variable-frequency filter network is used to perform variable-frequency filtering on the sine excitation signal, and the filter cut-off frequency is 40 kHz.

10. The resolver analog signal generating device according to any one of claims 1-9, characterized in that, It further includes an RDC signal acquisition and parameter adjustment module; The RDC signal acquisition and parameter adjustment module is connected to the resolver analog signal generation module, and is used to perform analog-to-digital conversion and shaft angle calculation on the output sine and cosine resolver analog signals of the coarse and fine channels respectively, and verify the functions and performances of the RDC angle analog; and according to the shaft angle calculation result, obtain the filter adjustment parameters and voltage adjustment parameters of the resolver analog signal generating device, and adjust the filter parameters and voltage parameters; so that the resolver analog signal generating device is applicable to occasions with different RDC signal requirements.

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