Method for cutting a wafer

Abstract

A method for cutting a wafer, comprising: providing a wafer, the wafer including a plurality of mutually discrete main chip regions and a dicing channel region located between adjacent main chip regions, a device structure being provided in the main chip regions and dicing channels being provided in the dicing channel region; forming a first dicing protection layer on the top surface of the dicing channel region, as well as on the side walls and bottom surface of the dicing channels, the material of the first dicing protection layer including metal oxide; after forming the first dicing protection layer, performing a cutting process on the wafer along the dicing channels, such that a plurality of chips are formed from the wafer. Since the material of the first dicing protection layer is metal oxide, sintered products generated during laser cutting of the wafer can be effectively reduced, and thus the attachment of sintered products to the chip surface is reduced, thereby improving the yield of the product.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and particularly to a method for cutting wafers. Background Art

[0002] In the process of semiconductor manufacturing, after an integrated circuit is formed on a wafer, the wafer needs to be cut into a number of discrete chips or dies, and then the discrete chips or dies are packaged to form a chip package structure.

[0003] Blade cutting is a traditional wafer cutting process. When blade cutting, a cutting tool is used to cut along the cutting channels on the wafer, so that the chips on the wafer are separated one by one to form independent chips.

[0004] With the continuous improvement of the integration degree of devices, the number of chips formed on a single wafer is increasing, and the area of the cutting channels between adjacent chips is becoming narrower. When using blade cutting to cut the wafer, the area near the cutting channels will bear greater stress, which is likely to cause problems such as chipping and wafer cracking or breakage.

[0005] To solve this problem, the industry has proposed a new cutting process - laser etching. Laser etching focuses a high-power laser on the surface of the wafer, causing the local temperature of the wafer to rise and decompose. The advantages of laser cutting are fast cutting speed and it is not easy to cause mechanical damage to the relatively brittle wafer.

[0006] However, there are still many problems in the existing laser cutting technology. Summary of the Invention

[0007] The technical problem solved by the present invention is to provide a method for cutting wafers to reduce the generation of cutting sinter and improve the yield of products.

[0008] To solve the above problems, the present invention provides a method for cutting wafers, including: providing a wafer, the wafer including a number of mutually discrete main chip areas and a cutting channel area located between adjacent main chip areas, the main chip areas having device structures, and the cutting channel area having cutting channels; forming a first cutting protection layer on the top surface of the cutting channel area, as well as on the side walls and bottom surface of the cutting channels, the material of the first cutting protection layer including metal oxide; after forming the first cutting protection layer, performing a cutting process on the wafer along the cutting channels, so that the wafer forms a number of chips.

[0009] Optionally, the device structure includes: a vertical cavity surface emitting laser, the vertical cavity surface emitting laser including an upper electrode layer, the upper electrode layer also being located in the cutting channel area, and the first cutting protection layer covering the upper electrode layer.

[0010] Optionally, the material of the first cutting protection layer is different from that of the upper electrode layer.

[0011] Optionally, the material of the upper electrode layer includes: gold.

[0012] Optionally, the metal oxide includes: aluminum oxide.

[0013] Optionally, the formation process of the first cutting protection layer includes: atomic layer deposition process.

[0014] Optionally, the formation method of the first cutting protection layer includes: forming a photoresist layer on the wafer, the photoresist layer exposing the dicing street area; forming a first cutting protection material layer on the top surface of the dicing street area, the side walls and bottom surface of the dicing street, and the top surface of the photoresist layer; removing the photoresist layer and the first cutting protection material layer located on the photoresist layer to form the first cutting protection layer.

[0015] Optionally, after forming the first cutting protection layer and before dicing the wafer, it further includes: forming a second cutting protection layer on the surface of the first cutting protection layer.

[0016] Optionally, the material of the second cutting protection layer is different from that of the first cutting protection layer.

[0017] Optionally, the material of the second cutting protection layer includes: metal alloy.

[0018] Optionally, the metal alloy includes: titanium tungsten alloy.

[0019] Optionally, the formation process of the second cutting protection layer includes: sputtering process.

[0020] Optionally, the formation method of the first cutting protection layer and the second cutting protection layer includes: forming a photoresist layer on the wafer, the photoresist layer exposing the dicing street area; forming a first cutting protection material layer on the top surface of the dicing street area, the side walls and bottom surface of the dicing street, and the top surface of the photoresist layer; forming a second cutting protection material layer on the first cutting protection material layer; removing the photoresist layer and the first cutting protection material layer and the second cutting protection material layer located on the photoresist layer to form the first cutting protection layer and the second cutting protection layer.

[0021] Optionally, the device structure includes: vertical cavity surface emitting laser.

[0022] Optionally, the dicing process includes: laser dicing process.

[0023] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0024] In the wafer cutting method of the technical solution of the present invention, a first cutting protection layer is formed on the top surface of the scribe lane area, as well as on the side wall and bottom surface of the scribe lane. The material of the first cutting protection layer includes metal oxide. Since the material of the first cutting protection layer is metal oxide, it can effectively reduce the sintered products generated during laser cutting of the wafer, thereby reducing the sintered products attached to the chip surface and improving the yield of the product.

[0025] Further, after forming the first cutting protection layer and before performing the cutting process on the wafer, it further includes: forming a second cutting protection layer on the surface of the first cutting protection layer. When cutting a relatively thin wafer, the second cutting protection layer can play a buffering role during cutting, thereby effectively reducing the risk of cracks or fragments occurring during the wafer cutting process. Description of the Drawings

[0026] Figures 1 to 2 is a schematic structural diagram of each step of a wafer cutting method;

[0027] Figures 3 to 6 is a schematic structural diagram of each step of the wafer cutting method in an embodiment of the present invention;

[0028] Figures 7 to 8 is a schematic structural diagram of each step of the wafer cutting method in another embodiment of the present invention. Detailed Embodiments

[0029] Figures 1 to 2 is a schematic structural diagram of each step of a wafer cutting method.

[0030] Please refer to Figure 1 , a wafer (not shown) is provided. The wafer includes a plurality of mutually discrete main chip areas I and a scribe lane area II located between adjacent main chip areas I. A device structure (not shown) is provided in the main chip area I, and a scribe lane 100 is provided in the scribe lane area II; a cutting protection liquid 101 is coated on the surface of the scribe lane area II.

[0031] Please refer to Figure 2 , after coating the cutting protection liquid 101, the wafer is cut along the scribe lane 100 so that the wafer forms a plurality of chips 102.

[0032] In this embodiment, a laser cutting process is used to cut the wafer. The laser cutting process belongs to non-contact processing and will not generate mechanical stress on the wafer, resulting in less damage to the wafer. Due to the focusing advantage of the laser cutting process, the focal point can be as small as the sub-micron level, which is more conducive to the microfabrication of the wafer and can process small parts.

[0033] However, the high temperature during laser cutting will sinter the coating formed by the cutting protective liquid 101, resulting in sintered substances adhering to the surface of the chip 102 after the cutting process, thereby affecting the yield of the product.

[0034] On this basis, the present invention provides a wafer cutting method. A first cutting protection layer is formed on the top surface of the saw street area, as well as on the side wall and bottom surface of the saw street. The material of the first cutting protection layer includes metal oxide. Since the material of the first cutting protection layer is metal oxide, it can effectively reduce the sintered substances generated during laser cutting of the wafer, thereby reducing the sintered substances adhering to the chip surface and improving the yield of the product.

[0035] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe the specific embodiments of the present invention in detail with reference to the accompanying drawings.

[0036] Figures 3 to 6 It is a schematic structural diagram of each step of the wafer cutting method in the embodiment of the present invention.

[0037] Please refer to Figure 3 and Figure 4 , Figure 4 is Figure 3 a schematic cross-sectional view along line A-A in . A wafer 200 is provided. The wafer 200 includes a plurality of mutually discrete main chip areas I and a saw street area II located between adjacent main chip areas I. A device structure (not shown) is provided in the main chip area I, and a saw street 201 is provided in the saw street area II.

[0038] In this embodiment, the device structure includes: a Vertical Cavity Surface Emitting Laser (VCSEL).

[0039] A vertical cavity surface emitting laser is a semiconductor laser diode, developed based on semiconductor materials such as gallium arsenide, which is different from other light sources such as light emitting diodes (LEDs) and laser diodes (LDs). Different from traditional edge emitter lasers, the vertical cavity surface emitting laser emits a high-power optical laser beam vertically from the top surface, and has the advantages of small volume, circular output light spot, natural 2D mechanism light, single longitudinal mode output, small threshold current, large operating temperature range, low price, easy integration into large-area arrays, etc., and is widely used in the fields of optical communication, optical interconnection, optical storage, etc. Usually, the operating wavelength of the vertical cavity surface emitting laser is from 850nm to 1310nm, and the transmission rate is from 2.125 to 150Gbps. It mainly consists of three main parts: the upper distributed Bragg reflector (DBR), the active region, and the lower distributed Bragg reflector, and these three parts together form a resonant cavity to establish electromagnetic waves.

[0040] In this embodiment, the vertical cavity surface emitting laser includes an upper electrode layer (not labeled), and the upper electrode layer is also located in the scribe lane region II.

[0041] In this embodiment, the material of the upper electrode layer includes: gold.

[0042] Please refer to Figure 5 , Figure 5 and Figure 4 In the same view direction as, a first scribe protection layer 202 is formed on the top surface of the scribe lane region II, and on the side wall and bottom surface of the scribe 101. The material of the first scribe protection layer 202 includes metal oxide.

[0043] In this embodiment, the material of the first scribe protection layer 202 is different from the material of the upper electrode layer, and the first scribe protection layer 202 covers the upper electrode layer.

[0044] In this embodiment, the metal oxide includes: aluminum oxide.

[0045] In this embodiment, the formation process of the first scribe protection layer 202 includes: atomic layer deposition process.

[0046] In this embodiment, the method for forming the first cutting protection layer 202 includes: forming a photoresist layer (not shown) on the wafer 200, with the photoresist layer exposing the saw street area II; forming a first cutting protection material layer (not shown) on the top surface of the saw street area II, the sidewalls and the bottom surface of the saw street 201, and the top surface of the photoresist layer; removing the photoresist layer and the first cutting protection material layer located on the photoresist layer to form the first cutting protection layer 202.

[0047] Please refer to Figure 6 , after forming the first cutting protection layer 202, the wafer 200 is cut along the saw street 201, so that the wafer 200 forms a plurality of the chips 203.

[0048] In this embodiment, the cutting process includes: a laser cutting process.

[0049] In this embodiment, since the material of the first cutting protection layer 202 is a metal oxide, it can effectively reduce the sintered products generated during the laser cutting of the wafer, thereby reducing the sintered products attached to the surface of the chip 203, and thus improving the yield of the product.

[0050] Figures 7 to 8 are the structural schematic diagrams of the steps of the wafer cutting method in another embodiment of the present invention.

[0051] In this embodiment, the cutting method of the wafer is further described on the basis of the above embodiment (as Figure 5 shown). The difference from the above embodiment is that: it further includes: forming a second cutting protection layer on the first cutting protection layer 202. The following will be specifically described with reference to the drawings.

[0052] Please refer to Figure 7 , after forming the first cutting protection layer 202, a second cutting protection layer 300 is formed on the surface of the first cutting protection layer 202.

[0053] In this embodiment, the material of the second cutting protection layer 300 is different from that of the first cutting protection layer 202.

[0054] In this embodiment, the material of the second cutting protection layer 300 includes: a metal alloy.

[0055] In this embodiment, the metal alloy includes: a titanium-tungsten alloy.

[0056] In this embodiment, the forming process of the second cutting protection layer 300 includes: a sputtering process.

[0057] In this embodiment, the method for forming the first cutting protection layer 202 and the second cutting protection layer 300 includes: forming a photoresist layer (not shown) on the wafer 200, with the photoresist layer exposing the dicing street area II; forming a first cutting protection material layer (not shown) on the top surface of the dicing street area II, the sidewalls and the bottom surface of the dicing street 201, and the top surface of the photoresist layer; forming a second cutting protection material layer (not shown) on the first cutting protection material layer; removing the photoresist layer and the first and second cutting protection material layers located on the photoresist layer to form the first cutting protection layer 202 and the second cutting protection layer 300.

[0058] Please refer to Figure 8 , after forming the second cutting protection layer 300, the wafer 200 is cut along the dicing street 201 so that the wafer 200 forms a plurality of the chips 203.

[0059] In this embodiment, the cutting process includes: a laser cutting process.

[0060] In this embodiment, when cutting the relatively thin wafer 200, the second cutting protection layer 300 can play a buffering role during cutting, thereby effectively reducing the risk of cracks or chips occurring during the cutting process of the wafer 200.

[0061] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined by the claims.

Claims

1. A method for cutting a wafer, characterized in that, Including: Providing a wafer, the wafer including a plurality of mutually discrete main chip areas and a dicing street area located between adjacent main chip areas, device structures being provided in the main chip areas and dicing streets being provided in the dicing street area; Forming a first dicing protection layer on the top surface of the dicing street area, and on the side walls and bottom surface of the dicing streets, the material of the first dicing protection layer including a metal oxide; After forming the first dicing protection layer, performing a dicing process on the wafer along the dicing streets, such that the wafer forms a plurality of chips; wherein, The device structures include: vertical cavity surface emitting lasers, the vertical cavity surface emitting lasers including upper electrode layers, the upper electrode layers also being located in the dicing street area, the first dicing protection layer covering the upper electrode layers; wherein, The material of the first dicing protection layer is different from the material of the upper electrode layers; The method for forming the first dicing protection layer includes: forming a photoresist layer on the wafer, the photoresist layer exposing the dicing street area; forming a first dicing protection material layer on the top surface of the dicing street area, on the side walls and bottom surface of the dicing streets, and on the top surface of the photoresist layer; removing the photoresist layer and the first dicing protection material layer located on the photoresist layer to form the first dicing protection layer.

2. The cutting method of the wafer as described in claim 1, wherein, The material of the upper electrode layers includes: gold.

3. The cutting method of the wafer according to claim 1, characterized in that, The metal oxide includes: aluminum oxide.

4. The cutting method of the wafer as described in claim 1, wherein, The forming process of the first dicing protection layer includes: atomic layer deposition process.

5. The cutting method of the wafer according to claim 1, characterized in that, After forming the first dicing protection layer and before performing the dicing process on the wafer, further including: forming a second dicing protection layer on the surface of the first dicing protection layer.

6. The cutting method of the wafer according to claim 5, wherein, The material of the second dicing protection layer is different from the material of the first dicing protection layer.

7. The method for cutting a wafer as claimed in claim 5, wherein, The material of the second dicing protection layer includes: a metal alloy.

8. The method for cutting a wafer according to claim 7, wherein The metal alloy includes: a titanium tungsten alloy.

9. The cutting method of the wafer according to claim 5, wherein, The forming process of the second dicing protection layer includes: sputtering process.

10. The dicing method of a wafer according to claim 5, characterized in that, The method for forming the first dicing protection layer and the second dicing protection layer includes: forming a photoresist layer on the wafer, the photoresist layer exposing the dicing street area; forming a first dicing protection material layer on the top surface of the dicing street area, on the side walls and bottom surface of the dicing streets, and on the top surface of the photoresist layer; forming a second dicing protection material layer on the first dicing protection material layer; removing the photoresist layer and the first dicing protection material layer and the second dicing protection material layer located on the photoresist layer to form the first dicing protection layer and the second dicing protection layer.

11. The cutting method of the wafer according to claim 1, wherein, The dicing process includes: laser dicing process.

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