Hemt device and method of manufacturing the same

Abstract

The present disclosure relates to a HEMT device and a manufacturing method thereof, the HEMT device comprising: a substrate; an epitaxial layer disposed on the substrate, the epitaxial layer comprising: a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack; a two-dimensional electron gas formed at an interface between the first semiconductor stack and the second semiconductor layer; a terminal layer comprising a source, a drain and a gate disposed on the second semiconductor layer and arranged at intervals; a conductive layer disposed within the epitaxial layer and located between the substrate and the two-dimensional electron gas; an electrical coupling structure extending from the gate into the epitaxial layer and connected with the conductive layer, for electrically coupling the conductive layer to the gate; a high-resistance structure at least partially disposed between the conductive layer and the two-dimensional electron gas, and between the electrical coupling structure and the two-dimensional electron gas. The HEMT device can effectively reduce the electric field intensity of the gate under high voltage of the HEMT device, thereby improving the breakdown voltage of the device.

Description

Technical Field

[0001] This disclosure generally relates to the field of semiconductor devices. More specifically, this disclosure relates to a HEMT device and a method for manufacturing the HEMT device. Background Technology

[0002] HEMT devices, also known as high electron mobility transistors, are widely used in high-frequency, high-voltage, high-temperature, and high-power-density fields due to their high electron mobility, high two-dimensional electron gas concentration, and high breakdown voltage.

[0003] A desirable property of HEMT devices is higher breakdown voltage. Gate field plates are widely used in HEMT devices because they can improve the breakdown voltage. Gate field plates are typically placed on the passivation layer on top of the HEMT device and connected to the gate or source. While this improves the breakdown voltage, there is a desire to develop new technologies that can further enhance the breakdown voltage, ideally by continuing to utilize gate field plates in these new technologies to significantly increase the breakdown voltage. Summary of the Invention

[0004] To address some or all of the aforementioned problems, this disclosure provides a HEMT device and a method for manufacturing the same, which has a high breakdown voltage without using a gate field plate and an even higher breakdown voltage when using a gate field plate.

[0005] According to a first aspect of this disclosure, a HEMT device is provided, comprising: a substrate; an epitaxial layer disposed on the substrate, the epitaxial layer comprising: a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack; the first semiconductor stack and the second semiconductor layer being heterogeneous structures and a two-dimensional electron gas being formed at their interface; a terminal layer comprising a source, a drain, and a gate disposed on the second semiconductor layer and spaced apart; a conductive layer disposed within the epitaxial layer and located between the substrate and the two-dimensional electron gas; an electrical coupling structure extending from the gate into the epitaxial layer and connected to the conductive layer for electrically coupling the conductive layer to the gate; and a high-resistance structure at least partially disposed between the conductive layer and the two-dimensional electron gas, and between the electrical coupling structure and the two-dimensional electron gas.

[0006] According to a second aspect of this disclosure, a method for manufacturing a HEMT device is provided, comprising the following steps: providing a substrate; forming an epitaxial layer on the substrate, the epitaxial layer comprising a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack; forming a two-dimensional electron gas at the interface between the first semiconductor stack and the second semiconductor layer; forming a conductive layer within the epitaxial layer and positioning it between the substrate and the two-dimensional electron gas; forming an electrically coupled structure and a high-resistivity structure within the epitaxial layer, the electrically coupled structure extending from outside the epitaxial layer into the epitaxial layer and connected to the conductive layer, the high-resistivity structure being at least partially disposed between the conductive layer and the two-dimensional electron gas, and between the electrically coupled structure and the two-dimensional electron gas; forming a terminal layer comprising a source, a drain, and a gate on the second semiconductor layer, and connecting the gate to the electrically coupled structure.

[0007] The HEMT device and its manufacturing method provided in this disclosure embodiment are described in that the HEMT device has a conductive layer that can be electrically coupled to the gate inside the device, and a high-resistance structure is used to isolate the conductive layer from the two-dimensional electron gas and the electrically coupled structure from the two-dimensional electron gas. This effectively reduces the electric field strength of the gate under high voltage through the conductive layer connected to the gate, thereby improving the breakdown voltage of the device. Attached Figure Description

[0008] The preferred embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. In the drawings:

[0009] Figure 1 This is a top view of the HEMT device provided in an embodiment of this disclosure;

[0010] Figure 2 for Figure 1 A cross-sectional view along line AA of the structure of a HEMT device;

[0011] Figure 3 for Figure 1 A cross-sectional view along the BB line of the structure of a HEMT device;

[0012] Figure 4 Showing Figure 1 The conductive layer and electrical coupling structure of the HEMT device shown are illustrated.

[0013] Figures 5a to 5i A manufacturing process diagram of the HEMT device according to Embodiment 1 of this disclosure is shown;

[0014] Figure 6 A cross-sectional structural schematic diagram of the HEMT device according to Embodiment 2 of this disclosure;

[0015] Figure 7 Showing Figure 6 The conductive layer and electrical coupling structure of the HEMT device shown are illustrated.

[0016] Figure 8 This is a cross-sectional structural diagram of the HEMT device according to Embodiment 3 of this disclosure;

[0017] Figure 9 Showing Figure 8 The conductive layer and electrical coupling structure of the HEMT device shown are illustrated.

[0018] Figure 10 This is a cross-sectional structural diagram of the HEMT device according to Embodiment 4 of this disclosure;

[0019] Figure 11 This is a cross-sectional structural diagram of the HEMT device according to Embodiment 5 of this disclosure.

[0020] In the accompanying drawings, the same parts use the same reference numerals. The drawings are not drawn to scale. Detailed Implementation

[0021] The present disclosure will now be further explained in conjunction with the accompanying drawings.

[0022] In the description of this application, "epitaxy growth" refers to growing a layer structure with certain requirements on a material to be treated. Technologies involving "epitaxy growth" may include metal-organic chemical vapor deposition (MOCVD), liquid phase epitaxy (LPE), vapor phase epitaxy (VPE), molecular beam epitaxy (MBE), atomic layer deposition (ALD), etc. Those skilled in the art can select an appropriate epitaxial growth technology based on the specific circumstances.

[0023] In the description of this application, "etching" should be understood in a broad sense, that is, growing a layer of photoresist on the surface of the material to be processed, selectively exposing and developing the photoresist through a mask to leave a photoresist layer on the surface of the material to be processed that is the same as the mask pattern, then selectively etching the material to be processed by chemical or physical methods, and finally peeling off the photoresist layer to form a structure on the material to be processed that corresponds to the mask pattern.

[0024] In the description of this application, "ion implantation" involves growing a layer of photoresist on the surface of a material to be treated, selectively exposing and developing the photoresist through a mask to leave a photoresist layer on the surface of the material to be treated that is identical to the mask pattern, then implanting charged ions into the material to be treated after accelerating them to a certain high energy, and finally peeling off the photoresist layer to form a structure corresponding to the mask pattern within the material to be treated. A negative consequence of ion implantation is that ion collisions can cause lattice breakage or damage to the material to be treated, thus requiring annealing to eliminate the breakage or damage.

[0025] In the description of this application, the orientation or positional relationship indicated by terms such as "upper" or "lower" is based on the orientation or positional relationship shown in the accompanying drawings and is only for the convenience of describing this disclosure and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure.

[0026] In the description of this application, except for Embodiment 1, the other embodiments are written in a manner that avoids repetition as much as possible, that is, focusing on the differences between each embodiment and other embodiments. In these embodiments, any technical features that are not explicitly described can be referred to the corresponding description in Embodiment 1.

[0027] Each embodiment of this disclosure provides a HEMT device, also known as a high electron mobility transistor, which has advantages such as high breakdown voltage and high conductivity. It can be used as a semiconductor power device or a semiconductor radio frequency device and has been widely used in base station communication, Internet of Things, aerospace and radar systems.

[0028] like Figure 1 , Figure 2 , Figure 3 , Figure 8 , Figure 10 and Figure 11 As shown, the HEMT device includes a substrate 1 and an epitaxial layer 2 disposed on the substrate 1.

[0029] For example, such as Figure 1 and Figure 2As shown, substrate 1 can be formed of silicon (Si), silicon carbide (SiC), or sapphire. The epitaxial layer 2 includes a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack. In some embodiments, the second semiconductor layer includes a barrier layer 204, the main material of which can be an alloy nitride, particularly aluminum gallium nitride (AlGaN), with a thickness of 5 nm-50 nm ("nm" stands for nanometer). The first semiconductor stack includes a buffer layer 202 and a channel layer 203 disposed on the buffer layer 202, wherein the main material of the channel layer 203 can be a group III-V nitride, particularly nitrogen nitride (GaN), with a thickness typically 100 nm-1000 nm. When the channel layer 203 comprises a group III-V nitride and the barrier layer 204 comprises an alloy nitride, the channel layer 203 and the barrier layer 204 are heterogeneous structures. Due to the large difference in polarization intensity and bandgap between them, a two-dimensional electron gas (2DEG) is formed at their interface. Both the channel layer 203 and the barrier layer 204 can be one or more layers. In some embodiments, the channel layer 203 comprises a 300nm high-resistivity gallium nitride layer and a 200nm high-temperature gallium nitride layer arranged along the direction away from the substrate 1, while the barrier layer 204 comprises a 1nm aluminum nitride layer, a 20nm aluminum gallium nitride layer, and a 2nm gallium nitride layer arranged along the direction away from the channel layer 203.

[0030] Exemplarily, the epitaxial layer 2 may further include a nucleation layer 201 disposed on the substrate 1, and a buffer layer 202 disposed on the nucleation layer 201. The nucleation layer 201 is formed of aluminum carbide (AlN) or gallium nitride (GaN), with a thickness of 10 nm-500 nm, and is used to improve the growth quality of the buffer layer 202 and has an isolation function. The buffer layer 202 is formed of iron-doped gallium nitride, carbon-doped gallium nitride, gallium nitride (GaN), or aluminum gallium nitride (AlGaN), with a thickness of 100 nm-10 μm, and is used to improve the growth quality of group III-V nitrides. The buffer layer 202 can be a single layer or multiple layers. When the substrate 1 is selected as silicon material, the buffer layer 202 is preferably a three-layer structure. The first layer is aluminum gallium nitride with an aluminum content of 75% and a total thickness of 400nm, the second layer is aluminum gallium nitride with an aluminum content of 50% and a total thickness of 900nm, and the third layer is aluminum gallium nitride with an aluminum content of 25% and a total thickness of 1500nm.

[0031] like Figure 1 , Figure 2 , Figure 3 , Figure 8 , Figure 10 and Figure 11 As shown, the HEMT device also includes a terminal layer disposed on the second semiconductor layer.

[0032] For example, such as Figure 1 and Figure 2 The HEMT device also includes a terminal layer disposed on the barrier layer 204. This terminal layer includes a gate 5, a drain 4, and a source 6 arranged at intervals. Both the source 6 and the drain 4 can be a single-layer or multi-layer structure. Exemplarily, the drain 4 and the source 6 may each include sequentially connected titanium (Ti) layers, aluminum (Al) layers, nickel (Ni) layers, and gold (Au) layers. The source 6 makes an ohmic contact with the barrier layer 204 and is electrically coupled to the two-dimensional electron gas. The drain 4 also makes an ohmic contact with the barrier layer 204 and is electrically coupled to the two-dimensional electron gas. The gate 5 mainly includes one or both of the nickel (Ni) and gold (Au) layers and makes a Schottky contact with the barrier layer 204. When using the HEMT device, changing the electric field of the gate 5 can modulate the two-dimensional electron gas and control the conduction and turn-off of the source 6 and the drain 4.

[0033] Exemplarily, the HEMT device further includes a passivation layer 9. The passivation layer 9 is disposed on the barrier layer 204 and provides clearance for the gate 5, drain 4, and source 6. Specifically, the passivation layer 9 has multiple clearance holes through which the gate 5, drain 4, and source 6 respectively pass, thereby providing insulating isolation between the gate 5, drain 4, and source 6 to prevent malfunctions in the HEMT device due to incorrect connection between terminals. The passivation layer 9 is manufactured from an insulating compound such as silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide.

[0034] like Figure 1 , Figure 2 , Figure 3 , Figure 8 , Figure 10 and Figure 11 As shown, the HEMT device also includes a conductive layer 7 disposed within the epitaxial layer 2 and located between the substrate 1 and the two-dimensional electron gas; and an electrical coupling structure 57 extending from the gate 5 into the epitaxial layer 2 and connected to the conductive layer 7 for coupling the conductive layer 7 to the gate 5.

[0035] For example, such as Figure 3 As shown, the electrically coupled destructure 57 can be a rod-shaped structure.

[0036] Based on this, in some implementations, such as Figure 3As shown, a passivation layer 9 is disposed on the second semiconductor layer, and the passivation layer 9 is located between the electrically coupled structure 57 and the source 6, and between the gate 5 and the drain 4. In other words, the passivation layer may have a clearance hole through which the electrically coupled structure 57 passes, such that one end of the electrically coupled structure 57 is located within the epitaxial layer 2 and connected to the connection region of the conductive layer 7, while the other end of the electrically coupled structure 57 is located outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The electrically coupled structure 57, which presents a rod-like structure, can not only realize the electrical coupling between the conductive layer 7 and the gate 5, but also uses a very simple structure. Exemplarily, the electrically coupled structure 57 is preferably perpendicular to the conductive layer 7 and is formed of metal, so as to be suitable for formation by epitaxial growth and etching. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0037] In some embodiments, the conductive layer 7 includes a first surface away from the substrate 1 and a second surface opposite to and close to the substrate 1, as well as side surfaces in contact with the first and second surfaces. The conductive layer 7 may be singular, and it intersects with the orthographic projection of the gate 5 onto the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and drain 4 can be connected via a two-dimensional electron gas. The conductive layer 7 can adjust the electric field distribution between the channel layer 203 and the barrier layer 204, reducing the peak electric field strength near the gate 5 and increasing the device's breakdown voltage, thereby improving the device's operating characteristics at high voltage, high power, and / or high frequency.

[0038] In other embodiments, since the peak electric field intensity occurs between and close to the gate 5 and the drain 4, the orthogonal projection of the conductive layer 7 on the substrate 1 is closer to the orthogonal projection of the drain 4 on the substrate 1 than the orthogonal projection of the gate 5 on the substrate 1. Thus, the conductive layer 7 can further reduce the peak electric field intensity near the gate 5 and further improve the breakdown voltage of the device.

[0039] In some embodiments, the conductive layer 7 is disposed in the channel layer 203.

[0040] In some embodiments, both the first surface and the second surface of the conductive layer 7 are located within the channel layer 203, thereby making the conductive layer 7 suitable for formation by ion implantation and tempering activation.

[0041] In other embodiments, the first surface of the conductive layer 7 is located within the channel layer 203, and the second surface of the conductive layer 7 is in contact with the interface between the buffer layer 202 and the channel layer 203. In this way, while ensuring that the conductive layer 7 is suitable for formation by epitaxial growth and etching, a conductive layer can be prepared before the channel layer 203 is grown, thereby simplifying the device fabrication process.

[0042] In other embodiments, the conductive layer 7 is disposed within the buffer layer, thereby enhancing the insulation between the conductive layer 7 and the two-dimensional electron gas by utilizing the insulating properties of the buffer layer. In some embodiments, to simplify the fabrication process of the conductive layer, the first surface of the conductive layer 7 is in contact with the side of the buffer layer 202 away from the substrate 1, and the second surface of the conductive layer 7 is located within the buffer layer 202. This makes the conductive layer 7 suitable for formation by ion implantation and tempering activation.

[0043] In some embodiments, the conductive layer 7 can be an easily molded rectangular shape, see details. Figure 4 The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm. Exemplarily, the conductive layer 7 can be a structure formed of metal, suitable for formation by epitaxial growth and etching. The metal is preferably one or more high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel. The dimension of the conductive layer 7 along the first direction (i.e., the arrangement direction from the source 6 to the drain 4) is larger than the dimension of the conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), making its structure flattened. This reduces the proportion of the conductive layer 7 occupying the epitaxial layer 2, such as the channel layer 203, effectively preventing a significant decrease in the two-dimensional electron gas concentration due to the excessive volume of the conductive layer 7, ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0044] like Figure 1 , Figure 2 , Figure 3 , Figure 8 , Figure 10 and Figure 11 As shown, the HEMT device also includes a high-resistivity structure 8, which is at least partially disposed between the conductive layer 7 and the two-dimensional electron gas, and between the electrically coupled structure 57 and the two-dimensional electron gas.

[0045] In some implementations, such as Figure 2 As shown, the high-resistivity structure 8 includes a first high-resistivity section 801, which is disposed above the conductive layer 7 to provide insulation between the conductive layer 7 and the two-dimensional electron gas. This can intercept the leakage current generated by the two-dimensional electron gas flowing into the conductive layer 7, thereby effectively reducing the risk of failure or damage to the HEMT device during high-voltage operation.

[0046] In some implementations, such as Figure 2 As shown, the first high-resistivity portion 801 is disposed above the conductive layer 7 to provide insulation between the conductive layer 7 and the two-dimensional electron gas. For example, please refer to [reference needed]. Figure 4It should be added that the first surface of the conductive layer 7 includes a connection region for connection with the electrical coupling structure 57, and the first high-resistivity portion 801 is disposed on the first surface of the conductive layer 7 excluding the connection region. The first high-resistivity portion 801 is manufactured from one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, and its thickness can be selected from 5nm to 1000nm to ensure that it is suitable for formation by epitaxial growth and etching methods.

[0047] In some embodiments, the high-resistivity structure 8 further includes a second high-resistivity portion 802 that encloses the electrically coupled structure 57. This second high-resistivity portion serves to insulate the electrically coupled structure 57 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas and flowing into the electrically coupled structure 57. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. The second high-resistivity portion 802 resembles a sleeve-like structure and is made of one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide. Its thickness can be selected from 5nm to 1000nm to ensure its suitability for formation by epitaxial growth and etching methods.

[0048] In other implementations, such as Figure 8 As shown, there are multiple conductive layers 7, and the multiple conductive layers 7 are spaced apart along a first direction (i.e., the arrangement direction from the source 6 to the drain 4).

[0049] In some implementations, please refer to [further details]. Figure 8 Each conductive layer 7 has the same size, and the total size of the multiple conductive layers 7 along the first direction is smaller than the size of a single conductive layer 7 along the second direction, where the second direction is the arrangement direction from the substrate 1 to the epitaxial layer 2. Based on this, there are also multiple electrical coupling structures 57, each of which is a rod-shaped body perpendicular to the corresponding conductive layer 7. One end of each electrical coupling structure 57 is connected to the connection region of the conductive layer 7, and the other end is connected to the gate 5.

[0050] In other embodiments, in order to reduce the number of electrically coupled structures, such as Figure 8 and Figure 9 As shown, the conductive layer 7 includes: a first conductive layer 701 spaced apart and a second conductive layer 702 connecting the spaced-apart first conductive layers 701. For example, the second conductive layer 702 is perpendicular to the first conductive layer 701. Thus, since the spaced-apart first conductive layers 701 are connected by the second conductive layer 702, only one electrical coupling structure 57 electrically coupled to the gate 5 is needed to achieve electrical coupling between the conductive layer 702 and the gate 5.

[0051] In other implementations, such as Figure 7 As shown, the first conductive layer 701 is spaced apart along a first direction, wherein the first direction is the arrangement direction from the source 6 to the drain 4.

[0052] In some implementations, such as Figure 7 As shown, the connection region of the conductive layer 7 is located on one of the plurality of first conductive layers 701; there is one electrical coupling structure 57, and one end of the electrical coupling structure 57 is connected to the first conductive layer 701 with the connection region, and the other end is connected to the gate 5.

[0053] In some implementations, such as Figure 7 As shown, the connection region is located on the extended region of the first conductive layer 701 that extends away from the second conductive layer 702.

[0054] In the above embodiments, by providing a conductive layer 7 that can be electrically coupled to the gate 5 inside the HEMT device, and by isolating the conductive layer 7 from the two-dimensional electron gas and the two-dimensional electron gas through a high-resistance structure 8, the electric field strength of the gate 5 under high voltage of the HEMT device can be effectively reduced through the conductive layer 7 connected to the gate 5, thereby improving the breakdown voltage of the device.

[0055] It should be added that the material of conductive layer 7 is a conductive doped semiconductor material or a metal material.

[0056] It should be noted that when the conductive layer 7 is mainly made of metal, the high-resistivity structure 8 can also prevent the conductive layer 7 from reacting with the ammonia gas used in the epitaxial growth process during subsequent device manufacturing processes, ensuring that it can successfully achieve the aforementioned effects.

[0057] In some implementations, such as Figure 2 As shown, the HEMT device may further include a gate field plate 11, which is located on the passivation layer 9 between the gate 5 and the drain 4. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field strength near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0058] In the above embodiments, by disposing a conductive layer 7, similar to a gate field plate, within the device and utilizing this conductive layer 7 to increase the device's breakdown voltage, the HEMT device achieves a higher breakdown voltage without using a gate field plate, and an even higher breakdown voltage when using a gate field plate. In fact, the conductive layer 7 can be connected to either the gate 5 or the source 6. However, since the potential of the source 6 is not as strong as that of the gate 5, and the peak electric field strength near the gate 5 is synchronized with the potential of the gate 5 but not with the potential of the source 6, the conductive layer 7 connected to the gate 5 must have a stronger and more precise ability to modulate the electric field near the gate. This is beneficial for ensuring a lower peak electric field strength near the gate 5 and a higher breakdown voltage of the device. When it is necessary to connect the conductive layer 7 to the source 6, the conductive layer connecting the source 6 can be directly extended to and connected to the conductive layer 7, so it is easy to realize in the manufacturing process. However, when it is necessary to connect the conductive layer 7 to the gate 5, the conductive layer 7 connecting the gate 5 is difficult to realize in the manufacturing process because the gate 5 has the problem of destroying the two-dimensional electron gas. After arduous research, the applicant discovered that an electrical coupling structure 57 passing through the barrier layer 204 and the channel layer 203 can be added to the device to connect the conductive layer 7 and the gate 5. At the same time, a high-resistance structure 8 can be added between the conductive layer 7 and the two-dimensional electron gas and between the electrical coupling structure 57 and the two-dimensional electron gas. This allows the high-resistance structure 8 to insulate the conductive layer 7 from the two-dimensional electron gas and the electrical coupling structure 57 from the two-dimensional electron gas. This can intercept the leakage current generated by the two-dimensional electron gas and flowing to the conductive layer 7 and the electrical coupling structure 57, effectively improving the breakdown voltage of the device and enabling the HEMT device to operate normally at a higher operating voltage.

[0059] Please combine Figure 1 , Figure 2 , Figure 3 , Figure 8 , Figure 10 and Figure 11 As shown in the embodiments, this disclosure also discloses a method for manufacturing a HEMT device, the method comprising the following steps:

[0060] Substrate 1 is provided;

[0061] An epitaxial layer 2 is formed on a substrate 1. The epitaxial layer 2 includes a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack. A two-dimensional electron gas is formed at the interface between the first semiconductor stack and the second semiconductor layer.

[0062] A conductive layer 7 is formed within the epitaxial layer 2 and positioned between the substrate 1 and the two-dimensional electron gas.

[0063] An electrical coupling structure 57 and a high-resistivity structure 8 are formed within the epitaxial layer 2. The electrical coupling structure 57 extends from the epitaxial layer 2 into the epitaxial layer 2 and is connected to the conductive layer 7. The high-resistivity structure 8 is at least partially disposed between the conductive layer 7 and the two-dimensional electron gas, and between the electrical coupling structure 57 and the two-dimensional electron gas.

[0064] A terminal layer including a source 6, a drain 4 and a gate 5 is formed on the second semiconductor layer, and the gate 5 is connected to the electrical coupling structure 57.

[0065] Thus, the HEMT device prepared by the above method can effectively reduce the electric field strength of the gate 5 under high voltage by setting a conductive layer 7 that can be electrically coupled to the gate 5 inside the device, and by isolating the conductive layer 7 from the two-dimensional electron gas and the two-dimensional electron gas by a high-resistivity structure 8, as well as the two-dimensional electron gas by the electrically coupled structure 57. This improves the breakdown voltage of the device.

[0066] In some embodiments, the first semiconductor stack includes: a buffer layer 202 adjacent to the substrate 1, and a channel layer 203 disposed on the buffer layer 202; forming a conductive layer 7 within the epitaxial layer 2 includes:

[0067] A conductive layer 7 is formed in the channel layer 203.

[0068] Thus, by placing the conductive layer 7 within the channel layer 203, the distance between the conductive layer 7 and the gate 5 can be reduced while ensuring that the conductive layer 7 is located below the two-dimensional electron gas.

[0069] In some embodiments, a conductive layer is formed in the channel layer, including:

[0070] A conductive material layer formed of a conductive doped semiconductor material or a metal material is grown on the buffer layer 202. The conductive material layer is etched to obtain a conductive layer 7 formed by the remaining conductive material layer.

[0071] or,

[0072] Conductive dopants are implanted into the channel layer 203 at a specific location and depth using ion implantation, and then tempered to activate them into a conductive layer 7.

[0073] Of course, such as Figure 11As shown, the method for setting the conductive layer 7 within the channel layer 203 is not limited to the ion implantation method described above. Alternatively, after the first epitaxial growth of the channel layer 203 reaches a certain height, a conductive material layer can be grown using the same sampling growth method, followed by etching to form the conductive layer 7. Then, a second epitaxial growth can be performed to create the remaining channel layer 203. Compared to this method, the process of implanting conductive dopants into the channel layer 203 at a specific location and depth using ion implantation, followed by tempering to activate them into the conductive layer 7, is simpler and less costly.

[0074] In other embodiments, the first semiconductor stack includes: a buffer layer 202 adjacent to the substrate 1, and a channel layer disposed on the buffer layer 202, wherein a conductive layer is formed within the epitaxial layer 2, including:

[0075] A conductive layer 7 is formed in the buffer layer 202.

[0076] In some embodiments, a conductive layer 7 is formed in the buffer layer 202, including:

[0077] Conductive dopants are implanted into the buffer layer 202 at a specific location and depth using ion implantation, followed by tempering to activate them into conductive layer 7. Similar to the embodiment formed in the channel layer 203 described above, the process of implanting conductive dopants into the buffer layer 202 at a specific location and depth using ion implantation, followed by tempering to activate them into conductive layer 7, is simpler and less costly.

[0078] Regarding the methods in the above embodiments, the specific manner in which each method is executed has been described in detail in the embodiments related to the device, and will not be elaborated here.

[0079] To further understand the HEMT device and its fabrication method provided in the embodiments of this disclosure, the following specific embodiments will further illustrate the above disclosure.

[0080] Example 1

[0081] This embodiment provides a HEMT device, also known as a high electron mobility transistor, which has advantages such as high breakdown voltage and high conductivity. It can be used as a semiconductor power device or a semiconductor radio frequency device and has been widely used in base station communication, Internet of Things, aerospace and radar systems.

[0082] like Figure 2 and Figure 3As shown, the HEMT device includes a substrate 1 and an epitaxial layer 2 disposed on the substrate 1. The substrate 1 can be formed of silicon (Si), silicon carbide (SiC), or sapphire. The epitaxial layer 2 includes a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack. The second semiconductor layer includes a barrier layer 204, the main material of which can be an alloy nitride, especially aluminum gallium nitride (AlGaN), with a thickness of 5nm-50nm ("nm" stands for nanometer). The first semiconductor stack includes a buffer layer 202 and a channel layer 203 disposed on the buffer layer 202, wherein the main material of the channel layer 203 can be a group III-V nitride, especially nitrogen nitride (GaN), with a thickness typically 100nm-1000nm. When the channel layer 203 comprises a group III-V nitride and the barrier layer 204 comprises an alloy nitride, the channel layer 203 and the barrier layer 204 are heterogeneous structures. Due to the large difference in polarization intensity and bandgap between them, a two-dimensional electron gas (2DEG) is formed at their interface. Both the channel layer 203 and the barrier layer 204 can be one or more layers. Preferably, the channel layer 203 comprises a 300nm high-resistivity gallium nitride layer and a 200nm high-temperature gallium nitride layer arranged along the direction away from the substrate 1, while the barrier layer 204 comprises a 1nm aluminum nitride layer, a 20nm aluminum gallium nitride layer, and a 2nm gallium nitride layer arranged along the direction away from the channel layer 203.

[0083] The epitaxial layer 2 may further include a nucleation layer 201 disposed on the substrate 1, and a buffer layer 202 disposed on the nucleation layer 201. The nucleation layer 201 is formed of aluminum carbide (AlN) or gallium nitride (GaN), with a thickness of 10 nm-500 nm, and is used to improve the growth quality of the buffer layer 202 and has an isolation function. The buffer layer 202 is formed of iron-doped gallium nitride, carbon-doped gallium nitride, gallium nitride (GaN), or aluminum gallium nitride (AlGaN), with a thickness of 100 nm-10 μm, and is used to improve the growth quality of group III-V nitrides. The buffer layer 202 can be a single layer or multiple layers. When the substrate 1 is selected as silicon material, the buffer layer 202 is preferably a three-layer structure. The first layer is aluminum gallium nitride with an aluminum content of 75% and a total thickness of 400nm, the second layer is aluminum gallium nitride with an aluminum content of 50% and a total thickness of 900nm, and the third layer is aluminum gallium nitride with an aluminum content of 25% and a total thickness of 1500nm.

[0084] HEMT devices also include a terminal layer primarily disposed on the barrier layer 204. The terminal layer includes a gate 5, a drain 4, and a source 6. Both the source 6 and drain 4 can be single-layer or multi-layer structures, preferably comprising sequentially connected titanium (Ti), aluminum (Al), nickel (Ni), and gold (Au) layers. The source 6 forms an ohmic contact with the barrier layer 204 and is electrically coupled to the two-dimensional electron gas. The drain 4 also forms an ohmic contact with the barrier layer 204 and is electrically coupled to the two-dimensional electron gas. The gate 5 primarily comprises one or both of the nickel (Ni) and gold (Au) layers and forms a Schottky contact with the barrier layer 204. When using HEMT devices, changing the electric field of the gate 5 can modulate the two-dimensional electron gas and control the conduction and cutoff of the source 6 and drain 4.

[0085] The HEMT device also includes a passivation layer 9. The passivation layer 9 is disposed on the barrier layer 204 and provides clearance for the gate 5, drain 4, and source 6. Specifically, the passivation layer 9 has multiple clearance holes through which the gate 5, drain 4, and source 6 pass, thus providing insulating isolation between the gate 5, drain 4, and source 6 to prevent malfunctions in the HEMT device due to incorrect connection between terminals. The passivation layer 9 is manufactured from an insulating compound including silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide.

[0086] like Figure 3 and Figure 4 As shown, the HEMT device also includes a conductive layer 7 disposed within the channel layer 203, and an electrical coupling structure 57 for electrically coupling the conductive layer 7 to the gate 5. The conductive layer 7 includes a first surface away from the substrate 1 and a second surface opposite to and close to the substrate 1, as well as side surfaces in contact with the first and second surfaces. One conductive layer 7 may be selected, and the conductive layer 7 intersects with the orthographic projection of the gate 5 onto the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and drain 4 can be connected by a two-dimensional electron gas. The conductive layer 7 can adjust the electric field distribution between the channel layer 203 and the barrier layer 204, reduce the peak electric field strength near the gate 5, and increase the breakdown voltage of the device, thereby improving the operating characteristics of the device at high voltage, high power, and / or high frequency. However, since the peak electric field intensity occurs between and close to the gate 5 and the drain 4, it is recommended that the orthogonal projection of the conductive layer 7 on the substrate 1 be closer to the orthogonal projection of the drain 4 on the substrate 1 than the orthogonal projection of the gate 5 on the substrate 1. This would allow the conductive layer 7 to further reduce the peak electric field intensity near the gate 5 and further improve the breakdown voltage of the device.

[0087] The first surface of the conductive layer 7 is located within the channel layer 203, and the second surface of the conductive layer 7 is in contact with the interface between the buffer layer 202 and the channel layer 203, to ensure that the conductive layer 7 is suitable for formation by epitaxial growth and etching. The conductive layer 7 is preferably a rectangular shape that is easy to form; see details below. Figure 4The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm, and can be a structure formed of metal, suitable for formation by epitaxial growth and etching. The metal is preferably one or more high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel. The dimension of the conductive layer 7 along the first direction (i.e., the arrangement direction from the source 6 to the drain 4) is larger than the dimension of the conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), making its structure flattened. This reduces the proportion of the conductive layer 7 occupying the channel layer 203, effectively preventing a significant decrease in the two-dimensional electron gas concentration due to the excessive volume of the conductive layer 7, and ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0088] The electrical coupling structure 57 is a rod-shaped structure. The passivation layer 9 also has clearance holes through which the electrical coupling structure 57 passes, such that one end of the electrical coupling structure 57 is located within the epitaxial layer 2 and connected to the connection region of the conductive layer 7, while the other end of the electrical coupling structure 57 is located outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The rod-shaped electrical coupling structure 57 not only achieves electrical coupling between the conductive layer 7 and the gate 5, but also uses a very simple structure. Preferably, the electrical coupling structure 57 is perpendicular to the conductive layer 7 and is formed of metal, so as to be suitable for formation by epitaxial growth and etching methods. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0089] The high-resistivity structure 8 includes a first high-resistivity portion 801 disposed above the conductive layer 7. This portion serves to insulate the conductive layer 7 from the two-dimensional electron gas, intercepting leakage current flowing into the conductive layer 7 from the two-dimensional electron gas. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. Furthermore, the high-resistivity structure 8 prevents the conductive layer 7 from reacting with the ammonia gas used in subsequent device manufacturing processes, especially during epitaxial growth, ensuring the aforementioned effects are achieved smoothly. Preferably, the first high-resistivity portion 801 is disposed on the first surface of the conductive layer 7, excluding the connection area. The first high-resistivity portion 801 is manufactured from one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm to ensure its suitability for formation via epitaxial growth and etching methods.

[0090] The high-resistivity structure 8 also includes a second high-resistivity portion 802 that encloses the electrically coupled structure 57. This portion serves to insulate the electrically coupled structure 57 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas and flowing into the electrically coupled structure 57. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. The second high-resistivity portion 802 resembles a sleeve-like structure and is made of one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide. Its thickness can be selected from 5nm to 1000nm to ensure its suitability for formation by epitaxial growth and etching methods.

[0091] HEMT devices may also include a gate field plate 11 disposed on the passivation layer 9 and connected to the gate 5. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field strength near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0092] The following describes the fabrication method for HEMT devices. The steps of this method include: providing substrate 1, as detailed in [link to documentation]. Figure 5a A nucleation layer 201 is grown on substrate 1; a buffer layer 202 is grown on nucleation layer 201, as detailed below. Figure 5b A conductive material layer formed of metallic material is grown on the buffer layer 202; the conductive material layer is etched to obtain a conductive layer 7 formed of the remaining conductive material layer; a high-resistivity material layer formed of insulating compound is grown on the buffer layer 202 and the conductive layer 7; the high-resistivity material layer is etched to obtain a first high-resistivity portion 801 of a high-resistivity structure 8 formed of the remaining high-resistivity material layer and located above the conductive layer 7; a channel layer 203 capable of covering the first high-resistivity portion 801 of the high-resistivity structure 8 is grown on the buffer layer 202; a barrier layer 204 is grown on the channel layer 203, see details. Figure 5d .

[0093] Next, the barrier layer 204, the channel layer 203, and the first high-resistivity portion 801 of the high-resistivity structure 8 are etched to create a first trench 57a that exposes the conductive layer 7. (See details...) Figure 5e Insulating material 9a is grown on barrier layer 204 and in the first slot 57a, as detailed in [reference needed]. Figure 5f The insulating material 9a on the barrier layer 204 is etched to create a source hole region, a gate hole region, and a drain hole region. A source 6, a gate 5, and a drain 4 are formed in the source hole region, gate hole region, and drain hole region, respectively, through growth, etching, and tempering. Simultaneously, a gate field plate 11 connecting the gate 5 is formed on the insulating material 9a. See details... Figure 5g By etching, holes are made in the insulating material 9a located inside and outside the first slot 57a to obtain a second slot 57b that is finer than the first slot 57a and allows the conductive layer 7 to be exposed. See details. Figure 5h Conductive material is grown within the second slot 57b, and then etched to obtain an electrically coupled structure 57 formed of the conductive material that connects the conductive layer 7 to the gate 5, a passivation layer 9 formed of the remaining insulating material 9a on the barrier layer 204, and a second high-resistance portion 802 for covering the high-resistance structure 8 of the electrically coupled structure 57. See details... Figure 5i .

[0094] Example 2

[0095] like Figure 6As shown, the HEMT device includes a substrate 1, an epitaxial layer 2 disposed on the substrate 1, and a terminal layer disposed on the epitaxial layer 2. The epitaxial layer 2 includes a nucleation layer 201 disposed on the substrate 1, a buffer layer 202 disposed on the nucleation layer 201, a channel layer 203 disposed on the buffer layer 202, and a barrier layer 204 disposed on the channel layer 203. The terminal layer is disposed on the barrier layer 204 and includes a gate 5 that makes a Schottky contact with the barrier layer 204, a source 6 that makes an ohmic contact with the barrier layer 204, and a drain 4 that makes an ohmic contact with the barrier layer 204. The HEMT device may also include a passivation layer 9 disposed on the barrier layer 204, and the passivation layer 9 has a plurality of clearance holes through which the gate 5, drain 4, and source 6 respectively pass.

[0096] like Figure 6 and Figure 7 As shown, the HEMT device further includes a conductive layer 7 disposed within the channel layer 203, and an electrical coupling structure 57 for electrically coupling the conductive layer 7 to the gate 5. The conductive layer 7 includes a first surface away from the substrate 1, and a second surface opposite to and close to the substrate 1. The conductive layer 7 includes first conductive layers 701 spaced apart along a first direction (i.e., the arrangement direction from the source 6 to the drain 4) and a second conductive layer 702 connecting the spaced-apart first conductive layers 701. A connection region in contact with the electrical coupling structure 57 is provided on one of the plurality of first conductive layers 701. Preferably, the connection region is located on an extension region of the first conductive layer 701 having the connection region extending away from the second conductive layer 702. More preferably, the second conductive layer 702 is perpendicular to the first conductive layer 701 to reduce manufacturing difficulty. The orthographic projection of at least one first conductive layer 701 on the substrate 1 intersects the orthographic projection of the gate 5 on the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and drain 4 can be connected by a two-dimensional electron gas. The conductive layer 7 mainly uses multiple first conductive layers 701 to uniformly adjust the electric field distribution between the channel layer 203 and the barrier layer 204. Compared with the HEMT device of Embodiment 1, the HEMT device with first conductive layer 701 and second conductive layer 702 can more effectively reduce the peak electric field intensity near the gate 5 and further improve the breakdown voltage of the device, improving the operating characteristics of the device under high voltage, high power and / or high frequency. However, since the peak electric field intensity occurs between and adjacent to the gate 5 and drain 4, it is recommended that the orthographic projection of the first conductive layer 701 closest to the drain 4 in the orthographic projection of the multiple first conductive layers 701 on the substrate 1 be closer to the orthographic projection of the drain 4 on the substrate 1 than the orthographic projection of the gate 5 on the substrate 1. Thus, the first conductive layer 701 closest to the drain 4 can better reduce the peak electric field intensity near the gate 5 and more effectively improve the breakdown voltage of the device.

[0097] The first surface of the conductive layer 7 is located within the channel layer 203, and the second surface of the conductive layer 7 is in contact with the surface of the buffer layer 202 away from the substrate 1, ensuring that the conductive layer 7 is suitable for formation by epitaxial growth and etching. Each first conductive layer 701 is preferably a rectangular body that is easy to form. The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm, and can be a structure formed of metal, suitable for formation by epitaxial growth and etching. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel. The dimension of each first conductive layer 701 along the first direction is larger than the dimension of the first conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), thereby reducing the proportion of the conductive layer 7 occupying the channel layer 203, effectively avoiding a significant decrease in the two-dimensional electron gas concentration, and ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0098] The electrical coupling structure 57 is a rod-shaped structure. The passivation layer 9 also has a clearance hole through which the electrical coupling structure 57 passes, such that one end of the electrical coupling structure 57 is located in the connection region of the epitaxial layer 2 and internally connected to the first conductive layer 701, while the other end of the electrical coupling structure 57 is located outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The rod-shaped electrical coupling structure 57 not only achieves electrical coupling between the conductive layer 7 and the gate 5, but also uses a very simple structure. Preferably, the electrical coupling structure 57 is perpendicular to the conductive layer 7 and is formed of metal, so as to be suitable for formation by epitaxial growth and etching. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0099] The high-resistance structure 8 includes a first high-resistance portion 801, which is disposed above the conductive layer 7. This portion serves to insulate the conductive layer 7 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas and flowing into the conductive layer 7. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. Furthermore, the high-resistance structure 8 prevents the conductive layer 7 from reacting with ammonia gas used in subsequent device manufacturing processes, especially during epitaxial growth, ensuring the aforementioned effects are achieved smoothly. Preferably, the first high-resistance portion 801 is disposed on the first surface of the conductive layer 7, excluding the connection area. The number of first high-resistance portions 801 can be one or more. When only one first high-resistance portion 801 is selected, it covers the entire first surface (i.e., the upper surface) of the first conductive layer 701, leaving only the connection area for the electrical coupling structure 57. When multiple first high-resistivity portions 801 are selected, one first high-resistivity portion 801 covers the first surface of the first conductive layer 701 with the connection area, leaving only the connection area for connecting the electrical coupling structure 57. Each remaining first high-resistivity portion 801 can independently cover the first surface of one first conductive layer 701. The first high-resistivity portion 801 is manufactured from one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm, suitable for formation by epitaxial growth and etching. The high-resistivity structure 8 also includes a second high-resistivity portion 802 encapsulating the electrical coupling structure 57, used to insulatingly isolate the electrical coupling structure 57 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas flowing to the electrical coupling structure 57, thereby effectively reducing the risk of failure or damage to the HEMT device during high-voltage operation. The second high-resistivity section 802 is made of one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, and its thickness can be selected from 5nm to 1000nm. It is suitable for formation by epitaxial growth and etching.

[0100] Preferably, the HEMT device may further include a gate field plate 11 disposed on the passivation layer 9 and connected to the gate 5. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field intensity near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0101] The following describes a method for manufacturing HEMT devices, which includes the following steps: providing a substrate 1; growing a nucleation layer 201 on the substrate 1; growing a buffer layer 202 on the nucleation layer 201; growing a conductive material layer formed of a metallic material on the buffer layer 202; etching the conductive material layer to obtain a conductive layer 7 formed of the remaining conductive material layer; growing a high-resistivity material layer formed of an insulating compound on the buffer layer 202 and the conductive layer 7; etching the high-resistivity material layer to obtain a first high-resistivity portion 801 of a high-resistivity structure 8 formed of the remaining high-resistivity material layer and located above the conductive layer 7; growing a channel layer 203 on the buffer layer 202 that covers the first high-resistivity portion 801 of the high-resistivity structure 8; and growing a barrier layer 204 on the channel layer 203.

[0102] Next, the barrier layer 204, the channel layer 203, and the first high-resistivity portion 801 of the high-resistivity structure 8 are etched to create a first trench 57a through which the conductive layer 7 is exposed (see [reference]). Figure 5e Insulating material is grown on the barrier layer 204 and in the first slot 57a; the insulating material on the barrier layer 204 is etched to create a source hole region, a gate hole region, and a drain hole region; a source 6, a gate 5, and a drain 4 are formed in the source hole region, the gate hole region, and the drain hole region respectively by growth, etching, and tempering, and a gate field plate 11 connecting the gate 5 is formed on the insulating material; the insulating material inside and outside the first slot 57a is etched to create a second slot 57b that is thinner than the first slot 57a and allows the conductive layer 7 to be exposed (see also...). Figure 5h ); a conductive material is grown in the second slot 57b, and then the conductive material is etched to obtain an electrically coupled structure 57 formed of the conductive material that connects the conductive layer 7 to the gate 5, a passivation layer 9 formed of the remaining insulating material and located on the barrier layer 204, and a second high-resistance portion 802 for covering the electrically coupled structure 57.

[0103] Example 3

[0104] like Figure 8 As shown, the HEMT device includes a substrate 1, an epitaxial layer 2 disposed on the substrate 1, and a terminal layer disposed on the epitaxial layer 2. The epitaxial layer 2 includes a nucleation layer 201 disposed on the substrate 1, a buffer layer 202 disposed on the nucleation layer 201, a channel layer 203 disposed on the buffer layer 202, and a barrier layer 204 disposed on the channel layer 203. The terminal layer is disposed on the barrier layer 204 and includes a gate 5 that makes a Schottky contact with the barrier layer 204, a source 6 that makes an ohmic contact with the barrier layer 204, and a drain 4 that makes an ohmic contact with the barrier layer 204. The HEMT device may also include a passivation layer 9 disposed on the barrier layer 204, and the passivation layer 9 has a plurality of clearance holes through which the gate 5, drain 4, and source 6 respectively pass.

[0105] The HEMT device also includes a plurality of conductive layers 7 of equal size disposed within the channel layer 203, and a plurality of electrical coupling structures 57 for electrically coupling each conductive layer 7 to the gate 5. The plurality of conductive layers 7 are spaced apart along a first direction, and each conductive layer 7 has a connection region for receiving the electrical coupling structure 57, as detailed below. Figure 9 The total size of each conductive layer 7 along the first direction (i.e., the arrangement direction from the source 6 to the drain 4) is smaller than the size of a single conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2). Each conductive layer 7 includes a first surface away from the substrate 1 and a second surface opposite to and close to the substrate 1. Among the plurality of conductive layers 7, at least one conductive layer 7 intersects with the orthographic projection of the gate 5 onto the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and the drain 4 can be connected by a two-dimensional electron gas. The conductive layers 7 can adjust the electric field distribution between the channel layer 203 and the barrier layer 204. Compared with a HEMT device with only one conductive layer, a HEMT device with multiple conductive layers 7 can more effectively reduce the peak electric field strength near the gate 5 and further improve the breakdown voltage of the device, thereby improving the operating characteristics of the device at high voltage, high power, and / or high frequency. However, since the peak electric field intensity occurs between and adjacent to the gate 5 and the drain 4, it is recommended that the orthogonal projection of the conductive layer 7 closest to the drain 4 in the orthogonal projection of the multiple conductive layers 7 on the substrate 1 be closer to the orthogonal projection of the drain 4 on the substrate 1 than the orthogonal projection of the gate 5 on the substrate 1. Thus, the first conductive layer 7 closest to the drain 4 can better reduce the peak electric field intensity near the gate 5 and more effectively improve the breakdown voltage of the device.

[0106] The first surface of the conductive layer 7 is located within the channel layer 203, and the second surface of the conductive layer 7 is in contact with the interface between the buffer layer 202 and the channel layer 203, ensuring that the conductive layer 7 is suitable for formation by epitaxial growth and etching. The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm, and can be a conductive doped semiconductor junction suitable for formation by epitaxial growth and etching. Each conductive doped semiconductor junction can be either an N-type doped semiconductor structure or a P-type doped semiconductor structure, especially a structure formed by silicon doped gallium nitride with a doping concentration of 1E18 / cm3. Because the conductive layer 7 uses a doped semiconductor material, it has high structural stability and will not react with gases (such as ammonia) in subsequent steps of the device manufacturing process, ensuring that it can effectively regulate the electric field. The size of the conductive layer 7 along the first direction is larger than the size of the conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), thereby reducing the proportion of the conductive layer 7 occupying the channel layer 203, effectively avoiding a significant decrease in the two-dimensional electron gas concentration, and ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0107] The electrical coupling structure 57 is a rod-shaped structure. The passivation layer 9 also has clearance holes through which the electrical coupling structures 57 pass, such that one end of the electrical coupling structure 57 is located in the connection region of the conductive layer 7 within the epitaxial layer 2, while the other end of the electrical coupling structure 57 is located outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The number of electrical coupling structures 57 is the same as that of the conductive layers 7, so that each conductive layer 7 can be connected to the gate 5 through an electrical coupling structure 57 perpendicular to it. The rod-shaped electrical coupling structure 57 not only achieves electrical coupling between the conductive layer 7 and the gate 5, but also has a very simple structure. Preferably, the electrical coupling structure 57 is perpendicular to the conductive layer 7 and is formed of metal, so as to be suitable for formation by epitaxial growth and etching methods. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0108] The high-resistivity structure 8 includes a first high-resistivity portion 801 disposed above the conductive layer 7. This portion serves to insulate the conductive layer 7 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas and flowing into the conductive layer 7. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. Furthermore, the high-resistivity structure 8 prevents the conductive layer 7 from reacting with the ammonia gas used in subsequent device manufacturing processes, especially during epitaxial growth, ensuring the aforementioned effects are achieved. The number of first high-resistivity portions 801 can be one or more. When only one first high-resistivity portion 801 is selected, it covers the first surface of all conductive layers 7 and leaves a connection area on each conductive layer 7 for connecting to the corresponding electrical coupling structure 57. When multiple first high-resistivity portions 801 are selected, each first high-resistivity portion 801 can independently cover one conductive layer 7 and leave a connection area on that conductive layer 7 for connecting to the electrical coupling structure 57. The first high-resistivity section 801 is made of one of silicon dioxide, silicon nitride, aluminum nitride and aluminum oxide, and its thickness can be selected from 5nm to 1000nm. It is suitable for formation by epitaxial growth and etching.

[0109] The high-resistivity structure 8 also includes a second high-resistivity section 802 that encloses the electrically coupled structure 57 (see [reference]). Figure 3The first high-resistivity portion 801 is used to insulate the electrically coupled structure 57 from the two-dimensional electron gas, intercepting the leakage current generated by the two-dimensional electron gas and flowing into the electrically coupled structure 57. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. The number of second high-resistivity portions 802 can be one or more. When there is only one second high-resistivity portion 802, it encloses all the electrically coupled structures 57. When there are multiple second high-resistivity portions 802, each first high-resistivity portion 801 can independently enclose one electrically coupled structure 57, ensuring that each electrically coupled structure 57 is enclosed by one second high-resistivity portion 802. The second high-resistivity portion 802 is made of one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm, suitable for formation by epitaxial growth and etching methods.

[0110] HEMT devices may also include a gate field plate 11 disposed on the passivation layer 9 and connected to the gate 5. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field strength near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0111] The following describes a method for manufacturing HEMT devices. This method includes the following steps: providing a substrate 1; growing a nucleation layer 201 on the substrate 1; growing a buffer layer 202 on the nucleation layer 201; growing a conductive material layer formed of a conductive doped semiconductor material on the buffer layer 202; growing a high-resistivity material layer formed of an insulating compound on the conductive material layer; etching the conductive material layer and the high-resistivity material layer to obtain a conductive layer 7 formed of the remaining conductive material layer and a first high-resistivity portion 801 of a high-resistivity structure 8 formed of the remaining high-resistivity material layer and located above the conductive layer 7; growing a channel layer 203 on the buffer layer 202 that covers the conductive layer 7 and the first high-resistivity portion 801; growing a barrier layer 204 on the channel layer 203; and creating openings in the barrier layer 204, the channel layer 203, and the first high-resistivity portion 801 of the high-resistivity structure 8 by etching to obtain a first trench 57a exposing the conductive layer 7 (see [reference]). Figure 5e ).

[0112] Next, insulating material is grown on the barrier layer 204 and in the first slot 57a; the insulating material on the barrier layer 204 is etched to create a source hole region, a gate hole region, and a drain hole region; the source 6, gate 5, and drain 4 are formed in the source hole region, gate hole region, and drain hole region respectively through growth, etching, and tempering, while a gate field plate 11 connecting the gate 5 is formed on the insulating material; the insulating material inside and outside the first slot 57a is etched to create a second slot 57b that is finer than the first slot 57a and allows the conductive layer 7 to be exposed (see...). Figure 5h );

[0113] Subsequently, a conductive material is grown in the second slot 57b, and then the conductive material is etched to obtain an electrically coupled structure 57 formed of the conductive material that connects the conductive layer 7 to the gate 5, a passivation layer 9 formed of the remaining insulating material and located on the barrier layer 204, and a second high-resistance portion 802 formed of the remaining insulating material for covering the electrically coupled structure 57.

[0114] Example 4

[0115] like Figure 10 As shown, the HEMT device includes a substrate 1, an epitaxial layer 2 disposed on the substrate 1, and a terminal layer disposed on the epitaxial layer 2. The epitaxial layer 2 includes a nucleation layer 201 disposed on the substrate 1, a buffer layer 202 disposed on the nucleation layer 201, a channel layer 203 disposed on the buffer layer 202, and a barrier layer 204 disposed on the channel layer 203. The terminal layer is disposed on the barrier layer 204 and includes a gate 5 that makes a Schottky contact with the barrier layer 204, a source 6 that makes an ohmic contact with the barrier layer 204, and a drain 4 that makes an ohmic contact with the barrier layer 204. The HEMT device may also include a passivation layer 9 disposed on the barrier layer 204, and the passivation layer 9 has a plurality of clearance holes through which the gate 5, drain 4, and source 6 respectively pass.

[0116] The HEMT device also includes a conductive layer 7 disposed within the channel layer 203, and an electrical coupling structure 57 for electrically coupling the conductive layer 7 to the gate 5. The conductive layer 7 includes a first surface away from the substrate 1 and a second surface opposite to and close to the substrate 1. One conductive layer 7 may be selected, and the conductive layer 7 intersects with the orthographic projection of the gate 5 onto the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and drain 4 can be connected by a two-dimensional electron gas. The conductive layer 7 can adjust the electric field distribution between the channel layer 203 and the barrier layer 204, reduce the peak electric field strength near the gate 5, and increase the breakdown voltage of the device, thereby improving the operating characteristics of the device at high voltage, high power, and / or high frequency. However, since the peak electric field intensity occurs between and close to the gate 5 and the drain 4, it is recommended that the orthogonal projection of the conductive layer 7 on the substrate 1 be closer to the orthogonal projection of the drain 4 on the substrate 1 than the orthogonal projection of the gate 5 on the substrate 1. This would allow the conductive layer 7 to further reduce the peak electric field intensity near the gate 5 and further improve the breakdown voltage of the device.

[0117] The first surface of the conductive layer 7 is located within the channel layer 203, and the second surface of the conductive layer 7 is also located within the channel layer 203, ensuring that the conductive layer 7 is suitable for formation by ion implantation and tempering activation. The conductive layer 7 is preferably a rectangular body that is easy to form. The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm, and can be a conductive doped semiconductor structure suitable for formation by ion implantation and tempering activation. The conductive doped semiconductor junction can be either an N-type doped semiconductor structure or a P-type doped semiconductor structure, particularly a structure formed by silicon doped gallium nitride with a doping concentration of 5E17 / cm3. The dimension of the conductive layer 7 along the first direction (i.e., the arrangement direction from the source 6 to the drain 4) is larger than the dimension of the conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), thereby reducing the occupancy ratio of the conductive layer 7 in the channel layer 203, effectively preventing a significant decrease in the two-dimensional electron gas concentration, and ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0118] The electrical coupling structure 57 is a rod-shaped structure. The passivation layer 9 also has a clearance hole through which the electrical coupling structure 57 passes, so that one end of the electrical coupling structure 57 is inside the epitaxial layer 2 and connected to the connection region of the conductive layer 7, while the other end of the electrical coupling structure 57 is outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The rod-shaped electrical coupling structure 57 not only achieves electrical coupling between the conductive layer 7 and the gate 5, but also uses a very simple structure, which can be referred to as [reference needed]. Figure 4 Preferably, the electrical coupling structure 57 is perpendicular to the conductive layer 7 and is formed of metal to facilitate formation by epitaxial growth and etching. The metal is preferably one or more high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0119] The high-resistivity structure 8 includes a first high-resistivity portion 801 disposed above the conductive layer 7, used to insulatingly isolate the conductive layer 7 from the two-dimensional electron gas. The first high-resistivity portion 801 can be made of a high-resistivity doped semiconductor structure such as boron-doped gallium nitride, with a thickness of 5nm-1000nm, suitable for formation via ion implantation and tempering activation. Preferably, the first high-resistivity portion 801 is disposed on the first surface of the conductive layer 7, excluding the connection region. Preferably, the first high-resistivity portion 801 is a structure formed of boron-doped gallium nitride with a doping concentration of 5E17 / cm³. Since high-resistivity dopants such as boron ions can disrupt the crystal lattice within the semiconductor structure to achieve high resistance, and utilize this high-resistivity characteristic to block leakage current generated by the two-dimensional electron gas flowing into the conductive layer 7, the risk of failure or damage to the HEMT device during high-voltage operation can be effectively reduced.

[0120] The high-resistivity structure 8 also includes a second high-resistivity portion 802 that encloses the electrically coupled structure 57. This second high-resistivity portion 802 is used to insulate the electrically coupled structure 57 from the two-dimensional electron gas, intercepting leakage current generated by the two-dimensional electron gas and flowing into the electrically coupled structure 57. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. The second high-resistivity portion 802 is made of one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm, and is suitable for formation by epitaxial growth and etching methods.

[0121] HEMT devices may also include a gate field plate 11 disposed on the passivation layer 9 and connected to the gate 5. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field strength near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0122] The following describes the fabrication method of HEMT devices. The steps of this method include: providing a substrate 1; growing a nucleation layer 201 on the substrate 1; growing a buffer layer 202 on the nucleation layer 201; growing a channel layer 203 on the buffer layer 202; growing a barrier layer 204 on the channel layer 203; implanting a conductive dopant into the channel layer 203 at a specific location and depth using ion implantation to obtain a conductive doped region; activating the conductive doped region by tempering to form a conductive layer 7; implanting a high-resistivity dopant into the channel layer 203 at a specific location and depth using ion implantation to obtain a high-resistivity doped region above the conductive doped region; activating the high-resistivity doped region by tempering to form a first high-resistivity portion 801 of a high-resistivity structure 8; and creating openings in the barrier layer 204, the channel layer 203, and the first high-resistivity portion 801 of the high-resistivity structure 8 by etching to obtain a first trench 57a exposing the conductive layer 7 (see [reference]). Figure 5e ).

[0123] Next, insulating material is grown on the barrier layer 204 and in the first slot 57a; the insulating material in the barrier layer 204 is etched to create a source hole region, a gate hole region, and a drain hole region; the source 6, gate 5, and drain 4 are formed in the source hole region, gate hole region, and drain hole region respectively through growth, etching, and tempering, while a gate field plate 11 connecting the gate 5 is formed on the insulating material; the insulating material inside and outside the first slot 57a is etched to create a second slot 57b that is finer than the first slot 57a and allows the conductive layer 7 to be exposed (see...). Figure 5hConductive material is grown in the second slot 57b and etched to obtain an electrically coupled structure 57 formed of conductive material that connects the conductive layer 7 to the gate 5, a passivation layer 9 formed of the remaining insulating material and located on the barrier layer 204, and a second high-resistance portion 802 for covering the electrically coupled structure 57.

[0124] Example 5

[0125] like Figure 11 As shown, the HEMT device includes a substrate 1, an epitaxial layer 2 disposed on the substrate 1, and a terminal layer disposed on the epitaxial layer 2. The epitaxial layer 2 includes a nucleation layer 201 disposed on the substrate 1, a buffer layer 202 disposed on the nucleation layer 201, a high-resistivity layer disposed on the buffer layer 202, a channel layer 203 disposed on the high-resistivity layer, and a barrier layer 204 disposed on the channel layer 203. The terminal layer is disposed on the barrier layer 204 and includes a gate 5 that makes a Schottky contact with the barrier layer 204, a source 6 that makes an ohmic contact with the barrier layer 204, and a drain 4 that makes an ohmic contact with the barrier layer 204. The HEMT device may also include a passivation layer 9 disposed on the barrier layer 204, and the passivation layer 9 has a plurality of clearance holes through which the gate 5, drain 4, and source 6 respectively pass.

[0126] The HEMT device also includes a conductive layer 7 disposed within a buffer layer 202, and an electrical coupling structure 57 for electrically coupling the conductive layer 7 to a gate 5. The conductive layer 7 includes a first surface away from the substrate 1 and a second surface opposite to and close to the substrate 1. One conductive layer 7 may be selected, and the conductive layer 7 intersects with the orthographic projection of the gate 5 onto the substrate 1. When a potential is applied to the gate 5 of the HEMT device, the source 6 and drain 4 can be connected by a two-dimensional electron gas. The conductive layer 7 can adjust the electric field distribution between the channel layer 203 and the barrier layer 204, reducing the peak electric field strength near the gate 5 and increasing the breakdown voltage of the device, thereby improving the operating characteristics of the device at high voltage, high power, and / or high frequency. However, since the peak electric field strength occurs between and close to the gate 5 and drain 4, it is recommended that the orthographic projection of the conductive layer 7 onto the substrate 1 be closer to the orthographic projection of the drain 4 onto the substrate 1 than the orthographic projection of the gate 5 onto the substrate 1. This would further reduce the peak electric field strength near the gate 5 and further increase the breakdown voltage of the device.

[0127] The first surface of the conductive layer 7 is in contact with the side of the buffer layer 202 away from the substrate, and the second surface of the conductive layer 7 is located within the buffer layer 202 to ensure that the conductive layer 7 is suitable for formation by ion implantation and tempering activation. The conductive layer 7 is preferably a rectangular body that is easy to form. The thickness of the conductive layer 7 is 10nm-1000nm, preferably 100nm, and can be a conductive doped semiconductor structure suitable for formation by ion implantation and tempering activation. The conductive doped semiconductor junction can be either an N-type doped semiconductor structure or a P-type doped semiconductor structure, especially a structure formed by silicon doped gallium nitride with a doping concentration of 5E17 / cm3. The dimension of the conductive layer 7 along the first direction (i.e., the arrangement direction from the source 6 to the drain 4) is larger than the dimension of the conductive layer 7 along the second direction (i.e., the arrangement direction from the substrate 1 to the epitaxial layer 2), thereby reducing the occupancy ratio of the conductive layer 7 on the channel layer 203, effectively avoiding a significant decrease in the two-dimensional electron gas concentration, and ensuring that the switching characteristics of the HEMT device remain useful and efficient.

[0128] The electrical coupling structure 57 is a rod-shaped structure. The passivation layer 9 also has a clearance hole through which the electrical coupling structure 57 passes, such that one end of the electrical coupling structure 57 is located inside the epitaxial layer 2 and connected to the connection region of the conductive layer 7, while the other end of the electrical coupling structure 57 is located outside the epitaxial layer 2 and connected to the side of the gate 5 facing the drain 4. The rod-shaped electrical coupling structure 57 not only achieves electrical coupling between the conductive layer 7 and the gate 5, but also uses a very simple structure. Preferably, the electrical coupling structure 57 is perpendicular to the conductive layer 7 and is formed of metal, so as to be suitable for formation by epitaxial growth and etching. The metal is preferably one or more of high-temperature resistant materials such as tungsten, molybdenum, tantalum, and nickel.

[0129] The high-resistivity structure 8 includes a first high-resistivity portion 801 (high-resistivity layer) formed by a high-resistivity layer, which covers the first surface of the conductive layer 7 and leaves a connection area for the conductive layer 7. The first high-resistivity portion 801 is used to insulatingly isolate the conductive layer 7 from the two-dimensional electron gas and intercept the leakage current generated by the two-dimensional electron gas flowing into the conductive layer 7, thereby effectively reducing the risk of failure or damage to the HEMT device during high-voltage operation. The first high-resistivity portion 801 is selected as a whole-layer structure, so the projected area of ​​the first high-resistivity portion 801 on the substrate 1 is much larger than the projected area of ​​the conductive layer 7 on the substrate 1, which can effectively isolate the conductive layer 7 from the two-dimensional electron gas. Also because the first high-resistivity portion 801 is selected as a whole-layer structure, the first high-resistivity portion 801 includes a lower surface that is in contact with the side of the buffer layer 202 away from the substrate 1, and an upper surface that is in contact with the side of the channel layer 203 close to the substrate 1. The first high-resistivity portion 801 is manufactured from an insulating compound such as silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm. It is suitable for formation via epitaxial growth, simplifying the fabrication process. Preferably, the first high-resistivity portion 801 is formed from boron-doped gallium nitride with a doping concentration of 5E17 / cm³. It should be noted that in other embodiments, the first high-resistivity portion 801 of the high-resistivity structure 8 can also be a non-integral structure, such as a non-integral structure like that in Embodiment 3, which only covers the conductive layer 7.

[0130] The high-resistivity structure 8 also includes a second high-resistivity section 802 that encloses the electrically coupled structure 57 (see reference). Figure 3 This section serves to insulate the electrically coupled structure 57 from the two-dimensional electron gas, intercepting the leakage current generated by the two-dimensional electron gas and flowing into the electrically coupled structure 57. This effectively reduces the risk of failure or damage to the HEMT device during high-voltage operation. The second high-resistivity section 802 is manufactured from one of silicon dioxide, silicon nitride, aluminum nitride, and aluminum oxide, with a thickness selectable from 5nm to 1000nm, suitable for formation via epitaxial growth and etching methods.

[0131] HEMT devices may also include a gate field plate 11 disposed on the passivation layer 9 and connected to the gate 5. The gate field plate 11 can assist the conductive layer 7 in adjusting the electric field distribution between the channel layer 203 and the barrier layer 204, further reducing the peak electric field strength near the gate 5, thereby significantly improving the breakdown voltage of the device.

[0132] The following describes the fabrication method of HEMT devices. The steps of this method include: providing a substrate 1; growing a nucleation layer 201 on the substrate 1; growing a buffer layer 202 on the nucleation layer 201; implanting a conductive dopant into the buffer layer 202 at a specific location and depth using ion implantation to obtain a conductive doped region; activating the conductive doped region by tempering to form a conductive layer 7; growing a high-resistivity layer on the buffer layer 202; growing a channel layer 203 on the high-resistivity layer; growing a barrier layer 204 on the channel layer 203; and creating openings in the barrier layer 204, channel layer 203, and high-resistivity layer using etching to obtain a first trench 57a exposing the conductive layer 7 (see [reference]). Figure 5e Insulating material is grown on the barrier layer 204 and in the first slot 57a.

[0133] Next, the insulating material in the barrier layer 204 is etched to create a source hole region, a gate hole region, and a drain hole region. A source 6, a gate 5, and a drain 4 are formed in the source hole region, gate hole region, and drain hole region, respectively, through growth, etching, and tempering. Simultaneously, a gate field plate 11 connecting the gate 5 is formed on the insulating material. The insulating material inside and outside the first slot 57a is etched to create a second slot 57b, which is finer than the first slot 57a and allows the conductive layer 7 to pass through (see [link to documentation]). Figure 5h Conductive material is grown in the second slot 57b and etched to obtain an electrically coupled structure 57 formed of conductive material that connects the conductive layer 7 to the gate 5, a passivation layer 9 formed of insulating material on the barrier layer 204, and a second high-resistance portion 802 for covering the electrically coupled structure 57.

[0134] The above description is merely a preferred embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any person skilled in the art can easily make changes or variations within the technical scope disclosed in this disclosure, and such changes or variations should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims. As long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. This disclosure is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A HEMT device, characterized by, include: Substrate; An epitaxial layer disposed on a substrate, the epitaxial layer comprising: a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack; a two-dimensional electron gas is formed at the interface between the first semiconductor stack and the second semiconductor layer; A terminal layer, comprising a source, a drain, and a gate disposed on and spaced apart on a second semiconductor layer; A conductive layer is disposed within the epitaxial layer and located between the substrate and the two-dimensional electron gas, wherein the orthographic projection of the conductive layer on the substrate intersects the orthographic projection of the gate on the substrate; An electrically coupled structure extends from the gate into the epitaxial layer and is connected to the conductive layer for electrically coupling the conductive layer to the gate; A high-resistivity structure is disposed at least partially between the conductive layer and the two-dimensional electron gas, and between the electrically coupled structure and the two-dimensional electron gas.

2. The HEMT device of claim 1, wherein, The high-resistance structure includes: A first high-resistivity section is disposed above the conductive layer to provide insulation between the conductive layer and the two-dimensional electron gas. The second high-resistivity section encloses the electrically coupled structure and serves to provide insulating isolation between the electrically coupled structure and the two-dimensional electron gas.

3. The HEMT device of claim 2, wherein, The conductive layer includes a first surface away from the substrate and a second surface close to the substrate, wherein the first surface includes a connection region for connection with the electrically coupled structure, and the first high-resistivity portion is disposed on the first surface of the conductive layer other than the connection region.

4. The HEMT device according to claim 3, characterized in that, The first semiconductor stack includes: a buffer layer close to the substrate, and a channel layer disposed on the buffer layer; The conductive layer is disposed in the channel layer.

5. The HEMT device according to claim 4, characterized in that, Both the first surface and the second surface of the conductive layer are located within the channel layer; or, The first surface of the conductive layer is located within the channel layer, and the second surface of the conductive layer is in contact with the interface between the buffer layer and the channel layer.

6. The HEMT device of claim 3, wherein, The first semiconductor stack includes: a buffer layer close to the substrate, and a channel layer disposed on the buffer layer; The conductive layer is disposed in the buffer layer.

7. The HEMT device of claim 6, wherein, The first surface of the conductive layer is in contact with the side of the buffer layer away from the substrate, and the second surface of the conductive layer is located within the buffer layer.

8. The HEMT device of claim 7, wherein, The first high-resistivity portion covers the first surface of the conductive layer, and the projected area of ​​the first high-resistivity portion on the substrate is greater than the projected area of ​​the conductive layer on the substrate.

9. The HEMT device of claim 8, wherein, The first high-resistivity portion includes an upper surface and a lower surface. The lower surface of the first high-resistivity portion is in contact with the side of the buffer layer away from the substrate, and the upper surface of the first high-resistivity portion is in contact with the side of the channel layer close to the substrate.

10. The HEMT device of any one of claims 3 to 9, wherein, The conductive layer is rectangular.

11. The HEMT device of claim 10, wherein, The conductive layer is a single layer, and the dimension of the conductive layer along the first direction is larger than the dimension of the conductive layer along the second direction, wherein the first direction is the arrangement direction from the source to the drain, and the second direction is the arrangement direction from the substrate to the epitaxial layer.

12. The HEMT device according to claim 11, characterized in that, The electrical coupling structure is a rod-shaped structure perpendicular to the conductive layer, with one end of the electrical coupling structure connected to the connection region and the other end of the electrical coupling structure connected to the gate.

13. The HEMT device of claim 10, wherein, There are multiple conductive layers, and the multiple conductive layers are spaced apart along a first direction, which is the arrangement direction from the source to the drain.

14. The HEMT device of claim 13, wherein, Each of the conductive layers has the same size, and the total size of the plurality of conductive layers along the first direction is smaller than the size of a single conductive layer along the second direction, wherein the second direction is the arrangement direction from the substrate to the epitaxial layer.

15. The HEMT device of claim 13, wherein, The electrical coupling structure comprises multiple structures, each of which is a rod-shaped body perpendicular to the corresponding conductive layer. One end of each electrical coupling structure is connected to the connection region of the corresponding conductive layer, and the other end is connected to the gate.

16. The HEMT device of any one of claims 3 to 9, wherein, The conductive layer includes: a first conductive layer spaced apart and a second conductive layer connecting the spaced-apart first conductive layers.

17. The HEMT device of claim 16, wherein, The second conductive layer and the first conductive layer are perpendicular to each other in a plane parallel to the substrate.

18. The HEMT device of claim 17, wherein, The first conductive layer is spaced apart along a first direction, wherein the first direction is the arrangement direction from the source to the drain.

19. The HEMT device of claim 16, wherein, The connection region of the conductive layer is located on one of the plurality of first conductive layers; there is one electrical coupling structure, and one end of the electrical coupling structure is connected to the first conductive layer having the connection region, and the other end is connected to the gate.

20. The HEMT device of claim 19, wherein, The connection region is located on the extended region of the first conductive layer that extends away from the second conductive layer.

21. The HEMT device of claim 3, wherein, The conductive layer is made of a conductive doped semiconductor material or a metallic material.

22. The HEMT device of any one of claims 3 to 9, wherein, The first high-resistivity section is formed of an insulating compound.

23. The HEMT device of claim 22, wherein, The thickness of the first high-resistivity section is 5nm-1000nm.

24. The HEMT device of claim 1, wherein, The HEMT device further includes: A passivation layer is disposed on the second semiconductor layer, and the passivation layer is located between the electrically coupled structure and the source, and between the gate and the drain.

25. The HEMT device of claim 24, wherein, The HEMT device further includes: A gate field plate is located on the passivation layer between the gate and the drain, connected to the gate and disposed on the second semiconductor layer; one end of the electrical coupling structure is connected to the side of the gate facing the drain.

26. A method for manufacturing a HEMT device, characterized in that, Includes the following steps: Provide substrate; An epitaxial layer is formed on the substrate, the epitaxial layer comprising a first semiconductor stack and a second semiconductor layer disposed on the first semiconductor stack; a two-dimensional electron gas is formed at the interface between the first semiconductor stack and the second semiconductor layer. A conductive layer is formed within the epitaxial layer and positioned between the substrate and the two-dimensional electron gas, wherein the orthographic projection of the conductive layer on the substrate intersects the orthographic projection of the gate on the substrate; An electrical coupling structure and a high-resistivity structure are formed within the epitaxial layer. The electrical coupling structure extends from the outside of the epitaxial layer into the epitaxial layer and is connected to the conductive layer. The high-resistivity structure is at least partially disposed between the conductive layer and the two-dimensional electron gas, and between the electrical coupling structure and the two-dimensional electron gas. A terminal layer including a source, a drain, and a gate is formed on the second semiconductor layer, and the gate is connected to an electrically coupled structure.

27. The method of claim 26, wherein, The first semiconductor stack includes: a buffer layer adjacent to the substrate, and a channel layer disposed on the buffer layer, wherein forming a conductive layer within the epitaxial layer includes: The conductive layer is formed in the channel layer.

28. The method of claim 27, wherein, The formation of the conductive layer in the channel layer includes: A conductive material layer formed of a conductive doped semiconductor material or a metal material is grown on the buffer layer, and the conductive material layer is etched to obtain a conductive layer formed by the remaining conductive material layer. or, Conductive dopants are implanted into the channel layer at a specific location and depth using ion implantation, followed by tempering to activate them into the conductive layer.

29. The method of claim 27, wherein, The first semiconductor stack includes: a buffer layer adjacent to the substrate, and a channel layer disposed on the buffer layer, wherein forming a conductive layer within the epitaxial layer includes: A conductive layer is formed in the buffer layer.

30. The method of claim 28, wherein, The formation of the conductive layer in the buffer layer includes: Conductive dopants are implanted into the buffer layer at a specific location and depth using ion implantation, followed by tempering to activate them into the conductive layer.

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