Wafer level packaging method of a filter
By employing a secondary exposure and development process using a single-layer positive photoresist dry film, the problems of interface peeling and device damage in surface acoustic wave filter packaging have been solved, achieving high-reliability and high-efficiency wafer-level packaging.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
- Filing Date
- 2022-10-31
- Publication Date
- 2026-05-05
AI Technical Summary
In existing surface acoustic wave (SAW) filter packaging, interface peeling is prone to occur between multiple packaging layers, affecting reliability, and the etching process may damage device performance.
Wafer-level packaging is achieved by using a single-layer positive photoresist dry film. Cavities and vias are formed through secondary exposure and development, avoiding the interface delamination problem of multi-layer materials and simplifying the process flow.
It improves device reliability, simplifies the process flow, reduces costs, avoids damage to device performance, and is suitable for high-efficiency wafer-level packaging.
Smart Images

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Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of semiconductor packaging, and specifically relates to a wafer-level packaging method for filters. Background Technology
[0002] Surface acoustic wave (SAW) filters combine low insertion loss and excellent suppression performance, enabling wide bandwidth and small size. They are widely used in signal receiver front-ends, duplexers, and receiver filters. When packaging SAW filter products, a cavity structure design must be ensured, meaning that the functional areas of the chip cannot come into contact with any material; otherwise, the transmission of surface waves will be affected, thus impacting product performance.
[0003] In existing surface acoustic wave (SAW) filter packaging, multiple packaging layers need to be stacked sequentially on the chip and etched multiple times to form the cavity structure and interconnects. For example, a first packaging layer is stacked on the chip and etched to form a via, with the first packaging layer serving as the wall of the cavity; then a second packaging layer is stacked to cover the top of the via, serving as the top of the cavity, thus sealing it and forming the cavity, followed by etching of vertical vias for the interconnects. On the one hand, there are contact and adhesive interfaces between the multiple packaging layers. When the interfacial bonding strength between two layers is less than the stress it can withstand, interface delamination will occur, leading to delamination between the two layers and causing reliability failure of the packaged product. On the other hand, the etching process of the packaging layers on the chip surface can easily damage the device, affecting its performance. Summary of the Invention
[0004] This invention addresses the shortcomings of existing technologies by providing a wafer-level packaging method for filters.
[0005] To achieve the above objectives, the technical solution of the present invention is as follows:
[0006] A wafer-level packaging method for a filter includes the following steps:
[0007] 1) Provide a positive photoresist dry film with a thickness >20µm, and expose the positive photoresist dry film for the first time using a first photomask with an exposure dose <250mJ and an exposure depth equal to the thickness of the positive photoresist dry film; expose the positive photoresist dry film for the second time using a second photomask with an exposure dose <100mJ and an exposure depth not exceeding half the thickness of the positive photoresist dry film;
[0008] 2) Development is performed, in which the area exposed in the first exposure forms a through hole after development, and the area exposed in the second exposure forms a groove after development;
[0009] 3) A positive photoresist dry film is bonded to the surface of a wafer, the wafer having a plurality of filter chips, the filter chips having functional areas and wiring, wherein the grooves and functional areas enclose a cavity, and some wiring corresponds to through holes and is exposed.
[0010] 4) Bake at 80–250℃ for 0.5–1.5 hours;
[0011] 5) Deposit metal within the through-hole and connect it to the wiring;
[0012] 6) The packaged wafer is cut to form a single filter package structure.
[0013] Optionally, the second exposure time is <20s.
[0014] Optionally, the positive photoresist dry film is a photosensitive epoxy resin, and the first and second exposures use I-line light.
[0015] Optionally, the exposure interval between the first and second exposures is 10-30µm.
[0016] Optionally, in step 2), the developing process is performed twice, each time for 30 to 60 seconds; the rinsing process is performed twice, each time for 4 to 8 seconds.
[0017] Optionally, in step 3), the positive photoresist dry film is laminated onto the wafer surface using a film lamination process at a temperature of 25°C to 60°C.
[0018] Optionally, in step 5), the metal is deposited using a chemical plating or electroplating process.
[0019] Optionally, step 5) further includes forming solder balls on the top of the metal using solder paste printing and high-temperature reflow soldering processes.
[0020] Optionally, in step 1), one side of the positive photoresist dry film is also provided with a protective film, which simultaneously exposes the preset cutting area during the first exposure, and forms the cutting area after development in step 2).
[0021] Optionally, in step 3), the side of the positive photoresist dry film facing away from the protective film is attached to the wafer surface, and the protective film is peeled off after attachment.
[0022] Optionally, in step 6), the cutting process is performed along the cutting path using laser cutting or mechanical cutting.
[0023] Optionally, the protective film is a PET film with a thickness of 30-60 μm.
[0024] The beneficial effects of this invention are as follows:
[0025] (1) A single-layer positive photoresist dry film is used for encapsulation. The cavity is formed in the single-layer dry film, eliminating the delamination problem of the wall layer and the top layer, thus improving the reliability of the device.
[0026] (2) Single-layer positive photoresist dry film forms cavities and through holes through two exposures and one development, which simplifies the process, shortens the process cycle time, and eliminates the need for multi-layer materials, thus saving costs.
[0027] (3) After the single-layer positive photoresist dry film forms cavities and vias, it is then combined with the wafer, which avoids the impact of the packaging layer process on the performance of the devices on the wafer.
[0028] (4) It can achieve wafer-level packaging, and then be cut after packaging. It is efficient, has a good packaging effect, and is suitable for actual production applications. Attached Figure Description
[0029] Figure 1 This is a process flow diagram of Example 1;
[0030] Figure 2 This is a process flow diagram for Example 2. Detailed Implementation
[0031] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments. The accompanying drawings are merely illustrative to facilitate understanding of the invention, and their specific proportions can be adjusted according to design requirements. The vertical relationships of relative elements and the definitions of front / back in the graphics described herein should be understood by those skilled in the art to refer to the relative positions of the components; therefore, they can all be flipped to present the same component, and all of this should fall within the scope disclosed in this specification.
[0032] Example 1
[0033] This invention relates to wafer-level packaging technology. To clarify the structure and process, the accompanying drawings of Example 1 illustrate a single filter chip unit. In reality, multiple filter chip units are formed on the wafer. It should be understood that the positive photoresist dry film should also be formed with multiple structures as shown in the accompanying drawings to achieve a one-to-one correspondence.
[0034] The filter chip unit can be a surface acoustic wave (SAW) filter, which has a functional area and wiring surrounding the functional area. As a known structure, the functional area of a SAW filter needs to form a cavity structure after packaging to achieve the reflection of SAW waves. The wiring is, for example, a line formed of conductive metal.
[0035] Figure 1 This is a flowchart of a wafer-level packaging method for a filter according to Embodiment 1. The wafer-level packaging method for the filter includes the following steps:
[0036] S1. The positive photoresist dry film is subjected to the first exposure and the second exposure in sequence.
[0037] A positive photoresist dry film 1 with a thickness of 50 μm is provided. The positive photoresist dry film 1 is a photosensitive epoxy resin. Using I-line light, the positive photoresist dry film 1 is first exposed through a first photomask A with an exposure dose of 180 mJ, an exposure gap of 20 μm, and an exposure depth equal to the full thickness of the positive photoresist dry film 1. This first exposure is used to form connecting vias. The positive photoresist dry film 1 is then second exposed through a second photomask B with an exposure dose of 50 mJ, an exposure time of less than 20 s (preferably 5–15 s), an exposure gap of 20 μm, and an exposure depth of 2 / 5 of the thickness of the positive photoresist dry film. This second exposure is used to form grooves in the cavity. It is understood that the order of the first and second exposures is not restricted. The exposure gap is used to control the accuracy of the opening dimensions.
[0038] S2. Develop the positive photoresist dry film.
[0039] The exposed positive photoresist dry film 1 undergoes a development process, with two development cycles, each lasting 30-60 seconds, followed by two rinsing cycles, each lasting 6 seconds. After development, the area exposed in the first exposure forms a through-hole 11, and the area exposed in the second exposure forms a groove 12. The through-hole 11 is located around the groove 12. Specifically, the through-hole 11 has a size of approximately 90 μm, and the size of the groove 12 depends on the product's IDT range. Its specific shape can be set according to actual needs, such as circular or square.
[0040] S3. Lay the positive photoresist dry film onto the wafer.
[0041] The developed positive photoresist dry film 1 is bonded to the wafer 2. The bonding process uses a lamination and pressing technique at a temperature of 25℃~60℃. Too high a temperature can easily deform the grooves, while too low a temperature makes adhesion difficult. After bonding, the grooves 12 and the functional areas of the filter chip unit form a cavity, and the vias 11 correspond to the connection terminals of the wiring. The wafer is made of lithium tantalate or lithium niobate, or a composite substrate made of lithium tantalate or lithium niobate and sapphire, silicon, alumina, spinel, crystal, or glass.
[0042] S4. Baking.
[0043] After lamination, the film is baked at 180°C for 1 hour. This process is designed to improve the adhesion of the dry film to the wafer and allow it to fully bond together, as well as to harden the dry film.
[0044] S5. Create the wiring lead-out structure.
[0045] Metal conductor 3 is formed by depositing metal within the via 11, and is electrically connected to the wiring on the wafer. Electroless plating or chemical plating processes can be used. First, the via 11 undergoes pretreatment such as degreasing, pickling, and zinc immersion. Then, nickel plating is performed sequentially at 78–82°C, palladium plating at 48–52°C, and gold plating at 78–86°C, filling the via 11 to form the Ni / Pd / Au metal stacked structure of the metal conductor 3. Solder balls 4 are formed on the top of the metal conductor 3 using solder paste printing and high-temperature reflow soldering. The printing speed is 25 mm / s, the printing device pressure is 0.2 N, the printing filling pressure is 0.8 N, the reflow speed is 90 cm / s, and the reflow temperature is 260°C.
[0046] S6. A single filter package structure is formed by laser cutting or mechanical cutting processes.
[0047] The resulting filter packaging structure features a cavity formed from a single layer of photoresist dry film. The absence of interlayer bonding surfaces at the junction of the walls and top prevents delamination and improves packaging reliability. The photoresist dry film is completely separated from the filter device structure during fabrication, ensuring no impact. After bonding, the functional areas are protected by the cavity and film layer, preventing damage from subsequent processes. This minimizes the impact of the packaging process on device performance and improves production yield.
[0048] Example 2
[0049] Figure 2 This is a flowchart of a wafer-level packaging method for a filter according to Embodiment 2. The wafer-level packaging method for the filter includes the following steps:
[0050] S1. The positive photoresist dry film is subjected to the first exposure and the second exposure in sequence.
[0051] A positive photoresist dry film 1 with a thickness of 50 μm is provided. The positive photoresist dry film 1 is a photosensitive epoxy resin, with a PET protective film 5 with a thickness of 38 μm or 50 μm attached to one side. Using I-line light, the positive photoresist dry film 1 is first exposed through a first photomask A from the surface opposite the PET protective film 5, with an exposure dose of 180 mJ, an exposure gap of 20 μm, and an exposure depth of the full thickness of the positive photoresist dry film 1. The first exposure is used to form connecting vias and cut channels. The positive photoresist dry film 1 is then second exposed through a second photomask B, with an exposure dose of 50 mJ, an exposure time of less than 20 s (preferably 5–15 s), an exposure gap of 20 μm, and an exposure depth of 2 / 5 of the thickness of the positive photoresist dry film. The second exposure is used to form grooves in the cavity. It is understood that the order of the first and second exposures is not restricted. The exposure gap is used to control the accuracy of the opening size.
[0052] S2. Develop the positive photoresist dry film.
[0053] The exposed positive photoresist dry film 1 undergoes a development process, with two development cycles, each lasting 30-60 seconds, followed by two rinsing cycles, each lasting 6 seconds. After development, the area exposed in the first exposure forms vias 11 and dicing channels 13, while the area exposed in the second exposure forms grooves 12. The vias 11 are located around the grooves 12, and the dicing channels 13 are located between adjacent chip areas. Specifically, the vias 11 are approximately 90µm in size, and the size of the grooves 12 depends on the product's IDT range. Their specific shape can be set according to actual needs, such as circular or square.
[0054] Because the PET protective film is unaffected by exposure and development, it will not break, thus allowing the developed dry film to remain in its original state on the PET protective film, facilitating subsequent alignment and bonding with the wafer.
[0055] S3. Lay the positive photoresist dry film onto the wafer.
[0056] The grooved surface of the developed positive photoresist dry film 1 is bonded to the wafer 2. Bonding is performed using a lamination and pressing process at a temperature of 25℃~60℃. Too high a temperature can easily deform the grooves, while too low a temperature makes adhesion difficult. After bonding, the grooves 12 and the functional area of the filter chip unit form a cavity, and the vias 11 correspond to the connection terminals of the wiring. The wafer is made of lithium tantalate or lithium niobate, or a composite substrate made of lithium tantalate or lithium niobate and sapphire, silicon, alumina, spinel, crystal, or glass. The PET protective film 5 is peeled off after bonding.
[0057] S4. Baking.
[0058] After lamination, the film is baked at 180°C for 1 hour. This process is designed to improve the adhesion of the dry film to the wafer and allow it to fully bond together, as well as to harden the dry film.
[0059] S5. Create the wiring lead-out structure.
[0060] A metal conductor 3 is formed within the via 11 by filling metal, and the metal conductor 3 is electrically connected to the wiring on the wafer. Chemical plating or electroplating processes can be used. First, the via 11 undergoes pretreatment such as degreasing, pickling, and zinc immersion. Then, nickel plating is performed sequentially at 78–82°C, palladium plating at 48–52°C, and gold plating at 78–86°C, filling the via 11 to form a Ni / Pd / Au metal multilayer structure for the metal conductor 3. Solder balls 4 are formed on the top of the metal conductor 3 using solder paste printing and high-temperature reflow soldering. The printing speed is 25 mm / s, the printing device pressure is 0.2 N, the printing filling pressure is 0.8 N, the reflow speed is 90 cm / s, and the reflow temperature is 260°C.
[0061] S6. A single filter package structure is formed by cutting along the cutting path 13 using laser cutting or mechanical cutting processes.
[0062] In this embodiment, by setting a protective film, cutting channels can be formed simultaneously during development, which facilitates subsequent cutting and further simplifies the process.
[0063] The above embodiments are only used to further illustrate a wafer-level packaging method for a filter according to the present invention. However, the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the technical solution of the present invention.
Claims
1. A wafer-level packaging method for a filter, characterized in that, Includes the following steps: 1) Provide a positive photoresist dry film with a thickness >20µm, and expose the positive photoresist dry film for the first time using a first photomask with an exposure dose <250mJ and an exposure depth equal to the thickness of the positive photoresist dry film; expose the positive photoresist dry film for the second time using a second photomask with an exposure dose <100mJ and an exposure depth not exceeding half the thickness of the positive photoresist dry film; 2) Development is performed, in which the area exposed in the first exposure forms a through hole after development, and the area exposed in the second exposure forms a groove after development; 3) A positive photoresist dry film is bonded to the surface of a wafer, the wafer having a plurality of filter chips, the filter chips having functional areas and wiring, wherein the grooves and functional areas enclose a cavity, and some wiring corresponds to through holes and is exposed. 4) Bake at 80–250℃ for 0.5–1.5 hours; 5) Deposit metal within the through-hole and connect it to the wiring; 6) The packaged wafer is cut to form a single filter package structure.
2. The wafer-level packaging method for the filter according to claim 1, characterized in that: The positive photoresist dry film is a photosensitive epoxy resin, and the first and second exposures use I-line light.
3. The wafer-level packaging method for the filter according to claim 1, characterized in that: The exposure interval between the first and second exposures is 10-30µm.
4. The wafer-level packaging method for the filter according to claim 1, characterized in that: In step 2), the developing process is performed twice, each time for 30 to 60 seconds; the rinsing process is performed twice, each time for 4 to 8 seconds.
5. The wafer-level packaging method for a filter according to claim 1, characterized in that: In step 3), the positive photoresist dry film is laminated onto the wafer surface using a film lamination process at a temperature of 25°C to 60°C.
6. The wafer-level packaging method for a filter according to claim 1, characterized in that: In step 5), the metal is deposited using chemical plating or electroplating processes; it also includes forming solder balls on the top of the metal using solder paste printing and high-temperature reflow soldering processes.
7. The wafer-level packaging method for the filter according to claim 1, characterized in that: In step 1), a protective film is also provided on one side of the positive photoresist dry film. During the first exposure, the preset cutting area is exposed at the same time, and the cutting path is formed after development in step 2).
8. The wafer-level packaging method for a filter according to claim 7, characterized in that: In step 3), the side of the positive photoresist dry film facing away from the protective film is attached to the wafer surface, and the protective film is peeled off after attachment.
9. The wafer-level packaging method for a filter according to claim 8, characterized in that: In step 6), the cutting process is carried out along the cutting path by laser cutting or mechanical cutting.
10. The wafer-level packaging method for a filter according to claim 7, characterized in that: The protective film is a PET film with a thickness of 30-60 μm.
Citation Information
Patent Citations
Method for forming dual-damascene pattern through dual exposure
CN111312657A
Filter wafer level packaging process and filter wafer level packaging structure
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