Heat treatment method for silicon wafers using a horizontal heat treatment furnace
By setting up high-cleaning additional blocks in the horizontal heat treatment furnace, the diffusion of contaminated metal gas is prevented, and the problem of the life value of silicon wafers near the dummy block is solved, and the yield rate of silicon wafers is improved.
Patent Information
- Application Number
- CN202180039785.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-06-04
- Filing Date
- 2021-03-18
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2041-03-18
AI Technical Summary
In multiple batches of heat treatments, the lifetime value of silicon wafers arranged near the dummy block of the horizontal heat treatment furnace is significantly reduced, resulting in a decrease in yield rate, and it is difficult for the prior art to effectively prevent metal contamination.
In a horizontal heat treatment furnace, additional blocks with a larger size than dummy blocks and high-cleanness are provided to prevent the diffusion of contaminated metal gases into the silicon wafer, and additional blocks composed of silicon materials are used to suppress metal contamination.
It effectively suppresses the decrease in the lifetime value of the silicon wafer near the dummy block and improves the yield rate of the silicon wafer.
Smart Images

Figure CN115699258B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a heat treatment method for silicon wafers using a horizontal heat treatment furnace. Background Art
[0002] The process of thermally diffusing dopants such as phosphorus and boron in a silicon wafer includes a process of attaching a dopant to the surface layer of the silicon wafer (deposition) and a process of diffusing the dopant attached to the surface layer into the interior of the silicon wafer (drive-in). In this drive-in process, a horizontal heat treatment furnace (thermal diffusion furnace) is usually used. In a horizontal heat treatment furnace, in a cylindrical furnace core tube having a horizontal central axis, a boat in which a plurality of silicon wafers are arranged and configured in such a manner that the main surfaces are orthogonal to the central axis of the furnace core tube is placed, and heat treatment is performed on the silicon wafers in the furnace core tube. At this time, a technique is known in which dummy blocks (heat insulating blocks) made of silicon are arranged on both sides of a plurality of silicon wafers in the central axis direction of the furnace core tube to equalize the temperature in the wafer setting area in the furnace core tube.
[0003] In Patent Document 1, it is described that "a heat treatment method for a silicon wafer (Claim 1), characterized in that: when heat treatment is performed on wafers in a state where the wafers are arranged in a tube of a thermal diffusion furnace with the main surfaces orthogonal to the long side direction of the tube, on both sides of the soaking area in a state where no wafers are loaded in the tube, on the atmosphere gas inflow side, at least 10 mm or more away from this area, and on the ambient gas outflow side, heat insulating blocks slightly smaller than the tube diameter are respectively arranged in close contact or separated." Further, in Patent Document 1, it is described that "the material of the heat insulating block is high-purity silicon (Claim 3).
[0004] Prior Art Documents
[0005] Patent Documents
[0006] Patent Document 1: Japanese Patent Laid-Open No. 3-85725 Summary of the Invention
[0007] Technical Problem to be Solved by the Invention
[0008] However, after research by the present inventors, it was determined that: in the case of repeatedly using the same dummy block in multiple batches of heat treatment, among the multiple silicon wafers in each batch, the silicon wafers located at the end portions, that is, the silicon wafers arranged near the dummy block, have a significantly decreased life value as the batch processing progresses.
[0009] In view of the above problems, an object of the present invention is to provide a heat treatment method for silicon wafers using a horizontal heat treatment furnace, which suppresses a decrease in the life value of silicon wafers arranged near dummy blocks provided for temperature equalization in the wafer setting area and can improve the yield.
[0010] Solution for Solving the Technical Problem
[0011] In order to solve the above technical problems, the present inventors conducted in-depth research and obtained the following insights. First, the present inventors believe that the reason for the decrease in the lifetime value of the silicon wafer disposed near the dummy block is the metal contamination of the dummy block. That is, it is considered that in multiple batches of heat treatment, when the same dummy block is reused, metal contamination (such as Fe, Ni, Cu, etc.) from the furnace core tube gradually accumulates in the dummy block. During the heating of the dummy block during heat treatment, a gas containing the contaminated metal is generated from the dummy block. The gas containing the contaminated metal diffuses and is supplied to the silicon wafer disposed near the dummy block. As a result, it is considered that the silicon wafer disposed near the dummy block is also contaminated with metal, resulting in a decrease in the lifetime value.
[0012] However, it is not economical to replace the dummy block every time in multiple batches of heat treatment. Also, it is considered to perform a high cleanliness treatment (etching treatment based on a mixed acid solution of hydrofluoric acid and nitric acid, etc.) on the dummy block after each batch of heat treatment to remove the contaminated metal from the dummy block. However, due to the following reasons, it is not practical in operation. That is, as reasons, it can be cited that the dummy block is a relatively thick block, so it costs money to make an etching tank large enough to accommodate the dummy block, or if an etching thickness is large and the surface area of the dummy block is large, the liquid temperature may rise excessively during etching.
[0013] Therefore, the present inventors obtained the following concept: between the dummy block and multiple silicon wafers, an additional block having a size larger than the dummy block and the silicon wafer and having a high cleanliness is provided, thereby suppressing the diffusion of the gas containing the contaminated metal generated from the dummy block to the silicon wafer disposed near the dummy block. Moreover, from various experimental results, it can be confirmed that by providing such an additional block, a decrease in the lifetime value of the silicon wafer disposed near the dummy block can be suppressed.
[0014] The main concept of the present invention completed based on the above insights is as follows.
[0015] [1] A heat treatment method for a silicon wafer using a horizontal heat treatment furnace, preparing a horizontal heat treatment furnace (100), including: a cylindrical furnace core tube (12) having a horizontal central axis (X); and a heater (14) located around the furnace core tube (12) for heating the furnace core tube (12). A lid (12A) is provided at one end of the furnace core tube (12), and a gas inlet (12B) is provided at the other end of the furnace core tube (12). A gas exhaust port (12C) is provided on the furnace wall near the lid (12A) of the furnace core tube (12).
[0016] When one side of the lid (12A) close to the core tube (12) is defined as the furnace mouth side (H) and one side of the gas inlet (12B) close to the core tube (12) is defined as the furnace tail side (S), the lid (12A) is opened, and in the core tube (12), a boat (16) is arranged to be in the following states (A) to (C).
[0017] (A) On the boat (16), a plurality of silicon wafers are arranged such that the main surfaces are orthogonal to the central axis (X) of the core tube (12), forming a wafer group (WF).
[0018] (B) On the boat (16) and on the furnace tail side (S) of the wafer group (WF), a cylindrical first dummy block (18S) having an axis parallel to the central axis (X) of the core tube (12) is arranged, and on the furnace mouth side (H) of the wafer group (WF), a cylindrical second dummy block (18H) having an axis parallel to the central axis (X) of the core tube (12) is arranged.
[0019] (C) At least one of the first additional block (20S) arranged between the first dummy block (18S) and the wafer group (WF) and the second additional block (20H) arranged between the second dummy block (18H) and the wafer group (WF) on the boat (16) is arranged. Regarding the first and second additional blocks (20S, 20H), (i) the projection shape on a virtual plane perpendicular to the central axis (X) of the core tube (12) includes the projection shapes of the first and second dummy blocks (18S, 18H) and the plurality of silicon wafers on the virtual plane, and is a column shape having an axis parallel to the central axis (X) of the core tube (12), and (ii) the concentration of Fe is less than 1×10 11 atoms / cm 3 ,and the concentrations of Ni and Cu are respectively less than 5×10 10 atoms / cm 3 ,
[0020] The lid (12A) is closed.
[0021] Gas is introduced from the gas inlet (12B) into the core tube (12), and while the gas is discharged from the gas outlet (12C), the core tube (12) is heated by the heater (14), thereby performing a heat treatment on the plurality of silicon wafers (WF).
[0022] [2] According to the heat treatment method for silicon wafers using a horizontal heat treatment furnace described in the above [1], wherein in the (C), both the first and second additional blocks (20S, 20H) are arranged.
[0023] [3]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace described in [1] or [2] above, wherein the first and second additional blocks (20S, 20H) are made of silicon.
[0024] [4]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to any one of [1] to [3] above, wherein, in the projected shape of the first and second additional blocks (20S, 20H) on the virtual plane, the portion above the boat (16) has a radius of curvature greater than the radius of the multiple silicon wafers by 5 mm (millimeters) or more.
[0025] [5]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to any one of [1] to [4] above, wherein the width of the first and second additional blocks (20S, 20H) along the central axis (X) of the furnace core tube 12 is in the range of 10 to 20 mm.
[0026] [6]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to any one of [1] to [5] above, wherein in (C), at least one of the third additional block (22S) disposed on the boat (16) on the furnace tail side (S) more than the first dummy block (18S), and the fourth additional block (22H) disposed on the furnace mouth side (H) more than the second dummy block (18H) is provided, and the third and fourth additional blocks (22S, 22H) satisfy (i) and (ii).
[0027] [7]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to [6] above, wherein in (C), both the third and fourth additional blocks (22S, 22H) are provided.
[0028] [8]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to [6] and [7] above, wherein the third and fourth additional blocks (22S, 22H) are made of silicon.
[0029] [9]According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to any one of [6] to [8] above, wherein, in the projected shape of the third and fourth additional blocks (22S, 22H) on the virtual plane, the portion above the boat (16) has a radius of curvature greater than the radius of the multiple silicon wafers by 5 mm or more.
[0030]
[10] According to the heat treatment method of silicon wafers using a horizontal heat treatment furnace according to any one of [6] to [9] above, wherein the width of the third and fourth additional blocks (22S, 22H) along the central axis (X) of the furnace core tube 12 is in the range of 10 to 20 mm.
[0031]
[11] The heat treatment method of a silicon wafer using a horizontal heat treatment furnace according to any one of [1] to
[10] above, wherein the first and second dummy blocks (18S, 18H) are composed of silicon with any one of Fe, Ni, and Cu having a concentration of 1×10 11 atoms / cm 3 or more.
[0032]
[12] The heat treatment method of a silicon wafer using a horizontal heat treatment furnace according to any one of [1] to
[11] above, wherein the diameters of the first and second dummy blocks (18S, 18H) are equal to the diameter of the multiple silicon wafers (WF).
[0033]
[13] The heat treatment method of a silicon wafer using a horizontal heat treatment furnace according to any one of [1] to
[12] above, wherein the width of the first and second dummy blocks (18S, 18H) along the central axis (X) of the furnace core tube 12 is in the range of 40 to 75 mm.
[0034] Advantages of the Invention
[0035] According to the heat treatment method of a silicon wafer using a horizontal heat treatment furnace of the present invention, it is possible to suppress a decrease in the lifetime value of a silicon wafer disposed near a dummy block provided for temperature uniformity of a wafer setting area, and improve the yield. Description of the Drawings
[0036] Figure 1 is a longitudinal sectional view of a horizontal heat treatment furnace 100 for explaining a heat treatment method of a silicon wafer based on a comparative example.
[0037] Figure 2 is a longitudinal sectional view of a horizontal heat treatment furnace 100 for explaining a heat treatment method of a silicon wafer based on an embodiment of the present invention.
[0038] Figure 3 is a longitudinal sectional view of a horizontal heat treatment furnace 100 for explaining a heat treatment method of a silicon wafer based on another embodiment of the present invention.
[0039] Figure 4 (A) is a front view of the first to fourth additional blocks 20S, 20H, 22S, 22H, Figure 4 (B) is a side view of the first to fourth additional blocks 20S, 20H, 22S, 22H.
[0040] Figure 5 (A) is a cross-sectional view of the boat 16 perpendicular to the furnace central axis X, Figure 5 (B) is Figure 1 a cross-sectional view taken along line I-I of Figure 5 (C) is Figure 2 a cross-sectional view taken along line II-II of Detailed implementation manners
[0041] First, referring to Figure 1 、 Figure 2 and Figure 3 , the structure of the horizontal heat treatment furnace 100 commonly used in the heat treatment methods of silicon wafers based on the embodiments and comparative examples of the present invention will be described. The horizontal heat treatment furnace 100 includes a heat uniformizing tube 10, a furnace core tube 12, and a heater 14.
[0042] The heat uniformizing tube 10 is a tube with a cylindrical shape having a horizontal central axis. A door 10A is provided at one end thereof, and an opening 10B having a diameter smaller than the inner diameter of the heat uniformizing tube 10 is provided at the other end thereof. Further, a suction port 10C is provided on the furnace wall near the door 10A of the heat uniformizing tube 10. The material of the heat uniformizing tube 10 can be made of quartz, silicon carbide (SiC), etc.
[0043] The furnace core tube 12 is a tube with a cylindrical shape having a horizontal central axis X and is located inside the heat uniformizing tube 10. A lid 12A is provided at one end of the furnace core tube 12, and a gas inlet 12B is provided at the other end. Further, a gas exhaust port 12C is provided on the furnace wall near the lid 12A of the furnace core tube 12. The connecting portion (aperture portion) of the tube body of the furnace core tube 12 and the gas inlet 12B is fitted into the opening 10B of the heat uniformizing tube 10, whereby the furnace core tube 12 is fixed to the heat uniformizing tube 10. The inner diameter of the furnace core tube 12 (tube body) is generally in the range of 160 - 360 mm. The material of the furnace core tube 12 can be made of quartz, silicon carbide (SiC), etc. Additionally, in Figures 1 - 3 , an example is shown where the heat uniformizing tube 10 is located outside the furnace core tube 12. However, since the furnace core tube 12 can also serve as the function of the heat uniformizing tube, it is not necessary to provide the heat uniformizing tube 10.
[0044] The heater 14 is located around the furnace core tube 12 and the heat uniformizing tube 10 to heat the furnace core tube 12 and the heat uniformizing tube 10. The heater 14 can be composed of a main heater disposed at the central portion of the furnace core tube 12 and the heat uniformizing tube 10 and two auxiliary heaters disposed on both sides thereof.
[0045] As Figures 1 - 3 shown, in this specification, the side close to the lid 12A of the furnace core tube 12 is marked as "furnace mouth side H", and the side close to the gas inlet 12B of the furnace core tube 12 is marked as "furnace tail side S".
[0046] In the heat treatment method of a silicon wafer according to an embodiment of the present invention, when heat-treating the silicon wafer, a plurality of silicon wafers are arranged and placed on a boat 16 to form a wafer group WF. The door leaf 10A of the uniform heat pipe 10 and the lid 12A of the furnace core tube 12 are opened, and the boat 16 is placed into the furnace core tube 12 from the furnace mouth side H of the furnace core tube 12. Thereafter, the lid 12A of the furnace core tube 12 and the door leaf 10A of the uniform heat pipe 10 are closed.
[0047] Thereafter, a gas is introduced into the furnace core tube 12 from the gas inlet 12B, and while the gas is discharged from the gas outlet 12C, the uniform heat pipe 10 and the furnace core tube 12 are heated by the heater 14, thereby heat-treating a plurality of silicon wafers (wafer group WF). In the case of performing a drive-in process of diffusing a dopant attached to the surface layer into the interior of the silicon wafer, the gas introduced into the furnace core tube 12 contains a trace amount of oxygen (0.1 to 2% by volume), and the remaining portion has a composition composed of Ar. The atmosphere in the space inside the uniform heat pipe 10 and outside the furnace core tube 12 is air. The air in this space is forcibly sucked from the suction port 10C of the uniform heat pipe 10 by a pump, whereby the atmosphere gas in the furnace core tube 12 is discharged through the gas outlet 12C. As a result, in the furnace core tube 12, a flow of the atmosphere gas is generated from the furnace tail side S toward the furnace mouth side H. In the case of the drive-in process, the atmosphere temperature in the furnace core tube 12 can be set in the range of 1200 to 1350 °C, and can be maintained at a temperature in this range for 10 to 250 hours.
[0048] Except Figures 1 - 3 other reference Figure 5 (A), the boat 16 has a recess 16A formed by a semi-cylindrical concave portion, and a plurality of silicon wafers are accommodated therein. The boat 16 is arranged in the furnace core tube 12 such that its long side direction coincides with the central axis X direction of the furnace core tube 12. As Figure 5 (A) shows, the cross-sectional shape of the recess 16A perpendicular to the long side direction of the boat 16 is a semi-circular shape having the same radius of curvature as the radius of the accommodated silicon wafer. For example, when the diameter of the silicon wafer is 150 mm, the radius of curvature is 75 mm. The material of the boat 16 can be made of silicon carbide (SiC).
[0049] In the heat treatment method of a silicon wafer according to an embodiment of the present invention, when the boat 16 is arranged in the furnace core tube 12, the following states (A) to (C) are satisfied.
[0050] (A) First, as Figures 1 - 3 shown, on the boat 16, a plurality of silicon wafers having the same diameter are arranged such that the main surfaces are orthogonal to the central axis X of the furnace core tube 12 to form a wafer group WF. The arrangement method of the plurality of silicon wafers is not particularly limited as long as each wafer does not fall down. For example, one batch (e.g., 50 pieces) of silicon wafers can be arranged such that the main surfaces of the adjacent silicon wafers are in contact with each other. In Figures 1 - 3shows an example of arranging 4 batches of silicon wafers. In addition, partitions (not shown) perpendicular to the long side direction of the recess 16A are provided at equal intervals inside the recess 16A, whereby the silicon wafer groups WF of each batch are accommodated in the recess 16A without falling down. However, the arrangement is not limited to this, and all the silicon wafers accommodated in the recess 16A can be arranged such that the main surfaces of adjacent silicon wafers are in contact with each other. In the present embodiment, the lower half of each silicon wafer is in contact with and supported by the recess 16A, and the upper half is located above the upper end of the recess 16A, that is, above the boat 16. However, the range where the silicon wafer is in contact with the recess 16A is not limited to the lower half as long as the upright state of each wafer is not hindered.
[0051] (B) On the boat 16, on the side closer to the furnace tail S than the wafer group WF and separated from the wafer group WF, a cylindrical first dummy block 18S having an axis parallel to the central axis X of the susceptor 12 is arranged. On the side closer to the furnace mouth H than the wafer group WF and separated from the wafer group WF, a cylindrical second dummy block 18H having an axis parallel to the central axis X of the susceptor 12 is arranged. In the absence of these first and second dummy blocks 18S, 18H, the furnace atmosphere temperature drops at both ends in the central axis X direction of the wafer setting area in the susceptor 12, and the soaking length in the susceptor 12 becomes shorter. At this time, in the silicon wafers located at both ends among multiple silicon wafers, the diffusion of impurities becomes insufficient. In contrast, by arranging the first and second dummy blocks 18S, 18H, the soaking length in the susceptor 12 can be lengthened, and temperature uniformity in the wafer setting area in the susceptor 12 can be achieved.
[0052] From the viewpoint of sufficiently achieving temperature uniformity in the wafer setting area in the susceptor 12, the first and second dummy blocks 18S, 18H are preferably made of silicon.
[0053] Moreover, from the same viewpoint, the diameters of the first and second dummy blocks 18S, 18H are preferably equal to the diameters of the multiple silicon wafers constituting the wafer group WF. For example, when the diameter of the silicon wafer is 150 mm, the diameters of the first and second dummy blocks 18S, 18H may also be selected as 150 mm. In the present embodiment, as shown in Figure 5 (B), the lower halves of the first and second dummy blocks 18S, 18H are in contact with and supported by the recess 16A, and the upper halves are located above the upper end of the recess 16A, that is, above the boat 16. However, the range where the first and second dummy blocks 18S, 18H are in contact with the recess 16A is not limited to the lower half as long as the upright state of each wafer is not hindered.
[0054] From the viewpoint of fully realizing the temperature uniformity in the wafer setting area within the furnace core tube 12, the widths of the first and second dummy blocks 18S and 18H along the central axis X of the furnace core tube 12 are preferably 40 mm or more. On the other hand, if the dummy blocks are too long, the area for product processing in the soaking length becomes smaller and the productivity deteriorates. Therefore, the widths of the first and second dummy blocks 18S and 18H along the central axis X of the furnace core tube 12 are preferably 75 mm or less.
[0055] The distances (separation distances) between the first dummy block 18S and the wafer group WF and between the second dummy block 18H and the wafer group WF in the central axis X direction of the furnace core tube 12 are preferably 11 mm or more. This is because when this distance is less than 11 mm, the wafer group WF that becomes the product may be contaminated. Also, this distance is preferably 30 mm or less. This is because when this distance exceeds 30 mm, the number of wafers to be set as the product is restricted and the productivity is hindered.
[0056] Regarding the first and second dummy blocks 18S and 18H, in the present embodiment, in multi-batch heat treatment, no exchange or high-cleanliness treatment (etching treatment with a mixed acid solution of hydrofluoric acid and nitric acid, etc.) is performed, and the same dummy blocks are reused. The reason is as described above. At this time, it is considered that metal contamination from the furnace core tube etc. gradually accumulates in the dummy blocks. In the silicon of the first and second dummy blocks 18S and 18H, when the concentration of at least any one of Fe, Ni, and Cu is 1×10 11 atoms / cm 3 or more, or when the concentrations of all transition metal elements are 1×10 11 atoms / cm 3 or more, there is a concern about metal contamination of the dummy blocks.
[0057] At this time, in the heat treatment method of silicon wafers based on the comparative example shown in Figure 1 , in multi-batch heat treatment, as the batch processing progresses, the gas containing the contaminating metal generated from the first and second dummy blocks 18S and 18H diffuses and is supplied to the silicon wafers arranged near the dummy blocks. As a result, the silicon wafers arranged near the first and second dummy blocks 18S and 18H are also contaminated with metal, resulting in a decrease in the lifetime value. The wafer group WF with a lifetime value below the specified value cannot become a product, so the yield becomes insufficient.
[0058] (C) Therefore, in the present invention, it is important to provide additional blocks with a size larger than the dummy blocks and the silicon wafers and with high cleanliness between the dummy blocks and multiple silicon wafers.
[0059] Figure 2 shows one embodiment. In Figure 2In [the description], a first additional block 20S is disposed between the first dummy block 18S on the boat 16 and the wafer group WF, and a second additional block 20H is disposed between the second dummy block 18H and the wafer group WF. In the present embodiment, the gas containing the contaminating metal generated from the first dummy block 18S is blocked by the first additional block 20S, and thus it becomes difficult to supply it to the wafer group WF. Also, the gas containing the contaminating metal generated from the second dummy block 18H is blocked by the second additional block 20H, and thus it becomes difficult to supply it to the wafer group WF. As a result, a decrease in the life value of the silicon wafers disposed near the first and second dummy blocks 18S, 18H is suppressed, and the yield can be improved. Additionally, either the first additional block 20S or the second additional block 20H may be provided, but from the viewpoint of further improving the yield, it is preferable to provide both.
[0060] Figure 3 Another embodiment is shown in Figure 3 In [the description], in addition to the first additional block 20S and the second additional block 20H, a third additional block 22S is disposed on the boat 16 on the furnace tail side S closer to the furnace tail than the first dummy block 18S, and a fourth additional block 22H is disposed on the furnace mouth side H closer to the furnace mouth than the second dummy block 18H. In the present embodiment, the gas containing the contaminating metal generated from the first dummy block 18S is likely to be confined in the space between the first additional block 20S and the third additional block 22S. Also, the gas containing the contaminating metal generated from the second dummy block 18H is likely to be confined in the space between the second additional block 20H and the fourth additional block 22H. As a result, a decrease in the life value of the silicon wafers disposed near the first and second dummy blocks 18S, 18H can be more reliably suppressed. Additionally, either the third additional block 22S or the fourth additional block 22H may be provided, but from the viewpoint of further improving the yield, it is preferable to provide both.
[0061] The sizes of the first to fourth additional blocks 20S, 20H, 22S, 22H need to be larger than those of the first and second dummy blocks 18S, 18H and multiple silicon wafers. Specifically, the projection shapes of the first to fourth additional blocks 20S, 20H, 22S, 22H on a virtual plane perpendicular to the central axis X of the furnace core tube 12 include the projection shapes of the first and second dummy blocks 18S, 18H and multiple silicon wafers on the virtual plane, and need to be column shapes having an axis parallel to the central axis X of the furnace core tube 12. Refer to Figure 4 (A), (B) and Figure 5 (C), the first to fourth additional blocks 20S, 20H, 22S, 22H have shapes satisfying the following conditions.
[0062] (i-1) In the 1st to 4th additional blocks 20S, 20H, 22S, and 22H, the portion below the upper end of the recess 16A (the lower half in this embodiment) is accommodated in the recess 16A. Therefore, in the projected shape of the 1st to 4th additional blocks 20S, 20H, 22S, and 22H onto the virtual plane, the portion below the upper end of the recess 16A has the same radius of curvature as the radius of the multi-wafer silicon wafers.
[0063] (i-2) In the 1st to 4th additional blocks 20S, 20H, 22S, and 22H, the portion above the upper end of the recess 16A, that is, the portion above the boat 16 (the upper half in this embodiment) functions to suppress the diffusion of the gas containing the contaminating metal. Therefore, in the projected shape of the 1st to 4th additional blocks 20S, 20H, 22S, and 22H onto the virtual plane, the portion above the boat 16 has a radius of curvature R larger than the radius of the multi-wafer silicon wafers. From the viewpoint of sufficiently obtaining the effect of suppressing the diffusion of the gas containing the contaminating metal, the radius of curvature R of this portion is preferably more than 5 mm larger than the radius of the multi-wafer silicon wafers. And, from the viewpoint of avoiding the risk of the 1st to 4th additional blocks 20S, 20H, 22S, and 22H contacting the furnace core tube 12 when the boat 16 is loaded and unloaded, the radius of curvature R of this portion is preferably larger than the radius of the multi-wafer silicon wafers in the range of 25 mm or less.
[0064] Reference Figure 4 (B), the width W of the 1st to 4th additional blocks 20S, 20H, 22S, and 22H along the central axis X of the furnace core tube 12 is preferably 10 mm or more, more preferably 15 mm or more. This is because the operation for performing a high cleanliness treatment on the additional blocks becomes easy at this time. And, the width W of the 1st to 4th additional blocks 20S, 20H, 22S, and 22H along the central axis X of the furnace core tube 12 is preferably smaller than the widths of the 1st and 2nd dummy blocks 18S and 18H. Specifically, it is preferably 20 mm or less. At this time, from the viewpoints of reducing the economic burden when exchanging the additional blocks per batch compared to the dummy blocks and also avoiding the liquid temperature rise during etching due to the easy production of the etching tank, it is easy to perform a high cleanliness treatment on the additional blocks after the heat treatment of each batch.
[0065] In Figure 2 and 3 the distance (separation distance) between the 1st dummy block 18S and the 1st additional block 20S and the distance (separation distance) between the 2nd dummy block 18H and the 2nd additional block 20H in the central axis X direction of the furnace core tube 12 are preferably 0 mm or more and 5 mm or less. If this distance is 5 mm or less, the effects based on the 1st additional block 20S and the 2nd additional block 20H can be obtained more reliably.
[0066] In Figure 2 andFigure 3 In [description], the distance (separation distance) between the first additional block 20S and the wafer group WF, and the distance (separation distance) between the second additional block 20H and the wafer group WF in the X direction of the central axis of the core tube 12 are preferably 1 mm or more and 5 mm or less.
[0067] In Figure 2 and Figure 3 In [description], the distance (separation distance) between the first dummy block 18S and the third additional block 22S, and the distance (separation distance) between the second dummy block 18H and the fourth additional block 22H in the X direction of the central axis of the core tube 12 are preferably 0 mm or more and 5 mm or less. If this distance is 5 mm or less, the effects based on the third additional block 22S and the fourth additional block 22H can be obtained more reliably.
[0068] From the viewpoint of not hindering the temperature uniformity in the wafer setting area in the core tube 12, the first to fourth additional blocks 20S, 20H, 22S, 22H are preferably made of silicon.
[0069] From the viewpoint of preventing metal contamination of multiple silicon wafers, the first to fourth additional blocks 20S, 20H, 22S, 22H require high cleanliness. Specifically, the concentration of Fe is less than 1×10 11 atoms / cm 3 , the concentrations of Ni and Cu need to be less than 5×10 10 atoms / cm 3 , more preferably, the concentrations of Fe, Ni and Cu are less than 5×10 10 atoms / cm 3 , further preferably, the concentrations of all transition metal elements are less than 5×10 10 atoms / cm 3 , most preferably, the concentrations of all transition metal elements are less than 1×10 10 atoms / cm 3 .
[0070] Dissolve the surface layer of each block with an acid or the like, and measure the element concentration contained in the dissolved solution by ICP-MS or the like, whereby the concentration of transition metal elements in the dummy block and the additional block can be obtained.
[0071] In this embodiment, in multiple batches of heat treatment, the first to fourth additional blocks 20S, 20H, 22S, and 22H generally require high cleanliness. Therefore, for the first to fourth additional blocks 20S, 20H, 22S, and 22H, a block with high cleanliness is replaced for each batch, or a high-cleanliness treatment for removing transition metal elements is performed on the blocks used up in each batch. Specifically, transition metal elements are removed from the additional blocks through an etching treatment using a mixed acid solution based on hydrofluoric acid and nitric acid, etc. As described above, the sizes of the first to fourth additional blocks 20S, 20H, 22S, and 22H are smaller than those of the first and second dummy blocks 18S and 18H, so they are easily made highly clean.
[0072] Example
[0073] A horizontal heat treatment furnace having the Figure 1 shown structure was prepared. The inner diameter of the furnace core tube made of SiC is 220 mm. And, a Figure 5 boat having the structure shown in (A) was prepared. The recess of the boat is a semi-cylindrical recess with a radius of 75 mm. Seven batches (350 wafers) of 150-mm-diameter silicon wafers with phosphosilicate glass attached to their surfaces were loaded on the boat in such a way that the main surfaces were orthogonal to the central axis of the furnace core tube and the main surfaces of the silicon wafers adjacent to each other in each batch were in contact with each other, forming a wafer group.
[0074] A first dummy block having a cylindrical shape with an axis parallel to the central axis of the furnace core tube was arranged on the boat at a position S closer to the furnace tail side than all the silicon wafers (wafer group), and a second dummy block having a cylindrical shape with an axis parallel to the central axis of the furnace core tube was arranged at a position HS closer to the furnace mouth side than all the silicon wafers (wafer group). Each dummy block is a cylindrical silicon block with a diameter of 150 mm and a width of 40 mm, and is a block cut out from a single crystal ingot manufactured by the CZ method. However, each dummy block is no longer exchanged or cleaned in multiple batches of heat treatment, but can be reused. Therefore, as a result of measuring the concentration of transition metal elements in the used-up dummy blocks under the same conditions by the method described above, the Fe concentration is 2×10 11 atoms / cm 3 , the Ni concentration is 1×10 11 atoms / cm 3 , and the Cu concentration is less than 5×10 10 atoms / cm 3 (only Cu is less than the detection lower limit value). In addition, in the central axis direction of the furnace core tube, the distance (separation distance) between the first dummy block and the wafer group, and the distance (separation distance) between the second dummy block and the wafer group are both 25.3 mm.
[0075] As shown in Table 1, in Comparative Example 1 and Invention Examples 1 to 6, Figure 3Various changes have been made to the settings of the first to fourth additional blocks 20S, 20H, 22S, and 22H shown. The shape and dimensions of each additional block are as shown in Figure 4 (A) and (B). Figure 4 The radius of curvature of the lower half shown in (A) is 75 mm, and the radius of curvature R of the upper half is shown in Table 1. Figure 4 The width W shown in (B) is shown in Table 1. Additionally, when each additional block is set, the distance (separation distance) between each additional block and the dummy block closest to that additional block is set to 1.2 mm. Each additional block is a silicon block cut from a single-crystal silicon ingot manufactured by the CZ method, and each additional block is subjected to the high cleanliness treatment described above. Therefore, regarding each additional block, as a result of measuring the concentration of transition metal elements using the method described above, the Fe concentration is less than 1×10 11 atoms / cm 3 , and the Ni concentration and Cu concentration are each less than 5×10 10 atoms / cm 3 , each being less than the measured detection limit value.
[0076] In Comparative Example 1 and Invention Examples 1 to 6, a boat was placed inside the core tube, and heat treatment of the propulsion process was performed. The gas introduced into the core tube contains 0.5% by volume of oxygen, and the remaining portion is composed of Ar. The atmosphere temperature inside the heat equalizing tube was set to 1300 °C, and it was maintained at this temperature for 230 hours.
[0077] [Measurement of Lifetime]
[0078] After the heat treatment, the silicon wafer closest to the furnace tail side among all the silicon wafers was used as the "monitoring wafer S1", and the silicon wafer closest to the furnace mouth side was used as the "monitoring wafer H1". The lifetimes of these monitoring wafers were measured by the usual μ - PCD method. The relative values based on the lifetime of Comparative Example 1 are shown in Table 1.
[0079] [Table 1]
[0080]
[0081] As can be seen from Table 1, the lifetime values in Invention Examples 1 to 6 are greater than those in the Comparative Example.
[0082] Industrial Applicability
[0083] The heat treatment method for silicon wafers using the horizontal heat treatment furnace of the present invention can preferably be applied to the diffusion heat treatment of dopants such as phosphorus and boron from the surface layer to the inside of the silicon wafer.
[0084] Explanation of Reference Numerals
[0085] 100 - Horizontal heat treatment furnace, 10 - Uniform heat pipe, 10A - Door leaf, 10B - Opening, 10C - Suction port, 12 - Furnace core tube, 12A - Lid, 12B - Gas inlet, 12C - Gas exhaust port, 14 - Heater, 16 - Boat, 16A - Recess, 18S - First dummy block (thermal insulation block), 18H - Second dummy block (thermal insulation block), 20S - First additional block (shielding block), 20H - Second additional block (shielding block), 22S - Third additional block (shielding block), 22H - Fourth additional block (shielding block), S - Furnace tail side (gas inflow side), H - Furnace mouth side (gas outflow side), WF - Wafer group (multiple silicon wafers), X - Central axis of the furnace core tube.
Claims
1. A heat treatment method for silicon wafers using a horizontal heat treatment furnace, comprising preparing a horizontal heat treatment furnace having: a cylindrical furnace core tube with a horizontal central axis; and a heater located around the furnace core tube for heating the furnace core tube. A lid is provided at one end of the furnace core tube, a gas inlet is provided at the other end of the furnace core tube, and a gas exhaust port is provided on the furnace wall near the lid of the furnace core tube. When the side close to the lid of the furnace core tube is defined as the furnace mouth side and the side close to the gas inlet of the furnace core tube is defined as the furnace tail side, the lid is opened, and in the furnace core tube, a boat is arranged to be in the following states (A) to (C). (A) On the boat, multiple silicon wafers are arranged such that their main surfaces are orthogonal to the central axis of the furnace core tube, forming a wafer group. (B) A cylindrical first dummy block having an axis parallel to the central axis of the furnace core tube is arranged on the boat on the furnace tail side of the wafer group, and a cylindrical second dummy block having an axis parallel to the central axis of the furnace core tube is arranged on the boat on the furnace mouth side of the wafer group. (C) Configure at least one of the first additional block disposed between the first dummy block and the wafer group on the small boat and the second additional block disposed between the second dummy block and the wafer group. Regarding the first and second additional blocks, (i) the projection shape onto a virtual plane perpendicular to the central axis of the susceptor tube includes the projection shapes of the first and second dummy blocks and the multiple silicon wafers onto the virtual plane, and is a column shape having an axis parallel to the central axis of the susceptor tube, and (ii) the concentration of Fe is less than 1×10 11 atoms / cm 3 , and the concentrations of Ni and Cu are respectively less than 5×10 10 atoms / cm 3 , The lid is closed. Gas is introduced into the furnace core tube from the gas inlet, and while the gas is discharged from the gas exhaust port, the furnace core tube is heated by the heater, thereby performing heat treatment on the multiple silicon wafers.
2. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 1, wherein in (C), both the first and second additional blocks are arranged.
3. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein the first and second additional blocks are made of silicon.
4. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein in the projected shape of the first and second additional blocks onto the virtual plane, the part above the boat has a radius of curvature greater than the radius of the multiple silicon wafers by 5 mm or more.
5. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein the width of the first and second additional blocks along the central axis of the furnace core tube is in the range of 10 to 20 mm.
6. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 1, wherein in (C), at least one of a third additional block arranged on the boat on the furnace tail side of the first dummy block and a fourth additional block arranged on the boat on the furnace mouth side of the second dummy block is arranged, and the third and fourth additional blocks satisfy (i) and (ii).
7. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 6, wherein in (C), both the third and fourth additional blocks are arranged.
8. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 6 or 7, wherein the third and fourth additional blocks are made of silicon.
9. The heat treatment method for silicon wafers using a horizontal heat treatment furnace according to claim 6 or 7, wherein In the projected shape of the third and fourth additional blocks onto the virtual surface, the portion above the boat has a radius of curvature greater than the radius of the multiple silicon wafers by 5 mm or more.
10. The heat treatment method of silicon wafers using a horizontal heat treatment furnace according to claim 6 or 7, wherein The width of the third and fourth additional blocks along the central axis of the furnace core tube is in the range of 10 to 20 mm.
11. The heat treatment method of silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein The first and second dummy blocks are composed of silicon with any one of Fe, Ni, and Cu having a concentration of 1×10 11 atoms / cm 3 or more.
12. The heat treatment method of silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein The diameters of the first and second dummy blocks are equal to the diameter of the multiple silicon wafers.
13. The heat treatment method of silicon wafers using a horizontal heat treatment furnace according to claim 1 or 2, wherein The width of the first and second dummy blocks along the central axis of the furnace core tube is in the range of 40 to 75 mm.
Citation Information
Patent Citations
Heat treatment of wafer
JP1991085725A
Silicon wafer heat treatment method
CN105324834A
Heat treatment method for silicon single crystal wafer
CN107078057A