Data transmission method, device and automobile

Abstract

The present application discloses a data transmission method, device and automobile, and relates to the field of automobile communication technology. The method of the present application comprises: receiving a target data packet sent by a first target device; performing format conversion on the target data packet to obtain a target VLAN data packet; and sending the target VLAN data packet to a second target device. The present application is applicable to the process in which a device in a car sends a data packet to another device.

Description

Technical Field

[0001] The present invention relates to the technical field of automobile communication, and in particular to a data transmission method, device and automobile. Background Art

[0002] In recent years, with the continuous development of society, people's demand for cars has increased, and cars have become an indispensable part of people's daily lives. In order to ensure the normal driving of the car, data interaction is required between the various sensors, actuators and core processors in the car.

[0003] At present, when a device in a car needs to send a data packet to another device, the device usually sends the data packet to the MCU first, and the MCU converts the received data packet into UDP / TCP data format, and then sends the format-converted data packet to the other device based on the UDP / TCP protocol. However, since the MCU sends the format-converted data packet to another device based on the UDP / TCP protocol, it actually sends the format-converted data packet to another device in the transport layer, which makes the entire data packet transmission process have a large delay and low transmission efficiency. Summary of the invention

[0004] The embodiments of the present application provide a data transmission method, apparatus and automobile, the main purpose of which is to improve the transmission efficiency of a data packet sent from one device in a car to another device.

[0005] In order to solve the above technical problems, the embodiments of the present application provide the following technical solutions:

[0006] In a first aspect, the present application provides a data transmission method, which is applied to an FPGA (Field Programmable Gate Array) chip, and the method comprises:

[0007] receiving a target data packet sent by a first target device;

[0008] Performing format conversion on the target data packet to obtain a target VLAN data packet;

[0009] The target VLAN data packet is sent to a second target device.

[0010] Optionally, before converting the format of the target data packet to obtain the target VLAN data packet, the method further includes:

[0011] Determine the data bit width corresponding to the target data packet;

[0012] Determine whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold;

[0013] If yes, fill the target data packet with preset data;

[0014] The step of converting the target data packet into a format to obtain a target VLAN data packet comprises:

[0015] The target data packet that has been filled is format-converted to obtain the target VLAN data packet.

[0016] Optionally, determining a data bit width corresponding to the target data packet includes:

[0017] Calculate the data volume of the target data packet;

[0018] The data bit width corresponding to the target data packet is determined according to the data amount of the target data packet.

[0019] Optionally, sending the target VLAN data packet to a second target device includes:

[0020] The target VLAN data packet is sent to the second target device based on a VLAN protocol.

[0021] Optionally, sending the target VLAN data packet to a second target device includes:

[0022] Set the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol;

[0023] The target VLAN data packet is sent to the second target device based on the AXI-Streaming protocol.

[0024] Optionally, the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet.

[0025] In a second aspect, the present application further provides an FPGA chip, the FPGA chip comprising:

[0026] A receiving unit, configured to receive a target data packet sent by a first target device;

[0027] A conversion unit, used for performing format conversion on the target data packet to obtain a target VLAN data packet;

[0028] The sending unit is used to send the target VLAN data packet to the second target device.

[0029] Optionally, the FPGA chip further includes:

[0030] A determination unit, configured to determine a data bit width corresponding to the target data packet before the conversion unit performs format conversion on the target data packet to obtain a target VLAN data packet;

[0031] A judging unit, used to judge whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold;

[0032] A filling unit, configured to fill the target data packet with preset data when the determination unit determines that the data bit width corresponding to the target data packet is less than a preset data bit width threshold;

[0033] The conversion unit is specifically used to perform format conversion on the target data packet that has been filled to obtain the target VLAN data packet.

[0034] Optionally, the determining unit includes:

[0035] A calculation module, used to calculate the data volume of the target data packet;

[0036] The determination module is used to determine the data bit width corresponding to the target data packet according to the data amount of the target data packet.

[0037] Optionally, the sending unit includes:

[0038] The first sending module is used to send the target VLAN data packet to the second target device based on the VLAN protocol.

[0039] Optionally, the sending unit includes:

[0040] A setting module, used for setting the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol;

[0041] The second sending module is used to send the target VLAN data packet to the second target device based on the AXI-Streaming protocol.

[0042] Optionally, the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet.

[0043] In a third aspect, an embodiment of the present application provides a car, comprising the FPGA chip described in the second aspect.

[0044] In a fourth aspect, an embodiment of the present application provides a storage medium, wherein the storage medium includes a stored program, wherein when the program is running, the device where the storage medium is located is controlled to execute the data transmission method described in the first aspect.

[0045] In a fifth aspect, an embodiment of the present application provides a data transmission device, which includes a storage medium; and one or more processors, wherein the storage medium is coupled to the processor, and the processor is configured to execute program instructions stored in the storage medium; when the program instructions are executed, the data transmission method described in the first aspect is executed.

[0046] By means of the above technical solution, the technical solution provided by this application has at least the following advantages:

[0047] The present application provides a data transmission method, device and vehicle. The present application can convert the format of the target data packet by the FPGA chip after the FPGA chip receives the target data packet sent by the first target device, that is, convert the target data packet into a data packet in VLAN data format to obtain a target VLAN data packet, and send the target VLAN data packet to the second target device in the network layer. Therefore, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much shorter than the time consumed by the MCU to send the format-converted target data packet to the second target device in the transmission layer, thereby effectively improving the transmission efficiency of the first target device sending the target data packet to the second target device.

[0048] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] By reading the detailed description below with reference to the accompanying drawings, the above and other purposes, features and advantages of the exemplary embodiments of the present application will become easy to understand. In the accompanying drawings, several embodiments of the present application are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0050] Figure 1 A flow chart of a data transmission method provided by an embodiment of the present application is shown;

[0051] Figure 2 Another data transmission method flow chart provided by an embodiment of the present application is shown;

[0052] Figure 3 A block diagram of a FPGA chip according to an embodiment of the present application is shown;

[0053] Figure 4 A block diagram of the composition of another FPGA chip provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0054] The exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present application and to fully convey the scope of the present application to those skilled in the art.

[0055] It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application should have the common meanings understood by technicians in the field to which this application belongs.

[0056] The present application embodiment provides a data transmission method, such as Figure 1 As shown, the method is applied to an FPGA chip, and the method includes:

[0057] 101. Receive a target data packet sent by a first target device.

[0058] In the embodiment of the present application, the execution subject in each step is an FPGA chip pre-installed in the target car.

[0059] Among them, the first target device can specifically be: any one of the various sensors, actuators, core processors and other devices in the target car, and the embodiments of the present application do not specifically limit this; the second target device can specifically be: any one of the various sensors, actuators, core processors and other devices in the target car, and the embodiments of the present application do not specifically limit this; the target data packet can specifically be: any one of the low-speed data packets such as CAN data packets, I2C data packets and serial port data packets.

[0060] In an embodiment of the present application, when the first target device needs to interact with the second target device for data, that is, when the first target device needs to send a target data packet to the second target device, the first target device first needs to send the target data packet to the FPGA chip. At this time, the FPGA chip can receive the target data packet sent by the first target device.

[0061] Specifically, in this step, the FPGA chip may receive the target data packet sent by the first target device through a preset AXI-Lite interface, but is not limited thereto.

[0062] 102. Perform format conversion on the target data packet to obtain a target VLAN data packet.

[0063] In an embodiment of the present application, after receiving the target data packet sent by the first target device, the FPGA chip can convert the format of the target data packet, that is, convert the target data packet into a data packet in a VLAN data format, thereby obtaining a target VLAN data packet.

[0064] 103. Send the target VLAN data packet to the second target device.

[0065] In an embodiment of the present application, after the FPGA chip converts the target data packet into a target VLAN data packet, it can send the target VLAN data packet to the second target device. Specifically, in this step, the FPGA chip can send the target VLAN data packet to the second target device based on the VLAN protocol, but is not limited to this. Since the FPGA chip specifically sends the target VLAN data packet to the second target device in the network layer, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much less than the time consumed by the MCU to send the format-converted target data packet to the second target device in the transport layer, thereby effectively improving the transmission efficiency of the first target device sending the target data packet to the second target device.

[0066] An embodiment of the present application provides a data transmission method. After the FPGA chip receives a target data packet sent by a first target device, the FPGA chip can perform format conversion on the target data packet, that is, convert the target data packet into a data packet in a VLAN data format to obtain a target VLAN data packet, and send the target VLAN data packet to a second target device in the network layer. Therefore, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much shorter than the time consumed by the MCU to send the format-converted target data packet to the second target device in the transmission layer, thereby effectively improving the transmission efficiency of the first target device sending the target data packet to the second target device.

[0067] To explain in more detail below, the present application embodiment provides another data transmission method, specifically as follows Figure 2 As shown, the method is applied to an FPGA chip, and the method includes:

[0068] 201. Receive a target data packet sent by a first target device.

[0069] Regarding step 201, receiving a target data packet sent by the first target device, reference may be made to Figure 1 The description of the corresponding parts will not be repeated here in the embodiments of the present application.

[0070] 202. Perform filling processing on the target data packet.

[0071] Among them, the data bit width corresponding to the target data packet can be but is not limited to: 4 bytes, 8 bytes, 16 bytes, etc.; the preset data bit width threshold is an integer multiple of 4 bytes, such as 32 bytes, 36 bytes, 40 bytes, etc.; among them, the preset data bit width threshold is greater than or equal to the data bit width corresponding to the target data packet.

[0072] In the embodiment of the present application, after receiving the target data packet sent by the first target device, the FPGA chip needs to determine whether the target data packet needs to be filled. The specific process of the FPGA chip determining whether the target data packet needs to be filled is as follows:

[0073] First, the data size of the target data packet is calculated, and the data bit width corresponding to the target data packet is determined according to the data size of the target data packet; secondly, it is determined whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold; when it is determined that the data bit width corresponding to the target data packet is less than the preset data bit width threshold, the target data packet is filled with preset data, wherein the preset data is data without any practical meaning; when it is determined that the data bit width corresponding to the target data packet is equal to the preset data bit width threshold, there is no need to fill the target data packet.

[0074] 203. Perform format conversion on the target data packet that has been filled to obtain a target VLAN data packet.

[0075] In the embodiment of the present application, after the FPGA chip performs filling processing on the target data packet, it can convert the format of the filled target data packet, that is, convert the filled target data packet into a data packet in the VLAN data format, thereby obtaining the target VLAN data packet.

[0076] Furthermore, in the embodiment of the present application, the FPGA chip can output and display the process of converting the target data packet into the target VLAN data packet through a preset state machine program.

[0077] Furthermore, in an embodiment of the present application, when the sum of the data bit widths corresponding to the N target data packets is still less than or equal to the preset data bit width threshold, the N target data packets can be first spliced ​​to obtain a spliced ​​data packet, and then the spliced ​​data packet is padded according to the above method, and the format of the padded spliced ​​data packet is converted to obtain a target VLAN data packet, where N is a positive integer greater than 1.

[0078] 204. Send the target VLAN data packet to the second target device based on the VLAN protocol.

[0079] In the embodiment of the present application, after the FPGA chip converts the target data packet after the padding process into the target VLAN data packet, it can send the target VLAN data packet to the second target device based on the VLAN protocol. Since the FPGA chip specifically sends the target VLAN data packet to the second target device at the network layer, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much less than the time consumed by the MCU to send the target data packet after format conversion to the second target device at the transport layer, thereby effectively improving the transmission efficiency of the first target device sending the target data packet to the second target device.

[0080] Furthermore, in an embodiment of the present application, after converting the target data packet that has been filled into a target VLAN data packet, the FPGA chip can also set the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol, and send the target VLAN data packet to the second target device based on the AXI-Streaming protocol, that is, send the target VLAN data packet to the second target device in the link layer (i.e., MAC layer) based on the AXI-Streaming protocol, thereby further reducing the time consumed in sending the target VLAN data packet to the second target device, and further improving the transmission efficiency of the first target device sending the target data packet to the second target device. Specifically, in this step, the FPGA chip can perform the operation of sending the target VLAN data packet to the second target device based on the AXI-Streaming protocol through the TSN (Time Sensitive Network) function module, but is not limited to this.

[0081] Furthermore, as a response to the above Figure 1 and Figure 2 In order to realize the method shown in the figure, another embodiment of the present application also provides an FPGA chip. This device embodiment corresponds to the aforementioned method embodiment. For ease of reading, this device embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the FPGA chip in this embodiment can correspond to all the contents of the aforementioned method embodiment. The FPGA chip is used to improve the transmission efficiency of a data packet sent from one device in a car to another device, specifically as follows Figure 3 As shown, the FPGA chip includes:

[0082] A receiving unit 31, configured to receive a target data packet sent by a first target device;

[0083] The conversion unit 32 is used to perform format conversion on the target data packet to obtain a target VLAN data packet;

[0084] The sending unit 33 is configured to send the target VLAN data packet to a second target device.

[0085] Further, such as Figure 4 As shown, the FPGA chip also includes:

[0086] The determining unit 34 is used to determine the data bit width corresponding to the target data packet before the converting unit 32 performs format conversion on the target data packet to obtain the target VLAN data packet;

[0087] A judging unit 35, configured to judge whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold;

[0088] A filling unit 36, configured to fill the target data packet with preset data when the determination unit 35 determines that the data width corresponding to the target data packet is less than a preset data width threshold;

[0089] The conversion unit 32 is specifically configured to perform format conversion on the target data packet that has been filled to obtain the target VLAN data packet.

[0090] Further, such as Figure 4 As shown, the determination unit 34 includes:

[0091] A calculation module 341 is used to calculate the data volume of the target data packet;

[0092] The determination module 342 is used to determine the data bit width corresponding to the target data packet according to the data volume of the target data packet.

[0093] Further, such as Figure 4 As shown, the sending unit 33 includes:

[0094] The first sending module 331 is configured to send the target VLAN data packet to the second target device based on a VLAN protocol.

[0095] Further, such as Figure 4 As shown, the sending unit 33 includes:

[0096] A setting module 332, used to set the transmission protocol corresponding to the target VLAN data packet to be the AXI-Streaming protocol;

[0097] The second sending module 333 is used to send the target VLAN data packet to the second target device based on the AXI-Streaming protocol.

[0098] Further, such as Figure 4As shown, the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet.

[0099] The embodiments of the present application provide a data transmission method, device and vehicle. The embodiments of the present application can, after the FPGA chip receives the target data packet sent by the first target device, perform format conversion on the target data packet by the FPGA chip, that is, convert the target data packet into a data packet in VLAN data format to obtain a target VLAN data packet, and send the target VLAN data packet to the second target device in the network layer. Therefore, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much shorter than the time consumed by the MCU to send the format-converted target data packet to the second target device in the transmission layer, thereby effectively improving the transmission efficiency of the first target device sending the target data packet to the second target device.

[0100] The FPGA chip includes a processor and a memory. The above-mentioned receiving unit, conversion unit and sending unit are all stored in the memory as program units, and the processor executes the above-mentioned program units stored in the memory to realize corresponding functions.

[0101] The processor includes a kernel, which calls the corresponding program unit from the memory. One or more kernels can be set, and the transmission efficiency of a data packet sent from one device in the car to another device can be improved by adjusting the kernel parameters.

[0102] An embodiment of the present application also provides a car, which includes the FPGA chip described above.

[0103] An embodiment of the present application provides a storage medium, which includes a stored program, wherein when the program is executed, a device where the storage medium is located is controlled to execute the above-mentioned data transmission method.

[0104] An embodiment of the present application also provides a data transmission device, which includes a storage medium; and one or more processors, wherein the storage medium is coupled to the processor, and the processor is configured to execute program instructions stored in the storage medium; when the program instructions are executed, the above-mentioned data transmission method is executed.

[0105] The embodiment of the present application provides a device, which includes a processor, a memory, and a program stored in the memory and executable on the processor. When the processor executes the program, the following steps are implemented:

[0106] receiving a target data packet sent by a first target device;

[0107] Performing format conversion on the target data packet to obtain a target VLAN data packet;

[0108] The target VLAN data packet is sent to a second target device.

[0109] Furthermore, before converting the format of the target data packet to obtain the target VLAN data packet, the method further includes:

[0110] Determine the data bit width corresponding to the target data packet;

[0111] Determine whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold;

[0112] If yes, fill the target data packet with preset data;

[0113] The step of converting the target data packet into a format to obtain a target VLAN data packet comprises:

[0114] The target data packet that has been filled is format-converted to obtain the target VLAN data packet.

[0115] Further, the determining the data bit width corresponding to the target data packet includes:

[0116] Calculate the data volume of the target data packet;

[0117] The data bit width corresponding to the target data packet is determined according to the data amount of the target data packet.

[0118] Further, sending the target VLAN data packet to the second target device includes:

[0119] The target VLAN data packet is sent to the second target device based on a VLAN protocol.

[0120] Further, sending the target VLAN data packet to the second target device includes:

[0121] Set the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol;

[0122] The target VLAN data packet is sent to the second target device based on the AXI-Streaming protocol.

[0123] Furthermore, the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet.

[0124] The present application also provides a computer program product, which, when executed on a data processing device, is suitable for executing a program code that initializes the following method steps: receiving a target data packet sent by a first target device; performing format conversion on the target data packet to obtain a target VLAN data packet; and sending the target VLAN data packet to a second target device.

[0125] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0126] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0127] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0128] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0129] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0130] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0131] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0132] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0133] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0134] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A data transmission method, characterized in that: The method is applied to a field programmable gate array chip, comprising: Receive a target data packet sent by a first target device, wherein the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet; Determine the data bit width corresponding to the target data packet; Determine whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold; If yes, fill the target data packet with preset data; The target data packet is format-converted to obtain a target VLAN data packet, including: format-converting the target data packet after padding to obtain the target VLAN data packet; wherein, when the sum of the data bit widths corresponding to a plurality of target data packets is less than or equal to the preset data bit width threshold, the plurality of target data packets are spliced ​​to obtain a spliced ​​data packet, and if the data bit width of the spliced ​​data packet is less than the preset data bit width threshold, the spliced ​​data packet is padded again, and the padded spliced ​​data packet is format-converted to obtain the target VLAN data packet; The target VLAN data packet is sent to a second target device.

2. The method according to claim 1, characterized in that The determining the data bit width corresponding to the target data packet includes: Calculate the data volume of the target data packet; The data bit width corresponding to the target data packet is determined according to the data amount of the target data packet.

3. The method according to claim 1, characterized in that The sending of the target VLAN data packet to the second target device comprises: The target VLAN data packet is sent to the second target device based on a VLAN protocol.

4. The method according to claim 1, characterized in that The sending of the target VLAN data packet to the second target device comprises: Set the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol; The target VLAN data packet is sent to the second target device based on the AXI-Streaming protocol.

5. A field programmable gate array chip, characterized in that: include: A receiving unit, configured to receive a target data packet sent by a first target device, wherein the target data packet is specifically any one of a CAN data packet, an I2C data packet and a serial port data packet; A conversion unit, used for performing format conversion on the target data packet to obtain a target VLAN data packet; A sending unit, configured to send the target VLAN data packet to a second target device; A determination unit, configured to determine a data bit width corresponding to the target data packet before the conversion unit performs format conversion on the target data packet to obtain a target VLAN data packet; A judging unit, used to judge whether the data bit width corresponding to the target data packet is less than a preset data bit width threshold; A filling unit, configured to fill the target data packet with preset data when the determination unit determines that the data bit width corresponding to the target data packet is less than a preset data bit width threshold; The conversion unit is specifically used to perform format conversion on the target data packet that has been padded to obtain the target VLAN data packet; wherein, when the sum of the data bit widths corresponding to multiple target data packets is less than or equal to the preset data bit width threshold, the multiple target data packets are spliced ​​to obtain a spliced ​​data packet; if the data bit width of the spliced ​​data packet is less than the preset data bit width threshold, the spliced ​​data packet is padded again, and the format of the padded spliced ​​data packet is converted to obtain the target VLAN data packet.

6. The field programmable gate array chip according to claim 5, characterized in that: The determining unit comprises: A calculation module, used to calculate the data volume of the target data packet; The determination module is used to determine the data bit width corresponding to the target data packet according to the data amount of the target data packet.

7. The field programmable gate array chip according to claim 5, characterized in that: The sending unit comprises: The first sending module is used to send the target VLAN data packet to the second target device based on the VLAN protocol.

8. The field programmable gate array chip according to claim 5, characterized in that: The sending unit comprises: A setting module, used for setting the transmission protocol corresponding to the target VLAN data packet to the AXI-Streaming protocol; The second sending module is used to send the target VLAN data packet to the second target device based on the AXI-Streaming protocol.

9. A car, characterized in that: The automobile comprises: a field programmable gate array chip as described in any one of claims 5-8.

10. A storage medium, characterized in that: The storage medium includes a stored program, wherein when the program is running, the device where the storage medium is located is controlled to execute the data transmission method according to any one of claims 1 to 4.

11. A data transmission device, characterized in that: The device includes a storage medium; and one or more processors, the storage medium is coupled to the processor, and the processor is configured to execute program instructions stored in the storage medium; when the program instructions are executed, the data transmission method described in any one of claims 1 to 4 is executed.

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