A microcontroller chip testing method, device, system and storage medium

Abstract

The present application proposes a microcontroller chip testing method, device, system and storage medium, the method comprising: generating a test signal after the microcontroller chip is running; inputting the test signal into the microcontroller chip for testing; real-time monitoring of the running state of the microcontroller chip, generating a corresponding test record; based on the test record, determining the test result of the microcontroller chip. The present application performs actual functional testing on the microcontroller chip, inputs the test signal into the microcontroller chip for running, monitors the running state of the microcontroller chip in real time, and timely and effectively screens out some defective chips to avoid problems such as product quality degradation and financial losses.

Description

Technical Field

[0001] The present application relates to the field of testing technology, and in particular to a microcontroller chip testing method, device, system and storage medium. Background Art

[0002] As the integration complexity of MCU (Micro Controller Unit) increases, the possibility of design and manufacturing defects increases greatly. In order to avoid MCU defects, each MCU shipped in batch production needs to be tested to ensure that each shipped chip meets the test specifications and quality requirements.

[0003] At present, the functional test of MCU is mainly carried out by software simulation test on MCU in the design stage, using the program code burned in by the user. During the production test of ATE (Automatic Test Equipment), since ATE cannot automatically carry out the actual test of relevant functions of MCU (such as power ripple interference test), the actual test of relevant functions is not carried out.

[0004] However, in the process of research and practice of the prior art, the inventors of the present application found that due to the individual differences of MCUs and other peripherals, if only software simulation is performed without actual testing, some defective chips cannot be screened out in a timely and effective manner, resulting in product quality degradation and financial losses.

[0005] The preceding description is intended to provide general background information and does not necessarily constitute prior art. Summary of the invention

[0006] In response to the above technical problems, the present application provides a microcontroller chip testing method, device, system and storage medium. By performing actual tests on the microcontroller chip, the test signal is input into the microcontroller chip and then run, the operating status of the microcontroller chip is monitored in real time, and some defective chips are screened out in a timely and effective manner to avoid problems such as product quality degradation and financial loss.

[0007] In order to solve the above technical problems, the present application provides a microcontroller chip testing method, comprising the following steps:

[0008] After the microcontroller chip is running, a test signal is generated;

[0009] Input the test signal into the microcontroller chip and then perform the test;

[0010] Monitor the operating status of the microcontroller chip in real time and generate corresponding test records;

[0011] Based on the test record, a test result of the microcontroller chip is determined.

[0012] Optionally, determining the test result of the microcontroller chip based on the test record includes:

[0013] Based on the test record, detecting whether the microcontroller chip is running the test code;

[0014] If yes, it is determined that the microcontroller chip is in a normal working state and that the microcontroller chip is a qualified chip;

[0015] If not, it is determined that the microcontroller chip is in an abnormal working state and that the microcontroller chip is a failed chip.

[0016] Optionally, if the test signal is a power ripple interference signal, the step of inputting the test signal into the microcontroller chip for testing includes:

[0017] The power ripple interference signal is input into the power supply of the microcontroller chip and then tested.

[0018] Optionally, the step of inputting the power ripple interference signal into the power supply of the microcontroller chip for testing comprises:

[0019] In response to the signal adjustment instruction, the amplitude and frequency of the power ripple interference signal are adjusted;

[0020] The adjusted power ripple interference signal is input into the power supply of the microcontroller chip for testing.

[0021] Optionally, if the test signal is a power ripple interference signal, the real-time monitoring of the operating state of the microcontroller chip and the generation of a corresponding test record include:

[0022] The level state of the reset pin of the microcontroller chip is monitored in real time, and a corresponding test record is generated.

[0023] Optionally, if the test signal is a power ripple interference signal, determining the test result of the microcontroller chip based on the test record includes:

[0024] Based on the test record, reading the historical level state of the reset pin of the microcontroller chip;

[0025] If the historical level state of the reset pin has a preset level state, it is determined that the microcontroller chip is reset, and the microcontroller chip is determined to be an unqualified chip;

[0026] If the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip.

[0027] Accordingly, an embodiment of the present application provides a microcontroller chip testing device, comprising:

[0028] A test signal module, used for generating a test signal after the microcontroller chip is running;

[0029] A signal input module, used for inputting the test signal into the microcontroller chip for testing;

[0030] A monitoring module, used to monitor the operating status of the microcontroller chip in real time and generate corresponding test records;

[0031] A determination module is used to determine a test result of the microcontroller chip based on the test record.

[0032] Optionally, the determination module includes a detection unit and a determination unit;

[0033] The detection unit is used to detect whether the microcontroller chip is running the test code based on the test record;

[0034] The determination unit is used to determine that the microcontroller chip is in a normal working state if the microcontroller chip is running the test code, and determine that the microcontroller chip is a qualified chip; if the microcontroller chip is not running the test code, determine that the microcontroller chip is in an abnormal working state, and determine that the microcontroller chip is an unqualified chip.

[0035] The embodiment of the present application provides a microcontroller chip testing system, including an automated testing device, an interference generating circuit, and a microcontroller chip;

[0036] The automated testing equipment is used to control the interference generating circuit to generate a test signal, monitor the operating status of the microcontroller chip in real time, obtain corresponding test records, and determine the test result of the microcontroller chip based on the test records;

[0037] The interference generating circuit is used to generate a test signal after the microcontroller chip is running, and input the test signal into the microcontroller chip for testing;

[0038] The microcontroller chip is used to perform a test after receiving a test signal generated by the interference generating circuit, and generate a corresponding test record.

[0039] An embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the microcontroller chip testing method as described above.

[0040] Implementing the embodiments of the present invention has the following beneficial effects:

[0041] As described above, the present application provides a microcontroller chip testing method, device, system and storage medium, the method comprising: generating a test signal after the microcontroller chip is running; inputting the test signal into the microcontroller chip and then testing it; real-time monitoring of the running state of the microcontroller chip, generating a corresponding test record; based on the test record, determining the test result of the microcontroller chip. The present application performs actual testing on the microcontroller chip, inputs the test signal into the microcontroller chip and then runs it, monitors the running state of the microcontroller chip in real time, and timely and effectively screens out some defective chips, thus filling in the gap of the prior art in performing actual functional testing on microcontroller chips, and avoiding the problem of subsequent product quality decline and financial loss due to failure to perform actual functional testing on the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.

[0043] Figure 1 It is a flowchart of a microcontroller chip testing method provided in an embodiment of the present application;

[0044] Figure 2 It is a flowchart of a first implementation method of step S4 provided in an embodiment of the present application;

[0045] Figure 3 It is a flowchart of a power supply ripple interference testing method provided in an embodiment of the present application;

[0046] Figure 4 is a flow chart of a second implementation of step S4 provided in an embodiment of the present application;

[0047] Figure 5 is a structural schematic diagram of a microcontroller chip testing device provided in an embodiment of the present application;

[0048] Figure 6 It is a structural schematic diagram of the microcontroller chip testing system provided in an embodiment of the present application.

[0049] The realization of the purpose, functional features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. The above-mentioned drawings have shown clear embodiments of this application, which will be described in more detail later. These drawings and textual descriptions are not intended to limit the scope of the concept of this application in any way, but to illustrate the concept of this application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0050] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0051] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0052] It should be understood that, although the terms first, second, third, etc. may be used to describe various information in this article, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this article, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein can be interpreted as "at the time of..." or "when..." or "in response to determination". Furthermore, as used in this article, the singular forms "one", "one" and "the" are intended to also include plural forms, unless there is an opposite indication in the context. It should be further understood that the terms "comprising", "including" indicate the presence of the described features, steps, operations, elements, components, projects, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, steps, operations, elements, components, projects, kinds, and / or groups. The terms "or", "and / or", "including at least one of the following" etc. used in this application can be interpreted as inclusive, or mean any one or any combination. For example, “comprising at least one of the following: A, B, C” means “any of the following: A; B; C; A and B; A and C; B and C; A and B and C”, and for another example, “A, B or C” or “A, B and / or C” means “any of the following: A; B; C; A and B; A and C; B and C; A and B and C”. An exception to this definition will only occur when a combination of elements, functions, steps or operations are inherently mutually exclusive in some manner.

[0053] It should be understood that, although the various steps in the flowchart in the embodiment of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily performed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and it can be performed in other orders. Moreover, at least a portion of the steps in the figure may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and their execution order is not necessarily performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0054] As used herein, the words "if" and "if" may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0055] It should be noted that in this article, step codes such as S10 and S20 are used for the purpose of expressing the corresponding content more clearly and concisely, and do not constitute a substantial limitation on the sequence. When implementing the step, those skilled in the art may execute S20 first and then S10, etc., but these should all be within the scope of protection of this application.

[0056] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0057] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application and have no specific meaning. Therefore, "module", "component" or "unit" can be used in a mixed manner.

[0058] First, the application scenarios that this application can provide are introduced, such as providing a microcontroller chip testing method, device, system and storage medium. By performing actual functional tests on the microcontroller chip, the operating status of the microcontroller chip can be monitored in real time, and some defective chips can be screened out in a timely and effective manner to avoid problems such as product quality degradation and financial loss.

[0059] See also Figure 1 , Figure 1 : is a flow chart of a microcontroller chip testing method provided in an embodiment of the present application. The microcontroller chip testing method may specifically include:

[0060] S1. After the microcontroller chip is running, a test signal is generated.

[0061] Specifically, for step S1, after the microcontroller chip MCU responds to the running instruction, the microcontroller chip MCU is powered on or reset to run, and a test signal corresponding to the actual function is generated through the interference generating circuit.

[0062] S2. Input the test signal to the microcontroller chip and then perform the test.

[0063] Specifically, for step S2, the generated test signal is input into the microcontroller chip MCU. For example, when the test signal is a power interference signal, the power interference signal is input into the power supply of the microcontroller chip MCU for interference testing.

[0064] S3. Monitor the operating status of the microcontroller chip in real time and generate corresponding test records.

[0065] Specifically, for step S3, after the test signal is input into the microcontroller chip to perform actual testing of relevant functions, the operating status of the microcontroller chip is monitored in real time, and corresponding test records are generated and stored in real time.

[0066] S4. Based on the test record, determine the test result of the microcontroller chip.

[0067] Specifically, for step S4, the test result of the microcontroller chip is determined according to the test record generated after the actual functional test, and whether the microcontroller chip is a qualified chip is determined.

[0068] Alternatively, if Figure 2 As shown, in some embodiments, step S4 may specifically include:

[0069] S41. Based on the test record, detect whether the microcontroller chip is running the test code;

[0070] S42. If yes, it is determined that the microcontroller chip is in normal working condition and the microcontroller chip is a qualified chip;

[0071] S43. If not, it is determined that the microcontroller chip is in an abnormal working state and the microcontroller chip is determined to be an unqualified chip.

[0072] Specifically, the test records are obtained and identified to detect whether the microcontroller chip is running the test code. If so, the microcontroller chip is determined to be in a normal working state and is a qualified chip, and other test items of the microcontroller chip are continued to be tested. If not, the microcontroller chip is determined to be in an abnormal working state and cannot work normally, and is determined to be a defective chip, and subsequent processing is performed according to the process of the defective chip, such as tracing back the cause and correction.

[0073] It can be seen that the present embodiment provides a method for testing a microcontroller chip, the method comprising: generating a test signal after the microcontroller chip is running; inputting the test signal into the microcontroller chip and then testing it; real-time monitoring of the running state of the microcontroller chip and generating a corresponding test record; based on the test record, determining the test result of the microcontroller chip. By actually testing the microcontroller chip, inputting the test signal into the microcontroller chip and then running it, and monitoring the running state of the microcontroller chip in real time, some defective chips can be screened out in a timely and effective manner, thus filling the gap in the actual functional testing of microcontroller chips in the prior art and avoiding the problem of subsequent product quality decline and financial loss due to the failure to perform actual functional testing on the chip.

[0074] The microcontroller chip integrates LDO (Low Dropout Regulator) to provide power for the core and related peripherals. When the input voltage ripple is large, the LDO output voltage may be unstable, resulting in core logic errors and MCU program runaway, which in turn causes the device to crash and fail to operate normally.

[0075] Alternatively, if Figure 3 As shown, in some embodiments, when the test signal is a power ripple interference signal, a specific implementation method of a power ripple interference test method for a microcontroller chip is also provided, including:

[0076] S11. After the microcontroller chip is running, a power ripple interference signal is generated;

[0077] S21. Input the power ripple interference signal to the power supply of the microcontroller chip and then perform the test.

[0078] Optionally, in some embodiments, step S21 may specifically include:

[0079] S211. In response to the signal adjustment instruction, adjust the amplitude and frequency of the power ripple interference signal;

[0080] S212. Input the adjusted power ripple interference signal to the power supply of the microcontroller chip and then conduct a test.

[0081] Specifically, the power ripple interference test can test the working condition of the microcontroller chip when there is ripple interference in the input power supply. First, the power ripple interference signal is input to the power supply of the microcontroller chip, and then the power ripple interference test is performed. In a specific embodiment, the microcontroller chip can be powered by an automated testing device, and then the generated power ripple interference signal is input to the power supply of the microcontroller chip through a power interference generating circuit to perform a power ripple interference test, wherein the power interference generating circuit is controlled by the automated testing device to adjust the amplitude and frequency of the power ripple signal.

[0082] Optionally, in some embodiments, when the test signal is a power ripple interference signal, step S3 may specifically include:

[0083] S31. Monitor the level status of the reset pin of the microcontroller chip in real time and generate corresponding test records.

[0084] Specifically, by real-time monitoring of the level state of the reset pin of the microcontroller chip, for example, by real-time monitoring of the NRST pin level of the microcontroller chip through a digital detection function, a corresponding test record is generated and stored.

[0085] S4. Based on the test records, determine the test results of the microcontroller chip

[0086] Alternatively, if Figure 4 As shown, in some embodiments, when the test signal is a power ripple interference signal, step S4 may specifically include:

[0087] S401. Based on the test record, read the historical level status of the reset pin of the microcontroller chip;

[0088] S402. If the historical level state of the reset pin exists in the preset level state, it is determined that the microcontroller chip is reset and the microcontroller chip is determined to be an unqualified chip;

[0089] S403. If the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip.

[0090] Specifically, when the test signal is a power ripple interference signal, by reading the historical level state of the reset pin of the microcontroller chip in the test record, if a preset level state (low level state) appears in the historical level state, it is judged that the microcontroller chip is reset under the power ripple interference, that is, it cannot work normally under the power ripple interference, and the microcontroller chip is judged to be an unqualified chip; if the preset level state (low level state) does not appear in the historical level state, it is judged that the microcontroller chip is not reset under the power ripple interference, that is, it can still work normally under the power ripple interference, and the microcontroller chip is judged to be a qualified chip.

[0091] It can be seen that the power ripple interference test method for the microcontroller chip provided in this embodiment generates a power ripple interference signal through an interference generating circuit to perform a power ripple interference test on the microcontroller chip, thereby realizing automated testing, avoiding the time cost and product cost problems of separate testing, improving test efficiency, and screening out chips whose anti-interference capabilities do not meet the requirements in advance, thereby ensuring product quality.

[0092] Accordingly, if Figure 5 As shown, an embodiment of the present application provides a microcontroller chip testing device, including a test signal module 100 , a signal input module 200 , a monitoring module 300 and a determination module 400 .

[0093] Wherein, the test signal module 100 is used to generate a test signal after the microcontroller chip is running;

[0094] Specifically, for the test signal module 100, after the microcontroller chip MCU responds to the running instruction, the microcontroller chip MCU is powered on or reset to run, and a test signal corresponding to the actual function is generated through the interference generating circuit.

[0095] The signal input module 200 is used to input the test signal into the microcontroller chip for testing;

[0096] Specifically, for the signal input module 200, the generated test signal is input into the microcontroller chip MCU. For example, when the test signal is a power interference signal, the power interference signal is input into the power supply of the microcontroller chip MCU for interference testing.

[0097] The monitoring module 300 is used to monitor the operating status of the microcontroller chip in real time and generate corresponding test records;

[0098] Specifically, for the monitoring module 300, after inputting the test signal into the microcontroller chip to perform actual testing of related functions, the operating status of the microcontroller chip is monitored in real time, and corresponding test records are generated and stored in real time.

[0099] The determination module 400 is used to determine the test result of the microcontroller chip based on the test record.

[0100] Specifically, the determination module 400 determines the test result of the microcontroller chip according to the test record generated after the actual functional test, and determines whether the microcontroller chip is a qualified chip.

[0101] Optionally, in some embodiments, the determination module 400 includes a detection unit and a determination unit;

[0102] a detection unit, for detecting whether the microcontroller chip is running the test code based on the test record;

[0103] The determination unit is used to determine that the microcontroller chip is in a normal working state if the microcontroller chip is running a test code, and determine that the microcontroller chip is a qualified chip; if the microcontroller chip is not running the test code, determine that the microcontroller chip is in an abnormal working state, and determine that the microcontroller chip is an unqualified chip.

[0104] Optionally, in some embodiments, when the test signal is a power ripple interference signal, the microcontroller chip testing device also includes a power ripple interference testing module, which is used to respond to a signal adjustment instruction and adjust the amplitude and frequency of the power ripple interference signal; input the adjusted power ripple interference signal to the power supply of the microcontroller chip for testing; monitor the level state of the reset pin of the microcontroller chip in real time and generate a corresponding test record; based on the test record, read the historical level state of the reset pin of the microcontroller chip; if the historical level state of the reset pin has a preset level state, it is determined that the microcontroller chip has been reset, and the microcontroller chip is determined to be an unqualified chip; if the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip.

[0105] It can be seen that the microcontroller chip testing device provided in this embodiment generates a test signal through the test signal module after the microcontroller chip is running; inputs the test signal to the microcontroller chip through the signal input module and then tests it; monitors the running state of the microcontroller chip in real time through the monitoring module and generates corresponding test records; and determines the test result of the microcontroller chip based on the test records through the judgment module. This embodiment performs actual tests on the microcontroller chip, inputs the test signal to the microcontroller chip and then runs it, monitors the running state of the microcontroller chip in real time, and timely and effectively screens out some defective chips, which fills the gap in the actual functional testing of microcontroller chips in the prior art and avoids the problem of subsequent product quality decline and financial loss due to the failure to perform actual functional testing on the chip.

[0106] like Figure 6 As shown, an embodiment of the present application provides a microcontroller chip testing system, including an automated testing device 10, an interference generating circuit 20 and a microcontroller chip 30;

[0107] The automated test equipment 10 is used to control the interference generating circuit 20 to generate a test signal, monitor the operation status of the microcontroller chip 30 in real time, obtain the corresponding test record, and determine the test result of the microcontroller chip 30 based on the test record;

[0108] Specifically, the automated testing equipment 10 may be a third-party integrated circuit testing machine currently available on the market. In this embodiment, the automated testing equipment 10 provides an adjustable voltage stable power supply to the microcontroller chip 30 to be tested, controls the interference generating circuit 20 to generate a preset power supply interference, and monitors the NRST pin level of the microcontroller chip 30 in real time through a digital detection function. When it is at a low level, it is determined that the MCU is reset under power supply interference, thereby screening out microcontroller chips with weak anti-interference capabilities.

[0109] The interference generating circuit 20 is used to generate a test signal after the microcontroller chip 30 is running, and input the test signal to the microcontroller chip 30 for testing;

[0110] Specifically, the interference generating circuit 20 is composed of discrete devices such as DAC, operational amplifier, capacitor and resistor. The DAC is connected to the digital PIN of the automated testing equipment 10. The DAC is given digital excitation to control the DAC to generate a preset waveform, which is then increased through the operational amplifier to increase its driving capability and added to the power supply of the microcontroller chip 30 to achieve controllable interference.

[0111] The microcontroller chip 30 is used to perform a test after receiving the test signal generated by the interference generating circuit 20 and generate a corresponding test record.

[0112] Specifically, the microcontroller chip 30 needs to be tested for its functional integrity and performance indicators before leaving the factory to screen out unqualified products.

[0113] Optionally, in some embodiments, the microcontroller chip testing system may further include a baseboard 40 (Loadboard) for wiring, placing devices to be tested and functional circuits, and connecting to the automated testing equipment 10 .

[0114] In the prior art, the functions of the chip are mainly tested by ATE automated testing equipment to see if the performance meets the requirements. However, since the existing ATE automated testing equipment does not provide actual testing of the relevant functions of the MCU, such as power ripple interference testing, the existing ATE automated testing equipment cannot perform power ripple interference testing on the test chip. At present, when performing power ripple interference testing on the test chip, a test circuit is built separately on the integrated circuit of each chip to be tested, thereby manually testing the power ripple anti-interference ability of the chip. However, this testing method is costly and the process is very cumbersome. It is necessary to build a test circuit on the integrated circuit of each chip to be tested, and the test coverage is low, and the effect of automated standard testing cannot be achieved.

[0115] The microcontroller chip test system in this embodiment adds a power interference generating circuit on the Loadboard (bottom board), connects the interference generated by this circuit to the power supply of the microcontroller chip, and then controls the DAC through the automated test equipment to adjust the amplitude and frequency of the output ripple, and reads back the state of the microcontroller chip, and tests whether the records can work normally under different ripple interferences, thereby screening out the chips that fail the test under standard conditions. In this embodiment, the bottom board is used to place the chip to be tested and the functional circuit, and is a universal test board. After each test is completed, only the chip to be tested on the bottom board needs to be replaced to perform the same standard functional test on the next chip to be tested, so there is no need to build a test circuit for manual testing separately, which greatly reduces the test cost, and the automated standard test is completed by the automated test equipment, achieving efficient and reliable test results.

[0116] It can be seen that the microcontroller chip test system of this embodiment can test the working condition of the microcontroller chip when there is ripple interference in the input power supply through the power ripple interference test. The microcontroller chip is powered by the automated test equipment. Since the power supply of the automated test equipment is a clean power supply, a power interference generating circuit is added to the Loadboard (bottom board). This circuit is composed of a DAC and an operational amplifier. The interference generated by this circuit is connected to the power supply of the microcontroller chip. Then, the DAC is controlled by the automated test equipment to adjust the amplitude and frequency of the output ripple, and the state of the microcontroller chip is read back. The test record can work normally under different ripple interferences, and the chips that fail the test under standard conditions are screened out to improve product quality. At the same time, the circuit structure used in this test method is simple, and there is no need to build a test circuit for manual testing separately, which is low in cost. The automated standard test is completed by the automated test equipment, which is efficient and reliable.

[0117] An embodiment of the present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, a microcontroller chip testing method is implemented, including the steps of: generating a test signal after the microcontroller chip is running; inputting the test signal into the microcontroller chip and then testing it; monitoring the running status of the microcontroller chip in real time and generating corresponding test records; and determining the test results of the microcontroller chip based on the test records.

[0118] The above-mentioned microcontroller chip testing method performs actual tests on the microcontroller chip, inputs the test signal into the microcontroller chip and runs it, monitors the running status of the microcontroller chip in real time, and screens out some defective chips in a timely and effective manner, thereby filling the gap in the existing technology for actual functional testing of microcontroller chips and avoiding the problem of subsequent product quality decline and financial loss due to failure to perform actual functional testing on the chip.

[0119] It is understood that the above scenarios are only examples and do not constitute a limitation on the application scenarios of the technical solutions provided in the embodiments of the present application. The technical solutions of the present application can also be applied to other scenarios. For example, it is known to those skilled in the art that with the evolution of the system architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0120] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0121] The steps in the method of the embodiment of the present application can be adjusted in order, combined and deleted according to actual needs.

[0122] The units in the device of the embodiment of the present application can be merged, divided and deleted according to actual needs.

[0123] In the present application, the same or similar terminology concepts, technical solutions and / or application scenario descriptions are generally described in detail only the first time they appear. When they appear again later, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of the present application, for the same or similar terminology concepts, technical solutions and / or application scenario descriptions that are not described in detail later, reference can be made to the previous related detailed descriptions.

[0124] In the present application, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0125] The various technical features of the technical solution of the present application can be arbitrarily combined. In order to make the description concise, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.

[0126] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as above, and includes a number of instructions for a terminal device (which can be a mobile phone, a computer, a server, a controlled terminal, or a network device, etc.) to execute the method of each embodiment of the present application.

[0127] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loading and executing computer program instructions on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server, a data center, etc. that contains one or more available media integrated. The available medium can be a magnetic medium, (e.g., a floppy disk, a storage disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state storage disk Solid State Disk (SSD)), etc.

[0128] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A microcontroller chip testing method, characterized in that: The steps include: After the microcontroller chip is running, a test signal is generated, wherein the test signal is a power ripple interference signal; In response to the signal adjustment instruction, the amplitude and frequency of the power ripple interference signal are adjusted; Inputting the adjusted power ripple interference signal into the power supply of the microcontroller chip for testing; Monitor the level state of the reset pin of the microcontroller chip in real time and generate corresponding test records; Based on the test record, reading the historical level state of the reset pin of the microcontroller chip; If the historical level state of the reset pin has a preset level state, it is determined that the microcontroller chip is reset, and the microcontroller chip is determined to be an unqualified chip; If the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip.

2. A microcontroller chip testing device, characterized in that: include: A test signal module, used to generate a test signal after the microcontroller chip is running, wherein the test signal is a power ripple interference signal; A signal input module, used to respond to a signal adjustment instruction, adjust the amplitude and frequency of the power ripple interference signal; input the adjusted power ripple interference signal into the power supply of the microcontroller chip for testing; A monitoring module, used to monitor the level state of the reset pin of the microcontroller chip in real time and generate corresponding test records; A determination module, configured to read a historical level state of a reset pin of the microcontroller chip based on the test record; If the historical level state of the reset pin has a preset level state, it is determined that the microcontroller chip is reset, and the microcontroller chip is determined to be an unqualified chip; If the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip.

3. A microcontroller chip testing system, characterized in that: Includes automated test equipment, interference generating circuits and microcontroller chips; The automated testing equipment is used to control the interference generating circuit to generate a test signal, wherein the test signal is a power ripple interference signal; and monitoring the level state of the reset pin of the microcontroller chip in real time, obtaining a corresponding test record, and reading a historical level state of the reset pin of the microcontroller chip based on the test record; If the historical level state of the reset pin has a preset level state, it is determined that the microcontroller chip is reset, and the microcontroller chip is determined to be an unqualified chip; If the historical level state of the reset pin does not have a preset level state, it is determined that the microcontroller chip has not been reset, and the microcontroller chip is determined to be a qualified chip; The interference generating circuit is used to generate a test signal after the microcontroller chip is running, and input the test signal into the microcontroller chip for testing; The microcontroller chip is used to respond to a signal adjustment instruction after receiving a test signal generated by the interference generating circuit, and adjust the amplitude and frequency of the power supply ripple interference signal; input the adjusted power supply ripple interference signal into the power supply of the microcontroller chip for testing, and generate a corresponding test record.

4. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the microcontroller chip testing method as claimed in claim 1 are implemented.

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