Communication mode adaptive circuit, method, control device and air conditioning equipment

Abstract

The present disclosure provides a communication mode adaptive circuit, method, control device, and air conditioning equipment. The circuit includes: an adder for receiving a first communication signal and a second communication signal, performing an addition operation on the first communication signal and the second communication signal and outputting an operation result; a comparator for comparing the operation result with a voltage threshold, outputting a first level signal if the operation result includes a voltage result greater than the voltage threshold within at least one signal cycle, and outputting a second level signal if the operation result is always equal to the voltage threshold within at least one signal cycle; and a switching device for turning on after receiving the first level signal so that the first communication signal and the second communication signal are input to the second chip, and turning off after receiving the second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication modes.

Description

Technical Field

[0001] The present disclosure relates to the field of communication technology, and in particular to a communication mode adaptive circuit, method, control device and air-conditioning equipment. Background Art

[0002] Currently, the commonly used communication methods between boards include UART (Universal Asynchronous Receiver / Transmitter) communication and RS-485 (abbreviated as 485) communication.

[0003] In related technologies, the hardware design of the controller usually only supports one communication method and cannot be compatible with two communication methods at the same time. As a result, before inter-board communication is carried out, it is usually necessary to first know which communication method is currently used so that communication can be carried out through the corresponding program. Summary of the Invention

[0004] A technical problem solved by the present disclosure is that the hardware of the related art is not compatible with two communication modes.

[0005] In view of this, the present disclosure provides a communication mode adaptive circuit to achieve adaptation and compatibility with different communication modes.

[0006] According to one aspect of the present disclosure, a communication mode adaptation circuit is provided, comprising: an adder configured to receive a first communication signal and a second communication signal, perform an addition operation on the first communication signal and the second communication signal, and output an operation result; a comparator configured to compare the operation result with a voltage threshold, and output a first level signal if the operation result includes a voltage result greater than the voltage threshold within at least one signal cycle, and output a second level signal if the operation result is always equal to the voltage threshold within the at least one signal cycle; and a switching device electrically connected to a first chip and a second chip, and configured to be turned on after receiving the first level signal so that the first communication signal and the second communication signal are input to the second chip, and to be turned off after receiving the second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication modes.

[0007] In some embodiments, the communication mode adaptation circuit also includes: a trigger, which is arranged between the comparator and the switching device, and is configured to receive the first level signal or the second level signal, and after latching processing, output the first level signal or the second level signal to the switching device.

[0008] In some embodiments, the switching device includes: a first switching device, wherein the control end of the first switching device is electrically connected to the output end of the comparator, the first end of the first switching device is electrically connected to the first input end of the first chip, and the second end of the first switching device is electrically connected to the first output end of the first chip; and a second switching device, wherein the control end of the second switching device is electrically connected to the output end of the comparator, the first end of the second switching device is electrically connected to the second input end of the first chip, and the second end of the second switching device is electrically connected to the second output end of the first chip.

[0009] In some embodiments, the second end of the first switching device is further electrically connected to the first input end of the second chip; and the second end of the second switching device is further electrically connected to the second input end of the second chip.

[0010] In some embodiments, the communication mode adaptation circuit further includes: a voltage regulator tube electrically connected to the input end of the adder, and configured to transmit the received first communication signal and the second communication signal to the adder.

[0011] In some embodiments, the Zener diode includes: a first Zener diode, electrically connected to the first input end of the adder, configured to transmit the received first communication signal to the adder; and a second Zener diode, electrically connected to the second input end of the adder, configured to transmit the received second communication signal to the adder.

[0012] In some embodiments, the communication mode adaptation circuit further includes: a first optocoupler, arranged between the second end of the first switching device and the first input end of the second chip; and a second optocoupler, arranged between the second end of the second switching device and the second input end of the second chip.

[0013] In some embodiments, the communication mode adaptive circuit further includes: a third optical coupler, disposed between the enable terminal of the first chip and the second chip.

[0014] In some embodiments, the first-level signal has a higher level than the second-level signal.

[0015] In some embodiments, the voltage threshold is equal to a voltage level of a power supply of the first chip.

[0016] In some embodiments, the first chip is configured to transmit signals using a first communication method; the second chip is configured to transmit signals using a second communication method, wherein the second communication method is different from the first communication method.

[0017] In some embodiments, the first communication mode is an RS-485 communication mode, and the second communication mode is a universal asynchronous receiver transmitter (UART) communication mode.

[0018] In some embodiments, the communication mode adaptive circuit further includes: the first chip and the second chip.

[0019] In some embodiments, the communication mode adaptive circuit further includes: a host computer, electrically connected to the adder, the first chip and the switch device respectively, and configured to output the first communication signal and the second communication signal.

[0020] According to another aspect of the present disclosure, a communication mode adaptation method is provided, including: receiving a first communication signal and a second communication signal; performing an addition operation on the first communication signal and the second communication signal to obtain an operation result; comparing the operation result with a voltage threshold; if within at least one signal cycle, the operation result includes a voltage result greater than the voltage threshold, determining that the first communication signal and the second communication signal are signals using a first communication mode; and if within the at least one signal cycle, the operation result is always equal to the voltage threshold, determining that the first communication signal and the second communication signal are signals using a second communication mode, wherein the first communication mode is different from the second communication mode.

[0021] In some embodiments, the first communication mode is an RS-485 communication mode, and the second communication mode is a universal asynchronous receiver transmitter (UART) communication mode.

[0022] According to another aspect of the present disclosure, a control device is provided, including: a memory; and a processor coupled to the memory, wherein the processor is configured to execute the aforementioned communication mode adaptation method based on instructions stored in the memory.

[0023] According to another aspect of the present disclosure, a communication mode adaptive circuit is provided, comprising: the control device as described above.

[0024] In some embodiments, the communication mode adaptation circuit also includes: a switching device, electrically connected to the first chip and the second chip, configured to be turned on after receiving a first level signal so that the first communication signal and the second communication signal are input to the second chip, and to be turned off after receiving a second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication modes; wherein the control device is configured to output the first level signal if the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle, and output the second level signal if the operation result is always equal to the voltage threshold within the at least one signal cycle.

[0025] In some embodiments, the switching device includes: a first switching device, wherein the control end of the first switching device is electrically connected to the output end of the control device, the first end of the first switching device is electrically connected to the first input end of the first chip, and the second end of the first switching device is electrically connected to the first output end of the first chip; and a second switching device, wherein the control end of the second switching device is electrically connected to the output end of the control device, the first end of the second switching device is electrically connected to the second input end of the first chip, and the second end of the second switching device is electrically connected to the second output end of the first chip.

[0026] In some embodiments, the second end of the first switching device is further electrically connected to the first input end of the second chip; and the second end of the second switching device is further electrically connected to the second input end of the second chip.

[0027] In some embodiments, the communication mode adaptation circuit also includes: an amplifier, arranged between the control device and the switching device, configured to amplify the first level signal or the second level signal, and output the amplified first level signal or the amplified second level signal to the control end of the switching device.

[0028] According to another aspect of the present disclosure, an air-conditioning device is provided, comprising: the communication mode adaptive circuit as described above.

[0029] According to another aspect of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored. When the computer program instructions are executed by a processor, the communication mode adaptation method as described above is implemented.

[0030] In the above circuit, the adder is configured to receive a first communication signal and a second communication signal, perform an addition operation on the first communication signal and the second communication signal, and output the operation result; the comparator is configured to compare the operation result with a voltage threshold, and if the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle, then output a first level signal; if the operation result is always equal to the voltage threshold within at least one signal cycle, then output a second level signal; the switching device is electrically connected to the first chip and the second chip, and is configured to turn on after receiving the first level signal so that the first communication signal and the second communication signal are input to the second chip, and to turn off after receiving the second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication methods. The above circuit can achieve adaptability and compatibility with different communication methods.

[0031] Other features and advantages of the present disclosure will become apparent from the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0033] The present disclosure can be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0034] Figure 1 is a schematic diagram showing the structure of a communication mode adaptation circuit according to some embodiments of the present disclosure;

[0035] Figure 2 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure;

[0036] Figure 3 is a flow chart illustrating a communication mode adaptation method according to some embodiments of the present disclosure;

[0037] Figure 4 is a structural block diagram illustrating a control device according to some embodiments of the present disclosure;

[0038] Figure 5 is a structural block diagram showing a control device according to some other embodiments of the present disclosure;

[0039] Figure 6 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure;

[0040] Figure 7 2 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure. DETAILED DESCRIPTION

[0041] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure.

[0042] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0043] The terms "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different parts. The terms "include" or "comprises" and similar terms mean that the elements before the term include the elements listed after the term, and do not exclude the possibility of also including other elements. The terms "upper", "lower", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0044] In the present disclosure, when a specific device is described as being located between a first device and a second device, an intervening device may or may not be present between the specific device and the first device or the second device. When a specific device is described as being electrically connected to another device, the specific device may be directly electrically connected to the other device without an intervening device, or may be directly electrically connected to the other device without an intervening device but with an intervening device.

[0045] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0046] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0047] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0048] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0049] Figure 1 2 is a schematic diagram showing the structure of a communication mode adaptation circuit according to some embodiments of the present disclosure.

[0050] like Figure 1As shown, the communication mode adaptation circuit includes: an adder 110, a comparator 120, and a switch device 130. For example, the input end of the adder is electrically connected to the output end of the host computer 40, and the output end of the adder 120 is electrically connected to the first input end of the comparator 120. The second input end of the comparator 120 is electrically connected to the reference voltage terminal 101, which can provide a voltage as a voltage threshold. The output end of the comparator 120 is electrically connected to the switch device 130.

[0051] The adder 110 is configured to receive a first communication signal (eg, a first input signal) S1 and a second communication signal (eg, a second input signal) S2 , perform an addition operation on the first communication signal and the second communication signal, and output an operation result.

[0052] The comparator 120 is configured to compare the operation result with a voltage threshold, and output a first level signal if the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle; and output a second level signal if the operation result is always equal to the voltage threshold within at least one signal cycle.

[0053] The switch device 130 is electrically connected to the first chip 20 and the second chip 30. Here, the first chip 20 and the second chip 30 are used to transmit signals using different communication methods.

[0054] For example, the first chip 20 is configured to transmit signals using a first communication method; the second chip 30 is configured to transmit signals using a second communication method, where the second communication method is different from the first communication method. For example, the first communication method is RS-485 communication method, and the second communication method is UART communication method. For example, the second chip is a slave host chip.

[0055] The switching device 130 is configured to be turned on after receiving a first level signal so that the first and second communication signals are input to the second chip 30 , and to be turned off after receiving a second level signal so that the first and second communication signals are input to the first chip 20 .

[0056] In some embodiments, as Figure 1 As shown, the switching device 130 includes a first switching device 131 and a second switching device 132 .

[0057] like Figure 1 As shown, the control end of the first switching device 131 is electrically connected to the output end of the comparator 120, the first end of the first switching device 131 is electrically connected to the first input end 211 of the first chip 20, and the second end of the first switching device 131 is electrically connected to the first output end 221 of the first chip 20.

[0058] like Figure 1As shown, the control end of the second switching device 132 is electrically connected to the output end of the comparator 120, the first end of the second switching device 132 is electrically connected to the second input end 212 of the first chip 20, and the second end of the second switching device 132 is electrically connected to the second output end 222 of the first chip 20.

[0059] In other embodiments, Figure 1 As shown, the second end of the first switching device 131 is also electrically connected to the first input end of the second chip 30 , and the second end of the second switching device 132 is also electrically connected to the second input end of the second chip 30 .

[0060] For example, the first switching device 131 and the second switching device 132 may both include a MOS (Metal Oxide Semiconductor) transistor, a relay, or an IGBT (Insulated Gate Bipolar Transistor), etc. For example, the MOS transistor may be an NMOS (N-channel Metal Oxide Semiconductor) transistor or a P-channel Metal Oxide Semiconductor transistor.

[0061] In some embodiments, the voltage threshold is equal to the voltage level of the power supply of the first chip 20. For example, the voltage level 485VCC of the power supply of the first chip is 5 V. It should be noted that the voltage threshold here can be set according to actual needs and is not limited to the specific value here.

[0062] In some embodiments, the first-level signal is higher than the second-level signal. For example, the first-level signal is a high-level signal, and the second-level signal is a low-level signal. For example, the first switching device and the second switching device are NMOS transistors. Thus, the first switching device and the second switching device are turned on when receiving a high-level signal and turned off when receiving a low-level signal.

[0063] In some other embodiments, the level of the first-level signal is lower than the level of the second-level signal. For example, the first-level signal is a low-level signal, and the second-level signal is a high-level signal. For example, the first switching device and the second switching device are PMOS transistors. Thus, the first switching device and the second switching device are turned on when receiving a low-level signal and turned off when receiving a high-level signal.

[0064] The following takes the first communication mode as RS-485 communication mode and the second communication mode as UART communication mode as an example. Figure 1Describe the working principle of the communication mode adaptation circuit.

[0065] Theoretical analysis and actual testing reveal the following differences between data transmission via UART communication and RS-485 communication:

[0066] When communicating via the RS-485 communication method, the first communication signal S1 and the second communication signal S2 are synchronously output and synchronously input signals, and the S1 and S2 signals always remain at two opposite level signals. For example, when the S1 signal is in a high level state (for example, the voltage level 485VCC of the power supply of the first chip), the S2 signal is in a low level state (for example, zero potential). In this case, if the level states of the signals S1 and S2 are added together, the result obtained is always equal to the voltage level 485VCC of the power supply of the first chip (i.e., the voltage threshold mentioned above). For example, the voltage level 485VCC of the power supply of the first chip is 5V. That is to say, when communicating via the RS-485 communication method, if the first communication signal S1 and the second communication signal S2 are added together, then within at least one signal cycle, the summed operation result is always equal to the voltage threshold (for example, 485VCC).

[0067] When communicating via a UART communication method, the first communication signal S1 (e.g., TX (transport) signal) and the second communication signal S2 (e.g., RX (Receive) signal) are asynchronous signals. The TX signal (i.e., the first communication signal S1) and the RX signal (i.e., the second communication signal S2) cannot exist at the same time. Moreover, when data is transmitted, one of the TX and RX signals must be in a high-level state and the other in a data transmission state. Therefore, if the TX and RX signal level states are summed, the sum is greater than or equal to 485VCC. That is, when communicating via a UART communication method, if the first communication signal S1 and the second communication signal S2 are summed, then within at least one signal cycle (e.g., one signal cycle or multiple consecutive signal cycles), the summed operation result includes a voltage result greater than the voltage threshold (e.g., 485VCC).

[0068] Here, the description is continued by taking the first switching device and the second switching device as devices that are turned on when receiving a high level and turned off when receiving a low level as an example.

[0069] For example, in the initial state, i.e., when no data is transmitted between boards, the adder receives the first communication signal S1 and the second communication signal S2, performs an addition operation on the first communication signal and the second communication signal and outputs the operation result. The comparator compares the operation result with the voltage threshold and finds that the operation result is always equal to the voltage threshold 485VCC within at least one signal cycle, then outputs a second level signal (e.g., a low level signal). After the comparator outputs the second level signal, the first switch device 131 and the second switch device 132 are in the off state. In this state, the first chip (e.g., a chip using the RS-485 communication mode) can operate normally, and the circuit is in the RS-485 communication mode.

[0070] For another example, when data is transferred between boards, the adder receives the first communication signal S1 and the second communication signal S2, performs an addition operation on the first communication signal and the second communication signal and outputs the operation result. The comparator compares the operation result with the voltage threshold and finds that the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle, then outputs a first level signal (for example, a high level signal). At this time, the first switching device 131 and the second switching device 132 are in the on state. In this state, the first chip (for example, the chip of the RS-485 communication mode) is short-circuited. Therefore, the first chip cannot receive the first communication signal S1 and the second communication signal S2. The first communication signal S1 and the second communication signal S2 are input to the second chip. Therefore, the circuit is in the state of UART communication mode.

[0071] It should be noted that when the UART communication method is used, the operation result of the adder is greater than or equal to the voltage threshold. However, within at least one signal cycle, the operation result contains a voltage result greater than the voltage threshold. Therefore, the operation result of at least one cycle is compared with the voltage threshold, which is more accurate when the adaptive communication method is used.

[0072] In some embodiments, when a high-level operation result of the adder is input to the comparator, the operation result may be twice the voltage threshold (485VCC), and the comparator outputs a first-level signal (e.g., a high-level signal). (For example, within one signal cycle), while the operation result of the adder equal to the voltage threshold is input to the comparator at a voltage of 485VCC, which is the same as the reference voltage of the comparator. Therefore, the original state remains unchanged, and the first-level signal (e.g., a high-level signal) is also output. This prevents erroneous jumps in the output signal of the comparator and improves the stability of the circuit.

[0073] So far, a communication mode adaptation circuit according to some embodiments of the present disclosure is provided. The circuit includes: an adder, configured to receive a first communication signal and a second communication signal, perform an addition operation on the first communication signal and the second communication signal and output the operation result; a comparator, configured to compare the operation result with a voltage threshold, and output a first level signal if the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle, and output a second level signal if the operation result is always equal to the voltage threshold within at least one signal cycle; and a switching device, electrically connected to the first chip and the second chip, configured to turn on after receiving the first level signal so that the first communication signal and the second communication signal are input to the second chip, and turn off after receiving the second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication modes. The above circuit can achieve adaptation and compatibility with different communication modes.

[0074] The communication mode adaptive circuit is compatible with two communication modes and can independently select the communication mode according to the signal type. In addition, the communication mode adaptive circuit can also reduce communication failure problems caused by mismatch of communication modes.

[0075] In some embodiments, as Figure 1 As shown, the communication mode adaptive circuit further includes: the first chip 20 and the second chip 30 .

[0076] In some embodiments, as Figure 1 As shown, the communication mode adaptive circuit further includes: a host computer 40. The host computer 40 is electrically connected to the adder 110, the first chip 20 and the switch device 130. The host computer 40 is configured to output a first communication signal S1 and a second communication signal S2.

[0077] Figure 2 1 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure. Figure 2 As shown, the communication mode adaptive circuit includes: an adder 110 , a comparator 120 and a switch device 130 .

[0078] In some embodiments, as Figure 2 As shown, the communication mode adaptation circuit further includes a trigger 140. Trigger 140 is disposed between comparator 120 and switch device 130. Trigger 140 is configured to receive a first-level signal or a second-level signal (output by comparator 120), and after latching, output the first-level signal or the second-level signal to switch device 130. For example, triggers include but are not limited to SR triggers or D triggers. For example, an SR trigger can be used in conjunction with a master chip (second chip) to achieve communication adaptation.

[0079] For example, when the comparator outputs a high-level signal (as a first-level signal), the communication mode is a UART communication mode. The high-level signal enters the trigger 140, the trigger outputs a high-level signal, and the output high-level is latched until the next high-level pulse reaches the latch of the trigger, and the cycle repeats, and the trigger will always maintain a high-level state. When the trigger outputs a high level, the switch device (here, the first switch device and the second switch device are used as an example to turn on when a high level is received and turned off when a low level is received) can be controlled to turn on. In this state, the first chip will be short-circuited and the circuit will automatically switch to UART communication. Through the latching operation of the trigger, the circuit can be made in the UART communication mode, and the switch device is not affected by the second-level signal (for example, a low-level signal) that the comparator may occasionally send.

[0080] In some embodiments, if an SR trigger is used as the trigger, then when the SR trigger is triggered by a high level, the main chip (second chip) can control the SR trigger to stop working normally, and the output state of the trigger is no longer affected by the input signals S and R, so that the trigger will always maintain a high level state (output the first level signal). In this way, there is no need for repeated detection.

[0081] For example, when the clock signal CLK=0, the input signals S and R of the SR trigger cannot affect the output state. Only when CLK=1, the output state of the trigger is controlled by the input signals S and R. Therefore, by setting the clock signal CLK to 0 through the main chip (second chip), the SR trigger can no longer work normally.

[0082] In some embodiments, as Figure 2 As shown, the communication mode adaptation circuit further includes a voltage regulator 151 or 152. The voltage regulator is electrically connected to the input end of the adder 110. The voltage regulator is configured to transmit the received first communication signal S1 and second communication signal S2 to the adder 110. This makes the first communication signal S1 and the second communication signal S2 more stable.

[0083] In some embodiments, as Figure 2 As shown, the voltage regulator tube includes a first voltage regulator tube 151 and a second voltage regulator tube 152 .

[0084] The first voltage regulator tube 151 is electrically connected to the first input terminal of the adder 110. For example, one end of the first voltage regulator tube 151 is electrically connected to the first input terminal of the adder 110, and the other end of the first voltage regulator tube 151 is electrically connected to the first output terminal of the host computer 40. The first voltage regulator tube 151 is configured to transmit the received first communication signal S1 to the adder. This makes the first communication signal S1 more stable.

[0085] The second voltage regulator tube 152 is electrically connected to the second input terminal of the adder 110. For example, one end of the second voltage regulator tube 152 is electrically connected to the second input terminal of the adder 110, and the other end of the second voltage regulator tube 152 is electrically connected to the second output terminal of the host computer 40. The second voltage regulator tube 152 is configured to transmit the received second communication signal S2 to the adder. This makes the second communication signal S2 more stable.

[0086] In some embodiments, as Figure 2 As shown, the communication mode adaptation circuit further includes a first optical coupler 161. The first optical coupler 161 is disposed between the second terminal of the first switch device 131 and the first input terminal of the second chip 30. The first optical coupler can provide isolation and protect the circuit, preventing voltage fluctuations in the upper computer from affecting the lower computer and causing damage to the lower computer chip (i.e., the second chip).

[0087] In some embodiments, as Figure 2 As shown, the communication mode adaptation circuit further includes a second optical coupler 162. The second optical coupler 162 is disposed between the second end of the second switch device 132 and the second input end of the second chip 30. The second optical coupler can provide isolation and protect the circuit, preventing voltage fluctuations in the upper computer from affecting the lower computer and causing damage to the lower computer chip (i.e., the second chip).

[0088] In some embodiments, as Figure 2 As shown, the communication mode adaptation circuit further includes a third optical coupler 163. The third optical coupler 163 is disposed between the enable terminal 230 of the first chip 20 and the second chip 30. The third optical coupler can provide isolation and protect the circuit to prevent voltage fluctuations in the upper computer from affecting the lower computer and causing damage to the lower computer chip.

[0089] Figure 3 is a flow chart illustrating a communication mode adaptation method according to some embodiments of the present disclosure. Figure 3 As shown, the method includes steps S310 to S350.

[0090] In step S310 , a first communication signal and a second communication signal are received.

[0091] In step S320 , an addition operation is performed on the first communication signal and the second communication signal to obtain an operation result.

[0092] In step S330 , the calculation result is compared with the voltage threshold.

[0093] In step S340 , if the operation result includes a voltage result greater than the voltage threshold in at least one signal cycle, it is determined that the first communication signal and the second communication signal are signals using the first communication mode.

[0094] In step S350 , if the operation result is always equal to the voltage threshold in at least one signal cycle, it is determined that the first communication signal and the second communication signal are signals using the second communication mode.

[0095] Here, the first communication mode is different from the second communication mode. For example, the first communication mode is an RS-485 communication mode, and the second communication mode is a UART communication mode.

[0096] Thus, a communication mode adaptation method according to some embodiments of the present disclosure has been provided. This method enables a circuit to adapt to and be compatible with different communication modes. This method enables the circuit to be compatible with two communication modes and to autonomously select a communication mode based on the signal type. Furthermore, this method can reduce communication failures caused by communication mode mismatches.

[0097] Figure 4 4 is a block diagram illustrating a control device according to some embodiments of the present disclosure. The control device includes a memory 410 and a processor 420.

[0098] The memory 410 can be a disk, a flash memory or any other non-volatile storage medium. Figure 3 The instructions in the corresponding embodiment.

[0099] The processor 420 is coupled to the memory 410 and can be implemented as one or more integrated circuits, such as a microprocessor or a microcontroller. The processor 420 is used to execute instructions stored in the memory, so that the circuit can achieve self-adaptation and compatibility with different communication methods.

[0100] In some embodiments, it is also possible to Figure 5 As shown, the control device 500 includes a memory 510 and a processor 520. The processor 520 is coupled to the memory 510 via a BUS 530. The control device 500 can also be connected to an external storage device 550 via a storage interface 540 to access external data, and can also be connected to a network or another computer system (not shown) via a network interface 560, which will not be described in detail here.

[0101] In this embodiment, the memory stores data instructions, and the processor processes the instructions, so that the circuit can achieve self-adaptation and compatibility with different communication modes.

[0102] In some embodiments, the control device (e.g. Figure 4 or Figure 5 The control device shown in FIG. 1 may be integrated into the second chip. In other words, Figure 3 The method shown can be implemented in the second chip, which can simplify the circuit structure.

[0103] In some embodiments of the present disclosure, a communication mode adaptive circuit is further provided, comprising: the control device as described above, for example Figure 4 or Figure 5 Controls shown.

[0104] Figure 6 2 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure.

[0105] like Figure 6 As shown, the communication mode adaptive circuit includes a control device 610. For example, the control device 610 can be as follows Figure 4 or Figure 5 Controls shown.

[0106] In some embodiments, the control device 610 is configured to output a first level signal if, within at least one signal cycle, the operation result (i.e., the operation result after adding the first communication signal S1 and the second communication signal S2) contains a voltage result greater than the voltage threshold, and to output a second level signal if, within at least one signal cycle, the operation result is always equal to the voltage threshold.

[0107] In some embodiments, as Figure 6 As shown, the communication mode adaptation circuit further includes a switch device 130. The switch device 130 is electrically connected to the first chip 20 and the second chip 30. The switch device 130 is configured to turn on upon receiving a first level signal, thereby inputting the first communication signal S1 and the second communication signal S2 to the second chip 30, and to turn off upon receiving a second level signal, thereby inputting the first communication signal S1 and the second communication signal S2 to the first chip 20. The first chip 20 and the second chip 30 are configured to transmit signals using different communication modes.

[0108] In some embodiments, as Figure 6 As shown, the switching device 130 includes a first switching device 131 and a second switching device 132 .

[0109] The control end of the first switching device 131 is electrically connected to the output end of the control device 610, the first end of the first switching device 131 is electrically connected to the first input end 211 of the first chip 20, and the second end of the first switching device 131 is electrically connected to the first output end 221 of the first chip 20.

[0110] The control end of the second switching device 132 is electrically connected to the output end of the control device 610, the first end of the second switching device 132 is electrically connected to the second input end 212 of the first chip 20, and the second end of the second switching device 132 is electrically connected to the second output end 222 of the first chip 20.

[0111] In some embodiments, as Figure 6 As shown, the second end of the first switching device 131 is also electrically connected to the first input end of the second chip 30 . The second end of the second switching device 132 is also electrically connected to the second input end of the second chip 30 .

[0112] In other embodiments, Figure 6 As shown, the communication mode adaptive circuit further includes: a first chip 20, a second chip 30 and a host computer 40. The first chip 20, the second chip 30 and the host computer 40 have been described in detail above and will not be repeated here.

[0113] Figure 7 2 is a schematic diagram showing the structure of a communication mode adaptive circuit according to other embodiments of the present disclosure.

[0114] like Figure 7 As shown, the communication mode adaptive circuit includes a control device 610 and a switch device 130.

[0115] In some embodiments, as Figure 7 As shown, the communication mode adaptation circuit further includes an amplifier 720. Amplifier 720 is disposed between the control device 610 and the switching device 130. Amplifier 720 is configured to amplify the first-level signal or the second-level signal (output by the control device 610) and output the amplified first-level signal or the amplified second-level signal to the control terminal of the switching device 130. This allows for sufficient on / off control of the switching device.

[0116] In some embodiments, as Figure 7 As shown, the communication mode adaptive circuit further includes a first optical coupler 161, a second optical coupler 162, and a third optical coupler 163. The first optical coupler 161, the second optical coupler 162, and the third optical coupler 163 have been described in detail above and will not be repeated here.

[0117] In some embodiments of the present disclosure, an air conditioning device is further provided, comprising: the communication mode adaptive circuit as described above, for example, Figure 1 、 Figure 2 、 Figure 6 or Figure 7 The communication mode adaptive circuit shown.

[0118] In other embodiments, the present disclosure further provides a computer-readable storage medium (eg, a non-transitory computer-readable storage medium) having computer program instructions stored thereon, which are executed by a processor to implement Figure 3 The steps of the method in the corresponding embodiment. Those skilled in the art will understand that the embodiments of the present disclosure can be provided as methods, devices, or computer program products. Therefore, the present disclosure can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present disclosure can take the form of a computer program product implemented on one or more computer-usable non-transitory storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0119] The present disclosure is described with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present disclosure. It should be understood that each process and / or block in the flowchart and / or block diagram and the combination of processes and / or blocks in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0120] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0121] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0122] The present disclosure has been described in detail so far. To avoid obscuring the concept of the present disclosure, some details known in the art have not been described. Based on the above description, those skilled in the art can fully understand how to implement the technical solutions disclosed herein.

[0123] Although some specific embodiments of the present disclosure have been described in detail by way of examples, those skilled in the art will appreciate that the above examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Those skilled in the art will appreciate that modifications may be made to the above embodiments without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A communication mode adaptive circuit, comprising: an adder configured to receive a first communication signal and a second communication signal, perform an addition operation on the first communication signal and the second communication signal, and output an operation result, wherein the first communication signal and the second communication signal are synchronously output and synchronously input signals, or are asynchronous signals; a comparator configured to compare the operation result with a voltage threshold, output a first level signal if the operation result includes a voltage result greater than the voltage threshold within at least one signal cycle, and output a second level signal if the operation result is always equal to the voltage threshold within the at least one signal cycle; and A switching device is electrically connected to a first chip and a second chip, and is configured to be turned on after receiving the first level signal so that the first communication signal and the second communication signal are input to the second chip, and to be turned off after receiving the second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication methods.

2. The communication mode adaptive circuit according to claim 1, further comprising: The trigger is arranged between the comparator and the switching device, and is configured to receive the first level signal or the second level signal, and output the first level signal or the second level signal to the switching device after latching processing.

3. The communication mode adaptive circuit according to claim 1 or 2, wherein: The switching device comprises: a first switching device, wherein a control terminal of the first switching device is electrically connected to the output terminal of the comparator, a first terminal of the first switching device is electrically connected to the first input terminal of the first chip, and a second terminal of the first switching device is electrically connected to the first output terminal of the first chip; and a second switching device, wherein the control end of the second switching device is electrically connected to the output end of the comparator, the first end of the second switching device is electrically connected to the second input end of the first chip, and the second end of the second switching device is electrically connected to the second output end of the first chip.

4. The communication mode adaptive circuit according to claim 3, wherein: The second terminal of the first switching device is also electrically connected to the first input terminal of the second chip; The second terminal of the second switching device is also electrically connected to the second input terminal of the second chip.

5. The communication mode adaptive circuit according to claim 1, further comprising: A voltage regulator tube is electrically connected to an input end of the adder and is configured to transmit the received first communication signal and the second communication signal to the adder.

6. The communication mode adaptive circuit according to claim 5, wherein: The voltage regulator tube includes: a first voltage regulator tube, electrically connected to a first input terminal of the adder, and configured to transmit the received first communication signal to the adder; and The second voltage regulator is electrically connected to the second input terminal of the adder and is configured to transmit the received second communication signal to the adder.

7. The communication mode adaptive circuit according to claim 4, further comprising: A first optical coupler is provided between the second terminal of the first switching device and the first input terminal of the second chip; and The second optical coupler is arranged between the second end of the second switch device and the second input end of the second chip.

8. The communication mode adaptive circuit according to claim 1, further comprising: The third optical coupler is arranged between the enable terminal of the first chip and the second chip.

9. The communication mode adaptive circuit according to claim 1, wherein: The first level signal has a higher level than the second level signal.

10. The communication mode adaptive circuit according to claim 1, wherein: The voltage threshold is equal to the voltage level of the power supply of the first chip.

11. The communication mode adaptive circuit according to claim 1, wherein: The first chip is configured to transmit signals using a first communication method; The second chip is configured to transmit signals using a second communication method, where the second communication method is different from the first communication method.

12. The communication mode adaptive circuit according to claim 11, wherein: The first communication mode is an RS-485 communication mode, and the second communication mode is a universal asynchronous receiver and transmitter UART communication mode.

13. The communication mode adaptive circuit according to claim 11, further comprising: the first chip and the second chip.

14. The communication mode adaptive circuit according to claim 1, further comprising: The host computer is electrically connected to the adder, the first chip and the switch device respectively, and is configured to output the first communication signal and the second communication signal.

15. A communication mode adaptation method, comprising: receiving a first communication signal and a second communication signal, wherein the first communication signal and the second communication signal are synchronously output and synchronously input signals, or are asynchronous signals; performing an addition operation on the first communication signal and the second communication signal to obtain an operation result; comparing the operation result with a voltage threshold; If, within at least one signal cycle, the operation result includes a voltage result greater than the voltage threshold, determining that the first communication signal and the second communication signal are signals using a first communication mode; and If the operation result is always equal to the voltage threshold within the at least one signal cycle, it is determined that the first communication signal and the second communication signal are signals using a second communication mode, wherein the first communication mode is different from the second communication mode.

16. The communication mode adaptation method according to claim 15, wherein: The first communication mode is an RS-485 communication mode, and the second communication mode is a universal asynchronous receiver and transmitter UART communication mode.

17. A control device comprising: Memory; as well as A processor coupled to the memory, wherein the processor is configured to execute the communication mode adaptation method according to claim 15 or 16 based on instructions stored in the memory.

18. A communication mode adaptive circuit, comprising: The control device according to claim 17.

19. The communication mode adaptive circuit according to claim 18, further comprising: a switching device electrically connected to the first chip and the second chip, configured to be turned on after receiving a first level signal so that the first communication signal and the second communication signal are input to the second chip, and to be turned off after receiving a second level signal so that the first communication signal and the second communication signal are input to the first chip, wherein the first chip and the second chip are used to transmit signals using different communication methods; Wherein, the control device is configured to output the first level signal if the operation result contains a voltage result greater than the voltage threshold within at least one signal cycle, and output the second level signal if the operation result is always equal to the voltage threshold within the at least one signal cycle.

20. The communication mode adaptive circuit according to claim 19, wherein: The switching device comprises: a first switching device, wherein a control terminal of the first switching device is electrically connected to an output terminal of the control apparatus, a first terminal of the first switching device is electrically connected to a first input terminal of the first chip, and a second terminal of the first switching device is electrically connected to a first output terminal of the first chip; and a second switching device, wherein the control end of the second switching device is electrically connected to the output end of the control device, the first end of the second switching device is electrically connected to the second input end of the first chip, and the second end of the second switching device is electrically connected to the second output end of the first chip.

21. The communication mode adaptive circuit according to claim 20, wherein: The second terminal of the first switching device is also electrically connected to the first input terminal of the second chip; The second terminal of the second switching device is also electrically connected to the second input terminal of the second chip.

22. The communication mode adaptive circuit according to claim 19, further comprising: The amplifier is arranged between the control device and the switching device, and is configured to amplify the first level signal or the second level signal and output the amplified first level signal or the amplified second level signal to the control end of the switching device.

23. An air conditioning device comprising: The communication mode adaptive circuit according to any one of claims 1 to 14 or any one of claims 18 to 22.

24. A computer-readable storage medium having computer program instructions stored thereon, wherein when the computer program instructions are executed by a processor, the communication mode adaptation method according to claim 15 or 16 is implemented.

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