A differential input circuit, differential input processing method and chip

Abstract

Embodiments of the present application provide a differential input circuit and chip, relating to the field of integrated circuit technology. In this differential input circuit, a main input transistor module includes at least two stages of bipolar junction transistors, with the base of the subsequent transistor connected to the first terminal of the previous transistor. By superimposing the voltage between the first terminal and base of the multi-stage transistors, the voltage difference across the main input transistor module is significantly increased compared to the voltage between the first terminal and base of a single transistor, thereby maintaining the main input transistor module's sensitivity to smaller input signals. Because the inclusion of a follower module and a voltage control module allows for voltage tracking and regulation at high common mode, the differential input circuit also has a higher voltage withstand capability at the input terminal, providing a better operating point for the op amp or comparator input and improving the circuit's performance at both low and high common mode voltages.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to an input circuit and chip of an integrated operational amplifier. Background Art

[0002] An integrated operational amplifier (op amp) has an input terminal. The circuit inside the integrated operational amplifier, like the comparator, is referred to herein as a differential input circuit. The differential input circuit amplifies the signal inputted at the input terminal.

[0003] When the voltage connected to the differential input is too small, it is difficult to detect the signal. When the voltage connected to the differential input is too large, it will damage the internal components. The withstand voltage of the high-voltage differential circuit input is generally less than the maximum power supply voltage of the circuit. The existing technology provides a method of differential withstand voltage protection:

[0004] like Figure 1 The two lines output by the rightmost main input tube MP_IN serve as the input of the integrated operational amplifier. Taking MP_IN1 as an example, the thick dotted line represents the path for calculating the drain voltage. The input signal INN_G is input to the gate of the main input tube MP_IN1 and also to the gate of MP_IN3. The voltage of the drain of the main input tube MP_IN1 is recorded as Vx, the gate-source voltage difference is expressed as VGS, and the voltage difference between the drain and source is expressed as VDS. Then the following relationship is achieved:

[0005] Vx=INN_G+MP_IN3_VGS-MP_DIO1_VGS-MP_DIO2_VGS+HV_P1_VGS

[0006] Then the voltage difference between the drain and source of the main input tube MP_IN1 has the following relationship:

[0007] MP_IN1_VDS=INN_G+MP_IN1_VGS–Vx=MP_IN1_VGS-MP_IN3_VGS+MP_DIO1_VGS+MP_DIO2_VGS-HV_P1_VGS

[0008] It can be seen that the source of the main input tube MP_IN1 follows the drain voltage and will not change due to changes in INN_G. The voltage between the drain and source will not be too high due to the increase of INN_G, thus protecting the main input tube MP_IN1. The other main input tube MP_IN2 is protected based on the same principle.

[0009] However, the applicant discovered a problem: the threshold voltage of the high-voltage tubes HV_P1 and HV_P2 used to implement the "drain follower" is relatively large. When turned on, the large gate-source voltage of HV_P1 and HV_P2 will squeeze the voltage margin of the input pair tubes MP_IN1 and MP_IN2, that is, squeeze the drain-source voltage of MP_IN1 and MP_IN2, so that under some operating conditions of the circuit, especially when the common mode is 0, the source voltage of the input pair tubes MP_IN1 and MP_IN2 is also relatively low. When the drain voltage of the input pair tubes MP_IN1 and MP_IN2 is raised higher by the high-voltage tube, the drain-source voltage of the input pair tubes MP_IN1 and MP_IN2 will be low, and the circuit may not work in a good state or may not work at all.

[0010] Therefore, how to protect the input differential input circuit's withstand voltage while ensuring the working performance when the input is low common mode is a technical problem that needs to be solved. Summary of the Invention

[0011] The purpose of this application is to provide a differential input circuit, a differential input processing method and a chip to solve the technical problem in the prior art of protecting the input differential input circuit's withstand voltage while ensuring the working performance when the input is in low common mode.

[0012] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions.

[0013] In a first aspect, an embodiment of the present application provides a differential input circuit, including a current source, a main input tube module, a follower module and a voltage control module.

[0014] The main input tube module includes a first input tube group and a second input tube group, each input tube group includes at least two stages of bipolar junction transistors, wherein the base of the latter stage of the bipolar junction transistor is connected to the first end of the former stage of the bipolar junction transistor;

[0015] A first end of the last-stage bipolar junction transistor is connected to the current source, and a second end of the last-stage bipolar junction transistor is connected to a subsequent circuit via the follower module;

[0016] The second end of the first-stage bipolar junction transistor is connected to the voltage control module, and the base of the first-stage bipolar junction transistor is connected to the input signal;

[0017] The voltage control module is used to control the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is a low common mode and a high common mode respectively;

[0018] The follower module is used to connect the input signal so that the voltage at the second terminal of the final-stage bipolar junction transistor changes following the change of the input signal.

[0019] Optionally, the follower module includes a step-down unit, a reference tube unit and a follower tube unit;

[0020] The first end of the step-down unit and the first end of the reference tube unit are both connected to the current source; the control end of the reference tube unit is used to connect the input signal;

[0021] The voltage control module is connected to the low voltage end of the step-down unit;

[0022] The control end of the follower tube unit is connected to the low voltage end of the buck unit, the first end of the follower tube unit is connected to the second end of the final stage bipolar junction transistor, and the second end of the follower tube unit is used to connect to the subsequent circuit.

[0023] Optionally, the voltage control module includes a first MOS transistor, a gate of the first MOS transistor is used to receive a voltage signal that changes with the input signal, and a drain of the first MOS transistor is connected to the second end of the first-stage bipolar junction transistor.

[0024] Optionally, the reference tube unit includes a reference input tube;

[0025] For the reference input tube, the control end is used to connect the input signal, and the first end is connected to the first end of the step-down unit to provide the step-down unit with a voltage signal that changes with the input signal.

[0026] Optionally, the pressure-reducing unit includes a first pressure-reducing tube and a second pressure-reducing tube;

[0027] The first step-down tube and the second step-down tube are diodes or MOS tubes with the gate and drain short-circuited;

[0028] The positive electrode or source of the first step-down tube is connected to the reference tube unit, and the negative electrode or drain is connected to the positive electrode or source of the second step-down tube, and outputs a first control voltage that changes with the input signal to the control end of the voltage regulation module.

[0029] Optionally, the follower tube unit includes a follower tube, the control end of the follower tube is connected to the low voltage end of the step-down unit, the first end of the follower tube is connected to the second end of the final stage bipolar junction transistor, and the second end of the high voltage tube is used to connect to the subsequent circuit.

[0030] Optionally, the post-stage circuit is a post-stage amplification circuit of an amplifier or a post-stage comparison circuit of a comparator.

[0031] In a second aspect, an embodiment of the present application provides a differential input processing method, which is applied to the differential input circuit of the first aspect, comprising:

[0032] The current source provides a bias current to the end-stage bipolar junction transistor of the main input tube module;

[0033] The base of the first-stage bipolar junction transistor of the main input tube module receives the input signal;

[0034] The follower module receives the input signal and causes the second terminal voltage of the final stage bipolar junction transistor to change following the change of the input signal;

[0035] The voltage control module receives a first control voltage that changes with the input signal, and controls the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is in a low common mode and a high common mode.

[0036] Optionally, the voltage control module includes a first MOS transistor, including:

[0037] When the common mode is low, the first MOS tube in the voltage control module is turned off, and the second end of the first-stage bipolar junction transistor is controlled to be close to zero potential;

[0038] When the common mode is high, the first MOS tube in the voltage control module is turned on to control the second end of the first-stage bipolar junction transistor to be at a potential that changes with the input signal.

[0039] In a third aspect, an embodiment of the present application provides a chip that internally encapsulates the differential input circuit of the first aspect.

[0040] Compared with the prior art, this application has the following beneficial effects:

[0041] The differential input circuit, differential input processing method, and chip provided in the embodiments of the present application significantly increase the voltage difference between the first terminal and base of multiple bipolar junction transistors (BJTs) in the main input transistor module by superimposing the voltage between them, compared to the voltage between the first terminal and base of a single BJT. This significantly increases the voltage difference across the main input transistor module, maintaining the module's sensitivity to smaller input signals. Furthermore, because the following module and voltage control module can follow and regulate voltage under high common-mode conditions, the differential input circuit also has a higher voltage withstand capability at the input terminals. This provides a better operating point for the input of an op amp or comparator, improving the circuit's performance under both low and high common-mode voltages. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 A schematic diagram of a differential input circuit for improving the input voltage operating range by using a drain follower in the prior art;

[0044] Figure 2 A schematic diagram of a differential input circuit of a main input transistor module composed of two bipolar junction transistors provided in an embodiment of the present application;

[0045] Figure 3 A schematic diagram of a differential input circuit of a main input transistor module composed of three bipolar junction transistors provided in an embodiment of the present application;

[0046] Figure 4 A schematic diagram of a differential input circuit using a pair of 2-stage triodes as main input transistors provided in an embodiment of the present application;

[0047] Figure 5 for Figure 4 Schematic diagram of the pure device without the dotted box;

[0048] Figure 6 A schematic diagram of Vnbias and Vn_cas_bias formation provided in an embodiment of the present application;

[0049] Figure 7 A schematic diagram of a clamping protection module provided in an embodiment of the present application.

[0050] Description of reference numerals:

[0051] 10-Current Source

[0052] 20-Main input pipe module

[0053] 30-Follow module

[0054] 31-step-down unit

[0055] 32-step-down current derivation unit

[0056] 33-reference tube unit

[0057] 34-Reference tube current derivation unit

[0058] 35-Follower tube unit

[0059] 40-Voltage Control Module DETAILED DESCRIPTION

[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. The described embodiments are part of the embodiments of the present application, but not all of the embodiments. Generally, the components of the embodiments of the present application described in the drawings herein can be arranged and designed in various different configurations.

[0061] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is claimed, but rather merely represents selected embodiments of the present application. All other embodiments derived by persons of ordinary skill in the art based on the embodiments in this application without creative effort are intended to fall within the scope of protection of this application. The following embodiments and features therein may be combined with each other unless there is a conflict.

[0062] In the description of this application, it should be noted that relational terms such as first and second are used solely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. The term "connected" should be understood broadly, for example, it can mean fixed connection, detachable connection, or integral connection; it can be directly connected or indirectly connected through an intermediate medium.

[0063] The existing differential input circuit adopts a drain follower solution to protect the input differential input circuit voltage resistance, but there is a problem that the normal operation of the circuit cannot be guaranteed when the input signal has a low common mode.

[0064] To overcome the above problems, please refer to Figure 2 、 Figure 3 An embodiment of the present application provides a differential input circuit, including a current source 10, a main input tube module 20, a follower module 30 and a voltage control module 40.

[0065] The main input tube module 20 includes a first input tube group 21 and a second input tube group 22 . Each input tube group includes at least two stages of bipolar junction transistors. Figure 2 Two stages are shown, the outer BJT being the first stage and the inner BJT being the last stage. Figure 3 A three-stage example is shown, from which it can be seen that the PNP bipolar junction transistor can also be replaced with NPN type without conflict.

[0066] In each input pipe group, the connection relationship of each level is described as follows:

[0067] The base of the next-stage bipolar junction transistor is connected to the first terminal of the previous-stage bipolar junction transistor. It can be seen that Figure 2 In the example, the first end is the emitter of the PNP tube;

[0068] The first end of the final bipolar junction transistor is connected to the current source 10, and the second end of the final bipolar junction transistor is connected to the subsequent circuit through the follower module 30. The subsequent circuit can be the subsequent amplifier circuit of the amplifier or the subsequent comparison circuit of the comparator. Figure 2In the example, the second end is the collector of the PNP tube;

[0069] The second end of the first-stage bipolar junction transistor is connected to the voltage control module 40, and the base of the first-stage bipolar junction transistor is connected to the input signals INN_G and INP_G;

[0070] The second end of the bipolar junction transistor in the middle stage can be connected to the voltage control module 40 or other devices with a current deriving function.

[0071] Follower module 30 is connected to input signals INN_G and INP_G, causing the voltage at the second terminal of the final-stage bipolar junction transistor to change in accordance with the input signals INN_G and INP_G. When the common mode is high, INN_G and INP_G are both high, resulting in a high voltage at the second terminal of the final-stage bipolar junction transistor, thus providing a follower function. This prevents excessive voltage differences between the first and second terminals of the final-stage bipolar junction transistor, thus providing protection.

[0072] The voltage control module 40 controls the second terminal of the first-stage bipolar junction transistor to different potentials when the input signal is in low common mode or high common mode. For example, the second terminal of the first-stage bipolar junction transistor increases to a certain extent as the common-mode portion of the input signals INN_G and INP_G increases. For another example, when the common mode is low, the voltage control module 40 controls the second terminal of the first-stage bipolar junction transistor to a potential close to zero; when the common mode is high, the voltage control module 40 controls the second terminal of the first-stage bipolar junction transistor to a potential that varies with the input signal.

[0073] By superimposing the voltage between the first terminals and bases of the multiple bipolar junction transistors in the main input transistor module, the voltage between the first terminals and bases is significantly increased compared to that of a single bipolar junction transistor, raising the overall voltage difference of the main input transistor module and maintaining its sensitivity to smaller input signals. Because the follower module and voltage control module can follow and regulate voltage under high common-mode conditions, the differential input circuit also has a higher input voltage withstand capability. This provides a better operating point for the op amp or comparator input, improving the circuit's performance under both low and high common-mode voltages.

[0074] The main input tube module can be multiple pairs of main input tubes, inputting similar common mode voltage signals. The main input tube module can also be a pair of main input tubes.

[0075] Figure 4 An example of a two-stage bipolar junction transistor pair as the main input transistor module is shown. Figure 5 To remove Figure 4 Figure 2 shows a pure device with dashed boxes and partial labels.

[0076] Description of the MOS tube device diagram in the figure:

[0077] The Bulk terminal, that is, the substrate is connected to VNW (VNW is just a voltage name and can be replaced by other letters) to ensure that the working state of these MOS tubes is consistent and the voltage VGS between the gate and source is the same; if there is no Bulk terminal, the Bulk is connected to the source by default;

[0078] The high-voltage MOS with a long thick line at the gate G end has a higher voltage resistance than the MOS with a short thin line at the gate G end.

[0079] The circle at the gate G end and the direction of the source arrow can determine whether the MOS tube is PMOS or NMOS. The PMOS and NMOS in the figure are only examples. PMOS can be replaced by NMOS, and NMOS can be replaced by PMOS.

[0080] The diagram shows the following voltage inputs:

[0081] INN_G and INP_G can be understood as input signals, or input signals after clamping protection;

[0082] VDD, converted into current by current source 10, can be understood as the power supply of the operational amplifier or comparator;

[0083] Vpbias, Vnbias, Vp_cas_bias, and Vn_cas_bias are used to provide voltage for the control terminals of the corresponding devices. For example, VDD can be connected to a resistor R11, and the other end of the resistor R11 is Vpbias. VDD can be connected to a resistor R12, and the other end of the resistor R12 is Vnbias. VDD can be connected to a resistor R13, and the other end of the resistor R13 is Vp_cas_bias. VDD can be connected to a resistor R14, and the other end of the resistor R14 is Vn_cas_bias. Figure 6 In the form of a bias current, a current is generated from VDD and passes through resistor R and four MOS transistors M1, M2, M3, and M4. The required voltage is generated by setting the aspect ratio W / L of the semiconductor structure. For example, the gate voltage of M1 and M3 is Vnbias; the gate voltage of M2 and M4 is Vn_cas_bias. The Vnbias and Vn_cas_bias set in this way will not change significantly with changes in VDD.

[0084] In the figure, the current source 10 is divided into two paths. The path in the left box provides current to the follower module 30, and the path in the right box provides current to the main input tube module 20, which is point E in the figure. In addition, due to the control of Vpbias and Vp_cas_bias, the current output can be stable when VDD changes to a certain extent.

[0085] The follower module 30 mainly includes a voltage reduction unit 31 , a reference tube unit 33 and a follower tube unit 35 .

[0086] The first end of the step-down unit 31 and the first end of the reference transistor unit 33 are both connected to the current source 10; the control end of the reference transistor unit 33 is used to connect to the input signals INN_G and INP_G; the control end of the voltage control module 40 is connected to the low-voltage terminal B of the step-down unit 31, and the first end of the voltage control module 40 is connected to the first power supply VDD; the control end of the follower transistor unit 35 is connected to the low-voltage terminal B of the step-down unit 31, and the first end of the follower transistor unit 35 is connected to the second ends of the final-stage bipolar junction transistors Q_INN and Q_INP, namely points C and F. The second end of the follower transistor unit 35 is used to connect to the input of an op amp or comparator. Point B in the figure is an example of a low-voltage terminal, and there can also be two different low-voltage terminals.

[0087] The reference tube unit 33 in the figure includes a reference input tube MP_IN1 , a reference input tube MP_IN2 , and a first resistor R1 .

[0088] The voltage reduction unit 31 in the figure includes a first voltage reduction transistor MP_DIO1 and a second voltage reduction transistor MP_DIO2. The first voltage reduction transistor MP_DIO1 and the second voltage reduction transistor MP_DIO2 may also be other voltage reduction devices, such as resistors or other transistors.

[0089] When the substrates of the first and second step-down transistors MP_DIO1 and MP_DIO2, as well as the reference input transistors MP_IN1 and MP_IN2, are connected to the upper end of the first resistor R1, and the input common-mode voltage is set to V_A, the voltage at point A can be calculated as V_A + MP_IN1_VGS - MP_DIO1_VGS. Since both MP_IN1 and MP_DIO1 are connected to VNW, MP_IN1_VGS = MP_DIO1_VGS, resulting in the voltage at point A = V_A. The voltage at point A is then stepped down by MP_DIO2_VGS to obtain the voltage at point B.

[0090] It can be seen that setting the reference input tube and the first and second step-down tubes can more accurately and conveniently obtain a more accurate point B voltage and ensure that the point B voltage is lower than the input common-mode voltage.

[0091] The figure shows a step-down current derivation unit 32, which can derive the current at the low-voltage terminal B of the step-down unit 31 to ground. Therefore, the current is set to flow through the second tail current transistor MN_BIAS2 to ground. Similarly, for the current derivation module 40, the first tail current transistor MN_BIAS1 can be grounded, and a reference transistor current derivation unit 34 can be provided, with the low-voltage transistor MN_DIO1 grounded.

[0092] The step-down current derivation unit 32 can also include a second high-voltage protection transistor HV_NCAS2 below point B to protect MP_DIO1 and MP_DIO2. This second high-voltage protection transistor HV_NCAS2 divides the voltage between MP_DIO1 and MP_DIO2 to prevent excessive voltage across them. If the first and second step-down transistors MP_DIO1 and MP_DIO2 are high-voltage transistors, the second high-voltage protection transistor HV_NCAS2 in the step-down current derivation unit 32 can be omitted. Similarly, the first high-voltage protection transistor HV_NCAS1 is provided in the voltage control module 40. The third high-voltage transistor HV_P3 is provided in the reference transistor current derivation unit 34. A follower transistor unit 35, including high-voltage transistors HV_P1 and HV_P2, is provided at points C and D of the main input transistor module 20. The control terminals of the follower transistors HV_P1 and HV_P2 can be connected to the low-voltage terminal B of the step-down unit 31.

[0093] The configurations of the first high-voltage protection transistor HV_NCAS1 and the first tail current transistor MN_BIAS1 in the voltage control module 40 are identical to those of the second high-voltage protection transistor HV_NCAS2 and the second tail current transistor MN_BIAS2 in the step-down current derivation unit 32. The control terminal of the voltage control module 40, i.e., the control terminal of the first MOS transistor MN_1, is connected to the voltage at point B, which varies with the input signal, and regulates the voltage at the second terminal of the first-stage bipolar junction transistor based on the voltage at point B.

[0094] When the input signal voltage is low common mode, the voltage at point B is also low, the first MOS transistor MN_1 is cut off, and the voltage of VDD is applied to both ends of the first MOS transistor MN_1. The voltage at point F is close to ground, so the voltage difference at point EF of the main input transistor module is high. The current at the second end of the non-last-stage bipolar junction transistor flows to ground through the first high-voltage protection transistor HV_NCAS1 and the first tail current transistor MN_BIAS1 of the voltage control module 40, allowing the main input transistor module to operate effectively.

[0095] When the input signal voltage increases, the voltage at point B increases, and the voltage at point F is controlled by the VGS of MN_1 and increases synchronously, thus protecting the withstand voltage of the bipolar junction transistor.

[0096] In order to further prevent the voltage difference between the input INN_G and INP_G from being too large, a clamping protection module can be added before the input INN_G and INP_G signals. That is to say, the INN_G and INP_G signals are not directly input signals, but are the signals after the direct input signals INN and INP pass through the clamping protection module.

[0097] When the difference between the directly input signals INN and INP is not large, the signals INN_G and INP_G after passing through the clamping protection module can remain almost the same as INN and INP; when the difference between the directly input signals INN and INP exceeds the set value of the clamping protection module, the difference between the signals INN_G and INP_G after passing through the clamping protection module can be limited to a set upper limit.

[0098] like Figure 7 The clamping protection module can include a pair of high-voltage diodes HV_SP1 and HV_SP2, with their control terminals connected to VNW in the circuit, allowing the VGS voltages of HV_SP1 and HV_SP2 to be properly turned on. The clamping unit in the figure can be two sets of Zener diodes, connected in anti-parallel.

[0099] Corresponding to the differential input circuit in the above embodiment, the embodiment of the present application further provides a differential input processing method, including:

[0100] The current source 10 provides a bias current to the final stage bipolar junction transistor of the main input tube module 20;

[0101] The base of the first-stage bipolar junction transistor of the main input tube module 20 receives the input signal;

[0102] The follower module 30 receives the input signal and causes the second terminal voltage of the final stage bipolar junction transistor to change in accordance with the input signal;

[0103] The voltage control module 40 receives a first control voltage that changes with the input signal, and controls the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is low common mode and high common mode, for example:

[0104] When the common mode is low, the first MOS transistor MN_1 in the voltage control module 40 is turned off, and the second end of the first-stage bipolar junction transistor is controlled to be close to zero potential;

[0105] In high common mode, the first MOS transistor MN_1 in the voltage control module 40 is turned on to control the second end of the first-stage bipolar junction transistor to a potential that varies with the input signal. The boundary between low common mode and high common mode can be a preset voltage threshold.

[0106] For the differential input processing method of the embodiment of the present application, the optional implementation method is consistent with the above-mentioned differential input circuit and has the same beneficial effects, which will not be repeated here.

[0107] Based on the above embodiment, an embodiment of the present application further provides a chip that internally encapsulates the above differential input circuit.

[0108] In general, this application proposes a differential input circuit and chip. In this differential input circuit, a main input transistor module includes at least two stages of bipolar junction transistors, with the base of the subsequent transistor connected to the first terminal of the previous transistor. By superimposing the voltage between the first terminal and base of the multi-stage transistors, the voltage difference across the main input transistor module is significantly increased compared to the voltage between the first terminal and base of a single transistor, thereby maintaining sensitivity to smaller input signals. Due to the inclusion of a follower module, the differential input circuit also has a higher withstand voltage at the input, providing a better operating point for the input of an op amp or comparator, improving the circuit's performance at both low and high common-mode voltages.

[0109] The above-described device and system embodiments are merely illustrative, and some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. Those skilled in the art may understand and implement the present invention without inventive effort.

[0110] The above are merely preferred embodiments of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A differential input circuit, characterized in that: It includes a current source (10), a main input tube module (20), a follower module (30) and a voltage control module (40); The main input tube module (20) comprises a first input tube group and a second input tube group, each input tube group comprises at least two stages of bipolar junction transistors, wherein the base of the latter stage of the bipolar junction transistor is connected to the first end of the former stage of the bipolar junction transistor; The first end of the final-stage bipolar junction transistor is connected to the current source (10), and the second end of the final-stage bipolar junction transistor is connected to the subsequent circuit via the follower module (30); The second end of the first-stage bipolar junction transistor is connected to the voltage control module (40), and the base of the first-stage bipolar junction transistor is connected to the input signal; The voltage control module (40) is used to control the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is a low common mode and a high common mode respectively; The follower module (30) is used to connect the input signal so that the second terminal voltage of the final stage bipolar junction transistor changes following the change of the input signal.

2. The differential input circuit according to claim 1, wherein: The following module (30) includes a pressure reduction unit (31), a reference tube unit (33) and a following tube unit (35); The first end of the voltage-reducing unit (31) and the first end of the reference tube unit (33) are both connected to the current source (10); the control end of the reference tube unit (33) is used to connect to the input signal; The voltage control module (40) is connected to the low-voltage end of the voltage reduction unit (31); The control end of the follower tube unit (35) is connected to the low-voltage end of the step-down unit (31), the first end of the follower tube unit (35) is connected to the second end of the final-stage bipolar junction transistor, and the second end of the follower tube unit (35) is used to connect to the subsequent circuit.

3. The differential input circuit according to claim 1, wherein: The voltage control module (40) comprises a first MOS transistor (MN_1), the gate of the first MOS transistor (MN_1) being used to receive a voltage signal that changes following the input signal, and the drain of the first MOS transistor (MN_1) being connected to the second end of the first-stage bipolar junction transistor.

4. The differential input circuit according to claim 2, wherein: The reference pipe unit (33) includes a reference input pipe (MP_IN1 / MP_IN2); For the reference input tube (MP_IN1 / MP_IN2), the control end is used to connect the input signal, and the first end is connected to the first end of the step-down unit (31) to provide the step-down unit (31) with a voltage signal that changes with the input signal.

5. The differential input circuit according to claim 2, wherein: The voltage reduction unit (31) includes a first voltage reduction tube (MP_DIO1) and a second voltage reduction tube (MP_DIO2); The first step-down tube (MP_DIO1) and the second step-down tube (MP_DIO2) are diodes or MOS tubes with gates and drains short-circuited; The positive electrode or source of the first step-down tube (MP_DIO1) is connected to the reference tube unit (33), and the negative electrode or drain is connected to the positive electrode or source of the second step-down tube (MP_DIO2), and outputs a first control voltage that changes with the input signal to the control end of the voltage control module (40).

6. The differential input circuit according to claim 2, wherein: The follower tube unit (35) includes a follower tube (HV_P1 / HV_P2), a control end of the follower tube (HV_P1 / HV_P2) is connected to the low-voltage end of the step-down unit (31), a first end of the follower tube (HV_P1 / HV_P2) is connected to the second end of the end-stage bipolar junction transistor, and a second end of the follower tube (HV_P1 / HV_P2) is used to connect to the subsequent circuit.

7. The differential input circuit according to claim 1, wherein: The post-stage circuit is a post-stage amplification circuit of an amplifier or a post-stage comparison circuit of a comparator.

8. A differential input processing method, characterized in that: Applied to the differential input circuit according to any one of claims 1 to 7, the method comprising: The current source (10) provides a bias current to the end-stage bipolar junction transistor of the main input tube module (20); The base of the first-stage bipolar junction transistor of the main input tube module (20) receives the input signal; The following module (30) receives the input signal and causes the second terminal voltage of the final stage bipolar junction transistor to change in accordance with the change of the input signal; The voltage control module (40) receives a first control voltage that changes with the input signal, and controls the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is in a low common mode and a high common mode.

9. The differential input processing method according to claim 8, wherein: Applied to the differential input circuit according to claim 3, the steps of the voltage control module (40) controlling the second end of the first-stage bipolar junction transistor to have different potentials when the input signal is in low common mode and high common mode respectively include: When the common mode is low, the first MOS tube (MN_1) in the voltage control module (40) is turned off, and the second end of the first-stage bipolar junction transistor is controlled to be close to zero potential; In high common mode, the first MOS tube (MN_1) in the voltage control module (40) is turned on, controlling the second end of the first-stage bipolar junction transistor to have a potential that varies with the input signal.

10. A chip, characterized in that: The chip is internally encapsulated with the differential input circuit according to any one of claims 1 to 7.

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