An adaptive VCE overvoltage protection circuit for IGBT driving

Abstract

The present application provides an adaptive VCE overvoltage protection circuit for IGBT driving, including a VCE overvoltage detection module, which generates a VCE overvoltage real-time status signal and a pulse indication signal according to a VCE_SENSE signal; a VCE overvoltage timing module, which generates a minimum overvoltage intervention time and a maximum overvoltage intervention time according to the pulse indication signal; an adaptive module, which generates a first drive signal and a second drive signal according to the VCE overvoltage real-time status signal, the minimum overvoltage intervention time and the maximum overvoltage intervention time, wherein the first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off. The adaptive VCE overvoltage protection circuit for IGBT driving provided by the present application can detect the VCE overvoltage time, and drive the IGBT to turn on again according to the VCE overvoltage time, thereby avoiding VCE overcharging caused by the increase of the VCE overvoltage time, causing further damage to the IGBT.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit design, and in particular to an adaptive VCE overvoltage protection circuit for IGBT driving. Background Art

[0002] The VCE (IGBT driver collector and emitter voltage difference) clamp circuit is a commonly used IGBT (Insulated Gate Bipolar Transistor) overvoltage protection measure. When an IGBT overvoltage is detected, the VCE clamp circuit is started to first keep the top or bottom of the periodically changing waveform at the G end at a certain DC level, and then drop to zero to turn off the IGBT. This can reduce the dv / dt (differential of the voltage change with respect to time) generated when the IGBT is turned off when there is an overcurrent or short circuit, thereby reducing the risk of damage to the IGBT due to overvoltage and protecting the IGBT.

[0003] Existing VCE clamp circuits can only turn off the IGBT when an overvoltage occurs, but cannot turn it back on. Figure 1 , which is a waveform diagram of each signal when the IGBT is at high voltage. If the current of the IGBT is too large, the VCE will continue to be over-voltage after the IGBT is quickly turned off. As the VCE over-voltage time increases, a large VCE overcharge will be generated at the collector of the IGBT. If this VCE overcharge exceeds the BV (Breakdown Voltage), it will still cause damage to the IGBT and cause the system to malfunction.

[0004] Therefore, after the IGBT is quickly turned off, it is necessary to monitor the overvoltage time of VCE to reopen the IGBT discharge current to reduce the VCE voltage of the IGBT and avoid overvoltage damage to the IGBT. Summary of the invention

[0005] Based on the aforementioned background technology defects, the purpose of this application is to provide an adaptive VCE overvoltage protection circuit for IGBT driving, so as to solve the technical problem in the prior art that the IGBT cannot be reopened after being shut down due to overvoltage, thereby causing VCE overcharging as the VCE overvoltage time increases, causing further damage to the IGBT.

[0006] In order to achieve the above object, the present application provides an adaptive VCE overvoltage protection circuit for IGBT driving, comprising:

[0007] A VCE overvoltage detection module, the VCE overvoltage detection module inputs a VCE_SENSE signal, and the VCE overvoltage detection module generates a VCE overvoltage real-time status signal and a pulse indication signal according to the VCE_SENSE signal;

[0008] A VCE overvoltage timing module, the VCE overvoltage timing module is coupled to the VCE overvoltage detection module, and the VCE overvoltage timing module generates a minimum overvoltage intervention time and a maximum overvoltage intervention time according to the pulse indication signal;

[0009] An adaptive module, wherein the adaptive module is coupled to the VCE overvoltage detection module and the VCE overvoltage timing module respectively, and the adaptive module generates a first drive signal and a second drive signal according to the VCE overvoltage real-time status signal, the minimum overvoltage intervention time and the maximum overvoltage intervention time, wherein the first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off.

[0010] Further, the VCE overvoltage detection module includes a first input terminal, a first output terminal, and a second output terminal; the first input terminal inputs the VCE_SENSE signal, the first output terminal outputs the VCE overvoltage real-time status signal, and the second output terminal outputs the pulse indication signal;

[0011] The VCE overvoltage timing module includes a second input terminal, a third output terminal and a fourth output terminal; the second input terminal is coupled to the second output terminal, the third output terminal outputs the minimum overvoltage intervention time, and the fourth output terminal outputs the maximum overvoltage intervention time;

[0012] The adaptive module includes a third input terminal, a fourth input terminal, a fifth input terminal, a fifth output terminal and a sixth output terminal; the third input terminal is coupled to the first output terminal, the fourth input terminal is coupled to the third output terminal, the fifth input terminal is coupled to the fourth output terminal, the fifth output terminal outputs the first drive signal, and the sixth output terminal outputs the second drive signal.

[0013] Further, the VCE overvoltage detection module includes a first power supply, a VCE clamp comparator, an RS trigger and a pulse signal generating circuit;

[0014] The first power supply is used to output a reference voltage;

[0015] The VCE clamp comparator is used to compare the VCE_SENSE signal with the reference voltage under the enable control of the inverse signal of the pulse width modulation signal, and output a first comparison result;

[0016] The S input terminal of the RS trigger is coupled to the VCE clamp comparator, and the RS trigger is used to receive the first comparison result; the R input terminal of the RS trigger inputs the inverse signal of the pulse width modulation signal;

[0017] The pulse signal generating circuit includes a first pulse input terminal and a first pulse output terminal, the first pulse input terminal is coupled to the Q output terminal of the RS trigger, and the first pulse output terminal serves as the second output terminal of the VCE overvoltage detection module.

[0018] Further, the VCE overvoltage timing module includes a first current source, a first NMOS transistor, a third capacitor, a first Schmitt trigger, a first inverter, a second current source, a second NMOS transistor, a fourth capacitor, a second Schmitt trigger and a second inverter;

[0019] The first current source comprises a first current input terminal and a first current output terminal, the first current input terminal is connected to an external circuit, and the first current output terminal outputs a first bias current;

[0020] The gate of the first NMOS transistor is coupled to the second input terminal, the drain of the first NMOS transistor is coupled to the first current output terminal, and the source of the first NMOS transistor is grounded;

[0021] The third capacitor is coupled between the drain and the source of the first NMOS transistor;

[0022] The first Schmitt trigger includes a first trigger input terminal and a first trigger output terminal, and the first inverter includes a first inverting input terminal and a first inverting output terminal; the first trigger input terminal is coupled to the drain of the first NMOS transistor, the first trigger output terminal is coupled to the first inverting input terminal, and the first inverting output terminal serves as the third output terminal; the first current source, the third capacitor, the first Schmitt trigger and the first inverter are used to output the maximum overvoltage intervention time according to the conduction condition of the first NMOS transistor;

[0023] The second current source comprises a second current input terminal and a second current output terminal, the second current input terminal is connected to an external circuit, and the second current output terminal outputs a second bias current;

[0024] The gate of the second NMOS transistor is coupled to the second input terminal, the drain of the second NMOS transistor is coupled to the second current output terminal, and the source of the second NMOS transistor is grounded;

[0025] The fourth capacitor is coupled between the drain and the source of the second NMOS transistor;

[0026] The second Schmitt trigger includes a second trigger input terminal and a second trigger output terminal, and the second inverter includes a second inverting input terminal and a second inverting output terminal; the second trigger input terminal is coupled to the drain of the second NMOS transistor, the second trigger output terminal is coupled to the second inverting input terminal, and the second inverting output terminal serves as the fourth output terminal; the second current source, the fourth capacitor, the second Schmitt trigger and the second inverter are used to output the minimum overvoltage intervention time according to the conduction status of the second NMOS transistor.

[0027] Further, the adaptive module includes a first OR gate, a first AND gate, a third inverter, a second OR gate, a level converter and a soft shutdown circuit;

[0028] The first OR gate comprises a first OR gate input terminal, a second OR gate input terminal and a first OR gate output terminal, the first OR gate input terminal serves as the third input terminal, the second OR gate input terminal serves as the fourth input terminal, and the first OR gate output terminal outputs a first OR gate signal;

[0029] The first AND gate includes a first AND gate input terminal, a second AND gate input terminal and a first AND gate output terminal, the first AND gate input terminal is coupled to the first OR gate output terminal, the second AND gate input terminal serves as the fifth input terminal, and the first AND gate output terminal outputs a VCE CLAMP control pulse signal;

[0030] The third inverter comprises a third inverting input terminal and a third inverting output terminal, wherein the third inverting input terminal is coupled to the first AND gate output terminal;

[0031] The second OR gate comprises a third OR gate input terminal, a fourth OR gate input terminal and a second OR gate output terminal, the third OR gate input terminal is coupled to the third input terminal, the fourth OR gate input terminal is coupled to the third inverting output terminal, and the second OR gate output terminal outputs a HS ON signal;

[0032] The level converter comprises a first level input terminal and a first level output terminal, the first level input terminal is coupled to the second OR gate output terminal, the first level output terminal serves as the fifth output terminal of the adaptive module, and outputs the first driving signal;

[0033] The soft-shutdown circuit includes a first soft-shutdown input terminal, a second soft-shutdown input terminal and a first soft-shutdown output terminal, the first soft-shutdown input terminal is coupled to the first AND gate output terminal, the second soft-shutdown input terminal is coupled to the second OR gate output terminal, and the first soft-shutdown output terminal outputs the second drive signal.

[0034] Furthermore, the adaptive VCE overvoltage protection circuit also includes an overvoltage voltage generating module:

[0035] The overvoltage generating module includes a sixth input terminal and a seventh output terminal; the sixth input terminal is coupled to the collector of the IGBT, and the overvoltage generating module is used to generate an overvoltage voltage after the IGBT is over-voltaged, and the overvoltage voltage is output through the seventh output terminal.

[0036] Further, the overvoltage generating module includes a Zener diode, a first resistor and a first capacitor;

[0037] The Zener diode is coupled to the sixth input terminal, and the Zener diode is used to be broken down after the IGBT is over-voltaged;

[0038] The first resistor and the first capacitor are coupled to the seventh output terminal, and the first resistor and the first capacitor are used to generate the overvoltage after the Zener diode is broken down.

[0039] Furthermore, the adaptive VCE overvoltage protection circuit also includes an overvoltage signal generating module:

[0040] The overvoltage signal generating module includes a seventh input terminal and an eighth output terminal; the seventh input terminal is coupled to the seventh output terminal, and the eighth output terminal is coupled to the first input terminal. The overvoltage signal generating module is used to convert the overvoltage voltage into a VCE_SENSE voltage signal and output it.

[0041] Further, the overvoltage signal generating module includes a first NLD transistor, a second power supply, a second resistor and a second capacitor;

[0042] The gate of the first NLD transistor is coupled to the positive electrode of the second power supply, the drain of the first NLD transistor serves as the seventh input terminal, and the source of the first NLD transistor is coupled to the second resistor;

[0043] The second resistor and the second capacitor are connected in series between the source of the first NLD transistor and the negative electrode of the second power supply;

[0044] The seventh input terminal is coupled between the second resistor and the second capacitor.

[0045] Furthermore, the adaptive VCE overvoltage protection circuit also includes a gate drive module:

[0046] The gate driving module includes an eighth input terminal, a ninth input terminal and a ninth output terminal; the eighth input terminal is coupled to the fifth output terminal, the ninth input terminal is coupled to the sixth output terminal, and the ninth output terminal is coupled to the gate of the IGBT.

[0047] Further, the gate driving module includes a second NLD transistor, a third resistor, a first PLD transistor and a fourth resistor;

[0048] The third resistor includes a first resistor end and a second resistor end, and the fourth resistor includes a third resistor end and a fourth resistor end;

[0049] The gate of the second NLD transistor serves as a ninth input terminal, the drain of the second NLD transistor is coupled to the first resistor terminal, and the source of the second NLD transistor is grounded;

[0050] The gate of the first PLD transistor serves as an eighth input terminal, the drain of the first PLD transistor is coupled to the third resistor terminal, and the source of the first PLD transistor is grounded;

[0051] The second resistance terminal and the fourth resistance terminal are coupled to the ninth output terminal.

[0052] One of the above technical solutions includes the following advantages or beneficial effects:

[0053] Compared with the prior art, the present application provides an adaptive VCE overvoltage protection circuit for IGBT driving, including a VCE overvoltage detection module, a VCE overvoltage timing module and an adaptive module, wherein the VCE overvoltage detection module is used to generate a VCE overvoltage real-time status signal and a pulse indication signal according to a VCE_SENSE signal, the VCE overvoltage timing module is used to generate a minimum overvoltage intervention time and a maximum overvoltage intervention time according to the pulse indication signal, and the adaptive module is used to generate a first drive signal and a second drive signal according to the VCE overvoltage real-time status signal, the minimum overvoltage intervention time and the maximum overvoltage intervention time, the first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off. The adaptive VCE overvoltage protection circuit for IGBT driving provided in the embodiment of the present application can detect the VCE overvoltage time, and drive the IGBT to turn on again according to the VCE overvoltage time, thereby avoiding overcharging of the VCE as the VCE overvoltage time increases, causing further damage to the IGBT. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The drawings described herein are for explanation purposes only and are not intended to limit the scope of the present application in any way. In addition, the shapes and proportional dimensions of the components in the drawings are only for illustration purposes and are used to help understand the present application. They do not specifically limit the shapes and proportional dimensions of the components of the present application. Under the guidance of the present application, those skilled in the art can select various possible shapes and proportional dimensions to implement the present application according to specific circumstances. In the drawings:

[0055] Figure 1 It is a waveform diagram of each signal when IGBT is at high voltage;

[0056] Figure 2 A schematic diagram of waveforms of various signals in a specific embodiment of an adaptive VCE overvoltage protection circuit for IGBT driving according to the present application; a first structural schematic diagram of an adaptive VCE overvoltage protection circuit for IGBT driving provided in an embodiment of the present application;

[0057] Figure 3 A second structural schematic diagram of an adaptive VCE overvoltage protection circuit for IGBT driving provided in one embodiment of the present application;

[0058] Figure 4 An adaptive overvoltage protection flow chart of an adaptive VCE overvoltage protection circuit for IGBT driving provided in one embodiment of the present application;

[0059] Figure 5 An IGBT protection waveform of an adaptive VCE overvoltage protection circuit for IGBT driving provided in one embodiment of the present application when VCE is temporarily overvoltage;

[0060] Figure 6 An IGBT protection waveform of an adaptive VCE overvoltage protection circuit for IGBT driving provided in one embodiment of the present application when the overvoltage time is greater than 100ns and less than 2μs;

[0061] Figure 7 An IGBT protection waveform of an adaptive VCE overvoltage protection circuit for IGBT driving provided in one embodiment of the present application when the overvoltage time is greater than 2μs;

[0062] Reference numerals: 100 - VCE overvoltage detection module, 110 - first power supply, 120 - VCE clamp comparator, 130 - RS trigger, 140 - pulse signal generating circuit, 200 - VCE overvoltage timing module, 211 - first current source, 212 - first NMOS transistor, 213 - third capacitor, 214 - first Schmitt trigger, 215 - first inverter, 221 - second current source, 222 - second NMOS transistor, 223 - fourth capacitor, 224 - second Schmitt trigger, 225 - second inverter, 300 - adaptive module, 310 -first OR gate, 320-first AND gate, 330-third inverter, 340-second OR gate, 350-level converter, 360-soft shutdown circuit, 400-overvoltage voltage generating module, 410-Zener diode, 420-first resistor, 430-first capacitor, 500-overvoltage signal generating module, 510-first NLD transistor, 520-second power supply, 530-second resistor, 540-second capacitor, 600-gate driving module, 610-second NLD transistor, 620-third resistor, 630-first PLD transistor, 640-fourth resistor. DETAILED DESCRIPTION

[0063] In order to enable those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0064] See also Figure 2 and Figure 3 As shown, an embodiment of the present application provides an adaptive VCE overvoltage protection circuit for IGBT driving, comprising:

[0065] VCE overvoltage detection module 100, the VCE overvoltage detection module 100 includes a first input terminal, a first output terminal, and a second output terminal; the first input terminal inputs a VCE_SENSE signal, the VCE overvoltage detection module 100 is used to generate a VCE overvoltage real-time status signal and a pulse indication signal according to the VCE_SENSE signal, the first output terminal outputs the VCE overvoltage real-time status signal, and the second output terminal outputs a pulse indication signal;

[0066] A VCE overvoltage timing module 200, the VCE overvoltage timing module 200 comprises a second input terminal, a third output terminal and a fourth output terminal; the second input terminal is coupled to the second output terminal, the VCE overvoltage timing module 200 is used to generate a minimum overvoltage intervention time T1 and a maximum overvoltage intervention time T0 according to the pulse indication signal, the third output terminal outputs the minimum overvoltage intervention time T1, and the fourth output terminal outputs the maximum overvoltage intervention time T0;

[0067] The adaptive module 300 includes a third input terminal, a fourth input terminal, a fifth input terminal, a fifth output terminal and a sixth output terminal; the third input terminal is coupled to the first output terminal, the fourth input terminal is coupled to the third output terminal, and the fifth input terminal is coupled to the fourth output terminal. The adaptive module 300 is used to generate a first drive signal and a second drive signal according to a VCE overvoltage real-time status signal, a minimum overvoltage intervention time and a maximum overvoltage intervention time. The fifth output terminal outputs the first drive signal, and the sixth output terminal outputs the second drive signal. The first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off.

[0068] In some embodiments, the VCE overvoltage detection module 100 includes a first power supply 110 , a VCE clamp comparator 120 , an RS trigger 130 , and a pulse signal generating circuit 140 ;

[0069] The first power supply 110 is used to output a reference voltage;

[0070] The VCE clamp comparator 120 is used to compare the VCE_SENSE signal with the reference voltage under the enable control of the inverse signal of the pulse width modulation signal, and output a first comparison result;

[0071] The S input terminal of the RS trigger 130 is coupled to the VCE clamp comparator 120, and the RS trigger 130 is used to receive the first comparison result; the R input terminal of the RS trigger 130 inputs the inverse signal of the pulse width modulation signal;

[0072] The pulse signal generating circuit 140 includes a first pulse input terminal and a first pulse output terminal. The first pulse input terminal is coupled to the Q output terminal of the RS trigger 130 . The first pulse output terminal serves as the second output terminal of the VCE overvoltage detection module 100 .

[0073] In some embodiments, the VCE overvoltage timing module 200 includes a first current source 211, a first NMOS transistor 212, a third capacitor 213, a first Schmitt trigger 214, a first inverter 215, a second current source 221, a second NMOS transistor 222, a fourth capacitor 223, a second Schmitt trigger 224, and a second inverter 225;

[0074] The first current source 211 includes a first current input terminal and a first current output terminal, the first current input terminal is connected to an external circuit, and the first current output terminal outputs a first bias current Ibias0;

[0075] A gate of the first NMOS transistor 212 is coupled to the second input terminal, a drain of the first NMOS transistor 212 is coupled to the first current output terminal, and a source of the first NMOS transistor 212 is grounded;

[0076] The third capacitor 213 is coupled between the drain and the source of the first NMOS transistor 212;

[0077] The first Schmitt trigger 214 includes a first trigger input terminal and a first trigger output terminal, and the first inverter 215 includes a first inverting input terminal and a first inverting output terminal; the first trigger input terminal is coupled to the drain of the first NMOS transistor 212, the first trigger output terminal is coupled to the first inverting input terminal, and the first inverting output terminal serves as a third output terminal; the first current source 211, the third capacitor 213, the first Schmitt trigger 214 and the first inverter 215 are used to output the maximum overvoltage intervention time T1 according to the conduction condition of the first NMOS transistor 212;

[0078] The second current source 221 includes a second current input terminal and a second current output terminal, the second current input terminal is connected to an external circuit, and the second current output terminal outputs a second bias current Ibias1;

[0079] A gate of the second NMOS transistor 222 is coupled to the second input terminal, a drain of the second NMOS transistor 222 is coupled to the second current output terminal, and a source of the second NMOS transistor 222 is grounded;

[0080] The fourth capacitor 223 is coupled between the drain and the source of the second NMOS transistor 222;

[0081] The second Schmitt trigger 224 includes a second trigger input terminal and a second trigger output terminal, and the second inverter 225 includes a second inverting input terminal and a second inverting output terminal; the second trigger input terminal is coupled to the drain of the second NMOS transistor 222, the second trigger output terminal is coupled to the second inverting input terminal, and the second inverting output terminal serves as a fourth output terminal; the second current source 221, the fourth capacitor 223, the second Schmitt trigger 224 and the second inverter 225 are used to output the minimum overvoltage intervention time T1 according to the conduction status of the second NMOS transistor 222.

[0082] Specifically, the minimum overvoltage intervention time T1 and the maximum overvoltage intervention time T0 are calculated according to the following formula (1):

[0083]

[0084] Wherein, Ibias0 is the first bias current, Ibias1 is the second bias current, C2 is the capacitance value of the third capacitor 213, C3 is the capacitance value of the fourth capacitor 223, T1 is the minimum overvoltage intervention time, and T0 is the maximum overvoltage intervention time.

[0085] In some embodiments, the adaptive module 300 includes a first OR gate 310, a first AND gate, a third inverter, a second OR gate, a level shifter, and a soft-off circuit;

[0086] The first OR gate 310 includes a first OR gate input terminal, a second OR gate input terminal and a first OR gate output terminal, the first OR gate input terminal serves as a third input terminal, the second OR gate input terminal serves as a fourth input terminal, and the first OR gate output terminal outputs a first OR gate signal;

[0087] The first AND gate 320 includes a first AND gate input terminal, a second AND gate input terminal and a first AND gate output terminal, the first AND gate input terminal is coupled to the first OR gate output terminal, the second AND gate input terminal serves as a fifth input terminal, and the first AND gate output terminal outputs a VCECLAMP control pulse signal;

[0088] The third inverter 330 includes a third inverting input terminal and a third inverting output terminal, and the third inverting input terminal is coupled to the first AND gate output terminal;

[0089] The second OR gate 340 includes a third OR gate input terminal, a fourth OR gate input terminal and a second OR gate output terminal, the third OR gate input terminal is coupled to the third input terminal, the fourth OR gate input terminal is coupled to the third inverting output terminal, and the second OR gate output terminal outputs a HS ON signal;

[0090] The level converter 350 includes a first level input terminal and a first level output terminal, the first level input terminal is coupled to the second OR gate output terminal, and the first level output terminal serves as a fifth output terminal of the adaptive module 300 to output a first driving signal;

[0091] The soft shutdown circuit 360 includes a first soft shutdown input terminal, a second soft shutdown input terminal and a first soft shutdown output terminal, the first soft shutdown input terminal is coupled to the first AND gate output terminal, the second soft shutdown input terminal is coupled to the second OR gate output terminal, and the first soft shutdown output terminal outputs a second drive signal.

[0092] In some embodiments, an adaptive VCE overvoltage protection circuit for IGBT driving further includes an overvoltage voltage generating module 400:

[0093] The overvoltage generating module 400 includes a sixth input terminal and a seventh output terminal; the sixth input terminal is coupled to the collector of the IGBT, and the overvoltage generating module is used to generate an overvoltage voltage after the IGBT is overvoltaged, and the overvoltage voltage is output through the seventh output terminal.

[0094] In some embodiments, the overvoltage generating module 400 includes a Zener diode 410, a first resistor 420 and a first capacitor 430; the Zener diode 410 is coupled to the sixth input terminal, and the Zener diode 410 is used to be broken down after the IGBT is overvoltage; the first resistor 420 and the first capacitor 430 are coupled to the seventh output terminal, and the first resistor 420 and the first capacitor 430 are used to generate an overvoltage after the Zener diode 410 is broken down.

[0095] In some embodiments, an adaptive VCE overvoltage protection circuit for IGBT driving also includes an overvoltage signal generating module 500, which includes a seventh input terminal and an eighth output terminal; the seventh input terminal and the seventh output terminal are coupled, and the eighth output terminal and the first input terminal are coupled. The overvoltage signal generating module is used to convert the overvoltage voltage into a VCE_SENSE voltage signal and output it.

[0096] In some embodiments, the overvoltage signal generating module 500 includes a first NLD transistor 510, a second power supply 520, a second resistor 530 and a second capacitor 540; the gate of the first NLD transistor 510 is coupled to the positive electrode of the second power supply 520, the drain of the first NLD transistor 510 serves as the seventh input terminal, and the source of the first NLD transistor 510 is coupled to the second resistor 530; the second resistor 530 and the second capacitor 540 are connected in series between the source of the first NLD transistor 510 and the negative electrode of the second power supply 520; the seventh input terminal is coupled between the second resistor 530 and the second capacitor 540.

[0097] In some embodiments, an adaptive VCE overvoltage protection circuit for IGBT driving also includes a gate driving module 600, which includes an eighth input terminal, a ninth input terminal and a ninth output terminal; the eighth input terminal is coupled to the fifth output terminal, the ninth input terminal is coupled to the sixth output terminal, and the ninth output terminal is coupled to the gate of the IGBT.

[0098] In some embodiments, the gate driving module 600 includes a second NLD transistor 610 , a third resistor 620 , a first PLD transistor 630 , and a fourth resistor 640 ;

[0099] The third resistor 620 includes a first resistor terminal and a second resistor terminal, and the fourth resistor 640 includes a third resistor terminal and a fourth resistor terminal; the gate of the second NLD transistor 610 serves as a ninth input terminal to which the second drive signal is input, the drain of the second NLD transistor 610 is coupled to the first resistor terminal, and the source of the second NLD transistor 610 is grounded; the gate of the first PLD transistor 630 serves as an eighth input terminal to which the first drive signal is input, the drain of the first PLD transistor 630 is coupled to the third resistor terminal, and the source of the first PLD transistor 630 is grounded; the second resistor terminal and the fourth resistor terminal are coupled to a ninth output terminal.

[0100] In the embodiment of the present application, when the IGBT is over-voltage-turned off, the Zener diode 410 will be broken down first, and an over-voltage voltage will be generated across the first resistor 420. The over-voltage voltage is converted into an internal over-voltage signal, i.e., a VCE_SENSE voltage signal, by the clamping of the first NLD transistor 510. When the VCE_SENSE voltage exceeds the VREF threshold, the VCE clamp comparator 120 flips, and the RS trigger 130 flips at the same time. At this time, the oneshot pulse signal generating circuit 140 generates a pulse of about 20ns, and sets the timing circuit of the VCE over-voltage timing module 200.

[0101] Compared with the prior art, the present application provides an adaptive VCE overvoltage protection circuit for IGBT driving, including a VCE overvoltage detection module, a VCE overvoltage timing module and an adaptive module, wherein the VCE overvoltage detection module is used to generate a VCE overvoltage real-time status signal and a pulse indication signal according to a VCE_SENSE signal, the VCE overvoltage timing module is used to generate a minimum overvoltage intervention time and a maximum overvoltage intervention time according to the pulse indication signal, and the adaptive module is used to generate a first drive signal and a second drive signal according to the VCE overvoltage real-time status signal, the minimum overvoltage intervention time and the maximum overvoltage intervention time, the first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off. The adaptive VCE overvoltage protection circuit for IGBT driving provided in the embodiment of the present application can detect the VCE overvoltage time, and drive the IGBT to turn on again according to the VCE overvoltage time, thereby avoiding overcharging of the VCE as the VCE overvoltage time increases, causing further damage to the IGBT.

[0102] See also Figure 4 , the following describes an adaptive protection process of an adaptive VCE overvoltage protection circuit for IGBT driving according to the overvoltage time Tvceov in an embodiment of the present application in conjunction with the accompanying drawings.

[0103] If the overvoltage time Tvceov is less than the minimum overvoltage intervention time T1, the first current source 211 first charges the third capacitor 213 to the voltage at which the first Schmitt trigger 214 flips, the first OR gate 310 flips, and the VCE CLAMP control outputs a 100ns pulse, that is, the IGBT is turned off by the soft shutdown circuit 360, that is, the SSD circuit is turned off for 100ns, and the gate voltage of the IGBT becomes a slowly decreasing trend, such as Figure 5 shown.

[0104] If the overvoltage time Tvceov is greater than the minimum overvoltage intervention time T1 and less than the maximum overvoltage intervention time T0, after the first current source 211 charges the third capacitor 213 to the voltage at which the first Schmitt trigger 214 flips, since the output of the VCE clamping comparator 120 is still high, the first OR gate 310 needs to wait for the VCE clamping comparator 120 to flip before flipping. The VCE CLAMP control outputs a pulse that is the same as the VCE overvoltage time Tvceov (100 ns < Tvceov < 2 μs), that is, the IGBT is turned off by the soft turn-off circuit 360, that is, the SSD circuit turns off for Tvceov, and the gate voltage of the IGBT becomes a slow downward trend during this process, as Figure 6 shown.

[0105] If the overvoltage time Tvceov is greater than the maximum overvoltage intervention time T0, after the VCE CLAMP control outputs a high-level control signal equal to the maximum overvoltage intervention time T0, that is, the IGBT is turned off by the soft turn-off circuit 360, that is, the SSD circuit turns off for 2 μs. Then the HS ON signal goes high, at this time the second NLD transistor 610 turns on, the gate voltage of the IGBT changes from a downward trend to an upward trend again, the IGBT is turned on again, and the gate-collector voltage of the IGBT drops. When the gate-collector voltage of the IGBT drops below the VCE overvoltage protection threshold, the HS ON signal goes low, the second NLD transistor 610 turns on again, and the IGBT is turned off again, as Figure 7 shown.

[0106] In this way, after detecting the overvoltage of the IGBT, the present application adapts to turn on different VCE overvoltage protection modes according to the overvoltage time of VCE. If the overvoltage time of VCE is short, the intervention time of the soft turn-off circuit 360 is short, which can minimize the impact of the soft turn-off circuit 360 on the system response time; if VCE is continuously overvoltage, the IGBT can be turned on in time to discharge the current, avoiding damage to the IGBT due to overvoltage.

[0107] It should be understood that the above description is for illustrative purposes and not for limitation. Many embodiments and many applications other than the provided examples will be apparent to those skilled in the art. Therefore, the scope of this teaching should not be determined with reference to the above description, but should be determined with reference to the full scope of the foregoing claims and the equivalents thereof. For the sake of completeness, all articles and references including patent applications and published announcements are incorporated herein by reference. Omitting any aspect of the subject matter disclosed herein in the foregoing claims is not intended to abandon such subject matter, nor should the applicant be considered not to have considered such subject matter as part of the disclosed application subject matter.

Claims

1. An adaptive VCE overvoltage protection circuit for IGBT driving, characterized in that: include: A VCE overvoltage detection module, the VCE overvoltage detection module inputs a VCE_SENSE signal, and the VCE overvoltage detection module generates a VCE overvoltage real-time status signal and a pulse indication signal according to the VCE_SENSE signal; the VCE overvoltage detection module includes a first input terminal and a second output terminal, the first input terminal inputs the VCE_SENSE signal, and the second output terminal outputs the pulse indication signal; the VCE overvoltage detection module also includes a first output terminal, and the first output terminal outputs the VCE overvoltage real-time status signal; a VCE overvoltage timing module, wherein the VCE overvoltage timing module is coupled to the VCE overvoltage detection module, and the VCE overvoltage timing module generates a minimum overvoltage intervention time and a maximum overvoltage intervention time according to the pulse indication signal; the VCE overvoltage timing module comprises a first current source, a first NMOS transistor, a third capacitor, a first Schmitt trigger, a first inverter, a second current source, a fourth capacitor, a second Schmitt trigger, and a second inverter, wherein the first current source, the third capacitor, the first Schmitt trigger, and the first inverter are used to output the maximum overvoltage intervention time according to the conduction condition of the first NMOS transistor, and the second current source, the second NMOS transistor, the fourth capacitor, the second Schmitt trigger, and the second inverter are used to output the minimum overvoltage intervention time according to the conduction condition of the second NMOS transistor; The VCE overvoltage timing module comprises a second input terminal, a third output terminal and a fourth output terminal, wherein the second input terminal is coupled to the second output terminal, the third output terminal outputs the minimum overvoltage intervention time, and the fourth output terminal outputs the maximum overvoltage intervention time; An adaptive module, the adaptive module is coupled to the VCE overvoltage detection module and the VCE overvoltage timing module respectively, the adaptive module generates a first drive signal and a second drive signal according to the VCE overvoltage real-time status signal, the minimum overvoltage intervention time and the maximum overvoltage intervention time, the first drive signal is used to drive the IGBT to turn on, and the second drive signal is used to drive the IGBT to turn off; the adaptive module includes a level converter and a first soft shutdown circuit, the level converter outputs the first drive signal, and the first soft shutdown circuit outputs the second drive signal; The adaptive module includes a third input terminal, a fourth input terminal and a fifth input terminal, the third input terminal is coupled to the first output terminal, the fourth input terminal is coupled to the third output terminal, and the fifth input terminal is coupled to the fourth output terminal.

2. An adaptive VCE overvoltage protection circuit for IGBT driving according to claim 1, characterized in that: The adaptive module further includes a fifth output terminal and a sixth output terminal, the fifth output terminal outputs the first driving signal, and the sixth output terminal outputs the second driving signal.

3. An adaptive VCE overvoltage protection circuit for IGBT driving as claimed in claim 2, characterized in that: The VCE overvoltage detection module includes a first power supply, a VCE clamp comparator, an RS trigger and a pulse signal generating circuit; The first power supply is used to output a reference voltage; The VCE clamp comparator is used to compare the VCE_SENSE signal with the reference voltage under the enable control of the inverse signal of the pulse width modulation signal, and output a first comparison result; The S input terminal of the RS trigger is coupled to the VCE clamp comparator, and the RS trigger is used to receive the first comparison result; the R input terminal of the RS trigger inputs the inverse signal of the pulse width modulation signal; The pulse signal generating circuit includes a first pulse input terminal and a first pulse output terminal, the first pulse input terminal is coupled to the Q output terminal of the RS trigger, and the first pulse output terminal serves as the second output terminal of the VCE overvoltage detection module.

4. The adaptive VCE overvoltage protection circuit for IGBT driving according to claim 2, characterized in that: The first current source comprises a first current input terminal and a first current output terminal, the first current input terminal is connected to an external circuit, and the first current output terminal outputs a first bias current; The gate of the first NMOS transistor is coupled to the second input terminal, the drain of the first NMOS transistor is coupled to the first current output terminal, and the source of the first NMOS transistor is grounded; The third capacitor is coupled between the drain and the source of the first NMOS transistor NM0; The first Schmitt trigger includes a first trigger input terminal and a first trigger output terminal, and the first inverter includes a first inverting input terminal and a first inverting output terminal; The first trigger input terminal is coupled to the drain of the first NMOS transistor, the first trigger output terminal is coupled to the first inverting input terminal, and the first inverting output terminal serves as the third output terminal; the second current source includes a second current input terminal and a second current output terminal, the second current input terminal is connected to an external circuit, and the second current output terminal outputs a second bias current; The gate of the second NMOS transistor is coupled to the second input terminal, the drain of the second NMOS transistor is coupled to the second current output terminal, and the source of the second NMOS transistor is grounded; The fourth capacitor is coupled between the drain and the source of the second NMOS transistor; The second Schmitt trigger includes a second trigger input terminal and a second trigger output terminal, and the second inverter includes a second inverting input terminal and a second inverting output terminal; The second trigger input terminal is coupled to the drain of the second NMOS transistor, the second trigger output terminal is coupled to the second inverting input terminal, and the second inverting output terminal serves as the fourth output terminal.

5. The adaptive VCE overvoltage protection circuit for IGBT driving according to claim 2, characterized in that: The adaptive module includes a first OR gate, a first AND gate, a third inverter, a second OR gate, a level converter and a soft shutdown circuit; The first OR gate comprises a first OR gate input terminal, a second OR gate input terminal and a first OR gate output terminal, the first OR gate input terminal serves as the third input terminal, the second OR gate input terminal serves as the fourth input terminal, and the first OR gate output terminal outputs a first OR gate signal; The first AND gate includes a first AND gate input terminal, a second AND gate input terminal and a first AND gate output terminal, the first AND gate input terminal is coupled to the first OR gate output terminal, the second AND gate input terminal serves as the fifth input terminal, and the first AND gate output terminal outputs a VCE CLAMP control pulse signal; The third inverter comprises a third inverting input terminal and a third inverting output terminal, wherein the third inverting input terminal is coupled to the first AND gate output terminal; The second OR gate comprises a third OR gate input terminal, a fourth OR gate input terminal and a second OR gate output terminal, the third OR gate input terminal is coupled to the third input terminal, the fourth OR gate input terminal is coupled to the third inverting output terminal, and the second OR gate output terminal outputs a HS ON signal; The level converter comprises a first level input terminal and a first level output terminal, the first level input terminal is coupled to the second OR gate output terminal, the first level output terminal serves as the fifth output terminal of the adaptive module, and outputs the first driving signal; The soft-shutdown circuit includes a first soft-shutdown input terminal, a second soft-shutdown input terminal and a first soft-shutdown output terminal, the first soft-shutdown input terminal is coupled to the first AND gate output terminal, the second soft-shutdown input terminal is coupled to the second OR gate output terminal, and the first soft-shutdown output terminal outputs the second drive signal.

6. An adaptive VCE overvoltage protection circuit for IGBT driving as claimed in claim 2, characterized in that: The adaptive VCE overvoltage protection circuit also includes an overvoltage voltage generating module: The overvoltage generating module includes a sixth input terminal and a seventh output terminal; the sixth input terminal is coupled to the collector of the IGBT, and the overvoltage generating module is used to generate an overvoltage voltage after the IGBT is over-voltaged, and the overvoltage voltage is output through the seventh output terminal.

7. An adaptive VCE overvoltage protection circuit for IGBT driving as claimed in claim 6, characterized in that: The overvoltage generating module includes a Zener diode, a first resistor and a first capacitor; The Zener diode is coupled to the sixth input terminal, and the Zener diode is used to be broken down after the IGBT is over-voltaged; The first resistor and the first capacitor are coupled to the seventh output terminal, and the first resistor and the first capacitor are used to generate the overvoltage after the Zener diode is broken down.

8. An adaptive VCE overvoltage protection circuit for IGBT driving as claimed in claim 7, characterized in that: The adaptive VCE overvoltage protection circuit also includes an overvoltage signal generating module: The overvoltage signal generating module includes a seventh input terminal and an eighth output terminal; the seventh input terminal is coupled to the seventh output terminal, and the eighth output terminal is coupled to the first input terminal. The overvoltage signal generating module is used to convert the overvoltage voltage into a VCE_SENSE voltage signal and output it.

9. An adaptive VCE overvoltage protection circuit for IGBT driving as claimed in claim 8, characterized in that: The overvoltage signal generating module includes a first NLD transistor, a second power supply, a second resistor and a second capacitor; The gate of the first NLD transistor is coupled to the positive electrode of the second power supply, the drain of the first NLD transistor serves as the seventh input terminal, and the source of the first NLD transistor is coupled to the second resistor; The second resistor and the second capacitor are connected in series between the source of the first NLD transistor and the negative electrode of the second power supply; The seventh input terminal is coupled between the second resistor and the second capacitor.

10. An adaptive VCE overvoltage protection circuit for IGBT driving according to claim 2, characterized in that: The adaptive VCE overvoltage protection circuit also includes a gate drive module: The gate driving module includes an eighth input terminal, a ninth input terminal and a ninth output terminal; the eighth input terminal is coupled to the fifth output terminal, the ninth input terminal is coupled to the sixth output terminal, and the ninth output terminal is coupled to the gate of the IGBT.

11. An adaptive VCE overvoltage protection circuit for IGBT driving according to claim 10, characterized in that: The gate driving module includes a second NLD transistor, a third resistor, a first PLD transistor and a fourth resistor; The third resistor includes a first resistor end and a second resistor end, and the fourth resistor includes a third resistor end and a fourth resistor end; The gate of the second NLD transistor serves as a ninth input terminal, the drain of the second NLD transistor is coupled to the first resistor terminal, and the source of the second NLD transistor is grounded; The gate of the first PLD transistor serves as an eighth input terminal, the drain of the first PLD transistor is coupled to the third resistor terminal, and the source of the first PLD transistor is grounded; The second resistance terminal and the fourth resistance terminal are coupled to the ninth output terminal.

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