Nanoscale vacuum channel triode structure and method of making same

Abstract

The application provides a nanometer vacuum channel triode structure and a preparation method thereof, which comprises a substrate, a base electrode grown on a first region of a surface of the substrate, an emitter electrode grown on a second region of the surface of the substrate, wherein the first region and the second region are located on the same surface of the substrate and do not intersect, an oxide layer grown on a third region of a surface of the base electrode, the third region being a part of the first region, a collector electrode grown on a surface of the oxide layer, wherein the width of the oxide layer is smaller than the width of the collector electrode, and a vacuum channel is formed on both sides of the oxide layer, an emitter electrode grown on a surface of the emitter, a base electrode grown on a fourth region of a surface of the base electrode, and the fourth region is a part of the first region and does not intersect with the third region.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of microelectronic devices, in particular to a nanometer-scale vacuum channel triode structure and a preparation method. BACKGROUND

[0002] A triode, also known as a bipolar transistor or a crystal triode, is a kind of semiconductor device for controlling current, which is used to amplify weak signals into signals with larger amplitude and is a core component in electronic circuits. The triode has the characteristic of current control and can be applied in many fields such as method circuits, oscillation circuits, and switching circuits.

[0003] A conventional triode usually has two PN junctions arranged very close to each other on a semiconductor substrate, and the whole semiconductor is divided into three parts by the two PN junctions, with the middle part being a base region and the two side parts being emitter regions and collector regions. The arrangement can be either PNP or NPN. However, the conventional triode usually has scattering effects, which affect the mobility and speed of the carriers, thereby restricting the working speed of the whole device and making it difficult to be applied in a very high frequency environment. Moreover, the conventional triode usually has two PN junction structures, which makes it very sensitive to changes in external conditions such as temperature, voltage, and radiation, and requires strict application scenarios. Therefore, it can only be applied in a vacuum environment and cannot be applied in an air environment. SUMMARY

[0004] (I) Technical problems to be solved

[0005] The present application provides a nanometer-scale vacuum channel triode structure and a preparation method, which are used to at least partially solve one of the above technical problems.

[0006] (II) Technical solutions

[0007] In one aspect, the present application provides a nanometer-scale vacuum channel triode structure, comprising: a substrate; a base grown on a first region of the surface of the substrate; an emitter grown on a second region of the surface of the substrate; wherein the first region and the second region are located on the same surface of the substrate and do not intersect; an oxide layer grown on a third region of the surface of the base, wherein the third region is a part of the first region; a collector electrode grown on the surface of the oxide layer; wherein the width of the oxide layer is smaller than the width of the collector electrode, and a vacuum channel is formed on both sides of the oxide layer; an emitter electrode grown on the surface of the emitter; and a base electrode grown on a fourth region of the surface of the base, wherein the fourth region is a part of the first region and does not intersect with the third region.

[0008] Optionally, the substrate is N-type silicon.

[0009] Optionally, the base is P-type boron-doped, and the doping concentration is 10 13~10 17 cm -3 .

[0010] Optionally, the emitter is N-type phosphorus-doped or N-type arsenic-doped, and the doping concentration is greater than 10 19 cm -3 .

[0011] Optionally, the oxide layer is silicon dioxide, and the thickness is less than 68 nm.

[0012] Optionally, the collector electrode, the emitter electrode, and the base electrode are made of metal.

[0013] Another aspect of the present application provides a preparation method of a nanometer-scale vacuum channel triode structure, comprising: preparing a base electrode on a first region of a substrate surface; preparing an emitter electrode on a second region of the substrate surface; wherein the first region and the second region are on the same surface of the substrate and do not intersect; preparing an oxide layer on a third region of the base electrode surface, wherein the third region is a partial region of the first region; preparing a collector electrode on the surface of the oxide layer; wherein the width of the oxide layer is less than the width of the collector electrode, and a vacuum channel is formed on both sides of the oxide layer; preparing an emitter electrode on the surface of the emitter electrode; and preparing a base electrode on a fourth region of the base electrode surface, wherein the fourth region is a partial region of the first region and does not intersect with the third region.

[0014] Optionally, the base electrode is prepared by injecting P-type impurities into the first region of the substrate surface, and the P-type impurity doping concentration is 10 13 ~10 17 cm -3 .

[0015] Optionally, the emitter electrode is prepared by injecting N-type impurities into the second region of the substrate surface, and the N-type impurity doping concentration is greater than 10 19 cm -3 .

[0016] Optionally, the preparation method of the vacuum channel comprises: after the preparation of the collector electrode is completed, using a wet etchant to etch both sides of the oxide layer, so that the width of the oxide layer is less than the width of the collector electrode, and a vacuum channel is formed.

[0017] (III) Beneficial effects

[0018] The nanometer-scale vacuum channel triode structure and the preparation method provided by the present application at least have the following beneficial effects:

[0019] 1. Electrons form a current by passing through the vacuum channel, at this time, the transportation mode of the electrons is non-scattering ballistic transportation, which overcomes the restriction of scattering effect on the working speed of the device, and can be essentially applied to a high-frequency working scenario.

[0020] 2. The critical operating area has a vacuum channel, which reduces the device's sensitivity to temperature, voltage, and radiation, making it suitable for use in air environments.

[0021] 3. The nanoscale vacuum channel transistor fabrication method provided by this invention has a simple process flow and is compatible with CMOS technology, making it easy to scale up for industrial production. Attached Figure Description

[0022] Figure 1 The schematic diagram illustrates the structure of a nanoscale vacuum channel transistor in an embodiment of the present invention.

[0023] Figure 2 The diagram schematically illustrates a cross-sectional view of a nanoscale vacuum channel transistor structure in the forward magnification region of an embodiment of the present invention.

[0024] Figure 3 The energy band diagram of a nanoscale vacuum channel transistor structure in the forward magnification region is schematically shown in an embodiment of the present invention.

[0025] Figure 4A and 4B The diagram illustrates the connection and characteristic curves of a nanoscale vacuum channel transistor structure as a common-base output in an embodiment of the present invention.

[0026] Figure 5A and 5B The diagram illustrates the connection diagram and characteristic curves of a nanoscale vacuum channel transistor structure as a common emitter output in an embodiment of the present invention.

[0027] Figure 6 The flowchart illustrating the fabrication method of the nanoscale vacuum channel transistor structure in an embodiment of the present invention is shown in the illustration.

[0028] Figures 7A-7G The schematic diagram illustrates the structural diagrams corresponding to each step in the fabrication method of the nanoscale vacuum channel transistor structure according to an embodiment of the present invention.

[0029] Figure 8 The diagram illustrates the relationship between BOE etching time and etching length in an embodiment of the present invention.

[0030] Explanation of reference numerals in the attached figures:

[0031] 1-Substrate; 2-Base; 3-Emitter; 4-Oxide layer; 5-Collector electrode; 6-Emitter electrode; 7-Base electrode; E C - Conductor band; E V -Price band; E F -Fermi level; E VAC -Vacuum energy level. Detailed Implementation

[0032] In order to make the objects, technical solutions and advantages of the present application clearer, the following further describes the present application with reference to the specific embodiments and accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0033] The terms used herein are only used to describe specific embodiments, and are not intended to limit the present application. The terms "comprise", "contain", and the like used herein indicate the existence of the stated features, steps, operations and / or components, but do not exclude the presence or addition of one or more other features, steps, operations or components.

[0034] In the present application, unless otherwise explicitly specified and limited, the terms "mount", "connect", "connect", "fix", and the like should be understood in a broad sense, for example, can be fixedly connected, or can be detachably connected, or integrated; can be mechanically connected, or electrically connected or can communicate with each other; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of two elements or the interaction relationship between two elements. For a person of ordinary skill in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0035] In the description of the present application, it should be understood that the terms "longitudinal", "length", "circumferential", "front", "back", "left", "right", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present application and simplify the description, and do not indicate or imply that the subsystems or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0036] Throughout the drawings, the same elements are denoted by the same or similar reference numerals. When it may cause confusion in understanding the present application, the conventional structure or configuration will be omitted. And the shape, size, positional relationship of each component in the drawing does not reflect the true size, proportion and actual positional relationship. In addition, in the claims, any reference symbol located between parentheses should not be construed as a limitation on the claims.

[0037] Similarly, to simplify the invention and aid in understanding one or more of the various disclosed aspects, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together into a single embodiment, figure, or description thereof. The use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0038] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0039] The purpose of this invention is to provide a nanoscale vacuum channel transistor structure. By designing a vacuum channel, electrons are transported via a non-scattering ammunition transport method, overcoming the scattering effect and effectively improving the operating speed of the device. Furthermore, because the key operating region of this transistor structure contains a vacuum channel, the device's sensitivity to temperature, voltage, and radiation is effectively reduced, allowing it to be used in air environments.

[0040] The nanoscale vacuum channel transistor structure includes: a substrate 1; a base 2, grown in a first region on the surface of the substrate 1; an emitter 3, grown in a second region on the surface of the substrate 1; wherein the first region and the second region are located on the same surface of the substrate 1 and do not intersect; an oxide layer 4, grown in a third region on the surface of the base 2, wherein the third region is a portion of the first region; a collector electrode, grown on the surface of the oxide layer; a collector electrode 5, grown on the surface of the oxide layer 4; wherein the width of the oxide layer 4 is smaller than the width of the collector electrode 5, forming a vacuum channel on both sides of the oxide layer 4; an emitter electrode 6, grown on the surface of the emitter 3; and a base electrode 7, grown in a fourth region on the surface of the base 2, wherein the fourth region is a portion of the first region and does not intersect with the third region. The nanoscale vacuum channel transistor structure will be described in detail below with reference to specific embodiments.

[0041] Figure 1 A schematic diagram of a nanoscale vacuum channel transistor structure provided according to an embodiment of the present invention is shown.

[0042] like Figure 1As shown, the nanometer-scale vacuum channel triode structure can include: a substrate 1; a base 2; an emitter 3; an oxide layer 4; a collector electrode 5; an emitter electrode 6; and a base electrode 7.

[0043] The substrate 1 is made of N-type silicon (Si).

[0044] The base 2 is grown on a first region of the surface of the substrate 1 and is made of P-type impurities, typically P-type boron (B) doping, with a doping concentration of 10 13 ~ 10 17 cm -3 .

[0045] The emitter 3 is grown on a second region of the surface of the substrate 1 and is made of heavily doped N-type impurities, typically N-type phosphorus (P) doping or N-type arsenic (As) doping, with a doping concentration greater than 10 19 cm -3 .

[0046] The first region and the second region are located on the same surface of the substrate, and there is a gap between the first region and the second region.

[0047] The oxide layer 4 is grown on a third region of the surface of the base 2, and the third region is a part of the first region, with a thickness of less than 68 nm. The oxide layer 4 is a channel for the scattering-free ballistic transport of electrons around the oxide layer 5. The oxide layer 4 is made of silicon dioxide (SiO2), and the width of the oxide layer 4 needs to be less than the width of the collector electrode 5, so as to form a vacuum channel on both sides of the oxide layer 4.

[0048] The collector electrode 5 is grown on the surface of the oxide layer 4 and is used for emitting electrons. The collector electrode 5 is made of metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt), and copper (Cu).

[0049] The base electrode 6 is grown on a fourth region of the surface of the base 2, and the fourth region is a part of the first region and does not intersect with the third region, and forms an ohmic contact with the base 2. The base electrode 6 is made of metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt), and copper (Cu).

[0050] The emitter electrode 7 is grown on the surface of the emitter 3 and forms an ohmic contact with the emitter 3. The emitter electrode 7 is made of metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt), and copper (Cu).

[0051] The beneficial effects of the nanometer-scale vacuum channel triode structure will be discussed below in conjunction with the specific working process of the embodiments.

[0052] In the nanometer scale vacuum channel triode structure, the base 2 and the emitter 3 form an emission junction, and the base 3 and the collector electrode 5 form a collection junction. The forward bias refers to that the P region is positive and the N region is negative in the nanometer scale vacuum channel triode structure. The nanometer scale vacuum channel triode has four working regions, which are a forward amplification region, a reverse amplification region, a saturation region and a cutoff region. When the emission junction is positively biased and the collection junction is negatively biased, the triode is in the forward amplification region; when the emission junction is negatively biased and the collection junction is positively biased, the triode is in the reverse amplification region; when the emission junction and the collection junction are both positively biased, the triode is in the saturation region; and when the emission junction and the collection junction are both negatively biased, the triode is in the cutoff region. The triode in the forward amplification region is analyzed below.

[0053] Figure 2 A cross-sectional view of the nanometer scale vacuum channel triode structure in the embodiment of the present application in the forward amplification region is schematically shown;

[0054] Figure 3 A band diagram of the nanometer scale vacuum channel triode structure in the embodiment of the present application in the forward amplification region is schematically shown;

[0055] When the base 2 and the emitter 3 are applied with a forward bias, the emission junction is positively biased, and the electrons in the emitter 3 are injected into the base 2. When the base 2 and the collector electrode 5 are applied with a reverse bias, the collection junction is negatively biased, at this time, a small part of the electrons injected from the emitter 3 recombine with the holes in the base 2, and the rest of the electrons are excited to the collector electrode 5 and are collected by the collector electrode 5. Since the oxide layer 4 between the base 2 and the collector electrode 5 is laterally etched, the vacuum channel is formed on both sides of the oxide layer 4, and the thickness of the oxide layer is less than 68 nm, most of the electrons in the emitter 3 are collected by the collector electrode 5 in the form of non-scattering ballistic transport. The non-scattering ballistic transport has a faster transport speed, which can effectively reduce the time for the collector electrode 5 to collect the electrons, thereby further improving the working efficiency of the whole device.

[0056] The nanometer scale vacuum channel triode structure in the forward amplification region is applied in a common base or common emitter circuit connection, so that the amplification function of the signal can be realized.

[0057] When the triode is connected with the common base circuit, the connection mode is as shown in Figure 4A The input emitter current signal I6 is amplified when passing through the triode and is transmitted to the collector electrode, and the current I5 detected at the collector electrode, and the amplification factor a is as shown in Figure 4B .

[0058] When the triode is connected with the common base circuit, the connection mode is as shown in Figure 5AAs shown, the input emitter current signal I7 is amplified by the transistor and transmitted to the collector electrode. The current I5 detected at the collector electrode is amplified by a factor β as shown. Figure 5B As shown.

[0059] Based on the same inventive concept, the present application also provides a method for preparing a nanoscale vacuum channel triode structure. Figure 1 As shown, the nanoscale vacuum channel triode structure.

[0060] Figure 6 As shown, the nanoscale vacuum channel triode structure. Figure 6 As shown, the nanoscale vacuum channel triode structure.

[0061] Operation S610, prepare the base electrode 2 on the first region of the substrate 1 surface.

[0062] Operation S120, prepare the emitter 3 on the second region of the substrate 1 surface, wherein the first region and the second region are on the same surface of the substrate 1 and do not intersect.

[0063] Growth of the oxide layer on the surface of the substrate 1, wherein the material of the oxide layer can be silicon dioxide (SiO2). Select the first region and the second region, apply photoresist on the oxide layer except the first region and the second region and pattern the photoresist, etch the first region and the second region of the substrate, and remove the blocking photoresist. Inject P-type impurities into the first region to prepare the base electrode 2, as shown. Figure 7A As shown, the P-type impurity doping concentration is 10 13 ~ 10 17 cm -3 , which can be P-type boron (B) doping. Inject N-type impurities into the second region to prepare the emitter, as shown. Figure 7B As shown, the N-type impurity doping concentration is greater than 10 19 cm -3 , which can be N-type phosphorus (P) doping or N-type arsenic (As) doping. After the preparation of the base electrode 2 and the emitter 3.

[0064] Operation S130, prepare the oxide layer 4 on the third region of the base electrode 2 surface, wherein the third region is a part of the first region.

[0065] The thickness of the oxide layer needs to be less than 68 nm to facilitate the ballistic transport of electrons without scattering, as shown. Figure 7C As shown.

[0066] Operation S140, prepare the collector electrode 5 on the surface of the oxide layer 4.

[0067] The material of the collector electrode 5 is metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt) and copper (Cu), as shown in Figure 7D .

[0068] After the collector electrode 5 is prepared, the two sides of the oxide layer 4 are etched by using a wet etchant, so that the width of the oxide layer 4 is less than the width of the collector electrode 5, and the vacuum channel is formed, as shown in Figure 7E . In the embodiment of the present application, the oxide layer 4 is etched by using a buffered oxide etch (BOE), which is mixed by hydrofluoric acid (49%) and water or ammonium fluoride and water. The etching time and the width of the etched oxide layer are shown in Figure 8 . That is, the longer the etching time is, the narrower the width of the oxide layer 4 is, and correspondingly, the wider the vacuum channel is, and thus the working efficiency of the device is higher. However, it should be noted that if the etching time is too long, that is, the oxide layer 4 is too narrow, the collector electrode may be unstable, and thus the appropriate etching time should be selected according to the actual situation.

[0069] In operation S150, the emitter electrode 6 is prepared on the surface of the emitter 3.

[0070] The material of the emitter electrode 6 is metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt) and copper (Cu), as shown in Figure 7F .

[0071] In operation S160, the base electrode 7 is prepared on the fourth region of the surface of the base 2, wherein the fourth region is a part of the first region and does not intersect with the third region.

[0072] The photoresist is applied on the surface of the base 2 except the fourth region, and the photoresist is patterned, and then the base electrode 7 is prepared on the fourth region of the surface of the base 2, and then the photoresist is stripped by using acetone. The material of the base electrode 7 is metal, such as chromium (Cr), gold (Au), nickel (Ni), tungsten (W), platinum (Pt) and copper (Cu), as shown in Figure 7G .

[0073] The above-described specific embodiments further illustrate the technical solutions of the present application, and it should be understood that the above-described specific embodiments are only for the specific embodiments of the present application and are not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A nano-scale vacuum channel triode structure, comprising: a substrate (1); a base electrode (2) grown on a first region of a surface of the substrate (1); an emitter electrode (3) grown on a second region of the surface of the substrate (1); wherein the first region and the second region are on the same surface of the substrate (1) and do not intersect; an oxide layer (4) grown on a third region of a surface of the base electrode (2); wherein the third region is a part of the first region; a collector electrode (5) grown on a surface of the oxide layer (4); wherein the width of the oxide layer (4) is less than the width of the collector electrode (5), and a vacuum channel is formed on both sides of the oxide layer (4); an emitter electrode (6) grown on a surface of the emitter electrode (3); a base electrode (7) grown on a fourth region of a surface of the base electrode (2); wherein the fourth region is a part of the first region and does not intersect with the third region.

2. The nanoscale vacuum channel triode structure of claim 1, wherein, The substrate (1) is N-type silicon.

3. The nanoscale vacuum channel triode structure of claim 1, wherein, The base (2) is P-type boron-doped, with a doping concentration of 10 13 cm 17 cm -3 .

4. The nanoscale vacuum channel triode structure of claim 1, wherein, The emitter (3) is N-type phosphorus-doped or N-type arsenic-doped, with a doping concentration greater than 10 19 cm -3 .

5. The nanoscale vacuum channel triode structure of claim 1, wherein, The oxide layer (4) is silicon dioxide, and the thickness of the oxide layer (4) is less than 68 nm.

6. The nanoscale vacuum channel triode structure of claim 1, wherein, The collector electrode (5), the emitter electrode (6), and the base electrode (7) are made of metal.

7. A method for manufacturing the nano-scale vacuum channel triode structure according to any one of claims 1-6, comprising: manufacturing the base electrode (2) on a first region of a surface of the substrate (1); manufacturing the emitter electrode (3) on a second region of the surface of the substrate (1); wherein the first region and the second region are on the same surface of the substrate (1) and do not intersect; manufacturing the oxide layer (4) on a third region of a surface of the base electrode (2); wherein the third region is a part of the first region; manufacturing the collector electrode (5) on a surface of the oxide layer (4); wherein the width of the oxide layer (4) is less than the width of the collector electrode (5), and a vacuum channel is formed on both sides of the oxide layer (4); manufacturing the emitter electrode (6) on a surface of the emitter electrode (3); manufacturing the base electrode (7) on a fourth region of a surface of the base electrode (2); wherein the fourth region is a part of the first region and does not intersect with the third region.

8. The production method according to claim 7, wherein The base (2) is prepared by injecting P-type impurities into the first region of the surface of the substrate (1), wherein the P-type impurity doping concentration is 10 13 ~10 17 cm -3 .

9. The production method according to claim 7, wherein The emitter (3) is prepared by implanting N-type impurities into the second region of the surface of the substrate (1), wherein the N-type impurity doping concentration is greater than 10 19 cm -3 .

10. The production method according to claim 7, wherein The method for manufacturing the vacuum channel comprises: after the collector electrode (5) is manufactured, etching both sides of the oxide layer (4) using a wet etchant, so that the width of the oxide layer (4) is less than the width of the collector electrode (5), and the vacuum channel is formed.

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