A broadband anti-blocking RF receiver based on N-path filtering technology

Abstract

The present invention relates to a broadband anti-blocking radio frequency receiver based on N-path filtering technology, comprising a multi-stage N-path filtering and mixing circuit, a baseband amplifier circuit and a four-phase non-overlapping clock generation circuit; the multi-stage N-path filtering and mixing circuit is cascaded to amplify useful signals, filter out blocking signals, and convert high-frequency signals to low frequencies; the baseband amplifier circuit is used to amplify down-converted signals; the four-phase non-overlapping clock generation circuit is used to provide non-overlapping clocks for controlling the multi-stage N-path filter and mixer. The receiver has the characteristics of full integration and high linearity, and is easy to receive signals of different frequency bands through frequency tuning.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency integrated circuits, and in particular to a broadband anti-blocking radio frequency receiver based on N-path filtering technology. Background Art

[0002] With the development of wireless communication technology, the requirements for wireless receivers are getting higher and higher. Traditional receiver structures, such as superheterodyne receivers, require off-chip surface acoustic wave (SAW) filtering, which is not tunable and not fully integrated. The use of off-chip filters increases the size and cost of the receiver. When the receiver is required to support multiple frequency bands, multiple receivers are required, further increasing the size and cost. In addition, the first stage of traditional receivers usually uses a low-noise amplifier (LNA) to achieve low noise for the entire system, but due to its poor linearity, it is not suitable for occasions with high linearity requirements. Therefore, from the perspective of development trends, it is of great significance to develop a fully integrated, reconfigurable broadband anti-blocking wireless receiver. Summary of the invention

[0003] The object of the present invention is to provide a broadband anti-blocking radio frequency receiver based on N-path filtering technology, which has the characteristics of full integration and high linearity and is easy to receive signals of different frequency bands through frequency tuning.

[0004] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a broadband anti-blocking RF receiver based on N-path filtering technology, characterized in that it includes a multi-stage N-path filtering and mixing circuit, a baseband amplifier circuit and a four-phase non-overlapping clock generating circuit; the multi-stage N-path filtering and mixing circuit is cascaded to amplify useful signals, filter out blocking signals, and convert high-frequency signals to low frequencies at the same time; the baseband amplifier circuit is used to amplify down-converted signals; the four-phase non-overlapping clock generating circuit is used to provide non-overlapping clocks for controlling the multi-stage N-path filters and mixers.

[0005] Furthermore, the multi-stage N-path filtering and mixing circuit includes a first-stage Gain-Boosted N-path filtering circuit, a second-stage differential bottom plate N-path filtering circuit and a third-stage N-path band-stop filtering mixing circuit; the first-stage Gain-Boosted N-path filtering circuit is used to amplify the useful signal in the band, improve the circuit gain, and reduce the circuit noise coefficient; the second-stage differential bottom plate N-path filtering circuit is used to filter out-of-band blocking signals; the third-stage N-path band-stop filtering mixing circuit eliminates the influence of blocking signals by means of N-path filtering plus differential subtraction to further improve linearity, and the third-stage N-path band-stop filtering mixing circuit is also used to realize down-conversion of RF signals to intermediate frequencies.

[0006] Furthermore, the first-stage Gain-Boosted N path filter circuit is connected in parallel to N groups of dual-switch MOS tube capacitor structures at the input and output ports of the transconductance operational amplifier unit, and the first-stage Gain-Boosted N path filter circuit is used to amplify in-band RF signals and filter out blocking signals.

[0007] Furthermore, the second-stage differential bottom plate N-path filter circuit uses N groups of shared switch MOS tubes and capacitors to achieve N-path filtering, and uses 2*N groups of switch MOS tubes to provide gate and drain bias for the shared switch MOS tubes; the second-stage differential bottom plate N-path filter circuit is used to filter out the blocking signal again.

[0008] Furthermore, the third-stage N-path band-stop filter mixer circuit is connected to 2*N groups of capacitor switch MOS tube structures and 2*N groups of switch MOS tube structures at the second-stage output port; the third-stage N-path band-stop filter mixer circuit eliminates the blocking signal in a differential subtraction manner and realizes signal down-conversion.

[0009] Furthermore, the baseband amplifier circuit adopts a fully differential structure, uses an inverter as the main amplification part of the operational amplifier, and the resistor R F Connected across the inverter input and output ports, self-biasing can be achieved.

[0010] Furthermore, the four-phase non-overlapping clock generation circuit is composed of a frequency divider and a buffer circuit, the frequency divider is composed of a latch, and the buffer circuit is realized by a cascade of inverter structures.

[0011] Furthermore, the gate terminals of the switch MOS tubes in the multi-stage N-path filtering and mixing circuit are controlled by four-phase clock signals.

[0012] Compared with the prior art, the present invention has the following beneficial effects: the present invention realizes a high-performance wireless radio frequency receiver by sequentially cascading a multi-stage N-path filtering and mixing circuit and a baseband amplifier circuit, and providing a control signal by a four-phase non-overlapping clock; the present invention converts the radio frequency signal into a differential radio frequency signal, and the differential signal amplifies the useful signal through a three-stage N-path filtering and mixing circuit, filters out the blocking signal, and converts the high-frequency signal to a low frequency at the same time; the three-stage N-path filtering is regarded as an open circuit at the useful signal frequency and a short circuit at the blocking signal frequency, and the anti-blocking effect is significant; finally, the signal is amplified by the baseband amplifier and provided to the back-end circuit for processing. Therefore, the present invention has the characteristics of full integration and high linearity, and is easy to realize the reception of signals of different frequency bands through frequency tuning, and has strong practicality and broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a circuit structure diagram of a broadband anti-blocking radio frequency receiver according to an embodiment of the present invention.

[0014] Figure 2 is a circuit structure diagram of a Gain-Boosted N path filter circuit in an embodiment of the present invention.

[0015] Figure 3 4 is a circuit structure diagram of a differential bottom plate N-path filter circuit in an embodiment of the present invention.

[0016] Figure 4 4 is a circuit structure diagram of an N-path band-stop filter mixer circuit in an embodiment of the present invention.

[0017] Figure 5 4 is a circuit structure diagram of a baseband amplifier circuit in an embodiment of the present invention.

[0018] Figure 6 4 is a circuit structure diagram of a four-phase non-overlapping clock generating circuit in an embodiment of the present invention.

[0019] Figure 7 1 is a simulation result diagram of out-of-band IIP3 (@Δf=80MHz) for a 2 GHz input signal in an embodiment of the present invention.

[0020] Figure 8 1 is a diagram of simulation results of out-of-band suppression (@Δf=80MHz) of a receiver at different frequencies in an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0022] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0023] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0024] In view of the problems that the out-of-band linear performance and tunability of existing receivers are limited, the present invention proposes a broadband anti-blocking RF receiver based on N-path filtering technology. The receiver achieves significant improvement in out-of-band linearity and adjustable receiving frequency through multi-stage N-path filtering and blocking signal cancellation.

[0025] like Figure 1-6As shown, the broadband anti-blocking RF receiver based on N-path filtering technology provided in this embodiment includes a multi-stage N-path filtering and mixing circuit, a baseband amplifier circuit and a four-phase non-overlapping clock generation circuit. The multi-stage N-path filtering and mixing circuit is cascaded to amplify useful signals, filter out blocking signals, and convert high-frequency signals to low frequencies. The baseband amplifier is used to amplify down-converted signals. The multi-stage N-path filtering and mixing circuit and the baseband amplifier are cascaded in sequence. The four-phase non-overlapping clock generation circuit is used to provide a non-overlapping clock to control the multi-stage N-path filter and mixer.

[0026] In this embodiment, the multi-stage N-path filtering and mixing circuit is a three-stage N-path filtering and mixing circuit. The front end of the multi-stage N-path filtering and mixing circuit is designed with an off-chip balun, which converts the received RF single-ended signal into a differential signal, and passes through the three-stage N-path filtering and mixing circuit in sequence. The first stage filters out the blocking signal and provides a certain gain, the second stage filters out the blocking signal again, and the third stage realizes mixing and subtraction and cancellation of the blocking signal. Finally, the signal is amplified by the baseband amplifier for processing by the back-end circuit.

[0027] The first-stage N-path filtering and mixing circuit is a Gain-Boosted N-path filtering circuit, which is used to amplify the useful signal in the band, improve the circuit gain, and reduce the circuit noise coefficient. Compared with the traditional N-path filter, this stage can provide RF gain by adding a transconductance operational amplifier unit to make up for the disadvantage of insufficient gain of the receiver without LNA structure. The transconductance operational amplifier unit adopts an inverter structure. The advantage of this structure is that it can provide large transconductance and good efficiency, and uses current multiplexing to reduce power consumption.

[0028] In this embodiment, the first-stage Gain-Boosted N-path filter circuit is connected in parallel to N groups of dual-switch MOS tube capacitor structures at the input and output ports of the transconductance operational amplifier unit.

[0029] Figure 2 The figure shows the first-stage Gain-Boosted N-path filter circuit. The transconductance operational amplifier unit provides signal gain, and the gain is lost after the transconductance unit is connected in parallel to the band-stop filter circuit, but it also has a band-pass effect.

[0030] The second-stage N-path filtering and mixing circuit is a differential bottom-plane N-path filtering circuit, which is used to filter out-of-band blocking signals. This stage uses capacitors and passive switches to form a differential bottom-plane mixing structure, which avoids the IIP3 deterioration of the circuit caused by the voltage changes at each port of the top mixing structure switch MOS tube. The IIP3 linearity can be expressed as:

[0031]

[0032] Where ρ = R SW / R S (R SW is the equivalent resistance of the switch tube, R S is the internal resistance of the signal source), g2 and g3 are the I DS (V GS ) second and third order derivatives. The differential backplane N-path filter structure uses a shared NMOS switch instead of two switches, so the switch resistance is halved, the ρ value is also halved, and the linearity is greatly improved.

[0033] In this embodiment, the second-stage differential bottom plate N-path filter circuit uses N groups of shared switch MOS tubes and capacitors to implement N-path filtering, and uses 2*N groups of switch MOS tubes to provide gate and drain bias for the shared switch MOS tubes.

[0034] Figure 3 The figure shows a second-stage differential bottom plate N-path filter circuit. The differential bottom plate N-path filter circuit requires that the mixer switch MOS tube has a large width-to-length ratio and the bias MOS tube has a small width-to-length ratio.

[0035] The third-stage N-path filtering and mixing circuit is an N-path band-stop filtering and mixing circuit. This stage eliminates the influence of blocking signals by N-path filtering plus differential subtraction to further improve linearity. At the same time, this stage realizes the down-conversion of RF signals to intermediate frequencies. The backplane mixing technology is also applied to the third-stage N-path band-stop filter design to realize the mixing function. At the same time, for out-of-band blocking signals, the N-path band-stop filter provides a current bypass path, and finally realizes the subtraction and cancellation of out-of-band blocking signals at the output end, further improving linearity.

[0036] In this embodiment, the third-stage N-path band-stop filter mixer circuit is connected to 2*N groups of capacitor switch MOS transistor structures and 2*N groups of switch MOS transistor structures at the second-stage output port. This stage eliminates the blocking signal in a differential subtraction manner and realizes signal down-conversion.

[0037] Figure 4 The third-stage N-path band-stop filter mixer circuit is shown in FIG. The N-path band-stop filter provides a current bypass path for out-of-band signals, and achieves subtraction and cancellation of out-of-band blocking signals at the output end.

[0038] The baseband amplifier circuit adopts a fully differential structure, uses an inverter as the main amplification part of the operational amplifier, and the resistor R F Connected across the inverter input and output ports, self-biasing can be achieved.

[0039] In this embodiment, the baseband amplifier input stage adopts an inverter structure composed of a P tube and an N tube, and the other P tube provides working current and shares current with some transistors to reduce power consumption and noise. Feedback capacitors and resistors are connected to the input and output ports of the amplifier to form a positive feedback path to introduce additional zero points, thereby expanding the bandwidth of the baseband amplifier and improving the roll-off slope of the gain curve.

[0040] Figure 5 The baseband amplifier circuit is shown in Figure 1. The single-stage amplification structure avoids the stability problem, and the inverter also has the characteristics of low noise and high transconductance.

[0041] The four-phase non-overlapping clock generation circuit is composed of a frequency divider and a buffer circuit. The frequency divider is composed of an improved latch, and the buffer circuit is realized by a cascade of inverter structures. The frequency divider generates a four-phase clock signal to control the gate end of the switch MOS tube in the multi-stage N-path filtering and mixing circuit. A buffer is added at the output end of the frequency divider to improve the load capacity of the four-phase clock circuit and eliminate the influence of the RF local oscillator feedthrough. The buffer adopts an inverter cascade design.

[0042] Figure 6 The four-phase non-overlapping clock circuit is shown in FIG. The function of the four-phase non-overlapping clock is to provide a control signal to control the switches of the four mixers so that the switches are turned on in turn to achieve the purpose of mixing and filtering. The frequency of the output signal of the clock circuit corresponds to the center frequency of the entire receiver. The input signal is an external signal used to control the clock generation circuit to generate a signal of the corresponding frequency to achieve the purpose of reconfiguration. In particular, the clock is applied to the receiver design with N=4.

[0043] It should be noted that the baseband amplifier and the four-phase non-overlapping clock circuit can be replaced by different structures while meeting the performance requirements of the receiver.

[0044] Figure 7 The figure shows the out-of-band IIP3 simulation result at Δf = 80MHz when the RF signal is input at 2GHz. As shown in the figure, the design has high linearity, and the out-of-band IIP3 at 2GHz is 22.12dBm (@Δf = 80MHz).

[0045] Figure 8 The figure shows the out-of-band suppression simulation results of the receiver at different frequencies of Δf = 80MHz. As shown in the figure, the out-of-band suppression of this design is relatively high, and the out-of-band suppression at 500MHz is 37dB (@Δf = 80MHz).

[0046] The above is only a preferred embodiment of the present invention, and does not limit the present invention in other forms. Any technician familiar with the profession may use the above disclosed technical content to change or modify it into an equivalent embodiment with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the technical solution of the present invention still belongs to the protection scope of the technical solution of the present invention.

Claims

1. A broadband anti-blocking radio frequency receiver based on N-path filtering technology, characterized in that: It includes a multi-stage N-path filtering and mixing circuit, a baseband amplifier circuit and a four-phase non-overlapping clock generation circuit; the multi-stage N-path filtering and mixing circuit is cascaded to amplify useful signals, filter out blocking signals, and convert high-frequency signals to low frequencies; the baseband amplifier circuit is used to amplify down-converted signals; the four-phase non-overlapping clock generation circuit is used to provide non-overlapping clocks for controlling the multi-stage N-path filters and mixers; The multi-stage N-path filtering and mixing circuit includes a first-stage Gain-Boosted N-path filtering circuit, a second-stage differential backplane N-path filtering circuit, and a third-stage N-path band-stop filtering mixing circuit; the first-stage Gain-Boosted N-path filtering circuit is used to amplify the useful signal in the band, improve the circuit gain, and reduce the circuit noise coefficient; the second-stage differential backplane N-path filtering circuit is used to filter out-of-band blocking signals; the third-stage N-path band-stop filtering mixing circuit eliminates the influence of blocking signals by N-path filtering plus differential subtraction to further improve linearity, and the third-stage N-path band-stop filtering mixing circuit is also used to realize down-conversion of RF signals to intermediate frequencies; The first-stage Gain-Boosted N-path filter circuit is connected in parallel to N groups of dual-switch MOS tube capacitor structures at the input and output ports of the transconductance operational amplifier unit, and the first-stage Gain-Boosted N-path filter circuit is used to amplify the in-band RF signal and filter out the blocking signal; The second-stage differential backplane N-path filter circuit uses N groups of shared switch MOS tubes and capacitors to implement N-path filtering, and uses 2×N groups of switch MOS tubes to provide gate and drain bias for the shared switch MOS tubes; the second-stage differential backplane N-path filter circuit is used to filter out the blocking signal again; The third-stage N-path band-stop filter mixer circuit is connected to 2×N groups of capacitor switch MOS tube structures and 2×N groups of switch MOS tube structures at the second-stage output port; The third-stage N-path band-stop filter mixer circuit eliminates the blocking signal in a differential subtraction manner and realizes signal down-conversion.

2. A broadband anti-blocking radio frequency receiver based on N-path filtering technology according to claim 1, characterized in that: The baseband amplifier circuit adopts a fully differential structure, uses an inverter as the main amplification part of the operational amplifier, and the resistor R F Connected across the inverter input and output ports, self-biasing can be achieved.

3. The broadband anti-blocking radio frequency receiver based on N-path filtering technology according to claim 1, characterized in that: The four-phase non-overlapping clock generating circuit is composed of a frequency divider and a buffer circuit. The frequency divider is composed of a latch, and the buffer circuit is realized by cascading inverter structures.

4. The broadband anti-blocking radio frequency receiver based on N-path filtering technology according to claim 1, characterized in that: The gate end of the switch MOS tube in the multi-stage N-path filtering and mixing circuit is controlled by a four-phase clock signal.

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