Display panel and manufacturing method thereof
By opening a groove with a large width in the pixel unit of the display panel to accommodate the edge of the partition structure, the problem of uneven partition structure caused by the inorganic PDL layer is solved, the stability and pixel opening rate are improved, and the normal OLED process is ensured. conduct.
Patent Information
- Application Number
- CN202311583620.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-24
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2043-11-24
AI Technical Summary
In the OLED process, when using inorganic pixel defining layer, the anode via is not filled, resulting in the partition structure that may be located at the slope of the via, resulting in different angles of the OH structure, forming an upper convex structure residue, affecting the subsequent process and Device performance.
Design a display panel, by opening a groove with a width greater than the partition structure in the pixel unit, so that the edges of the partition structure do not overlap with the groove side walls, and use the grooves to accommodate both sides of the partition structure, and the pixel anode is used to accommodate the pixel anode. The extension is connected to the metal trace in the groove to ensure the stability of the partition structure and the pixel opening ratio.
The stability of the partition structure is improved, the display area occupied by the pixel anode is avoided, the pixel opening rate is increased, and the partition structure uneven caused by the inorganic PDL layer is solved.
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Figure CN117750802B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display, and in particular to a display panel and a manufacturing method thereof. Background Art
[0002] In the existing OH structure (partition structure), it is usually arranged above the PDL layer (pixel definition layer) and is a suspended structure.
[0003] In a general process flow, the PDL layer is made of organic material. Since the PDL layer of organic material is thicker, the anode via can be filled and leveled. After the surface of the anode via is flat, the OH structure can be set above the anode via.
[0004] However, considering that the subsequent OLED process requires photolithography, the reliability of PDL organic materials is insufficient, so the PDL layer material needs to be changed to inorganic materials. When an inorganic PDL layer is used, the anode vias covered by the PDL layer will not be filled, resulting in the OH structure set at the anode via being located at the via slope, which will cause the OH structure to have different left and right angles, resulting in a convex structure residue, which will lead to abnormal subsequent process or poor device performance. Summary of the invention
[0005] The main technical problem solved by the present application is to provide a display panel and a manufacturing method thereof, limit the position of the partition structure, increase the pixel aperture ratio, and improve the product life.
[0006] To solve the above problems, the first aspect of the present application provides a display panel, comprising a plurality of pixel units arranged in an array, each of the pixel units comprising a plurality of sub-pixels and a partition structure arranged between two adjacent sub-pixels, and a groove with a width greater than that of the partition structure is provided in the pixel unit.
[0007] The partition structure includes a first partition structure located in the groove, and a distance between an edge of the first partition structure located in the groove and a side wall of the groove is not less than 0.2 um.
[0008] Wherein, the partition structure further includes a second partition structure arranged in a flat area away from the groove, and the second partition structure is connected to the first partition structure.
[0009] The sub-pixel includes a pixel anode, and the pixel anode includes a display portion and an extension portion. The extension portion of the pixel anode extends into the groove to achieve electrical connection with the exposed metal wiring in the groove.
[0010] Wherein, a distance between the second partition structure located in the flat area and the display portion of the pixel anode located in the flat area is not less than 0.5 um.
[0011] Wherein, the extending parts of the pixel anodes of the plurality of sub-pixels in the same pixel unit are located on the same straight line.
[0012] The display panel comprises: a substrate, a surface of which is provided with metal wiring; a flat layer, which covers the surface of the substrate and is provided with a groove having a width greater than that of the partition structure, so that part of the metal wiring is exposed; a pixel anode, comprising a display portion arranged on a surface of the flat layer away from the substrate, and an extension portion extending into the groove, wherein the extension portion is electrically connected to the metal wiring in the groove; a pixel defining layer, which is arranged between two adjacent pixel anodes and covers the surface of the extension portion of the pixel anode; and the partition structure is arranged on a surface of the pixel defining layer away from the substrate.
[0013] Wherein, the pixel definition layer is made of inorganic material.
[0014] The partition structure includes a first partition layer and a second partition layer, wherein the second partition layer is disposed on a surface of the first partition layer away from the pixel defining layer and is longer than a length of the first partition layer in a direction parallel to the substrate.
[0015] The second aspect of the present application provides a method for manufacturing a display panel, wherein the manufacturing method comprises: providing a substrate; wherein a metal wiring is arranged on the surface of the substrate; a flat layer is arranged on the surface of the substrate, and a groove is opened on the flat layer to expose the metal wiring; a pixel anode is arranged on the surface of the flat layer, so that part of the pixel anode extends into the groove; a pixel defining layer is arranged between two adjacent pixel anodes and on the surface of the pixel anode located in the groove; a partition structure is arranged on the surface of the pixel defining layer in the groove, so that the edge of the partition structure located in the groove does not overlap with the side wall of the groove.
[0016] The beneficial effects of the present application are: by widening the corresponding anode via hole to form a groove, the groove can accommodate the edges of the partition structure on both sides, avoiding the edges of the partition structure and the side walls of the groove from overlapping in the vertical direction, thereby improving the stability of the partition structure. At the same time, the partition structure is located above the non-display area of the pixel anode, avoiding occupying the area of the display area of the pixel anode. Compared with the scheme of shrinking the pixel anode to avoid the overlap of the groove of the pixel anode and the partition structure, the present case increases the pixel aperture ratio. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0018] Figure 1 A schematic structural diagram of a specific embodiment of a pixel unit of a display panel of the present application;
[0019] Figure 2 for Figure 1 Schematic diagram of a partial cross-section structure;
[0020] Figure 3 This is a structural schematic diagram of a specific embodiment of the partition structure of the present application;
[0021] Figure 4 There are several defects in the partition structure in the prior art;
[0022] Figure 5 This is a schematic structural diagram of an embodiment of a display panel of the present application;
[0023] Figure 6 It is a flow chart of a specific embodiment of the manufacturing method of the display panel of the present application.
[0024] 10 pixel unit; 11 sub-pixel; 111 pixel anode; 1111 extension portion; 1112 display portion; 12 partition structure; 121 first partition structure; 122 second partition structure; 1211 first partition layer; 1212 second partition layer; 110 substrate; 113 flat layer; 114 pixel defining layer; 101 groove. DETAILED DESCRIPTION
[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0026] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms of "a", "said", and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless otherwise clearly indicated above, and "multiple" generally includes at least two, but does not exclude the inclusion of at least one.
[0027] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0028] It should be understood that the terms "include", "comprises" or any other variations used herein are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, the elements defined by the sentence "includes..." do not exclude the presence of other identical elements in the process, method, article or device that includes the elements.
[0029] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0030] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The presence of the phrase at each location in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0031] The present application provides a display panel, which includes a plurality of pixel units 10. Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a specific embodiment of a pixel unit of a display panel of the present application. Figure 1 As shown, each pixel unit 10 includes a plurality of sub-pixels 11 and a partition structure 12 disposed between two adjacent sub-pixels 11 .
[0032] The sub-pixels 11 specifically include blue sub-pixels, green sub-pixels, and red sub-pixels, and in other embodiments also include white sub-pixels, which are not limited here.
[0033] The partition structure 12 is disposed around each sub-pixel 11 to separate the sub-pixel 11 from all surrounding sub-pixels 11 , including: a partition structure 12 disposed around the pixel unit 10 , and a partition structure 12 located between adjacent sub-pixels 11 inside the pixel unit 10 .
[0034] In this embodiment, a groove 101 having a width greater than that of the partition structure 12 is provided in the pixel unit 10, so that the partition structure 12 located inside the pixel unit 10 can be accommodated in the groove 101, thereby avoiding the edge of the partition structure 12 from overlapping with the side wall of the groove 101 in a direction perpendicular to the plane, thereby avoiding the edge of the partition structure 12 from becoming uneven and affecting the performance of the display device.
[0035] The number of grooves 101 may be one, and one groove 101 is arranged across the pixel anode 111 of the sub-pixel 11. Specifically, the groove 101 is arranged at the position of the anode via hole of the pixel anode 111 of the sub-pixel 11, so that the pixel anode 111 of the sub-pixel 11 can be connected to the exposed metal wiring in the groove 101 through the groove 101 to transmit signals to the pixel anode 111. The metal wiring is mainly a data line. In this embodiment, the position of the original anode via hole is widened so that the position of the anode via hole can accommodate the partition structure 12, thereby avoiding the edge of the partition structure 12 from overlapping with the side wall of the groove, which affects the stability of the partition structure 12.
[0036] In a preferred embodiment, the partition structure 12 includes a first partition structure 121 located in the groove 101, wherein the distance between the edge of the first partition structure 121 and the side wall of the groove 101 is not less than 0.2 um. Figure 1 As shown, H1 ≥ 0.2 um, so as to avoid the edge of the first partition structure 121 overlapping with the slope on the side wall of the groove 101 in the vertical direction, so as to affect the formation of the first partition structure 121 .
[0037] In a further preferred embodiment, the partition structure 12 further includes a second partition structure 122 located in a flat area away from the outside of the groove 101. It should be noted that the area outside the groove 101 is a flat area. Figure 1 As shown in , it includes a second partition structure 122 located between two adjacent sub-pixels and away from the groove 101 area, and a second partition structure 122 arranged around the pixel unit 10. The second partition structure 122 is connected to the first partition structure 121. Specifically, the first partition structure 121 and the second partition structure 122 are connected on the sidewall slope of the groove 101. In a preferred embodiment, the first partition structure 121 and the second partition structure 122 are integrally formed on the sidewall slope of the groove 101.
[0038] Each sub-pixel 11 includes a pixel anode 111 , and the pixel anode 111 of each sub-pixel 11 includes a display portion 1112 and an extension portion 1111 , and the extension portion 1111 of each pixel anode 111 extends into the groove 101 to achieve electrical connection with the exposed metal wiring in the groove 101 .
[0039] In a preferred embodiment, the distance between the second partition structure 122 located in the flat area and the pixel anode 111 located in the flat area is not less than 0.5 um. Figure 1 As shown, H2≥0.5um, so as to avoid the second partition structure 122 and the pixel anode 111 overlapping in the vertical direction, thereby causing the left and right angle difference of the partition structure process. Specifically, the distance between the second partition structure 122 and the display part 1112 of the pixel anode 111 is not less than 0.5um.
[0040] In a preferred embodiment, the extensions 1111 of the pixel anodes 111 of the multiple sub-pixels 11 in the same pixel unit 10 are located on the same straight line, so that the groove 101 is a straight groove, thereby reducing the difficulty of forming the first partition structure 121 located in the groove 101. In other embodiments, the extensions 1111 of the pixel anodes 111 of the multiple sub-pixels 11 are not located on the same straight line, and the groove 101 is a curved groove, and the first partition structure 121 formed in the groove 101 is also curved, resulting in that the distance between the first partition structure 121 and the side wall of the groove 101 at the curved position is difficult to control, increasing the difficulty of manufacturing.
[0041] In a more preferred embodiment, the extending portions 1111 of the pixel anodes 111 of the plurality of sub-pixels 11 of the pixel unit 10 in the same row are located on the same straight line, which is not limited here.
[0042] Please refer to the following for details. Figure 2 , Figure 2 for Figure 1 Schematic diagram of a partial cross-sectional structure. Figure 1 The structural diagram of the a-a' section, b-b' section and c-c' section in FIG. Figure 2 As shown, the display panel includes a substrate 110 , a planar layer 113 , a pixel anode 111 , a pixel defining layer 114 and a partition structure 12 in sequence.
[0043] Among them, a metal wiring (not shown in the figure) is set on the substrate 110. Specifically, the substrate 110 can also include a thin film transistor layer. The metal wiring includes a drain wiring of the thin film transistor, which is used to connect to the pixel anode 111 to transmit the pixel signal to the sub-pixel 11.
[0044] The planar layer 113 is disposed on the surface of the substrate 110 and has a groove 101 with a width greater than that of the partition structure 12 . The groove 101 exposes part of the metal wiring so that the subsequent pixel anode 111 can be electrically connected to the metal wiring in the groove 101 .
[0045] The pixel anode 111 includes a display portion 1112 disposed on the surface of the planar layer 113 away from the substrate, and an extension portion 1111 extending into the groove 101, and the extension portion 1111 is electrically connected to the metal wiring in the groove 101. The display portion 1112 is used to form the display anode of the sub-pixel 11 for display.
[0046] The pixel defining layer 114 is disposed between two adjacent pixel anodes 111 and covers a portion of the surface of the pixel anode 111 , specifically covers the surface of the extension portion 1111 of the pixel anode 111 and exposes the display portion 1112 to facilitate the subsequent formation of the light emitting area of the sub-pixel.
[0047] The partition structure 12 is partially disposed on a surface of the pixel defining layer 114 away from the substrate 110 .
[0048] The partition structure 12 includes a first partition structure 121 located in the groove 101 and a second partition structure 122 located in a flat area away from the groove 101. It should be noted that the surface of the flat layer 113 is a flat area, and the area where the groove 101 is opened is a groove area.
[0049] In a preferred embodiment, the distance between the edge of the first partition structure 121 located in the groove 101 and the side wall of the groove 101 is not less than 0.2 um. Figure 3 As shown, the distance between at least one side edge of the first partition structure 121 and the side wall of the groove 101 is not less than 0.2 um to prevent the slope of the side wall of the groove 101 from affecting the formation of the second partition layer on the first partition structure 121 .
[0050] In this embodiment, the pixel defining layer 114 is made of inorganic material. Compared with the organic material in the prior art, the pixel defining layer 114 made of inorganic material is thinner and cannot fill the groove 101. A slope will be formed on the side wall of the groove 101, which will affect the edge formation of the partition structure 12.
[0051] In this embodiment, the partition structure 12 includes a first partition layer 1211 and a second partition layer 1212. For details, please refer to Figure 3 , Figure 3 This is a schematic diagram of a specific embodiment of the partition structure of the present application. Figure 3As shown, the second partition layer 1212 is disposed on the surface of the first partition layer 1211 away from the pixel defining layer 114, and the length of the second partition layer 1212 is longer than that of the first partition layer 1211, forming an eaves structure to facilitate the subsequent production of the sub-pixel display area.
[0052] It should be noted that the uneven surface mainly affects the production of the second partition layer 1212 of the partition structure 12. Figure 4 , Figure 4 These are several formation defects of the partition structure in the prior art. As shown in a of 4, when any edge of the first partition structure 121 located in the groove 101 is set on the groove slope, it will cause the second partition layer of the partition structure 12 to be exposed at different angles on the left and right, and the formation of the second partition layer will produce a convex defect. Figure 4 As shown in b, when the distance between the second partition structure 122 in the flat area and the pixel anode 111 in the display area is too small, the second partition layer 1212 of the partition structure 12 will overlap with the pixel anode 111 in the vertical direction, which will also cause left and right angle differences, thereby causing defects.
[0053] In the present application, the position of the anode via is widened to form a groove, so that the groove can accommodate the edges of the partition structure on both sides, avoiding the edges of the partition structure and the side walls of the groove from overlapping in the vertical direction, thereby improving the stability of the partition structure. At the same time, the partition structure is located in the groove (that is, the extension) of the pixel anode, avoiding occupying the area of the display part of the pixel anode. Compared with the scheme of shrinking the pixel anode and avoiding the overlap of the groove of the pixel anode and the partition structure, the present case increases the pixel aperture ratio.
[0054] The present application also provides a schematic diagram of the structure of a display panel. Figure 5 , Figure 5 FIG. 1 is a schematic diagram of the structure of an embodiment of a display panel of the present application. Figure 5 As shown, the display panel includes a plurality of pixel units 10 arranged in an array. Each pixel unit 10 includes a structure as described in any of the above embodiments, which is not limited here. Two adjacent pixel units 10 are separated by a partition structure, that is, two adjacent pixel units 10 share a portion of a partition structure.
[0055] This application also provides a method for manufacturing a display panel. For details, please refer to Figure 6 , Figure 6 FIG. 1 is a flow chart of a specific embodiment of a method for manufacturing a display panel of the present application. Figure 6 As shown, the production method includes:
[0056] Step S61: providing a substrate.
[0057] The substrate includes a thin film transistor layer. A metal wiring is arranged on the surface of the substrate, and the metal wiring includes a data line and a drain metal of the thin film transistor.
[0058] Step S62: a flat layer is provided on the surface of the substrate, and a groove is formed on the flat layer.
[0059] There is exposed metal wiring in the groove, wherein the width of the groove is greater than the width of the partition structure arranged therein.
[0060] Step S63: arranging a pixel anode on the surface of the planar layer, and extending part of the pixel anode into the groove.
[0061] The groove is also an anode via, which is used to connect the pixel anode with the metal wiring of other layers to achieve electrical signal connection.
[0062] The pixel anode includes a display portion and an extension portion, wherein the display portion is used to display light, and the extension portion is used to connect metal wiring and transmit electrical signals to the pixel anode.
[0063] Step S64: a pixel defining layer is disposed between two adjacent pixel anodes and on the surface of the pixel anode located in the groove.
[0064] Specifically, the pixel defining layer is disposed on the surface of the pixel anode away from the substrate, covering a portion of the pixel anode and exposing the display portion of the pixel anode to form a pixel defining area, so as to facilitate the subsequent formation of a light emitting area of a sub-pixel.
[0065] Step S65: a partition structure is provided on the surface of the pixel defining layer in the groove, so that the edge of the partition structure in the groove does not overlap with the side wall of the groove.
[0066] Specifically, a first partition structure is arranged in the groove, and a second partition structure is arranged in a region away from the groove, so that the first partition structure and the second partition structure are connected to form a partition structure arranged around each sub-pixel to separate the sub-pixel from its adjacent sub-pixel. Wherein, two side edges of the first partition structure are connected to the second partition structure at the groove slope position, and the other two side edges are located in the groove and are arranged away from the groove sidewall, so that the edge of the partition structure does not overlap with the groove sidewall.
[0067] The beneficial effects of the present application are: by widening the corresponding anode via hole to form a groove, the groove can accommodate the edges of the partition structure on both sides, avoiding the edges of the partition structure and the side walls of the groove from overlapping in the vertical direction, thereby improving the stability of the partition structure. At the same time, the partition structure is located in the groove (that is, the extension) of the pixel anode, avoiding occupying the area of the display part of the pixel anode. Compared with the scheme of shrinking the pixel anode and avoiding the overlap of the groove of the pixel anode and the partition structure, the present case increases the pixel aperture ratio.
[0068] The above are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A display panel, comprising a plurality of pixel units arranged in an array, each of the pixel units comprising a plurality of sub-pixels and a partition structure arranged between two adjacent sub-pixels, It is characterized in that The display panel comprises: A substrate, a surface of which is provided with metal traces; A flat layer covers the surface of the substrate and is provided with a groove so that part of the metal wiring is exposed; wherein the groove is an anode via; A pixel anode, comprising a display portion disposed on a surface of the flat layer away from the substrate, and an extension portion extending into the groove, wherein a portion of the extension portion is located in the groove and electrically connected to the metal wiring in the groove; A pixel defining layer is disposed between two adjacent pixel anodes and covers the surface of the extended portion of the pixel anode; wherein the pixel defining layer is made of an inorganic material; The partition structure is arranged on the surface of the pixel definition layer away from the substrate; the partition structure comprises a first partition layer and a second partition layer, the second partition layer is arranged on the surface of the first partition layer away from the pixel definition layer, and is longer than the length of the first partition layer in a direction parallel to the substrate; The partition structure includes a first partition structure located in the groove, and the side wall of the groove opened by the flat layer does not intersect with the edge of the first partition structure.
2. The display panel according to claim 1, It is characterized in that The distance between the edge of the first partition structure located in the groove and the side wall of the groove is not less than 0.2 um.
3. The display panel according to claim 2, It is characterized in that The partition structure further includes a second partition structure disposed in a flat area away from the groove, and the second partition structure is connected to the first partition structure.
4. The display panel according to claim 3, It is characterized in that The sub-pixel includes a pixel anode, and the pixel anode includes a display portion and an extension portion. The extension portion of the pixel anode extends into the groove and is electrically connected to a bare metal wiring in the groove.
5. The display panel according to claim 4, It is characterized in that The distance between the second partition structure located in the flat area and the display portion of the pixel anode located in the flat area is not less than 0.5 um.
6. The display panel according to claim 4, It is characterized in that The extending parts of the pixel anodes of the plurality of sub-pixels in the same pixel unit are located on the same straight line.
7. A method for manufacturing a display panel, It is characterized in that The display panel is the display panel according to any one of claims 1 to 6, and the manufacturing method comprises: Providing a substrate; wherein a metal trace is disposed on a surface of the substrate; A flat layer is provided on the surface of the substrate, and a groove is formed on the flat layer to expose the metal wiring; wherein the groove is an anode via; Arranging a pixel anode on the surface of the flat layer so that part of the pixel anode is located in the groove; A pixel defining layer is disposed between two adjacent pixel anodes and on the surface of the pixel anode located in the groove; A partition structure is arranged on the surface of the pixel defining layer in the groove, so that the edge of the partition structure in the groove does not overlap with the side wall of the groove.
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