An ultra-low frequency integrated receiving device

Abstract

The present invention discloses an ultra-low frequency integrated receiving device, which belongs to the field of wireless communication technology. The device of the present invention comprises a preamplifier module, a small signal amplification module, a large signal amplification module, an AD sampling module and a main control module which are electrically connected in sequence; the preamplifier module performs low-noise amplification and low-pass filtering on the input signal; the small signal amplification module performs ultra-low frequency bandpass filtering, a first program-controlled amplification and a power frequency trap on the input signal; the large signal amplification module performs a second program-controlled amplification, program-controlled attenuation, a second power frequency trap and an ultra-low frequency low-pass filtering on the input signal; then the signal is divided into two paths, one path is amplified and then sent to the AD sampling module, and the other path is sent to the main control module after effective value detection; the AD sampling module performs analog-to-digital conversion and down-conversion processing on the input signal; the main control module controls and manages the receiving device; the receiving device of the present invention can realize stable and reliable gain amplification of ultra-low frequency signals.

Description

Technical Field

[0001] The present invention belongs to the technical field of wireless communications, and more specifically, relates to an extremely low frequency integrated receiving device. Background Art

[0002] Low-frequency signals are transmitted globally in a waveguide manner between the earth and the ionosphere. According to ITU regulations, the frequency of extremely low frequency signals is 3Hz-30Hz, and the frequency of ultra-low frequency signals is 30Hz-300Hz. Extremely low frequency signals can penetrate deep seawater and strata, have low space propagation losses, and their attenuation in the atmosphere is less than 2dB / km.

[0003] The ELF ground exploration project has built a national large scientific facility - the world's first ELF test bench, which emits extremely low frequency electromagnetic waves (0.1Hz~300Hz) with a radiation range of thousands of kilometers and a high signal-to-noise ratio, covering my country's territory and major territorial waters, and improving the exploration depth, accuracy and effectiveness of electromagnetic exploration methods in exploring deep resources. Compared with existing electromagnetic detection methods, this method has significant advantages such as strong anti-interference ability, small measurement error, long detection distance, large detection depth, and suitability for large-area networking reception. ELF signals can penetrate hundreds of meters of deep sea water, and ELF is very suitable for long-distance continental shelf electromagnetic detection.

[0004] The ultra-low frequency signal attenuates over thousands of kilometers and in deep sea water. The signal received by the antenna is only nanovolts. The signal is very weak, only a few tenths of a nanovolt to a few nanovolts. In order to analyze the ultra-low frequency signal, it is necessary to directly amplify the nanovolt-level low-frequency weak signal to millivolts for AD sampling, and the signal needs to be stably and reliably amplified to 120dB-140dB.

[0005] At present, there are still key technical issues to be solved in the reception of ultra-low frequency signals, such as ultra-low noise amplification and power frequency interference suppression. At the same time, in order to solve the problem of 140dB high-gain stable amplification, it is necessary to solve signal leakage and prevent self-excitation caused by high gain, so as to achieve stable and reliable high-gain and low-noise amplification. Summary of the invention

[0006] In view of the above defects or improvement needs of the prior art, the present invention provides an extremely low frequency integrated receiving device, which aims to solve the technical problem that high gain in the existing extremely low frequency signal reception is difficult to achieve stably and reliably.

[0007] To achieve the above-mentioned object, in a first aspect, the present invention provides an ultra-low frequency integrated receiving device, the device comprising a preamplifier module, a small signal amplification module, a large signal amplification module, an AD sampling module and a main control module electrically connected in sequence, wherein:

[0008] A preamplifier module, used to obtain a first signal after performing gain amplification and low-pass filtering on the input signal;

[0009] A small signal amplification module, used to obtain a second signal after performing ultra-low frequency bandpass filtering, one-time program-controlled amplification and power frequency trapping on the input first signal;

[0010] The large signal amplification module is used to obtain a third signal after performing secondary program-controlled amplification, program-controlled attenuation, secondary power frequency trapping and ultra-low frequency low-pass filtering on the input second signal; the third signal is then divided into two paths, one path is amplified and then sent to the AD sampling module, and the other path is sent to the main control module after performing effective value detection;

[0011] The AD sampling module is used to perform analog-to-digital conversion and down-conversion processing on the input third signal to obtain a fourth signal;

[0012] The main control module is used to perform effective value sampling on the third signal received from the large signal amplification module, compare the sampling result with the preset threshold, send gain program-controlled signals to the preamplification module, the small signal amplification module and the large signal amplification module according to the comparison result, send filter program-controlled signals to the small signal amplification module and the large signal amplification module; and perform message processing, data analysis and storage on the fourth signal received from the AD sampling module.

[0013] Preferably, the preamplifier module includes a low noise amplifier for achieving signal gain amplification; the low noise amplifier is a cascade system, the front-stage circuit is composed of 2n junction field effect transistors in parallel, n is a natural number, the junction field effect transistor pairs are connected in a differential structure, and the back-stage circuit is an operational amplifier.

[0014] Preferably, a feedback capacitor is connected in parallel to the feedback resistor of the low noise amplifier to achieve low-pass filtering.

[0015] Preferably, the amplification gain of the low noise amplifier is 40dB, and the noise voltage is less than 1nV / Hz 1 / 2 , the cut-off frequency of the low-pass filter is 400Hz.

[0016] Preferably, the preamplifier module also includes an isolated power supply, a 0 / 20dB programmable amplifier and an output isolation transformer;

[0017] The 0 / 20dB programmable amplifier is used to achieve 0dB and 20dB programmable gain. The programmable signal enters the 0 / 20dB programmable amplifier after photoelectric isolation.

[0018] The output isolation transformer is used to electrically isolate the preamplifier module and the small signal amplifier module;

[0019] The low noise amplifier is powered by an isolated power supply;

[0020] The preamplifier module is arranged in a shielding box.

[0021] Preferably, the small signal amplification module includes a 3 / 30Hz high-pass filter, a 30 / 300Hz low-pass filter, a 0-40dB programmable amplifier and an industrial frequency notch filter group, wherein:

[0022] The combination of 3 / 30Hz high-pass filter and 30 / 300Hz low-pass filter realizes extremely low-frequency band-pass filtering;

[0023] 0-40dB programmable amplifier is used to achieve 0-40dB programmable gain;

[0024] The power frequency notch filter group adopts double T notch filter to filter out 50Hz and harmonic interference;

[0025] The gain program-controlled signal and the filter program-controlled signal enter the 3 / 30 Hz high-pass filter, the 30 / 300 Hz low-pass filter and the 0-40 dB program-controlled amplifier after being photoelectrically isolated.

[0026] Preferably, the large signal amplification module includes a second 0-40dB programmable amplifier, a 0-20dB programmable attenuator, a second power frequency trap group, a second 30 / 300Hz low-pass filter, a 10dB amplifier and an effective value detector, wherein:

[0027] The second 0-40dB programmable amplifier is used to achieve 0-40dB programmable gain;

[0028] 0-20dB programmable attenuator is used to achieve 0-20dB programmable attenuation;

[0029] The second power frequency notch filter group is used to realize secondary power frequency notch;

[0030] The second 30 / 300Hz low-pass filter is used to implement 30 / 300Hz program-controlled low-pass filtering;

[0031] A 10dB amplifier is used to achieve a 10dB gain;

[0032] The effective value detector is used to realize effective value detection;

[0033] Each program-controlled signal enters the second 0-40dB program-controlled amplifier, 0-20dB program-controlled attenuator and the second 30 / 300Hz low-pass filter after being optically isolated.

[0034] Preferably, the AD sampling module includes an ADC unit and an FPGA unit, wherein:

[0035] The ADC unit is used to realize analog-to-digital conversion of signals;

[0036] The FPGA unit is used to down-convert the signal.

[0037] Preferably, the main control module includes an ARM unit, a storage unit and an IO control unit, wherein:

[0038] The ARM unit is used to perform effective value sampling on the signal received from the large signal amplification module, compare the sampling result with the preset threshold, generate program-controlled signals for the preamplification module, the small signal amplification module and the large signal amplification module according to the comparison result, and send the program-controlled signals to the IO control unit; and perform message processing, data analysis and forwarding to the storage unit on the signal received from the AD sampling module;

[0039] An IO control unit, used for sending program-controlled signals to the preamplifier module, the small signal amplifier module and the large signal amplifier module respectively;

[0040] The storage unit is used to store the signal data received from the ARM unit.

[0041] Preferably, the device further comprises a power supply module, the power supply module comprises an isolation transformer, a first power supply, a second power supply, a third power supply and a fourth power supply, wherein:

[0042] The first power supply, the second power supply and the third power supply adopt a two-stage voltage stabilization method to respectively power the preamplifier module, the small signal amplifier module and the large signal amplifier module; the fourth power supply powers the AD sampling module and the main control module.

[0043] In general, the above technical solution conceived by the present invention has the following beneficial effects compared with the prior art:

[0044] (1) The present invention realizes a high-sensitivity, large-dynamic, ultra-low-frequency integrated receiving device, and low-noise amplification realizes a background noise as low as 1nV / Hz 1 / 2 The two-stage power frequency notch can suppress power frequency interference by 60dB. It has multi-stage filtering amplification and multiple isolation, which can reduce the coupling between amplifiers at each stage and reduce the interference of digital circuits on weak signals. It can achieve a stable amplification gain range of 40dB-140dB and a dynamic range of more than 100dB, realizing stable amplification of low-noise ultra-high gain low-frequency signals. The receiving device has an operating frequency of 3Hz-300Hz, covering the extremely low frequency range of 3Hz-30Hz and the ultra-low frequency range of 30Hz-300Hz. It can amplify 1nV signals to 0.01V at most, and can realize high-sensitivity, large-dynamic, and integrated reception of weak low-frequency signals hundreds of meters underwater.

[0045] (2) In a cascade amplifier system, the noise of each amplifier stage contributes differently to the total noise, and the first amplifier stage has the greatest impact. Moreover, if the gain of the first amplifier stage is large enough, the noise of the subsequent amplifier stage can be ignored. Therefore, the low-noise amplifier in the device of the present invention adopts a cascade design, and the front stage is composed of a plurality of low-noise junction field effect transistors JFET connected in parallel, which has the characteristics of large input impedance, small voltage noise, and extremely low current noise. Its gain is reasonably set to 40 dB, and the subsequent stage adopts a low-noise operational amplifier, thereby realizing an ultra-low noise system design. In addition, a feedback capacitor is connected in parallel to the feedback resistor of the low-noise amplifier, thereby integrating a low-pass filtering function on the basis of low-noise amplification.

[0046] (3) In the present invention, the preamplifier module is placed in a shielding box and is electrically isolated from the subsequent small signal processing module through an output isolation transformer, and is powered by an isolated power supply, and the input control signal is photoelectrically isolated. The above multiple isolation measures are used to completely isolate the preamplifier module to prevent interference caused by loop crosstalk and self-excitation caused by signal leakage;

[0047] (4) The power module of the present invention adopts a two-stage voltage stabilization method to provide low-noise power supply for noise-sensitive components such as the preamplifier module. The power supply of the digital parts such as the AD sampling module and the main control module is separated from the power supply of the analog part, and the mutual isolation reduces the interference to the analog part. In order to avoid signal crosstalk between the preamplifier module, the small signal amplifier module and the large signal module, the three modules are powered separately. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 It is a block diagram of the composition of the ultra-low frequency integrated receiving device in an embodiment of the present invention;

[0049] Figure 2 It is a block diagram of the preamplifier module in an embodiment of the present invention;

[0050] Figure 3 is a schematic diagram of a low noise amplification principle in an embodiment of the present invention;

[0051] Figure 4 It is a block diagram of the small signal processing module in an embodiment of the present invention;

[0052] Figure 5 is a schematic diagram of a double-T trap in an embodiment of the present invention;

[0053] Figure 6 It is a block diagram of the large signal processing module in an embodiment of the present invention;

[0054] Figure 7 is a schematic diagram of a 0-20dB attenuator in an embodiment of the present invention;

[0055] Figure 8 It is a block diagram of the AD sampling module in an embodiment of the present invention;

[0056] Fig. 9 It is a block diagram of the main control module in an embodiment of the present invention;

[0057] Fig.10 It is a block diagram of the power module in an embodiment of the present invention. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0059] The terms "first" and "second" in the specification and claims herein are used to distinguish different objects rather than to describe a specific order of the objects. For example, a first power frequency trap and a second power frequency trap are used to distinguish different power frequency traps rather than to describe a specific order of the power frequency traps.

[0060] In the embodiments of the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0061] In the description of the embodiments of the present invention, unless otherwise specified, "multiple" means two or more than two. For example, multiple power frequency traps refer to two or more power frequency traps, etc.; multiple photoelectric isolators refer to two or more photoelectric isolators, etc.

[0062] First, the professional terms appearing in the embodiments are explained:

[0063] Very low frequency signal, signal with a frequency range of 3Hz-30Hz;

[0064] Ultra-low frequency signal, signal with a frequency range of 30Hz-300Hz;

[0065] Ultra-low frequency signal, the frequency range is 3Hz-300Hz;

[0066] Next, the technical solution provided in the embodiments of the present invention is introduced.

[0067] The present invention provides a high-sensitivity, large-dynamic and ultra-low-frequency integrated receiving device, the receiving device has an operating frequency of 3Hz-300Hz, covers the ultra-low frequency range of 3Hz-30Hz and the ultra-low frequency range of 30Hz-300Hz, and the background noise is as low as 1nV / Hz1 / 2 The overall gain is 40dB-140dB, and the power frequency interference suppression is 60dB.

[0068] like Figure 1 As shown, the device includes a preamplifier module, a small signal processing module, a large signal processing module, an AD sampling module, a main control module, and a power supply module, wherein:

[0069] 1. Preamplifier module:

[0070] The preamplifier module is placed in a shielded box. It consists of a low-noise amplifier, a low-pass filter, a 0 / 20dB adjustable amplifier, an output isolation transformer, a DC / DC power supply, and photoelectric isolation. The block diagram is shown in the figure. Figure 2 As shown:

[0071] The low noise amplifier has a gain of 40dB and a noise voltage of less than 1nV / Hz. 1 / 2 ;

[0072] The low-pass filter cutoff frequency is 400Hz, which is mainly used to filter out high-frequency interference. The low-pass filter is integrated with the low-noise amplifier, and the feedback capacitor C is connected in parallel with the feedback resistor.

[0073] 0 / 20dB adjustable amplification gain is adjustable at 0dB and 20dB, and the gain range of the preamplification module is adjustable at 40dB or 50dB;

[0074] The output isolation transformer electrically isolates the preamplifier output from the small signal processing module;

[0075] The DC / DC power supply supplies power to the preamplifier module through isolation;

[0076] The gain control IO signal is isolated by a photoelectric isolation device. In this way, the preamplifier module is completely isolated through the output transformer, DC / DC isolation circuit, and photoelectric isolation to prevent interference caused by loop crosstalk and self-excitation caused by signal leakage.

[0077] The key to the design of the preamplifier module is to reduce the noise voltage. The design mainly considers the noise sources of various devices and the 1 / f noise of the devices. The preamplifier module must be strictly shielded.

[0078] The schematic diagram of low noise amplifier is as follows Figure 3 As shown in the figure, it is mainly composed of multiple low-noise junction field effect transistors (JFETs) connected in parallel and a low-noise operational amplifier A. The first stage of amplification uses 2*n junction field effect transistors (JFETs) connected in parallel, and the second stage uses a low-noise operational amplifier. The first stage of parallel connection reduces the noise of the amplifier itself, and the parallel amplifier is only 1 / n of the noise of a single amplifier. 1 / 2When 2*4 amplifiers are connected in parallel, the noise is reduced to 1 / 2 of the original (reduced by 6dB). The noise voltage of a single IF860 junction field effect tube is less than 2nV / Hz 1 / 2 , 4 in parallel to achieve low noise amplifier noise less than 1nV / Hz 1 / 2 .

[0079] The first-stage JFET has large input impedance, low voltage noise, and extremely low current noise (usually fA / Hz 1 / 2 The characteristics of the first stage circuit can make the first stage circuit have better noise performance. The JFET pair is connected in a differential structure, which can suppress zero drift and common mode interference. At the same time, it forms an inter-electrode series voltage negative feedback with the integrated operational amplifier, which can improve the closed-loop gain stability and suppress the noise in the feedback loop. The JFET-based front stage circuit can be equivalent to a common-phase proportional amplifier as a whole. The gain is determined by the resistance values ​​of R4 and R5, and the static operating point of JFET is adjusted by R3. The post-amplification circuit uses an integrated operational amplifier, which is an instrument amplifier with low DC offset, low drift, and low noise, and has excellent low-frequency performance.

[0080] For an M-level cascade system, if the noise coefficient of each level is F1, F2, ..., FM, and the circuit gain is K1, K2, ..., KM, the total noise coefficient of the system can be calculated according to the formula:

[0081]

[0082] From the above formula, we can know that in a cascade amplifier system, the noise of each amplifier contributes differently to the total noise, and the first amplifier has the greatest impact. If the gain of the first stage is large enough, the noise of the subsequent amplifier can be ignored. Therefore, we can select a suitable preamplifier and reasonably set its gain to 40dB to achieve ultra-low noise system design.

[0083] The low-pass filter and low-noise amplifier are integrated into the design. The feedback capacitor C is connected in parallel to the feedback resistor R4, and the designed cut-off frequency is 400Hz.

[0084] 2. Small signal amplifier module

[0085] The small signal processing module is mainly composed of 3 / 30Hz high-pass filter, 30 / 300Hz low-pass filter, 0-40dB program-controlled amplifier, power frequency notch filter group, photoelectric isolation, etc. The block diagram is as follows: Figure 4 shown.

[0086] A 3 / 30Hz high-pass filter and a 30 / 300Hz low-pass filter are combined into a band-pass filter, and the band-pass filter parameters can be one of three types: 3Hz-30Hz, 30Hz-300Hz, and 3Hz-300Hz.

[0087] 0-40dB programmable amplification, you can choose 0dB, 20dB or 40dB gain,

[0088] The power frequency trap group includes five frequency traps: 50Hz, 150Hz, 200Hz, 250Hz and 300Hz. It is mainly used to filter out 50Hz and harmonic interference. The photoelectric isolation is mainly used to prevent the digital circuit IO control signal from interfering with the analog circuit.

[0089] The 3 / 30Hz high-pass filter and 30 / 300Hz low-pass filter are required to have low noise. An analog active filter is designed to filter out high-frequency and low-frequency noise in the signal to prevent the output saturation of the post-amplifier. The 3 / 30Hz high-pass filter is designed as a 2nd-order Chebyshev high-pass filter, and the 30 / 300Hz low-pass filter is designed as a 4th-order Chebyshev low-pass filter. The Chebyshev filter mainly considers how to achieve the steepest attenuation characteristics when there is a certain ripple in the amplitude-frequency characteristic within the passband. The relationship between the order n of the Chebyshev low-pass filter, the passband fluctuation and the passband fluctuation can be referred to in relevant literature. When n is constant, if the passband fluctuation is required to be small, the bandwidth becomes narrower. If small fluctuation and a wider passband are required, n must be large enough.

[0090] The 0-40dB programmable amplification adopts TI's INA102 precision instrument amplifier, which has 0dB, 20dB, 40dB and 60dB amplification capabilities, a temperature coefficient of 5ppm / ℃, and an amplifier linearity better than 0.01%. The INA102 amplifier can achieve 0dB, 20dB, and 40dB amplification gains by controlling the output to the corresponding gain control pins of the INA102 precision instrument amplifier through the main control module IO.

[0091] The power frequency notch filter group adopts double T notch filter, which includes 50Hz, 100Hz, 150Hz, 200Hz, 250Hz and 300Hz notch filter groups. The schematic diagram of single double T notch is shown in Figure 5 , mainly including operational amplifier, input RC double-T network and feedback RC single-T network, which can suppress the power frequency 50Hz and harmonic interference by 30dB.

[0092] The twin-T trap is composed of an amplifier with a gain of 1, a twin-T RC network, and a single-T RC network that determines the Q value of the circuit. The stability of the trap frequency and the Q value depends on the passive components in the T network.

[0093] The notch frequency ω0 and Q value are:

[0094] ω0=1 / (RC)

[0095] Q=R1 / 4CR

[0096] The notch frequency is determined by the double-T network, and the Q value is determined by the single-T network and R. The stability of the notch frequency ω0 and the Q value depends on the passive components in the T network. In order to obtain a highly stable notch filter, a high-performance operational amplifier must be used, and high-precision passive components must also be used.

[0097] The resistors and capacitors that make up the double-T trap must have high precision and high stability. Usually, the resistors have an accuracy of ±0.1%, and the capacitors are difficult to guarantee accuracy, but the temperature coefficient needs to be better than 20ppm / ℃. It is best that the resistors and capacitors have opposite temperature coefficients to compensate each other. Since there is a large error between the theoretical calculation and the actual required resistance and capacitance values, multiple resistors and capacitors can be paired in series and parallel to achieve the required resistance and capacitance values.

[0098] 3. Large signal amplifier module

[0099] The large signal processing module is mainly composed of 0-40dB program-controlled amplification, 0-20dB attenuation, power frequency notch filter group, 30 / 300Hz low-pass filter, 10dB amplifier, effective value detection, photoelectric isolation and other circuits. The block diagram is as follows: Figure 6 shown.

[0100] 0-40dB programmable amplification can amplify the signal by 0dB, 20dB, 40dB, with a step value of 20dB;

[0101] 0-20dB attenuation principle diagram as follows Figure 7 As shown, the data of the control input four-quadrant DAC is used to achieve attenuation, and the signal is attenuated from 0dB to 20dB with a 2dB step value;

[0102] 30 / 300Hz low-pass filter The low-pass cutoff frequency can be selected as 30Hz or 300Hz;

[0103] The effective value detection detects the AC signal into a DC signal and provides it to the CPU main control module for AD sampling for adjusting the system gain;

[0104] Optoelectronic isolation is mainly used to prevent digital circuit IO control signals from interfering with analog circuits.

[0105] The 0-40dB programmable amplifier uses TI's INA102 precision instrument amplifier, which has the same design as the 0-40dB programmable amplifier of the small signal amplifier module.

[0106] 0-20dB attenuation uses a 10-bit four-quadrant DAC. The input signal is connected to the reference input terminal REF of the four-quadrant DAC. The main control module controls the data input to the four-quadrant DAC. The output signal is:

[0107] Vout = (input data / 1023) Vin

[0108] The required attenuation is Vin / Vout:

[0109] Vin / Vout=1023 / input data

[0110] When attenuating by 20dB, the input gain data to the four-quadrant DAC is 102.

[0111] The design of the power frequency notch filter group is the same as that of the small signal amplifier module.

[0112] The 30 / 300Hz low-pass filter is the same as the 30 / 300Hz low-pass filter of the small signal amplifier module.

[0113] 4. Sampling module

[0114] The AD sampling module is mainly composed of high-precision ADC, FPGA and high-precision clock, etc. The block diagram is as follows Figure 8 As shown. The high-precision ADC has a resolution of 24 bits and a sampling rate of 1024 bits / s, which can cover 3Hz-300Hz signals. The clock circuit provides a high-stability sampling clock for high-precision DC. The FPGA mainly performs digital down-conversion processing and sends the collected data to the main control module through the data bus.

[0115] High-precision AD uses TI's 24-bit ADC with 20-bit sampling accuracy;

[0116] The high-precision clock uses a high-precision 16.384MHz crystal oscillator with a stability of 2*10 -10 / day, with an accuracy of 2*10 -8 / Year.

[0117] 5. Main control module

[0118] The main control module is mainly composed of ARM9 chip, SDRAM, IO control, network interface, clock, power supply, display, keyboard and other interfaces. The block diagram is as follows: Fig. 9 As shown. ARM9 mainly controls and manages the receiving device and stores the collected data. The main control module mainly controls the working frequency range of the receiving device through IO control of low-pass filter and high-pass filter, detects the amplitude of the received signal through the internal ADC of ARM9, controls the gain of the preamplifier module, small signal amplifier module, and large signal amplifier module through IO control, and controls the received signal within a suitable range. The main control module can exchange information with the outside through the network interface.

[0119] 6. Power module

[0120] This device has a high-sensitivity preamplifier module, a digital mixing circuit and a high-speed digital circuit, and each part has different power supply requirements. The high-sensitivity preamplifier analog circuit requires a stable power supply voltage and low power supply noise. In order to prevent interference signals from entering the circuit through the power line and ground line, the preamplifier module and the subsequent circuit are also required to have a high degree of isolation; the analog circuit power supply requires an independent power supply and good isolation from the digital power supply; the digital power supply voltage requires a large capacity and is isolated from other power supplies.

[0121] The power module is mainly composed of an isolation transformer, 3 groups of ±12VDC modules, and +12VDC+5VDC modules. The block diagram is as follows: Fig.10 As shown, the power module is powered by 220VAC power supply. Two-stage voltage stabilization is used to provide low-noise power supply for noise-sensitive components such as the preamplifier module. The power supply of digital parts such as the AD sampling module and the main control module is separated from the power supply of the analog part, and they are isolated from each other to reduce interference to the analog part. In order to avoid signal crosstalk between the preamplifier module, the small signal amplifier module and the large signal module, each of these three modules is provided with a ±12VDC power supply separately.

[0122] After the power supply module outputs power to each amplifier module, each amplifier module is designed with a linear voltage regulator module, which performs secondary voltage regulation and ripple suppression before being supplied to each circuit, further reducing power supply noise.

[0123] It should be understood that the various numerical numbers involved in the embodiments of the present invention are only used for the convenience of description and are not used to limit the scope of the embodiments of the present invention.

[0124] Those skilled in the art will readily understand that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. An ultra-low frequency integrated receiving device, characterized in that: The device comprises a preamplifier module, a small signal amplifier module, a large signal amplifier module, an AD sampling module and a main control module which are electrically connected in sequence, wherein: A preamplifier module, used to obtain a first signal after performing gain amplification and low-pass filtering on the input signal; A small signal amplification module, used to obtain a second signal after performing ultra-low frequency bandpass filtering, one-time program-controlled amplification and power frequency trapping on the input first signal; The large signal amplification module is used to obtain a third signal after performing secondary program-controlled amplification, program-controlled attenuation, secondary power frequency trapping and ultra-low frequency low-pass filtering on the input second signal; the third signal is then divided into two paths, one path is amplified and then sent to the AD sampling module, and the other path is sent to the main control module after performing effective value detection; The AD sampling module is used to perform analog-to-digital conversion and down-conversion processing on the input third signal to obtain a fourth signal; The main control module is used to perform effective value sampling on the third signal received from the large signal amplification module, compare the sampling result with the preset threshold, send gain program-controlled signals to the preamplification module, the small signal amplification module and the large signal amplification module according to the comparison result, send filter program-controlled signals to the small signal amplification module and the large signal amplification module; and perform message processing, data analysis and storage on the fourth signal received from the AD sampling module.

2. The device according to claim 1, characterized in that The preamplifier module includes a low noise amplifier for achieving signal gain amplification; the low noise amplifier is a cascade system, the front-stage circuit is composed of 2n junction field effect transistors in parallel, n is a natural number, the junction field effect transistors are connected in a differential structure, and the back-stage circuit is an operational amplifier.

3. The device according to claim 2, characterized in that A feedback capacitor is connected in parallel to the feedback resistor of the low noise amplifier to achieve low-pass filtering.

4. The device according to claim 3, characterized in that The low noise amplifier has an amplification gain of 40dB and a noise voltage of less than 1nV / Hz. 1 / 2 , the cut-off frequency of the low-pass filter is 400Hz.

5. The device according to claim 2, characterized in that The preamplifier module also includes an isolated power supply, a 0 / 20dB programmable amplifier and an output isolation transformer; The 0 / 20dB programmable amplifier is used to achieve 0dB and 20dB programmable gain. The programmable signal enters the 0 / 20dB programmable amplifier after photoelectric isolation. The output isolation transformer is used to electrically isolate the preamplifier module and the small signal amplifier module; The low noise amplifier is powered by an isolated power supply; The preamplifier module is arranged in a shielding box.

6. The device according to claim 1, characterized in that The small signal amplification module includes a 3 / 30Hz high-pass filter, a 30 / 300Hz low-pass filter, a 0-40dB programmable amplifier and an industrial frequency notch filter group, wherein: The combination of 3 / 30Hz high-pass filter and 30 / 300Hz low-pass filter realizes extremely low-frequency band-pass filtering; 0-40dB programmable amplifier is used to achieve 0-40dB programmable gain; The power frequency notch filter group adopts double T notch filter to filter out 50Hz and harmonic interference; The gain program-controlled signal and the filter program-controlled signal enter the 3 / 30 Hz high-pass filter, the 30 / 300 Hz low-pass filter and the 0-40 dB program-controlled amplifier after being photoelectrically isolated.

7. The device according to claim 1, characterized in that The large signal amplification module includes a second 0-40dB programmable amplifier, a 0-20dB programmable attenuator, a second power frequency trap group, a second 30 / 300Hz low-pass filter, a 10dB amplifier and an effective value detector, wherein: The second 0-40dB programmable amplifier is used to achieve 0-40dB programmable gain; 0-20dB programmable attenuator is used to achieve 0-20dB programmable attenuation; The second power frequency notch filter group is used to realize secondary power frequency notch; The second 30 / 300Hz low-pass filter is used to implement 30 / 300Hz program-controlled low-pass filtering; A 10dB amplifier is used to achieve a 10dB gain; The effective value detector is used to realize effective value detection; Each program-controlled signal enters the second 0-40dB program-controlled amplifier, 0-20dB program-controlled attenuator and the second 30 / 300Hz low-pass filter after being optically isolated.

8. The device according to claim 1, characterized in that The AD sampling module includes an ADC unit and an FPGA unit, wherein: The ADC unit is used to realize analog-to-digital conversion of signals; The FPGA unit is used to down-convert the signal.

9. The device according to claim 1, characterized in that The main control module includes an ARM unit, a storage unit and an IO control unit, wherein: The ARM unit is used to perform effective value sampling on the signal received from the large signal amplification module, compare the sampling result with the preset threshold, generate program-controlled signals for the preamplification module, the small signal amplification module and the large signal amplification module according to the comparison result, and send the program-controlled signals to the IO control unit; and perform message processing, data analysis and forwarding to the storage unit on the signal received from the AD sampling module; An IO control unit, used for sending program-controlled signals to the preamplifier module, the small signal amplifier module and the large signal amplifier module respectively; The storage unit is used to store the signal data received from the ARM unit.

10. The device according to claim 1, characterized in that The device further includes a power supply module, the power supply module including an isolation transformer, a first power supply, a second power supply, a third power supply and a fourth power supply, wherein: The first power supply, the second power supply and the third power supply adopt a two-stage voltage stabilization method to respectively power the preamplifier module, the small signal amplifier module and the large signal amplifier module; the fourth power supply powers the AD sampling module and the main control module.

Images