Data synchronization method, device, storage medium and electronic device

Abstract

The present disclosure relates to a data synchronization method, device, storage medium and electronic device, and relates to the field of electronic information technology. The method includes: when a write operation to a first memory space of a first terminal is detected, memory update information corresponding to the write operation is obtained, and the memory update information is used to indicate the memory address range corresponding to the write operation. Determine a candidate memory space from the first memory space according to the memory update information. Determine the target memory data corresponding to the write operation according to the synchronized memory data of the second memory space and the candidate memory data in the candidate memory space. The synchronized memory data is the same as the memory data stored in the designated memory space in the second terminal. Synchronize the target memory data to the designated memory space of the second terminal. The present disclosure does not need to synchronize all memory data of the entire first memory space to the second terminal, which reduces network resource usage and improves rendering performance.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic information technology, and in particular, to a data synchronization method, device, storage medium and electronic device. Background Art

[0002] With the rapid development of the new generation of computer computing and network technology, GPU (Graphics Processing Unit) is widely used in image rendering scenarios due to its efficient computing power. At the same time, the new generation of network technology with low latency and high bandwidth provides a technical basis for remote image rendering. In the remote image rendering scenario, the image rendering instructions of the client application are forwarded to the remote node with GPU resources for execution. After the remote node completes the image rendering operation, the rendered image is sent back to the client application and displayed on the client's screen terminal. Summary of the invention

[0003] In order to overcome the problems existing in the related art, the present disclosure provides a data synchronization method, device, storage medium and electronic device.

[0004] According to a first aspect of an embodiment of the present disclosure, a data synchronization method is provided, the method comprising:

[0005] When a write operation to a first memory space of a first terminal is detected, memory update information corresponding to the write operation is obtained through the write protection permission of the first memory space, where the memory update information is used to indicate a memory address range corresponding to the write operation;

[0006] determining a candidate memory space from the first memory space according to the memory update information;

[0007] Determining target memory data corresponding to the write operation according to the synchronous memory data of the second memory space and the candidate memory data in the candidate memory space; the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal;

[0008] The target memory data is synchronized to the designated memory space of the second terminal.

[0009] Optionally, the memory update information includes a target page number corresponding to the write operation; and determining a candidate memory space from the first memory space according to the memory update information includes:

[0010] The memory space corresponding to the target page number in the first memory space is used as the candidate memory space.

[0011] Optionally, determining the target memory data corresponding to the write operation according to the synchronous memory data in the second memory space and the candidate memory data in the candidate memory space includes:

[0012] The synchronous memory data is compared with the candidate memory data, and memory data in the candidate memory data that is different from the synchronous memory data is used as the target memory data.

[0013] Optionally, the method further comprises:

[0014] The target memory data is synchronized to the second memory space.

[0015] Optionally, the obtaining memory update information corresponding to the write operation includes:

[0016] Acquire first exception information and second exception information corresponding to the write operation, wherein the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate that the write operation is finished;

[0017] The memory update information is determined according to the first exception information and the second exception information.

[0018] Optionally, the obtaining first exception information and second exception information corresponding to the write operation includes:

[0019] Setting write protection permission for the first memory space;

[0020] When the write operation to the first memory space is detected, first exception information corresponding to the write operation is obtained, and the write protection permission is cancelled;

[0021] Execute the write operation so that the target memory data is written into the first memory space;

[0022] The second exception information is received, and the write protection permission is set.

[0023] According to a second aspect of an embodiment of the present disclosure, a data synchronization device is provided, the device comprising:

[0024] an acquisition module, configured to, when a write operation to a first memory space of a first terminal is detected, acquire memory update information corresponding to the write operation through a write protection permission of the first memory space, wherein the memory update information is used to indicate a memory address range corresponding to the write operation;

[0025] a first determining module, configured to determine a candidate memory space from the first memory space according to the memory update information;

[0026] A second determination module is configured to determine the target memory data corresponding to the write operation according to the synchronous memory data of the second memory space and the candidate memory data in the candidate memory space; the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal;

[0027] A synchronization module is configured to synchronize the target memory data to the designated memory space of the second terminal.

[0028] Optionally, the memory update information includes a target page number corresponding to the write operation; and the first determining module is configured to:

[0029] The memory space corresponding to the target page number in the first memory space is used as the candidate memory space.

[0030] Optionally, the second determining module is configured to:

[0031] The synchronous memory data is compared with the candidate memory data, and memory data in the candidate memory data that is different from the synchronous memory data is used as the target memory data.

[0032] Optionally, the synchronization module is further configured to:

[0033] The target memory data is synchronized to the second memory space.

[0034] Optionally, the acquisition module includes:

[0035] An acquisition submodule is configured to acquire first exception information and second exception information corresponding to the write operation, wherein the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate that the write operation is finished;

[0036] A determination submodule is configured to determine the memory update information according to the first abnormal information.

[0037] Optionally, the acquisition submodule is configured as follows:

[0038] Setting write protection permission for the first memory space;

[0039] When the write operation to the first memory space is detected, first exception information corresponding to the write operation is obtained, and the write protection permission is cancelled;

[0040] Execute the write operation so that the target memory data is written into the first memory space;

[0041] The second exception information is received, and the write protection permission is set.

[0042] According to a third aspect of an embodiment of the present disclosure, a non-temporary computer-readable storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the steps of the method described in the first aspect of the embodiment of the present disclosure are implemented.

[0043] According to a fourth aspect of an embodiment of the present disclosure, there is provided an electronic device, including:

[0044] a memory having a computer program stored thereon;

[0045] A processor is used to execute the computer program in the memory to implement the steps of the method described in the first aspect of the embodiment of the present disclosure.

[0046] Through the above technical solution, when a write operation to the first memory space of the first terminal is detected, the present disclosure obtains the memory update information corresponding to the write operation, and then obtains the target memory data corresponding to the write operation according to the memory update information and the synchronized memory data of the second memory space of the first terminal, and finally synchronizes the target memory data to the designated memory space of the second terminal. Among them, the memory update information is used to indicate the memory address range corresponding to the write operation. The synchronized memory data is the same as the memory data stored in the designated memory space in the second terminal. The present disclosure filters out the target memory data corresponding to the write operation from the first memory space, and synchronizes the target memory data corresponding to the write operation to the second terminal, without synchronizing all the memory data of the entire first memory space to the second terminal, thereby reducing the network resource occupation and improving the resource utilization efficiency.

[0047] Other features and advantages of the present disclosure will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0049] Figure 1 It is a schematic diagram of data interaction in a remote image rendering scenario;

[0050] Figure 2 It is a schematic diagram of a spatial mapping;

[0051] Figure 3 It is a schematic diagram of data interaction and synchronization methods;

[0052] Figure 4 It is a schematic diagram of another data interaction and synchronization method;

[0053] Figure 5 is a flow chart of a data synchronization method according to an exemplary embodiment;

[0054] Figure 6 is a flow chart of another data synchronization method according to an exemplary embodiment;

[0055] Figure 7 is a flow chart of another data synchronization method according to an exemplary embodiment;

[0056] Figure 8 is a block diagram of a data synchronization architecture according to an exemplary embodiment;

[0057] Fig. 9 is a block diagram of a data synchronization device according to an exemplary embodiment;

[0058] Fig.10 is a block diagram of another data synchronization device according to an exemplary embodiment;

[0059] Fig.11 It is a block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0060] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0061] It should be noted that all actions of acquiring signals, information or data in the present disclosure are carried out in compliance with the relevant data protection laws and policies of the country where the device is located and with the authorization given by the owner of the corresponding device.

[0062] Before introducing a data synchronization method, device, storage medium, and electronic device shown in an embodiment of the present disclosure, an application scenario involved in the embodiment of the present disclosure is first introduced.

[0063] The application scenario of the embodiment of the present disclosure may be a remote image rendering scenario, such as Figure 1 As shown, in the remote image rendering scenario, the image rendering instructions of the client application are forwarded to the remote node with GPU resources for execution. After the remote node completes the image rendering operation, the rendered target image is returned to the client application and displayed on the client's screen terminal.

[0064] In remote image rendering scenarios, client applications need to frequently access data with the GPU to update vertices, indices, textures, surfaces and other rendering object data in order to render new target images. However, since the GPU is set in a remote node (such as a virtual machine or host), the client application and the GPU are not in the same terminal, so the application cannot directly access the GPU's address space and cannot directly interact with the rendering object data.

[0065] In related technologies, in order to realize data interaction between client applications and GPUs, a dual-end memory synchronization method is usually adopted. Figure 2 As shown, first on the GPU side, after executing the GPU address space mapping operation, a memory space will be mapped in the memory of the remote node for data access; the client will also map a memory space of the same size for the application to access; the application can directly access the client's memory space to update / read the rendering object data. When the data operation is completed, the end mapping operation instruction will be executed. At this time, the client's memory data will be synchronized to the memory space of the remote node, and then the remote node will synchronize this memory data to the GPU, thereby updating the data in the GPU so that the GPU uses the latest rendering object data. Taking data writing to the GPU as an example, the client's application writes the data to the memory space of the client node, and then synchronizes the memory data of this memory space to the memory space of the remote node, and then writes the memory data of the remote node to the GPU, so that the GPU obtains new vertices, indexes, textures, image surfaces and other data to render the target image.

[0066] In the related art, the interactive process of remote image rendering is shown in steps 1-9.

[0067] 1. The application in the client node initiates a data interaction operation instruction to access the rendering object data in the GPU. Commonly used data interaction operation instructions include: DX9 Lock API, DX10-12 Map API;

[0068] 2. Forwarding the data interaction operation instructions in the client node to the remote node, where the data interaction operation instructions may include the read and write permissions of memory data and the rendering object type;

[0069] 3. After receiving the data interaction operation instruction, the remote node will map a memory space for data interaction with the GPU when executing the data interaction operation locally.

[0070] 4. The remote node returns the memory space information (including memory data and memory size) to the client node;

[0071] 5. The client node maps a memory space of the same size in the local memory according to the memory space information and updates the memory data;

[0072] 6. The application accesses this memory space in the client node to read or update data;

[0073] 7. After the application completes the data access operation, the client node initiates a data interaction end instruction;

[0074] 8. Forward the data interaction end instruction in the client node to the remote node, and at the same time forward the memory data in the client node;

[0075] 9. The remote node synchronizes the memory data in the client node to the local memory, and performs the data interaction end operation locally (this operation will automatically synchronize the memory data to the GPU), and returns the operation results to the client node.

[0076] In a remote image rendering scenario, the existing data interaction process usually uses the dual-end memory mapping described in steps 1-9 to achieve data synchronization between the application and the GPU. Figure 3 It is a schematic diagram of data interaction and synchronization methods in related technologies, such as Figure 3 As shown in the figure, the shaded part is the updated memory data. This data interaction method has the following disadvantages:

[0077] 1. It is impossible to determine the update location of the client node's memory data, so all data can only be synchronized to the remote node, resulting in a long instruction execution time, thereby reducing remote image rendering performance and affecting user experience. For certain synchronization modes (for example, in Direct3D11, the Map operation marked as D3D11_MAP_WRITE_NO_OVERWRITE), the full data synchronization update will seriously prolong the GPU side data synchronization time and reduce rendering performance.

[0078] 2. Frequent and large amounts of rendering object data transmitted across the network will occupy a large amount of network bandwidth and reduce the efficiency of network resource utilization.

[0079] Figure 4 is a schematic diagram of a data interaction and synchronization method shown in an embodiment of the present disclosure, such as Figure 4 As shown, by adding write protection to the first memory space of the client node, the abnormal operation is captured to locate the memory address range of the memory data update; at the same time, a double cache (including the first memory space and the second memory space) comparison method is introduced to screen the updated memory data, so as to efficiently and accurately screen out the updated target memory data in the first memory space ( Figure 4The total amount of data transmitted across the network in the remote image rendering process is reduced, thereby reducing network resource usage and improving resource utilization efficiency.

[0080] Figure 5 is a flow chart of a data synchronization method according to an exemplary embodiment. Figure 5 As shown, the method includes:

[0081] Step S101, when a write operation to a first memory space of a first terminal is detected, memory update information corresponding to the write operation is obtained through the write protection permission of the first memory space, wherein the memory update information is used to indicate a memory address range corresponding to the write operation.

[0082] For example, the execution subject of the embodiment of the present disclosure may be a first terminal, the first terminal may be a client node, and the second terminal may be a remote node with GPU resources.

[0083] The first terminal can obtain the corresponding memory update information by setting write protection permissions for the first memory space. In some embodiments, the write protection permissions can be set for the first memory space first. Since the write protection permissions are set, when a write operation for the first memory space is detected, the first terminal can capture the memory address range corresponding to the write operation, thereby obtaining the memory update information corresponding to the write operation. For example, each page in the first memory space can add write protection permissions to detect write operations for each page. Among them, the memory address range may include the page number of the page corresponding to the write operation, and the starting address of the write operation in each page. The memory address range may also include the page number of the page where the write operation starts writing data, and the page number of the page where the write operation stops writing data. In this way, by setting write protection permissions for the first memory space, the memory address range corresponding to the write operation can be preliminarily located, that is, the memory address range where data update occurs.

[0084] Step S102: determining a candidate memory space from the first memory space according to the memory update information.

[0085] Step S103, determining target memory data corresponding to the write operation according to the synchronous memory data in the second memory space and the candidate memory data in the candidate memory space, wherein the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal.

[0086] For example, after receiving the data interaction operation instruction sent by the first terminal, the second terminal can map a section of memory space in the second terminal as the designated memory space for data interaction with the GPU. Then the second terminal can send the memory space information (including memory data and memory size) of the designated memory space to the first terminal, and the first terminal can map two sections of memory space with equal memory size and the same memory data in the memory space according to the memory space information, as the first memory space and the second memory space. Among them, the memory data in the first memory space and the synchronized memory data in the second memory space, as well as the memory data in the designated memory space in the second terminal are updated synchronously.

[0087] After the write operation is performed, the memory data in the first memory space is updated, but the synchronous memory data in the second memory space is still the data after the last synchronous update. In other words, the synchronous memory data in the second memory space is still the same as the memory data in the designated memory space in the second terminal, and is the same as the memory data in the first memory space before the write operation is performed.

[0088] In order to more accurately filter out the updated target memory data from the memory data in the memory address range, the synchronous memory data can be compared with the candidate memory data indicated by the memory update information in sequence according to the byte address, and the data update of each byte can be accurately located. Among them, the candidate memory data can be understood as the memory data within the memory address range indicated by the memory update information. For example, if the memory address range is page 2 and page 5, then the candidate memory data can be the memory data stored in page 2 and page 5. And the memory data corresponding to the bytes in the candidate memory data that are different from the synchronous memory data can be used as the target memory data, so as to quickly and accurately obtain each updated memory data.

[0089] In some embodiments, the memory update information may include a target page number corresponding to the write operation, and the memory space corresponding to the target page number may be determined in the first memory space, and the memory space corresponding to the target page number may be used as a candidate memory space. For example, if the target page number is 5, then the memory space corresponding to the page with page number 5 may be used as a candidate memory space. If the target page numbers are 5 and 6, then the memory space corresponding to the two pages with page numbers 5 and 6 may be used as a candidate memory space. If the target page numbers are 2 and 7-8, then the memory space corresponding to the three pages with page numbers 2, 7, and 8 may be used as candidate memory spaces.

[0090] Before executing the write operation, the memory data in the first memory space is the same as the synchronous memory data in the second memory space and the memory data in the designated memory space in the second terminal. After executing the write operation, the memory data in the first memory space is updated, but the synchronous memory data in the second memory space is still the same as the memory data in the first memory space before executing the write operation, so the synchronous memory data can be compared with the candidate memory data, and the memory data in the candidate memory data that is different from the synchronous memory data is used as the target memory data.

[0091] In other embodiments, each byte in the candidate memory space may be compared with the corresponding byte in the second memory space in order according to the memory address to obtain the target byte address corresponding to the memory data in the candidate memory data that is different from the synchronous memory data, and then the memory data corresponding to the target byte address is used as the target memory data. In this way, the data update of each byte can be accurately located and the updated memory data can be accurately obtained.

[0092] Step S104: synchronizing the target memory data to a designated memory space of the second terminal.

[0093] For example, the target memory data and the byte address offset of the target byte address corresponding to the target memory data in the first memory space can be sent to the second terminal. The second terminal can then update the memory data of the designated memory space in the second terminal according to the target memory data and the byte address offset to synchronize the target memory data to the designated memory space of the second terminal. In some embodiments, the second terminal can determine the target byte that needs to be updated in the second memory space according to the byte address offset of the target byte address in the first memory space, and update the data in the target byte to the target memory data.

[0094] In this way, by accurately locating the target memory data that has been updated in the first terminal, there is no need to synchronize all the memory data in the first memory space to the second terminal. Instead, only the updated target memory data needs to be synchronized to the second terminal, thereby reducing the amount of data transmitted across nodes during data synchronization, shortening the execution time of rendering instructions, and improving rendering performance. At the same time, it reduces network resource usage and improves resource utilization efficiency.

[0095] In summary, when a write operation to a first memory space of a first terminal is detected, the present disclosure obtains memory update information corresponding to the write operation, and then obtains target memory data corresponding to the write operation based on the memory update information and the synchronized memory data of the second memory space of the first terminal, and finally synchronizes the target memory data to the designated memory space of the second terminal. The memory update information is used to indicate the memory address range corresponding to the write operation. The synchronized memory data is the same as the memory data stored in the designated memory space in the second terminal. The present disclosure filters out the target memory data corresponding to the write operation from the first memory space, and synchronizes the target memory data corresponding to the write operation to the second terminal, without synchronizing all memory data of the entire first memory space to the second terminal, thereby reducing network resource usage and improving rendering performance.

[0096] Figure 6 is a flow chart of another data synchronization method according to an exemplary embodiment. Figure 6 As shown, the method also includes:

[0097] Step S105, synchronizing the target memory data to the second memory space.

[0098] For example, after determining the target memory data, the target memory data can be synchronized to the second memory space so that the memory data in the first memory space, the second memory space and the designated memory space remain synchronized. Specifically, the target memory data can be first synchronized to the designated memory space of the second terminal and then synchronized to the second memory space, or the target memory data can be first synchronized to the second memory space and then synchronized to the designated memory space of the second terminal. The present disclosure does not specifically limit this.

[0099] In some embodiments, the target memory data corresponding to the target byte address can be obtained according to the target byte address corresponding to the memory data different from the synchronous memory data in the candidate memory data, and then the synchronous memory data of the second memory space can be updated according to the target memory data and the byte address offset of the target byte address in the first memory space. Specifically, the byte to be updated in the second memory space can be determined according to the byte address offset of the target byte address in the first memory space, and the byte can be updated to the memory data of the target byte address in the first memory space.

[0100] If the byte offsets of the target byte address in the first memory space are 4-6 and 8-10, then the memory spaces with byte address offsets of 4-6 and 8-10 can be determined in the second memory space, and the data in the memory space with byte address offset of 4-6 in the second memory space can be updated to the data in the memory space with byte offset of 4-6 in the first memory space, and the data in the memory space with byte address offset of 8-10 in the second memory space can be updated to the data in the memory space with byte offset of 8-10 in the first memory space, thereby synchronizing the target memory data to the second memory space.

[0101] Figure 7 is a flow chart of another data synchronization method according to an exemplary embodiment. Figure 7 As shown, step S101 can be implemented by the following steps:

[0102] Step S1011, obtaining first exception information and second exception information corresponding to the write operation, the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate the end of the write operation.

[0103] For example, the memory address range corresponding to the write operation can be captured by setting write protection permissions for the first memory space. First, the write protection permissions can be set for the first memory space. Since the write protection permissions are set, when a write operation to the first memory space is detected, the first terminal can capture the first exception information corresponding to the write operation, wherein the first exception information may include the location information corresponding to the write operation, and the location information may include the page number of the page performing the write operation and the page number corresponding to the write operation, as well as the starting address of the write operation in each page.

[0104] After detecting the write operation, the write protection permission can be cancelled, and the write operation can be performed to write the target memory data into the first memory space. When the second abnormal information corresponding to the write operation is detected, it indicates that the write operation has ended, and the write protection permission can be reset to detect the memory address range corresponding to the next write operation.

[0105] Step S1012: determining memory update information according to the first abnormal information.

[0106] In some embodiments, the steps of obtaining the first exception information and the second exception information may be performed repeatedly to obtain at least one set of the first exception information and the second exception information. Then, the memory update information is determined according to the at least one set of the first exception information and the second exception information.

[0107] In the case where the first exception information and the second exception information are a group, the location information indicated by the first exception information can be used as the memory update information. Taking the first exception information indicating that the location information includes: page 5, 100th byte as an example, the address range between the 100th byte in page 5 and the last byte of page 5 can be used as the memory update information.

[0108] In the case where there are multiple groups of first exception information and second exception information, for each group of first exception information and second exception information, the location information indicated by the first exception information can be used as the memory address range corresponding to the group of exception information. Then, the multiple memory address ranges corresponding to the multiple first exception information can be used as memory update information.

[0109] Figure 8 is a block diagram of a data synchronization architecture according to an exemplary embodiment. Figure 8 The first terminal may include a memory management module, an exception module and a synchronization module. The memory management module may include a management submodule and a permission submodule, the management submodule is used to allocate memory space, reclaim memory space and cache management update, and the permission submodule is used to add write protection permission to the first memory space and cancel the write protection permission. The exception module is used to capture exception information caused by memory update operations (write operations) and extract memory address ranges. The synchronization module is used to filter out target memory data that has been updated based on the memory data of the first memory space and the synchronized memory data of the second memory space, and synchronize the target memory data to the second terminal.

[0110] In summary, when a write operation to a first memory space of a first terminal is detected, the present disclosure obtains memory update information corresponding to the write operation, and then obtains target memory data corresponding to the write operation based on the memory update information and the synchronized memory data of the second memory space of the first terminal, and finally synchronizes the target memory data to the designated memory space of the second terminal. The memory update information is used to indicate the memory address range corresponding to the write operation. The synchronized memory data is the same as the memory data stored in the designated memory space in the second terminal. The present disclosure filters out the target memory data corresponding to the write operation from the first memory space, and synchronizes the target memory data corresponding to the write operation to the second terminal, without synchronizing all memory data of the entire first memory space to the second terminal, thereby reducing network resource usage and improving rendering performance.

[0111] Fig. 9 is a block diagram of a data synchronization device according to an exemplary embodiment. Fig. 9 As shown, the device 200 includes:

[0112] The acquisition module 201 is configured to acquire memory update information corresponding to the write operation when a write operation to the first memory space of the first terminal is detected, where the memory update information is used to indicate a memory address range corresponding to the write operation.

[0113] The first determining module 202 is configured to determine a candidate memory space from the first memory space according to the memory update information.

[0114] The second determination module 203 is configured to determine the target memory data corresponding to the write operation based on the synchronous memory data of the second memory space and the candidate memory data in the candidate memory space, and the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal.

[0115] The synchronization module 204 is configured to synchronize the target memory data to a designated memory space of the second terminal.

[0116] Optionally, the memory update information includes a target page number corresponding to the write operation, and the first determining module 202 is configured to:

[0117] The memory space corresponding to the target page number in the first memory space is used as the candidate memory space.

[0118] Optionally, the second determining module 203 is configured to:

[0119] The synchronous memory data is compared with the candidate memory data, and the memory data in the candidate memory data that is different from the synchronous memory data is used as the target memory data.

[0120] Optionally, the synchronization module 204 is further configured to:

[0121] Synchronize the target memory data to the second memory space.

[0122] Fig.10 is a block diagram of another data synchronization device according to an exemplary embodiment. Fig.10 As shown, the acquisition module 201 includes:

[0123] The acquisition submodule 2011 is configured to acquire first exception information and second exception information corresponding to the write operation, the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate the end of the write operation.

[0124] The determination submodule 2012 is configured to determine memory update information according to the first abnormal information.

[0125] Optionally, the acquisition submodule 2011 is configured as follows:

[0126] Set write protection permission for the first memory space.

[0127] When a write operation to the first memory space is detected, first exception information corresponding to the write operation is obtained, and the write protection permission is cancelled.

[0128] A write operation is performed to write the target memory data into the first memory space.

[0129] Receive the second exception information and set the write protection permission.

[0130] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0131] In summary, when a write operation to a first memory space of a first terminal is detected, the present disclosure obtains memory update information corresponding to the write operation, and then obtains target memory data corresponding to the write operation based on the memory update information and the synchronized memory data of the second memory space of the first terminal, and finally synchronizes the target memory data to the designated memory space of the second terminal. The memory update information is used to indicate the memory address range corresponding to the write operation. The synchronized memory data is the same as the memory data stored in the designated memory space in the second terminal. The present disclosure filters out the target memory data corresponding to the write operation from the first memory space, and synchronizes the target memory data corresponding to the write operation to the second terminal, without synchronizing all memory data of the entire first memory space to the second terminal, thereby reducing network resource usage and improving rendering performance.

[0132] Fig.11 FIG. 1 is a block diagram of an electronic device according to an exemplary embodiment. Fig.11 As shown, the electronic device 300 may include: a processor 301 , a memory 302 . The electronic device 300 may also include one or more of a multimedia component 303 , an input / output (I / O) interface 304 , and a communication component 305 .

[0133] The processor 301 is used to control the overall operation of the electronic device 300 to complete all or part of the steps in the above-mentioned data synchronization method. The memory 302 is used to store various types of data to support the operation of the electronic device 300. For example, these data may include instructions for any application or method used to operate on the electronic device 300, and application-related data, such as contact data, messages sent and received, pictures, audio, video, etc. The memory 302 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (Static Random Access Memory, referred to as SRAM), electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, referred to as EEPROM), erasable programmable read-only memory (Erasable Programmable Read-Only Memory, referred to as EPROM), programmable read-only memory (Programmable Read-Only Memory, referred to as PROM), read-only memory (Read-Only Memory, referred to as ROM), magnetic memory, flash memory, disk or optical disk. The multimedia component 303 may include a screen and an audio component. The screen may be, for example, a touch screen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may be further stored in the memory 302 or sent through the communication component 305. The audio component also includes at least one speaker for outputting audio signals. The I / O interface 304 provides an interface between the processor 301 and other interface modules, and the other interface modules may be keyboards, mice, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 305 is used for wired or wireless communication between the electronic device 300 and other devices. Wireless communication, such as Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IOT, eMTC, or other 5G, etc., or a combination of one or more of them, is not limited here. Therefore, the corresponding communication component 305 may include: Wi-Fi module, Bluetooth module, NFC module, etc.

[0134] In an exemplary embodiment, the electronic device 300 can be implemented by one or more application specific integrated circuits (ASIC), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices (PLD), field programmable gate arrays (FPGA), controllers, microcontrollers, microprocessors or other electronic components to execute the above-mentioned data synchronization method.

[0135] In another exemplary embodiment, a computer-readable storage medium including program instructions is also provided, and when the program instructions are executed by a processor, the steps of the above-mentioned data synchronization method are implemented. For example, the computer-readable storage medium can be the above-mentioned memory 302 including program instructions, and the above-mentioned program instructions can be executed by the processor 301 of the electronic device 300 to complete the above-mentioned data synchronization method.

[0136] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program executable by a programmable device, and the computer program has a code portion for executing the above data synchronization method when executed by the programmable device.

[0137] The preferred embodiments of the present disclosure are described in detail above in conjunction with the accompanying drawings; however, the present disclosure is not limited to the specific details in the above embodiments. Within the technical concept of the present disclosure, a variety of simple modifications can be made to the technical solution of the present disclosure, and these simple modifications all fall within the protection scope of the present disclosure.

[0138] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present disclosure will not further describe various possible combinations.

[0139] In addition, various embodiments of the present disclosure may be arbitrarily combined, and as long as they do not violate the concept of the present disclosure, they should also be regarded as the contents disclosed by the present disclosure.

Claims

1. A data synchronization method, characterized in that: Applied to a first terminal, the first terminal being a client node for remote image rendering, the method comprises: When a write operation to a first memory space of a first terminal is detected, memory update information corresponding to the write operation is obtained through the write protection permission of the first memory space, where the memory update information is used to indicate a memory address range corresponding to the write operation; determining a candidate memory space from the first memory space according to the memory update information; Determine the target memory data corresponding to the write operation according to the synchronous memory data of the second memory space and the candidate memory data in the candidate memory space; the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal; the second terminal is a remote node for remote image rendering with a graphics processor GPU resource; Synchronizing the target memory data to the designated memory space of the second terminal; The obtaining of memory update information corresponding to the write operation includes: Acquire first exception information and second exception information corresponding to the write operation, wherein the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate that the write operation is finished; Determine the memory update information according to the first abnormal information; The obtaining of first exception information and second exception information corresponding to the write operation includes: Setting write protection permission for the first memory space; When the write operation to the first memory space is detected, first exception information corresponding to the write operation is obtained, and the write protection permission is cancelled; Execute the write operation so that the target memory data is written into the first memory space; The second exception information is received, and the write protection permission is set.

2. The method according to claim 1, characterized in that The memory update information includes a target page number corresponding to the write operation; and determining a candidate memory space from the first memory space according to the memory update information includes: The memory space corresponding to the target page number in the first memory space is used as the candidate memory space.

3. The method according to claim 1, characterized in that The determining, according to the synchronous memory data in the second memory space and the candidate memory data in the candidate memory space, the target memory data corresponding to the write operation comprises: The synchronous memory data is compared with the candidate memory data, and memory data in the candidate memory data that is different from the synchronous memory data is used as the target memory data.

4. The method according to claim 1, characterized in that: The method further comprises: The target memory data is synchronized to the second memory space.

5. A data synchronization device, characterized in that: Applied to a first terminal, the first terminal being a client node for remote image rendering, the device comprises: an acquisition module, configured to, when a write operation to a first memory space of a first terminal is detected, acquire memory update information corresponding to the write operation through a write protection permission of the first memory space, wherein the memory update information is used to indicate a memory address range corresponding to the write operation; a first determining module, configured to determine a candidate memory space from the first memory space according to the memory update information; A second determination module is configured to determine the target memory data corresponding to the write operation according to the synchronous memory data of the second memory space and the candidate memory data in the candidate memory space; the synchronous memory data is the same as the memory data stored in the designated memory space in the second terminal; the second terminal is a remote node for remote image rendering with a graphics processor GPU resource; a synchronization module, configured to synchronize the target memory data to the designated memory space of the second terminal; The acquisition module comprises: An acquisition submodule is configured to acquire first exception information and second exception information corresponding to the write operation, wherein the first exception information includes position information corresponding to the write operation, and the second exception information is used to indicate that the write operation is finished; a determination submodule, configured to determine the memory update information according to the first abnormal information; The acquisition submodule is configured as follows: Setting write protection permission for the first memory space; When the write operation to the first memory space is detected, first exception information corresponding to the write operation is obtained, and the write protection permission is cancelled; Execute the write operation so that the target memory data is written into the first memory space; The second exception information is received, and the write protection permission is set.

6. The device according to claim 5, characterized in that The memory update information includes a target page number corresponding to the write operation; the first determination module is configured to: The memory space corresponding to the target page number in the first memory space is used as the candidate memory space.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method described in any one of claims 1 to 4 are implemented.

8. An electronic device, characterized in that: include: a memory having a computer program stored thereon; A processor, configured to execute the computer program in the memory to implement the steps of the method according to any one of claims 1 to 4.

Images