Pixel structure and display panel

Abstract

The present application provides a pixel structure and a display panel. The present application surrounds sub-pixels with an isolation structure, so that the isolation structure can not only isolate the sub-pixels to prevent pixel crosstalk, but also electrically connect the cathodes of the sub-pixels to each other, thereby facilitating the connection of the entire surface of the cathodes of the sub-pixels. In addition, compared with the prior art of using a metal mask to limit the material evaporation area, the isolation structure in the present application can further reduce the spacing between sub-pixels, effectively increase the pixel opening area and reduce the pixel current density, effectively improve the product life; at the same time, it can also reduce the production cost of the pixel structure.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel structure and a display panel. Background Art

[0002] At present, the conventional production method of OLED (Organic Light-Emitting Diode) is to limit the material evaporation area through a fine metal mask (FMM). However, due to typical problems such as color mixing, the PDL gap (pixel spacing) value that product designers need to ensure is generally large, resulting in loss of product openings, which directly affects the product's life performance. Summary of the invention

[0003] The main technical problem solved by the present application is to provide a pixel structure and a display panel to solve the problem in the prior art that the large pixel pitch affects the life performance of the product.

[0004] In order to solve the above technical problems, the first technical solution provided by the present application is: providing a pixel structure, which includes a first sub-pixel, a second sub-pixel and a third sub-pixel of different colors;

[0005] In a first direction, the first sub-pixels and the second sub-pixels are alternately arranged to form a first pixel row, and the third sub-pixels are arranged to form a second pixel row;

[0006] In a second direction, the first pixel rows and the second pixel rows are arranged alternately, and the first direction is arranged perpendicular to the second direction;

[0007] Two first sub-pixels and two second sub-pixels distributed in two adjacent rows and two columns are arranged in a 2×2 matrix, the two first sub-pixels are located in different rows and columns, the two second sub-pixels are located in different rows and columns, a line connecting the centers of the two first sub-pixels and the centers of the two second sub-pixels forms a virtual quadrilateral, the third sub-pixel is located in the virtual quadrilateral; the third sub-pixel and an adjacent sub-pixel have sides that are close to each other arranged in parallel;

[0008] The pixel structure further includes an isolation structure, which surrounds the sub-pixels and is arranged in one-to-one correspondence with the sub-pixels; the isolation structure is used to electrically connect the cathodes of the sub-pixels to each other.

[0009] Wherein, the first sub-pixel and the second sub-pixel are both rhombus-shaped, and the third sub-pixel is a parallelogram; one diagonal of the rhombus is extended along the first direction, and the other diagonal of the rhombus is extended along the second direction; in the first direction, the adjacent first sub-pixels and the second sub-pixels are arranged diagonally opposite to each other; in the second direction, the adjacent first sub-pixels and the second sub-pixels are arranged diagonally opposite to each other;

[0010] The isolation structure and the adjacent sub-pixel are arranged parallel to each other; the first sub-pixel and the adjacent third sub-pixel share a side wall of the isolation structure, and the second sub-pixel and the adjacent third sub-pixel share a side wall of the isolation structure.

[0011] The area enclosed by the isolation structure is a polygon; the corners of the area enclosed by the isolation structure enclosing the first sub-pixel are flat chamfers or rounded chamfers, and the corners of the area enclosed by the isolation structure enclosing the second sub-pixel are flat chamfers or rounded chamfers.

[0012] Wherein, the isolation structure includes an isolation part and an eaves structure arranged on the upper surface of the isolation part, the eaves structure covers the isolation part and extends the isolation part in a direction parallel to the isolation part; the cross-section of the isolation structure in a direction parallel to the eaves structure gradually decreases in the direction toward the eaves structure.

[0013] Wherein, in each of the isolation structures, at least part of the sidewall is a first sidewall, and the isolation portion of the first sidewall is conductive and is used to contact the cathode of the adjacent sub-pixel to achieve electrical connection between the isolation structure and the sub-pixel;

[0014] The cathode of the sub-pixel is evaporated on the surface of the light-emitting layer of the sub-pixel through an evaporation source, the first direction is the long side direction of the evaporation source, and the second direction is the scanning direction of the evaporation source.

[0015] Wherein, in each of the isolation structures, part of the sidewall is the first sidewall, and part of the sidewall is the second sidewall, and the isolation portion of the second sidewall has insulating properties.

[0016] The isolation structure surrounding the first sub-pixel is defined as a first isolation structure, and the isolation structure surrounding the second sub-pixel is defined as a second isolation structure; the straight line where the diagonal line of the rhombus extending along the first direction lies is defined as a first symmetry line, and the straight line where the diagonal line of the rhombus extending along the second direction lies is defined as a second symmetry line;

[0017] In the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are located on opposite sides of the first symmetry line; in the first direction, adjacent first side walls are arranged in contact with each other and are electrically connected;

[0018] In the second direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on the same side of the first symmetry line;

[0019] or,

[0020] In the second direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on different sides of the first symmetry line.

[0021] The isolation structure surrounding the first sub-pixel is defined as the first isolation structure, and the isolation structure surrounding the second sub-pixel is defined as the second isolation structure; the straight line where the diagonal line of the rhombus extending along the first direction lies is defined as the first symmetry line, and the straight line where the diagonal line of the rhombus extending along the second direction lies is defined as the second symmetry line; in the second direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are located on opposite sides of the corresponding second symmetry line; in the second direction, the adjacent first side walls are contacted with each other and electrically connected;

[0022] In the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on the same side corresponding to the second symmetry line;

[0023] or,

[0024] In the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on different sides corresponding to the second symmetry line.

[0025] Part of the sidewalls of the first isolation structure are all first sidewalls, and / or part of the sidewalls of the second isolation structure are all first sidewalls.

[0026] In order to solve the above technical problem, the second technical solution provided in the present application is: to provide a display panel, which includes the above pixel structure.

[0027] Beneficial effects of the present application: Different from the prior art, the present application provides a pixel structure and a display panel, wherein the pixel structure includes a first sub-pixel, a second sub-pixel and a third sub-pixel of different colors. In a first direction, the first sub-pixel and the second sub-pixel are alternately arranged to form a first pixel row, and the third sub-pixel is arranged to form a second pixel row. In a second direction, the first pixel row and the second pixel row are alternately arranged, and the first direction is arranged perpendicular to the second direction. Two first sub-pixels and two second sub-pixels distributed in two adjacent rows and columns are arranged in a 2×2 matrix, the two first sub-pixels are located in different rows and columns, the two second sub-pixels are located in different rows and columns, the centers of the two first sub-pixels and the centers of the two second sub-pixels are connected to form a virtual quadrilateral, and the third sub-pixel is located in the virtual quadrilateral. The third sub-pixel is arranged parallel to one side of the adjacent sub-pixel. The pixel structure also includes an isolation structure, which surrounds the sub-pixels and is arranged one-to-one with the sub-pixels. The isolation structure is used to electrically connect the cathodes of the sub-pixels to each other. The present application surrounds the sub-pixel with an isolation structure, so that the isolation structure can not only isolate the sub-pixel to prevent pixel crosstalk, but also electrically connect the cathodes of the sub-pixels to each other, thereby facilitating the connection of the entire surface of the cathodes of the sub-pixels. In addition, compared with the prior art of using a metal mask to limit the material evaporation area, the isolation structure in the present application can further reduce the spacing between sub-pixels, effectively increase the pixel opening area and reduce the pixel current density, effectively improve the product life; at the same time, it can also reduce the production cost of the pixel structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0029] Figure 1 is a structural schematic diagram of a first embodiment of a pixel structure provided by the present application;

[0030] Figure 2 yes Figure 1 Schematic diagram of the cross-sectional structure at EE in the middle;

[0031] Figure 3 is a structural schematic diagram of a second embodiment of a pixel structure provided by the present application;

[0032] Figure 4 is a structural schematic diagram of a third embodiment of a pixel structure provided by the present application;

[0033] Figure 5 is a structural schematic diagram of a fourth embodiment of a pixel structure provided by the present application;

[0034] Figure 6 is a structural schematic diagram of a fifth embodiment of a pixel structure provided by the present application;

[0035] Figure 7 is a structural schematic diagram of a sixth embodiment of a pixel structure provided by the present application;

[0036] Figure 8 is a structural schematic diagram of a seventh embodiment of a pixel structure provided by the present application;

[0037] Fig. 9 is a structural schematic diagram of an eighth embodiment of a pixel structure provided by the present application;

[0038] Fig.10 is a structural schematic diagram of a ninth embodiment of a pixel structure provided by the present application;

[0039] Fig.11 is a structural schematic diagram of a tenth embodiment of a pixel structure provided by the present application;

[0040] Fig.12 is a structural schematic diagram of an eleventh embodiment of a pixel structure provided by the present application;

[0041] Fig.13 is a structural schematic diagram of a twelfth embodiment of a pixel structure provided by the present application;

[0042] Fig.14 is a structural schematic diagram of a thirteenth embodiment of a pixel structure provided by the present application;

[0043] Fig.15 It is a schematic diagram of the comparison of the lifetime attenuation of sub-pixels provided in this application.

[0044] Description of Figure Numbers:

[0045] 10. sub-pixel; 11. anode; 12. light-emitting layer; 13. cathode; 10A. first sub-pixel; 10B. second sub-pixel; 10C. third sub-pixel; 110. first pixel row; 120. second pixel row; X, first direction; Y, second direction; D1, first symmetry line; D2, second symmetry line; G1, first side; G2, second side; G3, third side; G4, fourth side; 20. isolation structure; 21. side wall; 21A, first side wall; 21B, second side wall; 211, isolation portion; 212, eaves structure; 30, pixel definition layer; 31, pixel opening. DETAILED DESCRIPTION

[0046] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.

[0047] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0048] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0049] The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0050] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0051] See also Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of a first embodiment of a pixel structure provided by the present application, Figure 2 yes Figure 1 Schematic diagram of the cross-sectional structure at EE in the middle.

[0052] The present application provides a pixel structure, which includes a first sub-pixel 10A, a second sub-pixel 10B, and a third sub-pixel 10C of different colors. In a first direction X, the first sub-pixel 10A and the second sub-pixel 10B are alternately arranged to form a first pixel row 110, and the third sub-pixel 10C is arranged to form a second pixel row 120. In a second direction Y, the first pixel row 110 and the second pixel row 120 are alternately arranged, and the first direction X is arranged perpendicular to the second direction Y. Two first sub-pixels 10A and two second sub-pixels 10B distributed in two adjacent rows and columns are arranged in a 2×2 matrix, the two first sub-pixels 10A are located in different rows and columns, the two second sub-pixels 10B are located in different rows and columns, the centers of the two first sub-pixels 10A and the centers of the two second sub-pixels 10B are connected to form a virtual quadrilateral, and the third sub-pixel 10C is located in the virtual quadrilateral. The third sub-pixel 10C is arranged parallel to one side of the adjacent sub-pixel 10. The pixel structure further includes an isolation structure 20, which surrounds the sub-pixels 10 and is disposed one-to-one with the sub-pixels 10. The isolation structure 20 is used to electrically connect the cathodes 13 of the sub-pixels 10 to each other.

[0053] In the present application, the isolation structure 20 surrounds the sub-pixel 10, so that the isolation structure 20 can not only isolate the sub-pixels 10 to prevent pixel crosstalk, but also electrically connect the cathodes 13 of the sub-pixels 10 to each other, thereby facilitating the connection of the entire surface of the cathodes 13 of the sub-pixels 10. In addition, compared with the prior art of using a metal mask to limit the material evaporation area, the isolation structure 20 in the present application can further reduce the spacing between the sub-pixels 10, effectively increase the area of ​​the pixel opening 31 and reduce the pixel current density, effectively prolonging the product life; at the same time, it can also reduce the production cost of the pixel structure.

[0054] The present application further includes a pixel definition layer 30, which defines the position of the sub-pixels 10. Specifically, a plurality of pixel openings 31 are provided on the pixel definition layer 30. The sub-pixels 10 are provided in the pixel openings 31, and the pixel openings 31 and the sub-pixels 10 are provided in a one-to-one correspondence.

[0055] The material and thickness of the pixel definition layer 30 are not limited here and can be selected according to actual needs.

[0056] It should be noted that the first sub-pixel 10A, the second sub-pixel 10B and the third sub-pixel 10C in the present application represent sub-pixels 10 of different colors respectively.

[0057] The sub-pixel 10 includes an anode 11, a light-emitting layer 12, and a cathode 13, which are stacked in sequence. The materials of the anode 11, the light-emitting layer 12, and the cathode 13 are not limited and are selected according to actual needs. The cathode 13 of the sub-pixel 10 is evaporated on the surface of the light-emitting layer 12 of the sub-pixel 10 by an evaporation source, the first direction X is the long side direction of the evaporation source, and the second direction Y is the scanning direction of the evaporation source.

[0058] The sub-pixel 10 includes an OLED.

[0059] In this embodiment, the first sub-pixel 10A is a red sub-pixel 10 , the second sub-pixel 10B is a blue sub-pixel 10 , and the third sub-pixel 10C is a green sub-pixel 10 .

[0060] It should be understood that in other embodiments, the first sub-pixel 10A, the second sub-pixel 10B, and the third sub-pixel 10C can represent sub-pixels 10 of other colors, respectively. The colors of the sub-pixels 10 are not limited here, and can be selected according to actual needs. Secondly, the size relationship of the light-emitting areas of the sub-pixels 10 of various colors in the present application is not limited here, and can be selected according to actual needs.

[0061] The distance between the third subpixel 10C and the second subpixel 10B may be greater than or equal to the distance between the third subpixel 10C and the first subpixel 10A, or may be less than the distance between the third subpixel 10C and the first subpixel 10A, depending on actual needs.

[0062] In this embodiment, the distance between the third sub-pixel 10C and the second sub-pixel 10B is equal to the distance between the third sub-pixel 10C and the first sub-pixel 10A, which is beneficial to display uniformity.

[0063] The first direction X is the row direction of the sub-pixels 10 , and the second direction Y is the column direction of the sub-pixels 10 .

[0064] In the second direction Y, the alternating order of the first sub-pixels 10A and the second sub-pixels 10B in two adjacent first pixel rows 110 in the first direction X is opposite. Specifically, in one of the two adjacent first pixel rows 110, the first sub-pixels 10A and the second sub-pixels 10B are alternately arranged in sequence along the first direction X, and in the other of the two adjacent first pixel rows 110, the second sub-pixels 10B and the first sub-pixels 10A are alternately arranged in sequence along the first direction X.

[0065] The third sub-pixel 10C and the adjacent sub-pixel 10 are arranged parallel to each other, that is, the side of the third sub-pixel 10C close to the adjacent sub-pixel 10 and the side of the adjacent sub-pixel 10 close to the third sub-pixel 10C are arranged parallel to each other. Specifically, the side of the third sub-pixel 10C and the adjacent first sub-pixel 10A are arranged parallel to each other, and the side of the third sub-pixel 10C and the adjacent second sub-pixel 10B are arranged parallel to each other.

[0066] In the present embodiment, the first sub-pixel 10A and the second sub-pixel 10B are both rhombus-shaped, and the third sub-pixel 10C is a parallelogram. One diagonal of the rhombus is extended along the first direction X, and the other diagonal of the rhombus is extended along the second direction Y. In the first direction X, the adjacent first sub-pixels 10A and second sub-pixels 10B are arranged diagonally opposite to each other. In the second direction Y, the adjacent first sub-pixels 10A and second sub-pixels 10B are arranged diagonally opposite to each other. That is, in each first pixel row 110, the diagonal of the first sub-pixel 10A extending along the first direction X and the diagonal of the second sub-pixel 10B extending along the first direction X are located on the same straight line, so that the first sub-pixel 10A and the second sub-pixel 10B are arranged diagonally opposite to each other in the first direction X. Similarly, in the second direction Y, the diagonal line of the first sub-pixel 10A extending along the second direction Y and the diagonal line of the adjacent second sub-pixel 10B extending along the second direction Y are located on the same straight line, so that in the second direction Y, the adjacent first sub-pixels 10A and second sub-pixels 10B are arranged diagonally opposite each other.

[0067] It should be understood that in other embodiments, the third sub-pixel 10C may also be a hexagon or other polygon, as long as the third sub-pixel 10C and the adjacent sub-pixel 10 are arranged parallel to each other.

[0068] It should be noted that, in the present application, in the first direction X or the second direction Y, there is a gap between adjacent first sub-pixels 10A and second sub-pixels 10B.

[0069] It should be understood that in this embodiment, the extension direction of the side edges of all sub-pixels 10 intersects with the first direction X and the second direction Y. That is, the extension direction of any side edge of the sub-pixel 10 is neither parallel to the first direction X nor parallel to the second direction Y.

[0070] The isolation structure 20 is a ring-shaped structure and is disposed protruding from the pixel definition layer 30. The isolation structure 20 surrounds a pixel opening 31 to surround the sub-pixel 10. One isolation structure 20 surrounds one pixel opening 31.

[0071] Furthermore, the isolation structure 20 is arranged parallel to the side close to the adjacent sub-pixel 10. It can be understood that the side of the isolation structure 20 close to the adjacent sub-pixel 10 and the side of the adjacent sub-pixel 10 close to the isolation structure 20 are parallel to each other, so as to prepare the isolation structure 20 regularly.

[0072] The first sub-pixel 10A and the adjacent third sub-pixel 10C share a side wall 21 of the isolation structure 20, and the second sub-pixel 10B and the adjacent third sub-pixel 10C share a side wall 21 of the isolation structure 20. That is, the isolation structure 20 surrounding the first sub-pixel 10A and the isolation structure 20 surrounding the third sub-pixel 10C adjacent to the first sub-pixel 10A share the same side wall 21, so as to reduce the spacing between the sub-pixels 10, which is beneficial to improve the pixel aperture ratio.

[0073] The area enclosed by the isolation structure 20 is a polygon. Among them, the corners of the area enclosed by the isolation structure 20 that encloses the first sub-pixel 10A are flat chamfers or rounded chamfers, and the corners of the area enclosed by the isolation structure 20 that encloses the second sub-pixel 10B are flat chamfers or rounded chamfers. The present application removes the sharp corners of the isolation structure 20 that encloses the first sub-pixel 10A and the second sub-pixel 10B to eliminate the influence of the irregularity of the sharp corners on the area size of the pixel opening 31, thereby helping to reduce the spacing between the first sub-pixel 10A and the second sub-pixel 10B and further improve the pixel opening rate. Secondly, it can also avoid the problem of poor overlap between the isolation structure 20 and the sub-pixel 10 (the cathode 13 of the sub-pixel 10 at the sharp corner is prone to poor overlap with the isolation structure 20).

[0074] In this embodiment, the corners of the region surrounded by the isolation structure 20 surrounding the first sub-pixel 10A are flat chamfers, and the corners of the region surrounded by the isolation structure 20 surrounding the second sub-pixel 10B are flat chamfers.

[0075] It should be understood that in other embodiments, the corners of the area enclosed by the isolation structure 20 enclosing the third sub-pixel 10C may be flat chamfers or round chamfers, which are not restricted here and can be selected according to actual needs.

[0076] The isolation structure 20 includes an isolation portion 211 and an eaves structure 212 disposed on the upper surface of the isolation portion 211, the eaves structure 212 shields the isolation portion 211, and extends the isolation portion 211 in a direction parallel to the isolation portion 211. That is, the orthographic projection of the eaves structure 212 on the pixel definition layer 30 covers the orthographic projection of the isolation portion 211 on the pixel definition layer 30, and the orthographic projection area of ​​the eaves structure 212 on the pixel definition layer 30 is larger than the orthographic projection area of ​​the isolation portion 211 on the pixel definition layer 30. During the process of evaporating the sub-pixel 10, the evaporation angle of the evaporation material can be adjusted by the edge of the eaves structure 212, so that the cathode 13 can cover the light-emitting layer 12 and achieve a good overlap with the isolation structure 20.

[0077] The isolation portion 211 in the isolation structure 20 overlaps the cathode 13 of the enclosed sub-pixel 10 .

[0078] The cross-section of the isolation structure 20 in a direction parallel to the eaves structure 212 gradually decreases in the direction toward the eaves structure 212, that is, the angle between the side wall 21 of the isolation portion 211 and the portion of the eaves structure 212 extending out of the isolation portion 211 is less than 90 degrees, which can improve the adhesion of the cathode 13 of the sub-pixel 10 on the side wall 21 of the isolation portion 211 and facilitate good overlap between the cathode 13 of the sub-pixel 10 and the isolation portion 211.

[0079] In each isolation structure 20, at least part of the sidewalls 21 are first sidewalls 21A, and the isolation portion 211 of the first sidewall 21A is conductive and is used to contact the cathode 13 of the adjacent sub-pixel 10 to achieve electrical connection between the isolation structure 20 and the sub-pixel 10. In other words, each isolation structure 20 includes a plurality of sidewalls 21, and each sidewall 21 corresponds to a side edge of the enclosed sub-pixel 10. Part of the sidewalls 21 in each isolation structure 20 are first sidewalls 21A, or all the sidewalls 21 in each isolation structure 20 are first sidewalls 21A. The isolation portion 211 in the first sidewall 21A of the isolation structure 20 overlaps the cathode 13 of the adjacent sub-pixel 10 to achieve electrical connection between the isolation structure 20 and the corresponding sub-pixel 10.

[0080] In the present application, the first direction X is set as the long side direction of the evaporation source, and the second direction Y is set as the scanning direction of the evaporation source, so that any first side wall 21A of the isolation structure 20 can overlap with the cathode 13 of the sub-pixel 10 to achieve electrical connection between the isolation structure 20 and the adjacent sub-pixel 10.

[0081] In this embodiment, in each isolation structure 20, part of the side wall 21 is the first side wall 21A, part of the side wall 21 is the second side wall 21B, and the isolation portion 211 of the second side wall 21B has insulation properties. The eaves structure 212 has insulation properties.

[0082] The thickness of the first side wall 21A and the thickness of the second side wall 21B are not limited here and can be selected according to actual needs. The thickness of the first side wall 21A can be greater than or equal to the thickness of the second side wall 21B, or can be less than the thickness of the second side wall 21B.

[0083] The material of the isolation portion 211 of the second side wall 21B may be the same as or different from the material of the eaves structure 212 , and there are no excessive restrictions here, and the selection is made according to actual needs.

[0084] Specifically, the isolation structure 20 surrounding the first sub-pixel 10A is defined as the first isolation structure, and the isolation structure 20 surrounding the second sub-pixel 10B is defined as the second isolation structure. The straight line where the diagonal line of the rhombus extending along the first direction X lies is defined as the first symmetry line D1, and the straight line where the diagonal line of the rhombus extending along the second direction Y lies is defined as the second symmetry line D2. That is, each first pixel row 110 has a first symmetry line D1, and each column of the first sub-pixel 10A and the second sub-pixel 10B has a second symmetry line D2.

[0085] In the first direction X, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are located on opposite sides of the corresponding first symmetry line D1. In the first direction X, the adjacent first side walls 21A are arranged in contact with each other and are electrically connected. The arrangement of the first side wall 21A enables the cathodes 13 of each sub-pixel 10 in the adjacent first pixel row 110 and second pixel row 120 to be electrically connected to each other through the first side wall 21A, thereby electrically connecting the cathodes 13 of each sub-pixel 10 in the pixel structure to form a full-surface connection of the cathode 13, which is beneficial to the uniformity of the cathode 13.

[0086] In the second direction Y, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are respectively located on the same side of the corresponding first symmetry line D1; or, in the second direction Y, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are respectively located on different sides of the corresponding first symmetry line D1.

[0087] Specifically, the first symmetry line D1 has a first side G1 and a second side G2 that are oppositely disposed along the second direction Y, and the first side G1 of each first symmetry line D1 is located on the same side of the second direction Y.

[0088] In this embodiment, in the second direction Y, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are both located on the first side G1 corresponding to the first symmetry line D1.

[0089] See also Figures 1 to 3 , Figure 3It is a structural schematic diagram of the second embodiment of the pixel structure provided by the present application.

[0090] In some embodiments, Figure 3 As shown, in the second direction Y, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are both located on the second side G2 corresponding to the first symmetry line D1.

[0091] See also Figure 1 , Figure 2 , Figure 4 and Figure 5 , Figure 4 is a schematic structural diagram of a third embodiment of a pixel structure provided by the present application, Figure 5 It is a structural schematic diagram of the fourth embodiment of the pixel structure provided in the present application.

[0092] In some embodiments, in the second direction Y, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are respectively located on different sides of the corresponding first symmetry line D1. Specifically, the first sidewall 21A in the first isolation structure is located on the first side G1 corresponding to the first symmetry line D1, and the first sidewall 21A in the second isolation structure is located on the second side G2 corresponding to the first symmetry line D1 (see Figure 4 Alternatively, the first sidewall 21A in the first isolation structure is located at the second side G2 corresponding to the first symmetry line D1, and the first sidewall 21A in the second isolation structure is located at the first side G1 corresponding to the first symmetry line D1 (see Figure 5 ).

[0093] See also Figure 1 , Figure 2 and Figure 6 , Figure 6 It is a structural schematic diagram of the fifth embodiment of the pixel structure provided in the present application.

[0094] The structure of the fifth embodiment provided in the present application is basically similar to that of the first embodiment provided in the present application, except that the side walls 21 of part of the second isolation structure are all first side walls 21A.

[0095] In some embodiments, part of the sidewalls 21 of the first isolation structure are all first sidewalls 21A, and / or part of the sidewalls 21 of the second isolation structure are all first sidewalls 21A. The sidewalls 21 of part of the first isolation structure are all set as the first sidewalls 21A to increase the overlap area between the first isolation structure and the cathode 13 of the first sub-pixel 10A surrounded by the first isolation structure, thereby improving the electrical connection effect between the first isolation structure and the cathode 13 of the first sub-pixel 10A; and increase the overlap area between the first isolation structure and the cathode 13 of the adjacent third sub-pixel 10C, thereby improving the electrical connection effect between the first isolation structure and the cathode 13 of the adjacent third sub-pixel 10C. Similarly, part of the side walls 21 of the second isolation structure are set as the first side walls 21A to increase the overlapping area between the second isolation structure and the cathode 13 of the second sub-pixel 10B surrounded by the second isolation structure, thereby improving the electrical connection effect between the second isolation structure and the cathode 13 of the second sub-pixel 10B, and increase the overlapping area between the second isolation structure and the cathode 13 of the adjacent third sub-pixel 10C, thereby improving the electrical connection effect between the second isolation structure and the cathode 13 of the adjacent third sub-pixel 10C.

[0096] It should be noted that “A and / or B” in the present application means including only A, or only B, or including both A and B.

[0097] In this embodiment, the sidewalls 21 of some second isolation structures are all first sidewalls 21A. Specifically, the sidewalls 21 of the second isolation structures corresponding to the second sub-pixels 10B in the even-numbered first pixel rows 110 are all first sidewalls 21A.

[0098] See also Figure 1 , Figure 2 and Figure 7 , Figure 7 It is a structural schematic diagram of the sixth embodiment of the pixel structure provided in the present application.

[0099] In some embodiments, part of the sidewalls 21 of the second isolation structure are all first sidewalls 21A. Figure 6 As shown, the sidewalls 21 of the second isolation structure corresponding to the second sub-pixels 10B in the odd-numbered first pixel rows 110 are all first sidewalls 21A.

[0100] See also Figure 1 , Figure 2 and Figure 8 , Figure 8 It is a structural schematic diagram of the seventh embodiment of the pixel structure provided in the present application.

[0101] The seventh embodiment provided by the present application is substantially similar in structure to the first embodiment provided by the present application, except that: in the second direction Y, the first side wall 21A in the first isolation structure and the first side wall 21A in the adjacent second isolation structure are located on opposite sides of the corresponding second symmetry line D2. In the second direction Y, the adjacent first side walls 21A are arranged in contact with each other and are electrically connected.

[0102] In this embodiment, in the second direction Y, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are located on opposite sides of the corresponding second symmetry line D2. In the second direction Y, the adjacent first sidewalls 21A are in contact with each other and are electrically connected.

[0103] Specifically, the second symmetry line D2 has a third side G3 and a fourth side G4 that are oppositely disposed along the second direction Y, and the third side G3 of each second symmetry line D2 is located on the same side of the second direction Y.

[0104] In the first direction X, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are respectively located on the same side of the corresponding second symmetry line D2.

[0105] In this embodiment, in the odd-numbered first pixel rows 110, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are both located at the third side G3 corresponding to the second symmetry line D2. In the even-numbered first pixel rows 110, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are both located at the fourth side G4 corresponding to the second symmetry line D2.

[0106] See also Figure 1 , Figure 2 and Fig. 9 , Fig. 9 It is a structural schematic diagram of the eighth embodiment of the pixel structure provided in the present application.

[0107] In one embodiment, if Fig. 9 As shown, in the odd-numbered first pixel rows 110, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are both located at the fourth side G4 corresponding to the second symmetry line D2. In the even-numbered first pixel rows 110, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are both located at the third side G3 corresponding to the second symmetry line D2.

[0108] See also Figure 1 , Figure 2 , Fig.10 and Fig.11 , Fig.10is a schematic structural diagram of a ninth embodiment of a pixel structure provided by the present application, Fig.11 It is a structural schematic diagram of the tenth embodiment of the pixel structure provided in the present application.

[0109] In some embodiments, in the first direction X, the first sidewall 21A in the first isolation structure and the first sidewall 21A in the adjacent second isolation structure are respectively located on different sides of the corresponding second symmetry line D2. Specifically, the first sidewall 21A in the first isolation structure is located on the third side G3 of the corresponding second symmetry line D2, and the first sidewall 21A in the second isolation structure is located on the fourth side G4 of the corresponding second symmetry line D2 (see Fig.10 Alternatively, the first sidewall 21A in the first isolation structure is located at the fourth side G4 corresponding to the second symmetry line D2, and the first sidewall 21A in the second isolation structure is located at the third side G3 corresponding to the second symmetry line D2 (see Fig.11 ).

[0110] See also Figure 1 , Figure 2 , Figure 12 to Figure 14 , Fig.12 is a structural schematic diagram of an eleventh embodiment of a pixel structure provided by the present application, Fig.13 is a structural schematic diagram of a twelfth embodiment of a pixel structure provided by the present application, Fig.14 It is a structural schematic diagram of the thirteenth embodiment of the pixel structure provided in the present application.

[0111] In some embodiments, part of the sidewalls 21 of the first isolation structure are all first sidewalls 21A (not shown), and / or part of the sidewalls 21 of the second isolation structure are all first sidewalls 21A (see FIG. Fig.12 and Fig.13 ). I will not go into details here, please refer to the above description.

[0112] In some embodiments, Fig.14 As shown, the sidewalls 21 of the isolation structure 20 are all first sidewalls, so that compared with other embodiments of the present application, the electrical connection effect between the isolation structure 20 and the sub-pixel 10 of this embodiment is better.

[0113] See also Figures 1 to 15 , Fig.15 It is a schematic diagram of the comparison of the lifetime attenuation of sub-pixels provided in this application.

[0114] It should be noted that the above embodiments are just different in the position of the first side wall 21A in the isolation structure 20, which can effectively increase the area of ​​the pixel opening 31 and reduce the pixel current density, effectively improving the product life; at the same time, it can also reduce the production cost of the pixel structure. Specifically, compared with the pixel structure using the FMM process in the prior art, the spacing between the sub-pixels 10 in the pixel structure of the present application can be reduced by about 10 microns, so that under the same pixel arrangement, the pixel opening rate in the pixel structure of the present application can be increased by about twice compared with the prior art. In addition, if Fig.15 As shown, the embodiment in the figure represents the embodiment in the present application, and the comparative example in the figure represents the embodiment in the prior art where the isolation structure 20 in the present application is not set. It can be seen from the figure that compared with the prior art, the life span of the pixel structure of the present application is greatly improved.

[0115] The present application provides a display panel, which includes the above-mentioned pixel structure.

[0116] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0117] The above are only implementation methods of the present application, and are not intended to limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A pixel structure, characterized in that: including a first sub-pixel, a second sub-pixel and a third sub-pixel having different colors; In a first direction, the first sub-pixels and the second sub-pixels are alternately arranged to form a first pixel row, and the third sub-pixels are arranged to form a second pixel row; In a second direction, the first pixel rows and the second pixel rows are arranged alternately, and the first direction is arranged perpendicular to the second direction; Two first sub-pixels and two second sub-pixels distributed in two adjacent rows and two columns are arranged in a 2×2 matrix, the two first sub-pixels are located in different rows and columns, the two second sub-pixels are located in different rows and columns, a line connecting the centers of the two first sub-pixels and the centers of the two second sub-pixels forms a virtual quadrilateral, the third sub-pixel is located in the virtual quadrilateral; the third sub-pixel and an adjacent sub-pixel have sides that are close to each other arranged in parallel; The pixel structure further includes an isolation structure, the isolation structure surrounds the sub-pixels and is arranged one-to-one with the sub-pixels; the isolation structure is used to electrically connect the cathodes of the sub-pixels to each other; the isolation structure includes an isolation portion and an eaves structure arranged on the upper surface of the isolation portion; The first sub-pixel and the second sub-pixel are both rhombus-shaped, and the third sub-pixel is a parallelogram; one diagonal line of the rhombus is extended along the first direction, and the other diagonal line of the rhombus is extended along the second direction; The isolation structure has a side wall; In each of the isolation structures, part of the sidewalls are first sidewalls, and part of the sidewalls are second sidewalls, and the isolation portion of the first sidewall is conductive and is used to contact the cathode of the adjacent sub-pixel to achieve electrical connection between the isolation structure and the sub-pixel; The isolation portion of the second side wall has insulating properties; defining an isolation structure surrounding the first sub-pixel as a first isolation structure, and an isolation structure surrounding the second sub-pixel as a second isolation structure; Define a straight line where a diagonal line of the rhombus extending along the first direction lies as a first symmetry line, and a straight line where a diagonal line of the rhombus extending along the second direction lies as a second symmetry line; in, In the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are located on opposite sides of the first symmetry line; in the first direction, adjacent first side walls are arranged in contact with each other and are electrically connected; In the second direction, the first sidewall in the first isolation structure and the first sidewall in the adjacent second isolation structure are respectively located on the same side of the first symmetry line, or, in the second direction, the first sidewall in the first isolation structure and the first sidewall in the adjacent second isolation structure are respectively located on different sides of the first symmetry line; or, in, In the second direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are located on opposite sides of the second symmetry line; in the second direction, the adjacent first side walls are arranged in contact with each other and are electrically connected; In the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on the same side of the second symmetry line, or, in the first direction, the first side wall in the first isolation structure and the first side wall in the adjacent second isolation structure are respectively located on different sides of the second symmetry line.

2. The pixel structure according to claim 1, characterized in that: In the first direction, adjacent first sub-pixels and second sub-pixels are arranged diagonally; in the second direction, adjacent first sub-pixels and second sub-pixels are arranged diagonally; The isolation structure and the adjacent sub-pixel are arranged parallel to each other; the first sub-pixel and the adjacent third sub-pixel share a side wall of the isolation structure, and the second sub-pixel and the adjacent third sub-pixel share a side wall of the isolation structure.

3. The pixel structure according to claim 2, characterized in that: The area enclosed by the isolation structure is a polygon; wherein the corners of the area enclosed by the isolation structure enclosing the first sub-pixel are flat chamfers or rounded chamfers, and the corners of the area enclosed by the isolation structure enclosing the second sub-pixel are flat chamfers or rounded chamfers.

4. The pixel structure according to claim 2, characterized in that: The eaves structure shields the isolation portion and extends the isolation portion in a direction parallel to the isolation portion; the cross-section of the isolation structure in a direction parallel to the eaves structure gradually decreases in the direction toward the eaves structure.

5. The pixel structure according to claim 4, characterized in that: The cathode of the sub-pixel is evaporated on the surface of the light-emitting layer of the sub-pixel by an evaporation source, the first direction is the long side direction of the evaporation source, and the second direction is the scanning direction of the evaporation source.

6. The pixel structure according to claim 1, characterized in that: Some sidewalls of the first isolation structure are first sidewalls, and / or some sidewalls of the second isolation structure are first sidewalls.

7. A display panel, characterized in that: A pixel structure comprising any one of claims 1 to 6.

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