Impedance-balanced passive emi filter and transformer system

By designing a passive EMI filter based on impedance balance in power electronic devices, and using equivalent inductors and capacitors to form a common-mode inductor, the problem of excessive device size caused by the complexity of common-mode EMI propagation is solved, and effective suppression of common-mode EMI and miniaturization of the filter are achieved.

CN118316304BActive Publication Date: 2026-02-06DALIAN MARITIME UNIVERSITY
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Patent Information

Application Number
CN202410493211.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-04-23
Publication Date
2026-02-06
Estimated Expiration
2044-04-23

AI Technical Summary

Technical Problem

In existing technologies, common-mode electromagnetic interference propagates in power electronic devices in a complex manner, requiring large multi-stage EMI filters for suppression, which results in excessively large device sizes.

Method used

Design a passive EMI filter based on impedance balance. By using equivalent inductors and capacitors on the DC and AC sides of the converter to form a common-mode inductor and connecting parasitic capacitance in parallel, impedance balance is achieved to suppress common-mode EMI.

Benefits of technology

It effectively suppresses common-mode EMI on both the DC and AC sides of the converter, reduces the size of the passive EMI filter, and achieves miniaturization.

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Abstract

The application discloses a passive EMI filter and converter system based on impedance balance, which comprises a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first parasitic capacitor C p1 , a second parasitic capacitor C p2 , a third parasitic capacitor C p3 , a fourth parasitic capacitor C p4 and a fifth parasitic capacitor C p5 . One end of the first inductor L1 is connected with a converter DC side input end and one end of the first parasitic capacitor C p1 , and the other end is connected with one end of the first capacitor C1; one end of the second inductor L2 is connected with the converter DC side input end and one end of the second parasitic capacitor C p2 , and the other end is connected with one end of the second capacitor C2; the other ends of the first capacitor C1 and the second capacitor C2 are connected with one end of the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5; the other ends of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 are grounded; one end of the third inductor L3 is connected with a converter AC side output end and one end of the third parasitic capacitor C p3 , and the other end is connected with the other end of the third capacitor C3 and a load; one end of the fourth inductor L4 is connected with the converter AC side output end and one end of the fourth parasitic capacitor C p4 , and the other end is connected with the other end of the fourth capacitor C4 and the load; one end of the fifth inductor L5 is connected with the converter AC side output end and one end of the fifth parasitic capacitor C p5 ; the other end is connected with the other end of the fifth capacitor C5 and the load; the other ends of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 are grounded; the application can effectively suppress common-mode EMI generated when the converter DC side and AC side system operates, and simultaneously reduce the volume of the passive EMI filter.
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Description

Technical Field

[0001] This invention relates to the field of conducted EMI suppression technology for power electronic devices, and particularly to a passive EMI filter and converter system based on impedance balance. Background Technology

[0002] Power electronic devices have been widely used in many industries due to their superior performance. However, the high-speed switching of these devices generates significant electromagnetic interference (EMI). EMI poses considerable risks, including creating harsh operating environments, accelerating electrical aging, shortening equipment lifespan, causing malfunctions in sensitive electronic equipment, and even burning out equipment due to excessive energy. To ensure reliable system operation, it is essential to suppress the generated EMI and limit its levels to within the standards specified.

[0003] Common-mode electromagnetic interference (EMI) propagates throughout the system and is relatively complex. In engineering, common-mode EMI filters are typically used to suppress it. However, achieving good suppression usually requires large EMI filters, sometimes even multi-stage passive EMI filters, resulting in significant size and impacting usability. Summary of the Invention

[0004] This invention provides a name to overcome the above-mentioned technical problems.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A passive EMI filter based on impedance balance, connected to a converter and a load, includes: a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a first parasitic capacitance C. p1 Second parasitic capacitance C p2 Third parasitic capacitance C p3 Fourth parasitic capacitance C p4 and the fifth parasitic capacitance C p5 ;

[0007] One end of the first inductor L1 is connected to the DC input terminal of the converter and the first parasitic capacitance C, respectively. p1 One end of the first inductor L2 is connected to the DC input terminal of the converter and the second parasitic capacitance C, respectively. p2one end of the first inductor L1 is connected with one end of the first capacitor C1, and the other end of the first inductor L1 is connected with one end of the second capacitor C2; one end of the third inductor L3 is connected with the output end of the AC side of the transformer and one end of the third parasitic capacitor C p3 ; one end of the fourth inductor L4 is connected with the output end of the AC side of the transformer and one end of the fourth parasitic capacitor C p4 ; one end of the fifth inductor L5 is connected with the output end of the AC side of the transformer and one end of the fifth parasitic capacitor C p5 ; the other end of the third inductor L3 is connected with one end of the third capacitor C3 and the load respectively; the other end of the fourth inductor L4 is connected with one end of the fourth capacitor C4 and the load respectively; the other end of the fifth inductor L5 is connected with one end of the fifth capacitor C5 and the load respectively; the other end of the first capacitor C1 and the second capacitor C2 is connected with the other end of the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 respectively; the other end of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 is grounded; the other end of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 is grounded.

[0008] Further, the inductance values of the first inductor L1 and the second inductor L2 are equal; the inductance values of the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are equal; the ratio of the inductance value of the first inductor L1 or the second inductor L2 to the inductance value of the third inductor L3 or the fourth inductor L4 or the fifth inductor L5 is equal to the ratio of the parallel capacitance value of the first parasitic capacitor C p3 , the second parasitic capacitor C p4 to the parallel capacitance value of the third parasitic capacitor C p5 , the fourth parasitic capacitor C p1 and the fifth parasitic capacitor C p2 .

[0009] Further, the first capacitor C1 and the second capacitor C2 are both uF level, and the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are all nF level.

[0010] Further, the parallel capacitance value of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 is equal to the parallel capacitance value of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5The capacitance values of the parallel capacitors are pF or nF level.

[0011] Further, the first inductor L1 and the second inductor L2 are wound on the same toroidal core; the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are wound on the same toroidal core.

[0012] Further, the application further provides an electronic power converter system comprising the passive EMI filter based on impedance balance.

[0013] The passive EMI filter based on impedance balance can effectively suppress common-mode EMI generated during the operation of the DC side and the AC side of the converter, and reduce the volume of the passive EMI filter. BRIEF DESCRIPTION OF DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0015] Figure 1 It is a general power electronic converter schematic diagram;

[0016] Figure 2 It is a schematic diagram of the passive EMI filter of the present application;

[0017] Figure 3 It is a schematic diagram of the power electronic converter after adding the passive EMI filter;

[0018] Figure 4 It is an equivalent circuit diagram of the power electronic converter after adding the passive EMI filter;

[0019] Figure 5 It is an equivalent circuit diagram of impedance balance of the power electronic converter after adding the passive EMI filter. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the following will combine the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0021] The embodiment provides an impedance balance-based passive EMI filter, as shown in the accompanying drawings. Figure 2 The passive EMI filter comprises a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first parasitic capacitor C p1 , a second parasitic capacitor C p2 , a third parasitic capacitor C p3 , a fourth parasitic capacitor C p4 , and a fifth parasitic capacitor C p5 .

[0022] One end of the first inductor L1 is connected to the DC side input end of the transformer and one end of the first parasitic capacitor C p1 , respectively; one end of the second inductor L2 is connected to the DC side input end of the transformer and one end of the second parasitic capacitor C p2 , respectively; the other end of the first inductor L1 is connected to one end of the first capacitor C1, and the other end of the second inductor L2 is connected to one end of the second capacitor C2; one end of the third inductor L3 is connected to the AC side output end of the transformer and one end of the third parasitic capacitor C p3 , respectively; one end of the fourth inductor L4 is connected to the AC side output end of the transformer and one end of the fourth parasitic capacitor C p4 , respectively; one end of the fifth inductor L5 is connected to the AC side output end of the transformer and one end of the fifth parasitic capacitor C p5 , respectively; the other end of the third inductor L3 is connected to one end of the third capacitor C3 and the load, respectively; the other end of the fourth inductor L4 is connected to one end of the fourth capacitor C4 and the load, respectively; the other end of the fifth inductor L5 is connected to one end of the fifth capacitor C5 and the load, respectively; the other ends of the first capacitor C1 and the second capacitor C2 are connected to the other ends of the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5; the other ends of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 are grounded; the other ends of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 are grounded.

[0023] Specifically, in the present application, the passive EMI filter is connected to the DC side and the AC side of the converter respectively, the first inductor L1 and the second inductor L2 are wound on the same toroidal core to form a DC side common mode inductor, and are connected in series with two bus bars of the input end of the DC side of the converter respectively; the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are wound on the same toroidal core to form an AC side common mode inductor, and are connected in series with three lines of the output end of the AC side of the converter respectively; based on the above design, the common mode inductor with a smaller inductance value can simultaneously suppress the common mode current of the DC side and the AC side through impedance balance, so that the volume of the passive EMI filter can be effectively reduced.

[0024] In specific embodiments, the inductance values of the first inductor L1 and the second inductor L2 are equal; the inductance values of the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are equal; the ratio of the inductance value of the first inductor L1 or the second inductor L2 to the inductance value of the third inductor L3 or the fourth inductor L4 or the fifth inductor L5 is equal to the ratio of the parallel capacitance value of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 to the parallel capacitance value of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 .

[0025] In the present scheme, the ratio of the inductance value and the ratio of the capacitance value are equal, which can achieve impedance balance and realize the suppression of common mode EMI of the DC side and the AC side of the converter.

[0026] The inductance values of the first inductor L1 and the second inductor L2 are 400uH, and the inductance values of the third inductor L3 or the fourth inductor L4 or the fifth inductor L5 are 200uH. The parallel capacitance value of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 is 498pF, and the parallel capacitance value of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 is 997pF.

[0027] Figure 3 is a schematic diagram after adding a passive EMI filter in a power electronic converter, LISN represents a test circuit, and the sizes of the elements in the passive EMI filter in the figure are unchanged;

[0028] In specific embodiments, the first capacitor C1 and the second capacitor C2 are both uF level, and the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are all nF level.

[0029] The scheme can make the capacitance between the common mode inductance composed of the first inductor L1 and the second inductor L2 and the common mode inductance composed of the third inductor L3, the fourth inductor L4 and the fifth inductor L5 very small at high frequency, ensure that the ratio of the impedance of the common mode inductance composed of the first inductor L1 and the second inductor L2 to the impedance of the common mode inductance composed of the third inductor L3, the fourth inductor L4 and the fifth inductor L5, and the ratio of the impedance of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 After parallel connection, the impedance of the capacitor and the impedance of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 After parallel connection, the impedance of the capacitor and the impedance of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 are approximately equal, impedance balance is achieved, the potential of the common mode voltage at both ends of the LISN in the common mode loop is ensured to be equal, and the potential of the common mode voltage at both ends of the motor on the alternating current side is also equal, and the common mode EMI suppression effect of the passive filter is ensured.

[0030] The first capacitor C1 and the second capacitor C2 are 4.7uF, and the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are 330nF.

[0031] In specific embodiments, the capacitance of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 in parallel connection and the capacitance of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 in parallel connection are all pF or nF levels.

[0032] The scheme can make the loop impedance composed of the first parasitic capacitor C p1 , the second parasitic capacitor C p2 in parallel connection and the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 in parallel connection very large, ensure that the I LISN of the LISN on the direct current side and the I CM1 of the motor on the alternating current side do not pass through the low-impedance loop composed of the first parasitic capacitor C p1 , the second parasitic capacitor C p2 in parallel connection and the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 in parallel connection, so as to fully suppress the common mode EMI electromagnetic interference of the converter system on the direct current side and the alternating current side.

[0033] In specific embodiments, the first inductor L1 and the second inductor L2 are wound on the same toroidal magnetic core; the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are wound on the same toroidal magnetic core.

[0034] The scheme can form common-mode inductance on the DC side and the AC side of the converter, can inhibit common-mode current to a certain extent, and simultaneously constitutes part of a balance circuit.

[0035] The embodiment also provides an electronic power converter system comprising the impedance balance-based passive EMI filter.

[0036] Figure 1 is a schematic diagram of a power electronic converter, which comprises a DC power supply, a LISN for EMI test and a power electronic converter. In the diagram, there are a first parasitic capacitor C p1 , a second parasitic capacitor C p2 , a third parasitic capacitor C p3 , a fourth parasitic capacitor C p4 and a fifth parasitic capacitor C p5 between the converter and the ground, and the common-mode current in the system is generated by the first parasitic capacitor C p1 , the second parasitic capacitor C p2 , the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 of the converter to the heat sink and the parasitic capacitor of the motor to the ground.

[0037] Figure 4 is an equivalent circuit diagram of the power electronic converter after the passive EMI filter is added, Figure 4 V CM is a common-mode voltage source of the whole system, L CM1 is a common-mode inductance formed by the first inductor L1 and the second inductor L2 wound on the same toroidal magnetic core, L CM2 is a common-mode inductance formed by the third inductor L3, the fourth inductor L4 and the fifth inductor L5 wound on the same toroidal magnetic core, wherein, the inductance value of L CM1 is equal to the inductance value of the first inductor L1 or the second inductor L2, and the inductance value of L CM2 is equal to the inductance value of the third inductor L3 or the fourth inductor L4 or the fifth inductor L5.C B3 is a capacitor in parallel connection of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 , the capacitance value of C B3 is the capacitance value of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 added together, and C B4 is the third parasitic capacitor Cp3 , the fourth parasitic capacitance C p4 and the fifth parasitic capacitance C p5 , the capacitance after parallel connection, C B4 The capacitance value of the third parasitic capacitance C p3 , the fourth parasitic capacitance C p4 and the fifth parasitic capacitance C p5 , the capacitance value after adding, C B1 is the capacitance after parallel connection of the first capacitance C1 and the second capacitance C2, C B2 is the capacitance after parallel connection of the third capacitance C3, the fourth capacitance C4 and the fifth capacitance C5.I LISN is the common-mode current flowing through the LISN, I CM1 is the common-mode current flowing through Z CM , Z CM is the equivalent common-mode impedance of the load, Z LISN is the equivalent common-mode impedance of the parallel LISN. Wherein, the capacitance C B1 , C B2 The impedance is very small at high frequency, and its impedance value can be approximately ignored.

[0038] Figure 5 is the equivalent circuit diagram of impedance balance after adding passive EMI filter in power electronic converter, Z LCM1 is the equivalent common-mode impedance of the common-mode inductor L CM1 , Z LCM2 is the equivalent common-mode impedance of the common-mode inductor L CM2 , Z CB3 is the equivalent common-mode impedance of the parasitic capacitance C B3 , Z CB4 is the equivalent common-mode impedance of the parasitic capacitance C B4 . Wherein, the impedance of the inductor is proportional to its inductance value, and the impedance of the capacitor is inversely proportional to its capacitance value. When the ratio of the common-mode impedance value of Z LCM1 and the common-mode impedance value of Z LCM2 , the ratio of the common-mode impedance value of Z CB3 and the equivalent common-mode impedance value of Z CB4 is equal, which constitutes a balanced circuit, as shown in equation (1),

[0039]

[0040] The ratio of the voltages is also equal, as shown in equation (2),

[0041]

[0042] Z LISN and Z CM The potential of the common-mode voltage between the two ends is equal, at this time, Z LISN and Z CMNo common-mode current flows on the primary side, i.e. I LISN and I CM1 are zero, the common-mode EMI on the DC side and the AC side of the system is fully suppressed.

[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. An impedance-balance-based passive EMI filter connected with a transformer and a load, characterized in that, Comprise: a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a first parasitic capacitance C p1 , a second parasitic capacitance C p2 , a third parasitic capacitance C p3 , a fourth parasitic capacitance C p4 , and a fifth parasitic capacitance C p5 ; One end of the first inductor L1 is connected to the positive bus of the converter DC side input and one end of the first parasitic capacitor C p1 , respectively; one end of the second inductor L2 is connected to the negative bus of the converter DC side input and one end of the second parasitic capacitor C p2 , respectively; the other end of the first inductor L1 is connected to one end of the first capacitor C1, and the other end of the second inductor L2 is connected to one end of the second capacitor C2; one end of the third inductor L3 is connected to the first output of the converter AC side and one end of the third parasitic capacitor C p3 , respectively; one end of the fourth inductor L4 is connected to the second output of the converter AC side and one end of the fourth parasitic capacitor C p4 , respectively; one end of the fifth inductor L5 is connected to the third output of the converter AC side and one end of the fifth parasitic capacitor C p5 , respectively; the other end of the third inductor L3 is connected to one end of the third capacitor C3 and the load, respectively; the other end of the fourth inductor L4 is connected to one end of the fourth capacitor C4 and the load, respectively; the other end of the fifth inductor L5 is connected to one end of the fifth capacitor C5 and the load, respectively; the other ends of the first capacitor C1 and the second capacitor C2 are connected to the other ends of the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5; the other ends of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 are grounded; the other ends of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 are grounded. The inductance values of the first inductor L1 and the second inductor L2 are equal; the inductance values of the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are equal; the ratio of the inductance value of the first inductor L1 or the second inductor L2 to the inductance value of the third inductor L3 or the fourth inductor L4 or the fifth inductor L5 is equal to the ratio of the capacitance value of the first parasitic capacitor C p1 and the second parasitic capacitor C p2 to the capacitance value of the third parasitic capacitor C p3 , the fourth parasitic capacitor C p4 and the fifth parasitic capacitor C p5 after being connected in parallel.

2. The impedance-balance-based passive EMI filter of claim 1, wherein, The first capacitor C1 and the second capacitor C2 are both uF level, and the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are all nF level.

3. The impedance balance based passive EMI filter of claim 1, wherein, said first parasitic capacitance C p1 said second parasitic capacitance C p2 said third parasitic capacitance C p3 said fourth parasitic capacitance C p4 said fifth parasitic capacitance C p5 are in the order of pF or nF.

4. The impedance-balance-based passive EMI filter of claim 1, wherein, The first inductor L1 and the second inductor L2 are wound on the same annular magnetic core; the third inductor L3, the fourth inductor L4 and the fifth inductor L5 are wound on the same annular magnetic core.

5. An electronic power converter system comprising an impedance balance based passive EMI filter according to any of claims 1-4.

Citation Information

Patent Citations

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