Neural network execution method and related device

Abstract

The present application provides a method for executing a neural network and a related device, which are applied to an artificial intelligence chip. The artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with multiple physical semaphores, and supports multiple corresponding conditional waiting tasks corresponding to one conditional signal task. It can support multiple corresponding conditional waiting tasks corresponding to one conditional signal task. First, in the process of applying for resources of the neural network, the logical semaphore is allocated, and the logical semaphore includes a preset conditional signal task and a preset conditional waiting task; then, in the process of constructing, instantiating and executing the neural network, the neural network is executed with a first execution flow and a second execution flow. While ensuring the correct execution of the neural network, there is no need to manually manage a large number of physical semaphores, which greatly reduces the difficulty of user programming and improves the user's programming experience.

Description

Technical Field

[0001] The present application relates to the technical field of electronic digital data processing, and in particular to a method for executing a neural network and a related device. Background Art

[0002] Artificial Intelligence (AI) chips generally use parallel architecture design to achieve high performance. When a neural network is executed on an AI chip, it will expand multiple execution flows based on the interdependencies between its node tasks. Dependent nodes are executed sequentially, and independent nodes are allowed to execute in parallel as much as possible to obtain better performance.

[0003] Currently, when expanding the execution flow, multiple semaphores need to be applied for in order to ensure the execution order. In actual applications, since a neural network may have thousands of node tasks, users need to manually manage the semaphores so that they do not affect each other, which results in low programming efficiency and poor user programming experience. Summary of the invention

[0004] In view of this, the present application provides a neural network execution method and related devices, which set up the concept of logical semaphores. While ensuring the correct execution of the neural network, there is no need to manually manage a large number of physical semaphores, which greatly reduces the difficulty of user programming and improves the user's programming experience.

[0005] In a first aspect, an embodiment of the present application provides a method for executing a neural network, which is applied to an artificial intelligence chip, wherein the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with multiple physical semaphores, and supports multiple corresponding conditional waiting tasks corresponding to one conditional signal task, and the method includes:

[0006] In the process of applying for resources of a neural network, the logical semaphore is allocated, the neural network includes a first node task, a second node task, a third node task and a fourth node task, the second node task and the third node task are dependent on the first node task, the fourth node task is dependent on the second node task and the third node task, the second node task and the third node task are independent of each other, and the logical semaphore includes a preset condition signal task and a preset condition waiting task;

[0007] In the process of constructing, instantiating and executing the neural network, the neural network is executed with a first execution flow and a second execution flow, the first execution flow sequentially including the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task, and the second execution flow sequentially including the preset condition waiting task, the third node task and the preset condition signal task;

[0008] In the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

[0009] In a second aspect, an embodiment of the present application provides an execution device of a neural network, which is applied to an artificial intelligence chip, wherein the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with a plurality of physical semaphores, and supports a plurality of corresponding conditional waiting tasks corresponding to a conditional signal task, wherein the device comprises:

[0010] an allocation unit, configured to allocate the logic semaphore in the process of applying for resources of a neural network, wherein the neural network includes a first node task, a second node task, a third node task and a fourth node task, wherein the second node task and the third node task depend on the first node task, the fourth node task depends on the second node task and the third node task, the second node task and the third node task are independent of each other, and the logic semaphore includes a preset condition signal task and a preset condition waiting task;

[0011] An execution unit is used to execute the neural network with a first execution flow and a second execution flow during the process of constructing, instantiating and executing the neural network, wherein the first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence; in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

[0012] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing the steps of any method in the first aspect of the embodiment of the present application.

[0013] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps described in any method of the first aspect of the embodiment of the present application.

[0014] In a fifth aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in any method of the first aspect of the embodiment of the present application. The computer program product may be a software installation package.

[0015] It can be seen that the execution method and related devices of the above-mentioned neural network are applied to an artificial intelligence chip. The artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with multiple physical semaphores, and supports multiple corresponding conditional waiting tasks corresponding to one conditional signal task. First, in the process of applying for the resources of the neural network, the logical semaphore is allocated. The neural network includes a first node task, a second node task, a third node task and a fourth node task. The second node task and the third node task depend on the first node task, and the fourth node task depends on the second node task and the third node task. The second node task and the third node task are independent of each other. The logical semaphore includes a preset conditional signal task and a preset conditional waiting task; then, when constructing the neural network , instantiation and execution process, the neural network is executed with the first execution flow and the second execution flow, the first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence; in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore. While ensuring the correct execution of the neural network, there is no need to manually manage a large number of physical semaphores, which greatly reduces the difficulty of user programming and improves the user's programming experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0017] Figure 1 A schematic diagram of the structure of a neural network provided in an embodiment of the present application;

[0018] Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0019] Figure 3 A flowchart of a method for executing a neural network provided in an embodiment of the present application;

[0020] Figure 4 A block diagram of the functional units of a neural network execution device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0023] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship. The "plurality" appearing in the embodiments of the present application refers to two or more.

[0024] In the embodiments of the present application, "at least one item" or similar expressions refer to any combination of these items, including any combination of single items or plural items, and refer to one or more, and multiple refers to two or more. For example, at least one item of a, b, or c can represent the following seven situations: a, b, c, a and b, a and c, b and c, a, b, and c. Among them, each of a, b, and c can be an element or a set containing one or more elements.

[0025] The "connection" that appears in the embodiments of the present application refers to various connection methods such as direct connection or indirect connection to achieve communication between devices, and the embodiments of the present application do not impose any limitations on this.

[0026] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0027] The following is an explanation of the relevant contents, concepts, meanings, technical issues, technical solutions, beneficial effects, etc. involved in the embodiments of the present application.

[0028] At present, when a neural network is executed on an AI chip, multiple execution flows will be launched according to the interdependencies between its node tasks. Nodes with dependencies will be executed sequentially, and independent nodes will be executed in parallel as much as possible to obtain better performance. Now, the semaphore mechanism is generally used for synchronization. For example, if task A needs to wait for task B to complete before execution, a conditional waiting task can be inserted before task A, and a conditional signal task can be inserted after task B. The conditional waiting task needs to be executed after the conditional signal task is executed. Therefore, by inserting a semaphore, task A can be executed after task B is executed. However, for complex neural networks, since complex neural networks may include thousands of nodes, each insertion of a semaphore requires the management of the semaphore number. For example, the fifth semaphore should be executed after the fourth semaphore is executed. This will apply for a lot of semaphores. When programming, users also need to manually record the number of each numbered quantity. This management of semaphores is very troublesome. In actual applications, there is also a situation where the same neural network is instantiated into multiple neural network instances. If the neural network instances need to be executed in parallel, the same semaphores in each neural network instance cannot affect each other, which will make the management of semaphores more troublesome, the user's programming efficiency is not high, and the user's programming experience is poor.

[0029] To solve the above problems, the embodiments of the present application provide a method for executing a neural network and related devices, and set up the concept of logical semaphores. While ensuring the correct execution of the neural network, there is no need to manually manage a large number of physical semaphores, which greatly reduces the user's programming difficulty and improves the user's programming experience.

[0030] Combine the following Figure 1 The structure of a neural network provided in an embodiment of the present application is described. Figure 1 A schematic diagram of the structure of a neural network provided for an embodiment of the present application, the neural network includes an A node task, a B node task, a C node task and a D node task, the B node task and the C node task depend on the A node task, the D node task depends on the B node task and the C node task, the B node task and the C node task are independent of each other, it can be seen that the neural network has two parallel execution flows, that is, after the A node task is executed, the execution of the B node task and the C node task can be executed in parallel as much as possible, if it is expanded according to the current scheme, then it can be expanded into two execution flows as follows:

[0031] Execution flow 1: A node task—conditional signal task 1—B node task—conditional waiting task 2—D node task;

[0032] Execution flow 2: Conditional waiting task 1—C node task—Conditional signal task 2.

[0033] The complete neural network execution steps are as follows:

[0034] A node task—conditional signal task 1—B node task—conditional waiting task 1—C node task—conditional signal task 2—conditional waiting task 2—D node task.

[0035] Among them, conditional signal task 1 and conditional waiting task 1 constitute semaphore 1, and conditional signal task 2 and conditional waiting task 2 constitute semaphore 2. It can be seen that for this basic neural network structure, semaphore 1 and semaphore 2 need to be applied for and managed. When the neural network structure is complex, the programming and management of semaphores 1 to N will become very complicated.

[0036] The solution of the present application solves the above problem by setting logical semaphores. Each logical semaphore can be associated with multiple physical semaphores. The logical semaphores include preset condition signal tasks and preset condition waiting tasks. The execution flow of this solution is as follows:

[0037] Execution flow 1: A node task - preset condition signal task - B node task - preset condition waiting task - D node task;

[0038] Execution flow 2: Preset condition waiting task—C node task—preset condition signal task.

[0039] The complete neural network execution steps are as follows:

[0040] A node task—preset condition signal task—B node task—preset condition waiting task—C node task—preset condition signal task—preset condition waiting task—D node task.

[0041] Among them, the preset condition signal task in execution flow 1 is associated with the condition signal task 1 in physical semaphore 1, the preset condition waiting task in execution flow 1 is associated with the condition waiting task 2 in physical semaphore 2, the preset condition waiting task in execution flow 2 is associated with the condition waiting task 1 in physical semaphore 1, and the preset condition signal task in execution flow 2 is associated with the condition signal task 2 in physical semaphore 2. For specific association methods, please refer to the subsequent description.

[0042] It should be noted that the structure of the above neural network is the minimum neural network structure with two parallel execution flows. The present application can be applied to a larger neural network structure or to more parallel execution flows, and the logic is the same. In some cases, a logical semaphore can be used to automatically associate different physical semaphores, eliminating the need to manually manage physical semaphores, which greatly reduces the user's programming difficulty and improves the user's programming experience.

[0043] Combine the following Figure 2 The electronic device in the embodiment of the present application is described. Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the electronic device includes one or more processors 210, a memory 220, a communication module 230 and one or more programs 221. The processor 210 is communicatively connected with the memory 220 and the communication module 230 via an internal communication bus.

[0044] The one or more programs 221 are stored in the memory 220 and configured to be executed by the processor 210. The one or more programs 221 include instructions for executing any step in the method embodiment.

[0045] Among them, the processor 210 can be, for example, a central processing unit (CPU), a general processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic blocks, units and circuits described in conjunction with the disclosure of this application. The processor 210 can also be a combination that implements a computing function, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication unit can be a communication module 230, a transceiver, a transceiver circuit, etc., and the storage unit can be a memory 220.

[0046] The memory 220 may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memories. Among them, the nonvolatile memory may be a read-only memory (ROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus random access memory (DR RAM).

[0047] It is understandable that the electronic device 200 may include more or fewer structural elements than those in the above structural block diagram, for example, a power module, physical buttons, a Wi-Fi module, a speaker, a Bluetooth module, a sensor, a display module, etc., which are not limited here.

[0048] After understanding the software and hardware architecture of the embodiment of the present application, Figure 3 A method for executing a neural network in an embodiment of the present application is described. Figure 3 A flowchart of a neural network execution method provided in an embodiment of the present application is applied to an artificial intelligence chip, wherein the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with multiple physical semaphores, and supports multiple corresponding conditional waiting tasks corresponding to one conditional signal task, specifically including the following steps:

[0049] Step 301, in the process of applying for neural network resources, logical semaphores are allocated.

[0050] Among them, the neural network includes a first node task, a second node task, a third node task and a fourth node task, the second node task and the third node task depend on the first node task, the fourth node task depends on the second node task and the third node task, the second node task and the third node task are independent of each other, the logical semaphore includes a preset condition signal task and a preset condition waiting task, the preset condition signal task can correspond to the condition signal task of multiple physical semaphores, and the preset condition waiting task can correspond to the condition waiting task of multiple physical semaphores.

[0051] Specifically, for the same logical semaphore, it can support the execution of multiple preset condition signal tasks, and each time the preset condition signal task is executed, a new physical semaphore will be allocated to be associated with the logical semaphore. For example, for a logical semaphore, if the preset condition signal task is executed N times, there are N physical semaphores associated with the logical semaphore, where N is a natural number.

[0052] Specifically, if a neural network is instantiated multiple times, it can support assigning different physical semaphores to each instantiated logical semaphore. For example, if a neural network is instantiated M times, and the logical semaphore in this neural network performs N preset conditional signal tasks, then there are M*N physical semaphores associated with the logical semaphore, where M is a natural number.

[0053] It should be noted that during the instantiation process, a physical semaphore may be allocated to a logical semaphore, and the allocated physical semaphore may be associated with the logical semaphore.

[0054] It can be seen that by allocating logical semaphores, there is no need to manually manage a large number of physical semaphores, which greatly improves the user's programming efficiency and programming experience.

[0055] Step 302: During the process of constructing, instantiating and executing the neural network, the neural network is executed using a first execution flow and a second execution flow.

[0056] The first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence;

[0057] Among them, in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

[0058] Wherein, when processing the preset condition waiting task, the processing is performed according to the state of the physical semaphore to which the logical semaphore is last associated. The preset condition waiting task is executed after the most recent preset condition signal task is executed.

[0059] Specifically, the logical semaphore corresponds to a physical semaphore data list of each neural network instantiation, and each physical semaphore data list includes the number of times the preset conditional signal task is executed by the logical semaphore during the corresponding instantiation process, the neural network instance identifier and a list of physical semaphores, and the list of physical semaphores includes the physical semaphore identifier of each physical semaphore and the physical semaphore state of each physical semaphore.

[0060] For example, pseudo code 1 is used as an example for explanation.

[0061] / / Pseudocode 1

[0062]

[0063] Pseudocode 1 defines logical semaphores and physical semaphores, that is, cond_s is the encapsulation of logical semaphores, condID is used to identify this logical semaphore, and each logical semaphore has a phys_cond_res list to store the information of the physical semaphores associated with it. phys_cond_res_s is a collection of physical semaphores of a neural network instantiation associated with the logical semaphore, instantiate_id is used to identify the information of the neural network instance, nr_of_phys_cond records the number of times the preset condition signal task (cond_signal) is executed by the logical semaphore in this instantiation, and phys_cond_list is the list of corresponding physical semaphores. phys_cond_s is the encapsulation of the physical semaphore, phys_cond_id is used to identify this physical semaphore, and status is its status.

[0064] In a possible embodiment, in the process of instantiating the neural network into multiple neural network instances and when the multiple neural network instances are executed in parallel, different physical semaphores are allocated to each neural network instance, and the different physical semaphores in each neural network instance are associated with the logical semaphore.

[0065] In a possible embodiment, when the neural network is instantiated into multiple neural network instances and the multiple neural network instances are executed serially, a clear node task is inserted at the end of each neural network instance, and each clear node task is used to clear the states of all used physical semaphores. This will not affect the use of subsequent neural network instances and can save the system's physical semaphore resources.

[0066] It can be seen that through the above-mentioned neural network execution method, only a limited number of logical semaphores need to be applied. When constructing the neural network, only the order of preset conditional signal tasks and preset conditional waiting tasks needs to be paid attention to, which can greatly optimize the availability of the system.

[0067] The optimization of this application from a programming perspective is explained below using pseudo code 2.

[0068] Pseudocode 2

[0069] Alloc cond

[0070] Graph

[0071] {

[0072] stream1(A)

[0073] stream1(signal_cond)

[0074] stream2(wait_cond)

[0075] stream2(C)

[0076] stream2(signal_cond)

[0077] stream1(B)

[0078] stream1(wait_cond)

[0079] stream1(D)

[0080] }

[0081] The first step is to allocate the logical semaphore cond, which is still Figure 1 The neural network and execution flow are described in the figure. A represents the first node task, B represents the second node task, C represents the third node task, and D represents the fourth node task. stream1 is execution stream 1, stream2 is execution stream 2, signal_cond represents the preset condition signal task, and wait_cond represents the preset condition wait task.

[0082] It can be seen that when writing code, there is no need to manually number and manage semaphores. However, according to the traditional programming method, it is still necessary to manually fill in the current semaphore number. For example, stream1(signal_cond) should be written as stream1(signal_cond1), and stream2(wait_cond) should be written as stream2(wait_cond1). This manual management and programming method is inefficient and has a poor user experience.

[0083] Since each preset condition waiting task only needs to be executed after the previous preset condition signal task is executed, and no longer needs to be numbered, the system will automatically associate the condition signal tasks corresponding to different physical quantities with the preset condition signal tasks in different positions, and the system will also automatically associate the condition waiting tasks corresponding to different physical quantities with the preset condition waiting tasks in different positions. When programming, users only need to fill in the preset condition signal tasks or preset condition waiting tasks in sequence, which greatly improves the user's programming efficiency and programming experience.

[0084] For the case of instantiating a neural network into multiple neural network instances, the optimization of this application is explained using pseudo code 3.

[0085] Pseudocode 3

[0086] Graph1

[0087] {

[0088] stream1(A)

[0089] stream1(signal_cond)

[0090] stream2(wait_cond)

[0091] stream2(C)

[0092] stream2(signal_cond)

[0093] stream1(B)

[0094] stream1(wait_cond)

[0095] stream1(D)

[0096] }

[0097] instatiate(Graph1)-->GraphIns1

[0098] instatiate(Graph1)-->GraphIns2

[0099] It can be seen that GraphIns1 represents the first neural network instance, and GraphIns2 represents the second neural network instance. If the two neural network instances are executed in parallel, different physical semaphores can be assigned to the two neural network instances to ensure their parallel execution and the physical semaphores will not be confused. If the two neural network instances are executed serially, a node can be inserted at the end of each neural network instance to clear the status of all physical semaphores used in the neural network, which will not affect the use of subsequent neural network instances and save the system's physical semaphore resources.

[0100] It can be seen that through the above-mentioned neural network execution method, the concept of logical semaphores is set, which can ensure the correct execution of the neural network without the need to manually manage a large number of physical semaphores, greatly reducing the difficulty of user programming and improving the user's programming experience.

[0101] The above mainly introduces the scheme of the embodiment of the present application from the perspective of the execution process on the method side. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0102] The embodiment of the present application can divide the electronic device into functional units according to the above method example. For example, each functional unit can be divided according to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0103] In the case of dividing each functional module into corresponding functional modules, Figure 4 A functional unit composition block diagram of a neural network execution device 400 provided in an embodiment of the present application is applied to an artificial intelligence chip, wherein the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with a plurality of physical semaphores, and supports a plurality of corresponding conditional waiting tasks corresponding to a conditional signal task, wherein the device comprises:

[0104] The allocating unit 410 is used to allocate the logical semaphore in the process of applying for resources of the neural network, the neural network includes a first node task, a second node task, a third node task and a fourth node task, the second node task and the third node task depend on the first node task, the fourth node task depends on the second node task and the third node task, the second node task and the third node task are independent of each other, and the logical semaphore includes a preset condition signal task and a preset condition waiting task;

[0105] The execution unit 420 is used to execute the neural network with a first execution flow and a second execution flow during the process of constructing, instantiating and executing the neural network, wherein the first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence; in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

[0106] It can be seen that the execution method and related devices of the above-mentioned neural network are applied to an artificial intelligence chip. The artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with multiple physical semaphores, and supports multiple corresponding conditional waiting tasks corresponding to one conditional signal task. First, in the process of applying for the resources of the neural network, the logical semaphore is allocated. The neural network includes a first node task, a second node task, a third node task and a fourth node task. The second node task and the third node task depend on the first node task, and the fourth node task depends on the second node task and the third node task. The second node task and the third node task are independent of each other. The logical semaphore includes a preset conditional signal task and a preset conditional waiting task; then, when constructing the neural network , instantiation and execution process, the neural network is executed with the first execution flow and the second execution flow, the first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence; in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore. While ensuring the correct execution of the neural network, there is no need to manually manage a large number of physical semaphores, which greatly reduces the difficulty of user programming and improves the user's programming experience.

[0107] It should be noted that the specific implementation of each operation can adopt the corresponding description of the method embodiment shown above, and the execution device 400 of the neural network can be used to execute the above method embodiment of the present application, which will not be described in detail.

[0108] An embodiment of the present application also provides a chip, including a processor, a memory, and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.

[0109] An embodiment of the present application also provides a chip module, including a transceiver component and a chip, the chip including a processor, a memory and a computer program or instructions stored in the memory, wherein the processor executes the computer program or instructions to implement the steps described in the above method embodiment.

[0110] An embodiment of the present application also provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps of any method recorded in the above method embodiment, and the above computer includes an electronic device.

[0111] The embodiment of the present application also provides a computer program product, the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program is operable to cause a computer to execute some or all of the steps of any method described in the method embodiment. The computer program product may be a software installation package, and the computer includes an electronic device.

[0112] It should be noted that, for the above-mentioned various embodiments, for the sake of simple description, they are all expressed as a series of action combinations. Those skilled in the art should be aware that the present application is not limited by the described order of actions, because some steps in the embodiments of the present application can be performed in other orders or simultaneously. In addition, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions, steps, modules or units involved are not necessarily required by the embodiments of the present application.

[0113] In the above embodiments, the embodiments of the present application have different focuses on the description of each embodiment. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0114] The steps of the method or algorithm described in the embodiments of the present application can be implemented in hardware or by executing software instructions by a processor. The software instructions can be composed of corresponding software modules, and the software modules can be stored in RAM, flash memory, ROM, EPROM, electrically erasable programmable read-only memory (electrically EPROM, EEPROM), registers, hard disks, mobile hard disks, read-only compact disks (CD-ROMs) or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC. In addition, the ASIC can be located in a terminal device or a management device. Of course, the processor and the storage medium can also be present in a terminal device or a management device as discrete components.

[0115] Those skilled in the art should be aware that in one or more of the above examples, the functions described in the embodiments of the present application can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiments of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer neural network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrations. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium (eg, a solid state disk (SSD)).

[0116] The modules / units included in the devices and products described in the above embodiments may be software modules / units or hardware modules / units, or may be partially software modules / units and partially hardware modules / units. For example, for the devices and products applied to or integrated in the chip, the modules / units included therein may all be implemented in the form of hardware such as circuits, or at least some of the modules / units may be implemented in the form of software programs, which run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits; for the devices and products applied to or integrated in the chip module, the modules / units included therein may all be implemented in the form of hardware such as circuits, and different modules / units may be located in the same component (such as a chip, circuit module, etc.) or in different components of the chip module, or at least some of the modules / units may be implemented in the form of software programs. The software programs run on the processor integrated inside the chip, and the remaining (if any) modules / units may be implemented in the form of hardware such as circuits. It is implemented in the form of a software program, which runs on a processor integrated inside the chip module, and the remaining (if any) modules / units can be implemented in hardware such as circuits; for various devices and products applied to or integrated in the terminal equipment, the various modules / units contained therein can be implemented in hardware such as circuits, and different modules / units can be located in the same component (for example, chip, circuit module, etc.) or in different components in the terminal equipment, or, at least some modules / units can be implemented in the form of a software program, which runs on a processor integrated inside the terminal equipment, and the remaining (if any) modules / units can be implemented in hardware such as circuits.

[0117] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of the embodiments of the present application. It should be understood that the above description is only the specific implementation method of the embodiments of the present application and is not intended to limit the protection scope of the embodiments of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.

Claims

1. A method for executing a neural network, characterized in that: Applied to an artificial intelligence chip, the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with a plurality of physical semaphores, the logical semaphore corresponds to a physical semaphore data list of each neural network instantiation, each physical semaphore data list includes the number of preset conditional signal tasks executed by the logical semaphore in the corresponding instantiation process, a neural network instance identifier and a list of physical semaphores, the list of physical semaphores includes a physical semaphore identifier of each physical semaphore and a physical semaphore state of each physical semaphore, the plurality of physical semaphores include a first physical semaphore and a second physical semaphore, and supports a plurality of corresponding conditional waiting tasks corresponding to one conditional signal task, the method comprising: In the process of applying for the resources of the neural network, the logical semaphore is allocated, the neural network includes a first node task, a second node task, a third node task and a fourth node task, the second node task and the third node task depend on the first node task, the fourth node task depends on the second node task and the third node task, the second node task and the third node task are independent of each other, the logical semaphore includes a preset condition signal task and a preset condition waiting task, the preset condition waiting task is executed after the execution of the most recent preset condition signal task; In the process of constructing, instantiating and executing the neural network, the neural network is executed with a first execution flow and a second execution flow, the first execution flow sequentially including the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task, and the second execution flow sequentially including the preset condition waiting task, the third node task and the preset condition signal task; In the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

2. The method according to claim 1, characterized in that The method further comprises: In the process of instantiating the neural network into multiple neural network instances and when the multiple neural network instances are executed in parallel, different physical semaphores are allocated to each neural network instance, and the different physical semaphores in each neural network instance are associated with the logical semaphore.

3. The method according to claim 1, characterized in that The method further comprises: In the process of instantiating the neural network into multiple neural network instances and the multiple neural network instances are executed serially, a clear node task is inserted at the end of each neural network instance, and each clear node task is used to clear the states of all used physical semaphores.

4. The method according to claim 1, characterized in that: The method further comprises: Each time the preset condition signal task is executed, a new physical semaphore is applied for and associated with the logical semaphore.

5. The method according to claim 4, characterized in that The method further comprises: When processing the preset condition waiting task, the processing is performed according to the state of the physical semaphore to which the logical semaphore was last associated.

6. A neural network execution device, characterized in that: Applied to an artificial intelligence chip, the artificial intelligence chip is configured with a logical semaphore, each logical semaphore is associated with a plurality of physical semaphores, the logical semaphore corresponds to a physical semaphore data list of each neural network instantiation, each physical semaphore data list includes the number of preset conditional signal tasks executed by the logical semaphore in the corresponding instantiation process, a neural network instance identifier and a list of physical semaphores, the list of physical semaphores includes a physical semaphore identifier of each physical semaphore and a physical semaphore state of each physical semaphore, the plurality of physical semaphores include a first physical semaphore and a second physical semaphore, and supports a plurality of corresponding conditional waiting tasks corresponding to one conditional signal task, the device includes: an allocating unit, configured to allocate the logic semaphore in the process of applying for resources of a neural network, the neural network comprising a first node task, a second node task, a third node task and a fourth node task, the second node task and the third node task being dependent on the first node task, the fourth node task being dependent on the second node task and the third node task, the second node task and the third node task being independent of each other, the logic semaphore comprising a preset condition signal task and a preset condition waiting task, the preset condition waiting task being executed after the execution of the most recent preset condition signal task; An execution unit is used to execute the neural network with a first execution flow and a second execution flow during the process of constructing, instantiating and executing the neural network, wherein the first execution flow includes the first node task, the preset condition signal task, the second node task, the preset condition waiting task and the fourth node task in sequence, and the second execution flow includes the preset condition waiting task, the third node task and the preset condition signal task in sequence; in the first execution flow, the preset condition signal task is associated with the first condition signal task of the first physical semaphore, and the preset condition waiting task is associated with the second condition waiting task of the second physical semaphore; in the second execution flow, the preset condition signal task is associated with the second condition signal task of the second physical semaphore, and the preset condition waiting task is associated with the first condition waiting task of the first physical semaphore.

7. An electronic device, characterized in that: include: a processor, a memory, and one or more programs; The one or more programs are stored in the memory and configured to be executed by the processor, the programs comprising instructions for executing the steps in the method according to any one of claims 1 to 5.

8. A computer storage medium, characterized in that The computer storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 5.

Images