DMA access method for cross-bus domain device to host space and related equipment

By using the connection bridge and IOMMU for DMA window forwarding and address mapping between the device lender and the device borrower, the problem of cross-bus domain DMA access cannot be achieved in the prior art, and the device-to-host across the bus domain is realized DMA access to the space.

CN118445231BActive Publication Date: 2025-02-18SHENZHEN CONFIDENTIAL COMPUTING TECH CO LTD
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Patent Information

Application Number
CN202410549434.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-05-06
Publication Date
2025-02-18
Estimated Expiration
2044-05-06

AI Technical Summary

Technical Problem

The prior art cannot realize DMA access to the host space of devices across the bus domain, resulting in device virtualization methods and DMA application scenarios being limited to a single bus domain.

Method used

Through the connection bridge, a DMA window is established between the device lender and the device borrower, a DMA access request from the virtual device to the device borrower is forwarded, and an address mapping is set in the IOMMU to perform DMA address translation to realize DMA access across the bus domain .

Benefits of technology

DMA access to the host space of devices across bus domains is realized, the scenario of device virtual methods and DMA applications is expanded, and the problem of being limited to a single bus domain in the prior art is solved.

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Abstract

The present invention discloses a method and related equipment for DMA access of a device across bus domains to a host space, and relates to the field of device virtualization technology. The present invention connects the bus domains of a device lender and a device borrower through a connection bridge, and an address space is maintained as a first DMA window by the end device corresponding to the connection bridge in the device lender, and an address space is maintained as a second DMA window by the connection bridge driver of the device borrower, and the DMA access request of the virtual device to the device borrower is forwarded through these two DMA windows. Address mapping is set in the IOMMU of the device borrower, and the DMA access request transmitted by the connection bridge is converted through the IOMMU, so that the DMA access request after the address conversion can point to the physical memory address of the DMA cache, thereby realizing DMA access of the device across bus domains to the host space.
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Description

Technical Field

[0001] The present invention relates to the field of device virtualization technology, and in particular to a method for DMA access of a cross-bus domain device to a host space and related devices. Background Art

[0002] Device virtualization of the high-speed serial computer expansion bus standard (PCI-Express, PCIe) is usually the process of simulating and managing physical PCIe devices in a virtual machine environment under a PCIe bus domain. Virtualized PCIe devices allow virtual machines to access and use these devices. DMA (Direct Memory Aaccess) direct memory access technology is a method of directly copying data from one address space to another address space without CPU intervention, providing a high-speed data transmission method between peripherals and memory or between memory and memory. The application scenarios of device virtualization methods and DMA in the prior art are limited to a single PCIe bus domain / single system, and it is impossible to implement DMA access of devices across bus domains to the host space.

[0003] Therefore, the existing technology still needs to be improved and developed. Summary of the invention

[0004] The technical problem to be solved by the present invention is that, in view of the above-mentioned defects of the prior art, a method and related equipment for DMA access of devices across bus domains to the host space are provided, aiming to solve the problem that the application scenarios of the device virtualization method and DMA in the prior art are limited to a single bus domain, and DMA access of devices across bus domains to the host space cannot be realized.

[0005] The technical solution adopted by the present invention to solve the problem is as follows:

[0006] In a first aspect, an embodiment of the present invention provides a method for a cross-bus domain device to access a host space DMA, the method comprising:

[0007] The connection bridge obtains a DMA access request from the virtualized device in the device lender to the device borrower through a first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively;

[0008] Converting the DMA address of the DMA access request into an address of a second DMA window, and sending the DMA access request of the second DMA window through the connection bridge to the end device in the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower;

[0009] The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0010] In one implementation, the IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window, including:

[0011] The IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, and obtains the target physical memory address;

[0012] The request address is converted according to the target physical memory address.

[0013] In one implementation, the IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, including:

[0014] The IOMMU determines the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache.

[0015] In one embodiment, the method further comprises:

[0016] The virtual device driver of the device borrower calls a DMA API to create the DMA buffer and obtains the physical memory address of the DMA buffer;

[0017] Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver;

[0018] And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

[0019] In a second aspect, an embodiment of the present invention further provides a system for a cross-bus domain device to access a host space DMA, the system comprising:

[0020] The device lender includes a virtualized device; the virtualized device is used to generate and send a DMA access request according to the address of the first DMA window;

[0021] The connection bridge includes the first DMA window and the second DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender, and is used to obtain the DMA access request of the virtual device to the device borrower, convert the DMA address of the DMA access request into the address of the second DMA window, and send the converted DMA access request to the second DMA window; the second DMA window is an address space maintained by the connection bridge driver of the device borrower; the DMA access request of the second DMA window is issued by the end device in the device borrower through the connection bridge;

[0022] The device borrower includes a virtual device and an IOMMU corresponding to the virtual device; the IOMMU is used to perform address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0023] In one embodiment, the IOMMU includes:

[0024] an addressing unit, configured to determine a physical memory address of a corresponding DMA cache according to a request address of a DMA access request of the second DMA window, and obtain a target physical memory address;

[0025] A conversion unit is used to perform address conversion on the request address according to the target physical memory address.

[0026] In one implementation, the addressing unit comprises:

[0027] A mapping unit is used to determine the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache.

[0028] In one embodiment, the equipment borrower further includes:

[0029] A virtual device driver, used for calling a DMA API to create the DMA buffer and obtain a physical memory address of the DMA buffer;

[0030] Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver;

[0031] And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

[0032] In a third aspect, an embodiment of the present invention further provides a terminal comprising a memory and one or more processors; the memory stores one or more programs; the program comprises instructions for executing a method for accessing the host space DMA by a device across bus domains as described above; and the processor is used to execute the program.

[0033] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium on which a plurality of instructions are stored, wherein the instructions are suitable for being loaded and executed by a processor to implement any of the steps of the above-mentioned method of cross-bus domain device accessing host space DMA.

[0034] Beneficial effects of the present invention: The embodiment of the present invention connects the bus domains of the device lender and the device borrower through a connection bridge, and the end device corresponding to the connection bridge in the device lender maintains an address space as the first DMA window, and the connection bridge driver of the device borrower maintains an address space as the second DMA window, and the DMA access request of the virtual device to the device borrower is forwarded through these two DMA windows. And set address mapping in the IOMMU of the device borrower, and perform address conversion on the DMA access request transmitted by the connection bridge through the IOMMU, so that the DMA access request after address conversion can point to the physical memory address of the DMA cache, thereby realizing DMA access of the cross-bus domain device to the host space. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 It is a flowchart of a method for a cross-bus domain device to access a host space DMA provided by an embodiment of the present invention.

[0037] Figure 2 It is a module diagram of a system for DMA access from a device across bus domains to a host space provided by an embodiment of the present invention.

[0038] Figure 3 It is a principle block diagram of a terminal provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The present invention discloses a method and related devices for DMA access of a device across bus domains to a host space. In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0040] It will be understood by those skilled in the art that, unless expressly stated, the singular forms "one", "said", and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, the "connection" or "coupling" used herein may include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0041] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as herein.

[0042] In view of the above-mentioned defects of the prior art, the present invention provides a method for DMA access of a device to a host machine space across bus domains, the method comprising: a connection bridge obtains a DMA access request of a virtualized device in a device lender to a device borrower through a first DMA window; the first DMA window is an address space maintained by an end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively; the DMA address of the DMA access request is converted into an address of a second DMA window, and the DMA access request of the second DMA window is issued through the end device of the connection bridge in the device borrower, wherein the second DMA window is an address space maintained by a connection bridge driver of the device borrower; the IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request. The present invention connects the bus domains of the device lender and the device borrower through a connection bridge, and the end device corresponding to the connection bridge in the device lender maintains an address space as the first DMA window, and the connection bridge driver of the device borrower maintains an address space as the second DMA window, and the DMA access request of the virtual device to the device borrower is forwarded through these two DMA windows. Address mapping is set in the IOMMU of the device borrower, and the DMA access request transmitted by the connection bridge is converted through the IOMMU, so that the DMA access request after the address conversion can point to the physical memory address of the DMA cache, thereby realizing the DMA access of the cross-bus domain device to the host space.

[0043] For example, the device lender is the host machine H1, including the virtualized device A; the device borrower is the host machine H2, including the virtual device a and IOMMU virtualized based on A, wherein the IOMMU is provided with a mapping of the address of DMA window 1 to the physical memory address; the connection bridge includes two end devices EP0 and EP1, EP1 is provided on the bus of H1, and EP0 is provided on the bus of H2. DMA window 0 is provided on EP1, and the connection bridge driver in H2 maintains an address space as DMA window 1. When the virtualized device A starts a DMA operation on the host machine H2, the corresponding DMA access request will be first sent to DMA window 0, and then forwarded by DMA window 0 to DMA window 1 located in the bus domain of the host machine H2. The IOMMU of the host machine H2 will perform address conversion on the received DMA access request to point it to the physical memory address of the DMA cache.

[0044] like Figure 1 As shown, the method includes:

[0045] Step S100, the connection bridge obtains a DMA access request from the virtualized device in the device lender to the device borrower through a first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively.

[0046] Specifically, the device lender and device borrower in this embodiment represent different host machines respectively. The former contains a physical device to be virtualized, namely, a virtualized device, and the latter constructs a corresponding virtual device according to the virtualized device through virtualization technology. Since different host machines have their own bus domains, in order to achieve data access across bus domains, this embodiment will build a connection bridge to translate and forward the access requests of both parties. The connection bridge has an end device in each of the two bus domains for receiving and sending data from the respective bus domains. In order to achieve DMA access across bus domains, this embodiment also sets a DMA window on the end device, and the DMA window of the end device located in the device lender is the first DMA window. When the virtualized device in the device lender starts a DMA operation, the corresponding DMA access request will first be sent to the first DMA window for processing.

[0047] For example, the end device EP1 of the connection bridge in the host machine H1 is provided with a DMA window dedicated to the virtual device to the host machine H2, namely, DMA window 0. DMA window 0 can be implemented through the BAR space of the end device EP1, and can support different usage requirements by supporting the Resizable BAR feature.

[0048] Step S200, converting the DMA address of the DMA access request into the address of a second DMA window, and sending the DMA access request of the second DMA window through the connection bridge to the end device in the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower.

[0049] Specifically, when the first DMA window located on the device lender receives a DMA access request from the virtual device to the device borrower, since it is a cross-bus domain access, the connection bridge needs to convert the DMA address of the DMA access request into the address of the second DMA window and send the DMA access request to the bus domain of the device borrower.

[0050] For example, the bridge driver of the device borrower maintains a virtual address space that is consistent with DMA window 0, that is, DMA window 1. The virtual device starts a DMA operation (that is, the virtualized device starts a DMA operation), and the address used in the operation is the address of DMA window 0, that is, the DMA operation will be transmitted to DMA window 0 on the end device EP1. After receiving the DMA operation, the bridge converts the DMA address to the address of DMA window 1 and sends the converted DMA access request to the PCIe bus domain of the device borrower.

[0051] Step S300: The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0052] Specifically, in order to achieve cross-bus domain DMA access, an IOMMU (IO memory management unit) is set in the host machine of the device borrower. When the connection bridge sends a DMA access request for the second DMA window at the end device of the device borrower, the IOMMU of the device borrower will convert the request address of the DMA access request, so that the DMA access request after the address conversion eventually points to the physical memory address of the DMA cache. In short, the method of this embodiment requires IOMMU support, and the method of this embodiment can only be used when the processor supports IOMMU (such as Intel's VT-d, AMD's IOMMU, ARM's SMMU).

[0053] In one implementation, the IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window, including:

[0054] The IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, and obtains the target physical memory address;

[0055] The request address is converted according to the target physical memory address.

[0056] Specifically, since the DMA access request of the second DMA window is not the real request address, the IOMMU needs to perform an address translation function, first determine the correct DMA cache physical memory address corresponding to the request address of the DMA access request, and obtain the target physical memory address. Then the IOMMU performs an address replacement function to modify the request address of the DMA access request to the correct target physical memory address.

[0057] In one implementation, the IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, including:

[0058] The IOMMU determines the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache.

[0059] Specifically, this embodiment pre-sets a mapping from the address of the second DMA window to the physical memory address of the DMA cache in the IOMMU to perform subsequent address translation functions. In actual application scenarios, when a DMA access request is sent to the bus domain of the device borrower, the IOMMU will use the pre-set mapping to determine the physical memory address actually corresponding to the request address of the DMA access request, and perform address translation on the request address.

[0060] In one implementation, the method further includes:

[0061] The virtual device driver of the device borrower calls a DMA API to create the DMA buffer and obtains the physical memory address of the DMA buffer;

[0062] Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver;

[0063] And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

[0064] Specifically, this embodiment will add a corresponding virtual device driver in the host machine of the device borrower, and the virtual device driver is the driver of the virtual device. Before the virtual device performs DMA operation, the driver of its device will create a DMA cache, and replace the physical memory address of the cache with the address of the first DMA window, and set the mapping from the address of the second DMA window to the physical memory address in the IOMMU. In short, before the virtual device in the device lender generates a DMA access request in this embodiment, the virtual device driver corresponding to the device borrower will first create a DMA cache, set a mapping relationship between the physical memory address of the DMA cache and the address of the second DMA window, and set a mapping relationship between the address of the second DMA window and the address of the first DMA window. When the virtual device generates a DMA access request, the DMA access request will be directed to the first DMA window, and address conversion will be performed in sequence based on the above-mentioned generated mapping relationship, and finally point to the physical memory address of the corresponding DMA cache, so as to realize DMA access from the virtual device to the device borrower.

[0065] For example, in the device borrower, before the virtual device performs DMA operation, its device driver will call the DMA API of the operating system to create a DMA cache and obtain the cache address (i.e., physical memory address). The obtained cache physical memory address is replaced with the address of DMA window 0 (which has an agreed mapping relationship with the address of DMA window 1) and returned to the device driver. And set the mapping from the address of DMA window 1 to the physical memory address in the IOMMU.

[0066] In one implementation, the present invention can be applied to technical fields such as device virtualization, device sharing, heterogeneous computing, and confidential computing. For example, since direct data interaction with the virtualized device can easily lead to lower device security, the virtualized device can be mounted on the bus of the host machine of the device lender through a control bridge. After adding the control bridge, access requests to the virtualized device or access requests issued by the virtualized device need to be forwarded through the control bridge, thereby achieving further control over the virtualized device. By adding security measures (such as identity authentication, data encryption and decryption, state management, flow control and other security operations) in the connection bridge and / or the control bridge, the virtualized device can also be used for secure computing (regardless of whether the host machine of the device lender itself is secure).

[0067] Based on the above embodiments, the present invention also provides a system for cross-bus domain devices to access host space DMA, such as Figure 2 As shown, the system comprises:

[0068] The device lender includes a virtualized device; the virtualized device is used to generate and send a DMA access request according to the address of the first DMA window;

[0069] The connection bridge includes the first DMA window and the second DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender, and is used to obtain the DMA access request of the virtual device to the device borrower, convert the DMA address of the DMA access request into the address of the second DMA window, and send the converted DMA access request to the second DMA window; the second DMA window is an address space maintained by the connection bridge driver of the device borrower; the DMA access request of the second DMA window is issued by the end device in the device borrower through the connection bridge;

[0070] The device borrower includes a virtual device and an IOMMU corresponding to the virtual device; the IOMMU is used to perform address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0071] Specifically, the aforementioned explanation of the embodiment of the method for cross-bus domain device to host space DMA access is also applicable to the cross-bus domain device to host space DMA access system of this embodiment, and therefore the corresponding functions of the device lender, device borrower and connection bridge will not be repeated here.

[0072] In one implementation, the IOMMU includes:

[0073] an addressing unit, configured to determine a physical memory address of a corresponding DMA cache according to a request address of a DMA access request of the second DMA window, and obtain a target physical memory address;

[0074] A conversion unit is used to perform address conversion on the request address according to the target physical memory address.

[0075] Specifically, the aforementioned explanation of the address conversion process of the IOMMU is also applicable to the address conversion process of the IOMMU in this embodiment, so the address conversion process of the IOMMU is not repeated here.

[0076] In one implementation, the addressing unit includes:

[0077] A mapping unit is used to determine the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache.

[0078] Specifically, the aforementioned explanation of the mapping-based address translation process of the IOMMU is also applicable to the mapping-based address translation process of the IOMMU of this embodiment, so the mapping-based address translation process of the IOMMU is not repeated here.

[0079] In one implementation, the device borrower further includes:

[0080] A virtual device driver, used for calling a DMA API to create the DMA buffer and obtain a physical memory address of the DMA buffer;

[0081] Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver;

[0082] And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

[0083] Specifically, the aforementioned explanation of the process of creating the DMA cache and the process of setting the address mapping of the IOMMU is also applicable to the functional description of the virtual device driver of this embodiment, so the functions of the virtual device driver are not repeated here.

[0084] In one implementation, the connection bridge is further used for:

[0085] The first DMA window is set through the BAR space of the end device located at the device lender; the first DMA window supports the Resizable BAR feature.

[0086] Based on the above embodiment, the present invention further provides a terminal, whose principle block diagram can be shown as follows: Figure 3 As shown. The terminal includes a processor, a memory, a network interface, and a display screen connected via a system bus. Among them, the processor of the terminal is used to provide computing and control capabilities. The memory of the terminal includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the terminal is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a method for DMA access of a device across bus domains to a host space is implemented:

[0087] The connection bridge obtains a DMA access request from the virtualized device in the device lender to the device borrower through a first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively;

[0088] Converting the DMA address of the DMA access request into an address of a second DMA window, and sending the DMA access request of the second DMA window through the connection bridge to the end device in the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower;

[0089] The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0090] The display screen of the terminal may be a liquid crystal display screen or an electronic ink display screen.

[0091] Those skilled in the art will understand that Figure 3The principle block diagram shown in the figure is only a block diagram of a partial structure related to the scheme of the present invention, and does not constitute a limitation on the terminal to which the scheme of the present invention is applied. The specific terminal may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0092] In one implementation, the memory of the terminal stores one or more programs, and is configured to be executed by one or more processors. The one or more programs include instructions for performing a method for performing a DMA access method from a device across bus domains to a host space:

[0093] The connection bridge obtains a DMA access request from the virtualized device in the device lender to the device borrower through a first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively;

[0094] Converting the DMA address of the DMA access request into an address of a second DMA window, and sending the DMA access request of the second DMA window through the connection bridge to the end device in the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower;

[0095] The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request.

[0096] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0097] In summary, the present invention discloses a cross-bus domain device to host machine space DMA access method and related equipment, which relates to the field of device virtualization technology. The method includes: the connection bridge obtains the DMA access request of the virtualized device in the device lender to the device borrower through the first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes the virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively; the DMA address of the DMA access request is converted to the address of the second DMA window, and the DMA access request of the second DMA window is issued through the connection bridge in the end device of the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower; the IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain the target DMA access request. The present invention connects the bus domains of the device lender and the device borrower through a connection bridge, and the end device corresponding to the connection bridge in the device lender maintains an address space as the first DMA window, and the connection bridge driver of the device borrower maintains an address space as the second DMA window, and the DMA access request of the virtual device to the device borrower is forwarded through these two DMA windows. Address mapping is set in the IOMMU of the device borrower, and the DMA access request transmitted by the connection bridge is converted through the IOMMU, so that the DMA access request after the address conversion can point to the physical memory address of the DMA cache, thereby realizing the DMA access of the cross-bus domain device to the host space.

[0098] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A method for DMA access from a device across bus domains to a host space, characterized in that: The method comprises: The connection bridge obtains a DMA access request from the virtualized device in the device lender to the device borrower through a first DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender; the device borrower includes a virtual device corresponding to the virtualized device; the device lender and the device borrower correspond to different host machines respectively; Converting the DMA address of the DMA access request into an address of a second DMA window, and sending the DMA access request of the second DMA window through the connection bridge to the end device in the device borrower, wherein the second DMA window is an address space maintained by the connection bridge driver of the device borrower; The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window to obtain a target DMA access request; The IOMMU of the device borrower performs address conversion on the DMA access request of the second DMA window, including: The IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, and obtains the target physical memory address; Performing address conversion on the request address according to the target physical memory address; The IOMMU determines the physical memory address of the corresponding DMA cache according to the request address of the DMA access request of the second DMA window, including: The IOMMU determines the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache; The method also includes: The virtual device driver of the device borrower calls a DMA API to create the DMA buffer and obtains the physical memory address of the DMA buffer; Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver; And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

2. A system for DMA access from a device across bus domains to a host space, characterized in that: The system comprises: The device lender includes a virtualized device; the virtualized device is used to generate and send a DMA access request according to the address of the first DMA window; The connection bridge includes the first DMA window and the second DMA window; the first DMA window is an address space maintained by the end device of the connection bridge in the device lender, and is used to obtain the DMA access request of the virtual device to the device borrower, convert the DMA address of the DMA access request into the address of the second DMA window, and send the converted DMA access request to the second DMA window; the second DMA window is an address space maintained by the connection bridge driver of the device borrower; the DMA access request of the second DMA window is issued by the end device of the device borrower through the connection bridge; The device borrower includes a virtual device and an IOMMU corresponding to the virtual device; the IOMMU is used to perform address conversion on the DMA access request of the second DMA window to obtain a target DMA access request; The IOMMU includes: an addressing unit, configured to determine a physical memory address of a corresponding DMA cache according to a request address of a DMA access request of the second DMA window, and obtain a target physical memory address; A conversion unit, configured to perform address conversion on the request address according to the target physical memory address; The addressing unit comprises: a mapping unit, configured to determine the physical memory address of the DMA cache corresponding to the request address based on a preset mapping from the address of the second DMA window to the physical memory address of the DMA cache; The equipment borrower also includes: A virtual device driver, used for calling a DMA API to create the DMA buffer and obtain a physical memory address of the DMA buffer; Replacing the obtained physical memory address of the DMA cache with the address of the first DMA window, and returning it to the device driver; And the mapping between the physical memory address of the DMA cache and the address of the second DMA window is set in the IOMMU.

3. A terminal, characterized in that: The terminal includes a memory and one or more processors; the memory stores one or more programs; the program contains instructions for executing the cross-bus domain device to host space DMA access method as described in claim 1; the processor is used to execute the program.

4. A computer-readable storage medium having a plurality of instructions stored thereon, characterized in that: The instructions are suitable for being loaded and executed by a processor to implement the steps of the method for cross-bus domain device to host space DMA access as described in claim 1 above.

Citation Information

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