Porous silicon-based electron emission source and preparation method and equipment thereof

Abstract

The present invention provides a porous silicon-based electron emission source and a preparation method and equipment thereof, and relates to the technical field of cathode electron emission sources. The preparation method of the porous silicon-based electron emission source comprises: obtaining a porous silicon layer; treating the porous silicon layer by an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer; and thermally annealing the porous silicon layer after the electrochemical oxidation treatment. The preparation method uses an electrochemical oxidation method in a constant voltage mode to oxidize the porous silicon layer, which can fully and uniformly passivate the porous silicon layer, thereby effectively improving the electron emission efficiency of the porous silicon-based electron emission source. Compared with traditional rapid thermal oxidation, high-temperature water vapor annealing, high-temperature thermal carbonization and other processes, the electrochemical oxidation method has the advantages of room temperature, large area, and low cost, and is expected to be used on a large scale to prepare on-chip high-efficiency electron sources for vacuum microelectronic devices, meeting the future development needs of highly integrated and multifunctional vacuum microelectronic devices.

Description

Technical Field

[0001] The present invention relates to the technical field of cathode electron emission sources, and in particular to a porous silicon-based electron emission source and a preparation method and equipment thereof. Background Art

[0002] In order to meet the needs of vacuum microelectronic devices, researchers have developed many different types of cold cathode electron sources, such as metal cone tip field electron source, metal oxide diode electron source, surface conduction electron source, porous silicon cathode electron emission source, etc. Among them, porous silicon cathode electron source, as a silicon-based electron source, has a solid silicon technology foundation, simple structure, low operating voltage, small emission angle, and the emitted electrons are not sensitive to gas pressure, so it is very popular.

[0003] The porous silicon electron emission source has a multilayer structure of top electrode-porous silicon-silicon substrate, in which the porous silicon layer and the nanocrystals (nc-Si) filled inside it have a significant impact on its electron emission performance. The electron emission efficiency is the benchmark for judging the emission performance of the device, which is defined as the ratio of the device emission current to the conduction current. With the continuous improvement of the integration of vacuum microelectronic devices and the diversification of their functions, the requirements for the electron emission efficiency of on-chip electron sources are getting higher and higher. In order to improve the electron emission efficiency of porous silicon electron sources, multilayer porous silicon with periodic porosity changes obtained by pulse etching is an effective choice. In addition, post-treatments such as rapid thermal oxidation, high-pressure water vapor annealing, and high-temperature thermal carbonization of the porous silicon layer can further passivate its structure to form a tunneling channel that is essential for electron acceleration. Although these post-treatment processes have improved the electron emission characteristics to varying degrees, the expensive semiconductor equipment makes it difficult to reduce the process cost, and the high temperature or high pressure process involved will cause irreversible damage to the surface microstructure of the porous silicon. To this end, researchers have made new attempts in porous silicon microstructures and post-processing, including composite processing processes that combine the above-mentioned different post-processing processes or multi-step cyclic processing processes under low temperature and low pressure conditions. Although these new processes have partially improved the electron emission characteristics, they have significantly increased the process complexity, further increasing the difficulty and cost of the device preparation process, which is not conducive to the subsequent large-scale manufacturing and application of the device. In addition, thick porous silicon layers with complex morphologies still suffer from incomplete passivation or local over-oxidation when using the above-mentioned post-processing processes, which causes electrons to be subjected to additional scattering during the tunneling process, making the electron emission efficiency still significantly lower than the expected level (no more than 5%), which limits its large-scale application as an on-chip electron source in advanced vacuum microelectronic devices. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a porous silicon-based electron emission source and a preparation method and device thereof, aiming to solve the technical problem of low emission efficiency of porous silicon electron sources in the prior art.

[0005] In order to achieve the above-mentioned purpose, the first aspect of an embodiment of the present invention provides a method for preparing a porous silicon-based electron emission source, comprising: obtaining a porous silicon layer; treating the porous silicon layer with an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer; and thermally annealing the porous silicon layer after the electrochemical oxidation treatment.

[0006] In some embodiments, treating the porous silicon layer with an electrochemical oxidation method in a constant voltage mode includes: placing the porous silicon layer in a second electrolyte, applying a constant voltage between the porous silicon layer and the second electrolyte; and performing an electrochemical oxidation treatment on the porous silicon layer for a preset time.

[0007] In some embodiments, the second electrolyte includes a sulfuric acid solution, a nitric acid solution or a sodium hydroxide solution, and the solution concentration of the second electrolyte is between 0.1-5 mol / L; the constant voltage does not exceed 100 V, and the preset time does not exceed 60 min.

[0008] In some embodiments, treating the porous silicon layer with the electrochemical oxidation method in constant voltage mode further includes: during the electrochemical oxidation treatment of the porous silicon layer, irradiating the porous silicon layer with a light source to provide holes required for oxidation of the porous silicon layer.

[0009] In some embodiments, thermal annealing of the porous silicon layer after electrochemical oxidation treatment includes: placing the porous silicon layer in a furnace chamber, annealing the porous silicon layer at a preset temperature and a preset environment, and then naturally cooling it, wherein the preset temperature is between 500-1000 degrees Celsius, the annealing time does not exceed 120 minutes, and the preset environment includes annealing the porous silicon layer in an inert gas or vacuum environment.

[0010] In some embodiments, obtaining the porous silicon layer includes: placing a silicon wafer in a first electrolyte, and then applying a specific voltage or a specific current to the silicon wafer for electrochemical etching to obtain the porous silicon layer.

[0011] In some embodiments, the first electrolyte includes hydrofluoric acid or a mixed solution of hydrofluoric acid and ethanol, wherein the proportion of hydrofluoric acid in the mixed solution is not less than 20%; the silicon wafer includes n-type silicon or p-type silicon, and the resistivity of the silicon wafer is not more than 10 6 Ω·cm; the current density of the specific current is less than 200 mA / cm 2 .

[0012] In some embodiments, after thermal annealing the porous silicon layer after electrochemical oxidation treatment, the preparation method further comprises: depositing a top electrode on the surface of the porous silicon layer and depositing a bottom electrode on the back side of the silicon wafer.

[0013] A second aspect of the embodiments of the present invention provides a porous silicon-based electron emission source, comprising a bottom electrode, a silicon substrate, a porous silicon layer and a top electrode stacked in sequence. The porous silicon-based electron emission source is manufactured using the manufacturing method in the above embodiment.

[0014] The third aspect of an embodiment of the present invention provides a device for preparing a porous silicon-based electron emission source, including: a porous silicon acquisition device for acquiring a porous silicon layer; an electrochemical oxidation device for treating the porous silicon layer using an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer; and a thermal annealing device for thermally annealing the porous silicon layer after the electrochemical oxidation treatment.

[0015] Compared with the prior art, the present invention has at least the following beneficial effects:

[0016] (1) Compared with traditional thermal oxidation, high-temperature steam annealing or high-temperature thermal carbonization methods, the porous silicon layer is treated by electrochemical oxidation, and the porous silicon layer is placed in an electrolyte. It does not require a high-temperature environment and has the advantages of room temperature, low cost, and large area.

[0017] (2) The porous silicon layer is passivated by constant voltage mode electrochemical oxidation. Under the action of the constant voltage electric field, the holes from the silicon wafer can be evenly distributed throughout the porous silicon layer, so that oxidation will proceed from the entire porous silicon layer at the same time, avoiding the oxidation blocking phenomenon. This process is not limited by the thickness of the porous silicon layer, thereby obtaining a uniform and thorough passivation effect;

[0018] (3) Constant voltage mode electrochemical oxidation is used to passivate the porous silicon layer. By rationally setting the process parameters such as voltage, oxidation time, and electrolyte solubility, the highest electron emission efficiency of the porous silicon-based electron emission source known to date is achieved, reaching 16.8%. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0020] Figure 1 This is a schematic diagram of testing electrical characteristics using a porous silicon-based electron emission source according to an embodiment of the present invention;

[0021] Figure 2 is a schematic flow chart of a method for preparing a porous silicon-based electron emission source according to an embodiment of the present invention;

[0022] Figure 3 is a schematic diagram comparing the electron emission characteristics test results of two groups of samples according to an embodiment of the present invention and a control example;

[0023] Figure 4 2. Transmission electron microscope cross-sectional morphology images of two groups of samples according to the embodiment of the present invention and the comparative example;

[0024] Figure 5 Schematic diagram of oxygen content distribution and oxidation principle of a sample oxidized at constant pressure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0026] The endpoints and any values ​​of the ranges invented in the present invention are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically invented in the present invention.

[0027] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the existence of features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0028] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0029] Similarly, in order to simplify the present invention and help understand one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure or description thereof. The description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0030] Please refer to Figure 1 , Figure 11 is a schematic diagram of testing electrical characteristics of a porous silicon-based electron emission source 100 according to an embodiment of the present invention. In this embodiment, the porous silicon-based electron emission source 100 includes a bottom electrode 110, a silicon substrate 120, a porous silicon layer 121 and a top electrode 130 stacked in sequence.

[0031] like Figure 1 As shown, a DC bias voltage V may be applied between the top electrode 130 and the bottom electrode 110. ps , the electrons injected from the silicon substrate 120 into the porous silicon layer 121 are accelerated by tunneling through the oxidized interconnected silicon nanocrystals, and some electrons obtain sufficient kinetic energy to penetrate the top electrode 130 and are emitted into the vacuum. When the electrical characteristics of the porous silicon-based electron emission source 100 are tested, the entire device can be placed in a vacuum chamber, and the vacuum degree can be about 3×10 -4 Pa, a collector 10 is arranged at a distance h (h can be 5 mm, for example) above the top electrode 130 of the device, and a positive voltage V can be applied relative to the top electrode 130 c (V c For example, it can be 200 V) to collect the emitted electrons, and the emission current density J e and diode current density J ps As the DC bias voltage V ps The function of is recorded, the electron emission efficiency η of the porous silicon-based electron emission source 100 is η=J e / J ps The threshold voltage when the porous silicon-based electron emission source 100 emits electrons is denoted as V th .

[0032] The study found that in the porous silicon-based electron emission source 100, the porous silicon layer 121 and the nanocrystals filled therein have a significant effect on the electron emission performance of the electron source. Oxidation treatment of the porous silicon layer 121 can improve the electron emission performance of the device. Electrochemical oxidation is a room temperature liquid phase oxidation method that only requires placing the porous silicon layer 121 in a specific electrolyte as an anode, and applying a certain amplitude of current or voltage through an external power supply to attract oxygen-containing anions in the electrolyte to the inner surface of the porous silicon layer 121 to passivate it, thereby improving the electron emission efficiency.

[0033] Based on this, an embodiment of the present invention provides a method for preparing a porous silicon-based electron emission source, comprising: obtaining a porous silicon layer; treating the porous silicon layer with an electrochemical oxidation method in a constant voltage mode to fully and evenly oxidize the porous silicon layer; and thermally annealing the porous silicon layer after the electrochemical oxidation treatment. The preparation method uses an electrochemical oxidation method in a constant voltage mode to oxidize the porous silicon layer. Under the action of a constant voltage electric field, the holes from the silicon wafer can be evenly distributed throughout the porous silicon layer, so that oxidation will be carried out simultaneously from the entire porous silicon layer, avoiding oxidation blocking. The process is not limited by the thickness of the porous silicon layer, thereby obtaining a uniform and thorough passivation effect.

[0034] The following will be combined Figure 2 The process of treating the porous silicon layer 121 in the porous silicon-based electron emission source 100 by an electrochemical oxidation method will be described. Figure 2 FIG. 1 is a flow chart of a method for preparing a porous silicon-based electron emission source according to an embodiment of the present invention. It should be noted that the method disclosed in the present invention is not limited to Figure 2 The complete steps shown may include only one step or multiple steps.

[0035] like Figure 1 and Figure 2 As shown, the method for preparing the porous silicon-based electron emission source 100 may include steps S210 to S230.

[0036] In step S210 , the porous silicon layer 121 is obtained.

[0037] In some embodiments, the porous silicon layer 121 can be obtained by anodization. Specifically, after a silicon wafer is placed in a specific electrolyte, a specific voltage or a specific current is applied to the silicon wafer for electrochemical corrosion treatment to obtain the porous silicon layer 121. The other part of the silicon wafer is used as the silicon substrate 120. In view of the fact that the porous silicon layer 121 also needs to be placed in an electrolyte when electrochemically oxidizing the porous silicon layer 121 later, in order to avoid confusion, the electrolyte used in step S210 is referred to as the first electrolyte, and the electrolyte used in the subsequent step S220 is referred to as the second electrolyte. The first electrolyte is usually different from the second electrolyte.

[0038] In some embodiments, the silicon wafer may include n-type silicon or p-type silicon, and the resistivity of the silicon wafer may not exceed 10 6 Ω·cm. The electrolyte (i.e., the first electrolyte) may be hydrofluoric acid (HF) or a mixed solution of hydrofluoric acid and ethanol, wherein the proportion of hydrofluoric acid in the mixed solution is not less than 20%. In order to avoid electropolishing of silicon wafers during anodization, the current density of the anodization current is usually less than 200 mA / cm 2In addition, in order to regulate the electric field distribution in the porous silicon layer 121 to promote efficient electron tunneling, a pulsed corrosion waveform can be used to achieve multilayer porous silicon with periodic porosity changes. The specific corrosion current, corrosion cycle and pulse number can be adjusted according to specific needs, and the present invention does not make specific limitations.

[0039] In other embodiments, the porous silicon layer 121 may be obtained by a silica sol method, a hydrothermal etching method, a spark discharge method, or the like.

[0040] In step S220 , the porous silicon layer 121 is treated by an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer 121 .

[0041] It is worth mentioning that the embodiment of the present invention adopts constant voltage mode electrochemical oxidation to passivate the porous silicon layer 121, which is not limited by the thickness of the porous silicon layer 121, and can obtain a uniform and sufficient passivation effect, thereby significantly improving the electron emission efficiency. In this embodiment, sufficient oxidation means that the porous silicon layer 121 is completely oxidized, and there is no local incomplete oxidation; uniform oxidation means that the degree of oxidation is consistent everywhere in the porous silicon layer 121, and there is no local over-oxidation. This is also where the present invention is superior to other existing preparation processes.

[0042] It should be emphasized that constant voltage mode electrochemical oxidation is different from constant current mode electrochemical oxidation, and there is a gap between the two in achieving sufficient and uniform oxidation. The relevant content will be explained in the specific embodiments below.

[0043] In some embodiments, step S220 may specifically include: placing the porous silicon layer 121 in a second electrolyte, and then applying a constant voltage between the porous silicon layer 121 and the second electrolyte; and performing an electrochemical oxidation treatment on the porous silicon layer 121 for a preset time.

[0044] In some embodiments, the second electrolyte may be a sulfuric acid solution, a nitric acid solution or a sodium hydroxide solution, etc., and its concentration may be between 0.1-5 mol / L. The applied constant voltage does not exceed 100 V, and the electrochemical oxidation time is determined according to the thickness and morphology of the porous silicon layer 121, and is usually not more than 60 min.

[0045] In some embodiments, step S220 may further include: during the electrochemical oxidation process of the porous silicon layer 121, irradiating the porous silicon layer 121 with a light source to provide holes required for the oxidation of the porous silicon layer 121, thereby increasing the electrochemical oxidation rate. In some embodiments, the light source may be a tungsten lamp; the power of the light source used does not exceed 1000W; and the light source is no more than 50 cm away from the porous silicon layer 121.

[0046] It is understandable that the above porous silicon layer structure, electrolyte concentration, applied voltage, oxidation time, light intensity of the light source and distance from the sample can be appropriately selected by those skilled in the art according to the specific information of the silicon wafer used and the ultimate purpose.

[0047] In step S230 , the porous silicon layer 121 after the electrochemical oxidation treatment is thermally annealed.

[0048] Specifically, the porous silicon layer 121 can be placed in a furnace chamber, and the porous silicon layer 121 can be annealed at a preset temperature and a preset environment and then cooled naturally. In this way, the electrolyte remaining in the pores of the porous silicon layer 121 can be removed, and the quality of the silicon dioxide layer obtained by electrochemical oxidation can be further improved. In some embodiments, the preset temperature (i.e., the annealing temperature) can be selected from 500-1000 degrees Celsius; the annealing time does not exceed 120 minutes. The preset environment may include annealing the porous silicon layer 121 in an inert gas or vacuum environment. The inert gas may be nitrogen or argon. In other words, annealing can be performed under vacuum or in an inert gas atmosphere such as nitrogen or argon.

[0049] Please continue reading Figure 1 and Figure 2 In some embodiments, the preparation method of the embodiment of the present invention may further include the preparation process of the top electrode 130 and the bottom electrode 110, that is, depositing the top electrode 130 on the surface of the porous silicon layer 121 and depositing the bottom electrode 110 on the back side of the silicon wafer. The back side of the silicon wafer is also the back side of the silicon substrate 120.

[0050] Specifically, the bottom electrode 110 can be a conventional single-layer metal electrode, such as copper, silver, gold, etc., or a composite metal electrode, such as a nickel / copper / nickel electrode. Considering that a lower metal work function is favorable for electron emission and that it also needs to have good physical adhesion with the porous silicon layer 121, the top electrode 130 used can generally be a gold electrode, and the thickness of the gold electrode is between 5-50 nm. The electrodes 110 and 130 can be prepared by methods such as magnetron sputtering, vacuum evaporation or electron beam evaporation, and the present invention does not make specific limitations.

[0051] For ease of understanding, the method for preparing a silicon-based electron emission source of the present invention will be described below in conjunction with a specific embodiment, and a comparison group will be set to illustrate the advantages of the method for preparing a porous silicon-based electron emission source provided by an embodiment of the present invention. The specific embodiment may include the following steps:

[0052] Step S1 0:Porous silicon layer was prepared by electrochemical etching. The n-type with a resistivity of 0.02 Ω·cm was selected. <100> The silicon wafer was placed in a solution of HF (40%) solution: ethanol = 1:1 for anodization treatment. The power-on time was 3 min for group A and 5 min for group B. The current density of the anodization current applied to group A and group B was 30 mA / cm 2 .

[0053] Step S2 0 :For step S1 0 The prepared porous silicon layer was subjected to electrochemical oxidation. Group A samples were divided into two batches, both of which were placed in 0.5 mol / L sulfuric acid. The samples were electrochemically oxidized for 20 min and 30 min respectively in constant voltage mode, and the constant voltage selected was 50 V. Group B samples were placed in 0.5 mol / L sulfuric acid and electrochemically oxidized for 15 min in constant current mode, and the current density of the constant current was set to 30 mA / cm 2 In order to increase the oxidation rate, the electrochemical oxidation process of all samples in Group A and Group B was carried out under the illumination of a 500 W tungsten lamp to provide the holes required for the reaction, and the samples were set at a distance of 20 cm from the tungsten lamp.

[0054] Step S3 0 :Change step S2 0 The porous silicon layer after electrochemical oxidation in the two groups was thermally annealed. Both groups of samples were annealed at 550 degrees Celsius for 60 minutes in the furnace chamber to improve the quality of the silicon dioxide layer obtained by electrochemical oxidation. N 2 As a protective gas, it cools down to room temperature after annealing.

[0055] Step S4 0 : Take out the samples of group A and group B after thermal annealing, sputter a 90 nm Ni / Cu / Ni film on the back of the silicon wafer to form a bottom electrode, and sputter a 10 nm Au film on one side of the porous silicon layer as a top electrode.

[0056] Please refer to Figure 3 , Figure 3 1 is a schematic diagram comparing the electron emission characteristics test results of two groups of samples according to an embodiment of the present invention (Group A) and a control example (Group B). Figure 3 The results shown are based on Figure 1 The electrical characteristics test schematic diagram shown is used for testing.

[0057] like Figure 3 As shown, the horizontal axis represents the DC bias voltage V ps The left vertical axis represents the diode current density J ps The right ordinate represents the emission current density Je . Figure 3 (a) and (b) are two samples of group A, and (c) is a sample of group B. The results show that the constant voltage mode can significantly improve the electron emission efficiency, especially when the voltage is 50 V and the oxidation time is 20 min (i.e. Figure 3 (a) Corresponding sample), can achieve an electron emission efficiency far exceeding that of the sample obtained by constant current mode electrochemical oxidation. For this sample, when the bias voltage reaches 28 V, an electron emission efficiency of 16.8% is obtained, which is the highest value of this type of electron source currently known.

[0058] Please refer to Figure 4 and Figure 5 , Figure 4 are transmission electron microscope cross-sectional morphology images of two groups of samples according to an embodiment of the present invention (group A) and a control example (group B); Figure 5 Schematic diagram of oxygen content distribution and oxidation principle of constant pressure oxidation samples in an embodiment of the present invention (Group A).

[0059] like Figure 4 As shown, the display adopts constant pressure mode ( Figure 4 After electrochemical oxidation of (a), (b), (c), and (d), the surface and interior of the porous silicon layer became more uniform. Figure 4 In (e) and (f) above, significant oxidation stratification occurs inside the sample, indicating the uneven oxidation, while no oxidation stratification occurs during constant pressure oxidation.

[0060] like Figure 5 As shown, in order to obtain the oxidation law of group A samples, Figure 5 (a) shows the oxygen element scanning results of the two samples in group A in the depth direction using an X-ray energy dispersive spectrometer (EDS), where the horizontal axis represents the depth and the vertical axis represents the oxygen element content. The results show that at different oxidation times, the oxygen element content is evenly distributed with depth, but the oxidation degree is different. Figure 5In (b) and (c), the oxidation characteristics of these two different oxidation modes are explained with the help of the schematic diagram of the electrochemical oxidation model. In the constant current electrochemical oxidation process, the corresponding oxidation voltage is low, which makes the field strength at the electrolyte / porous silicon interface weaker, and the holes in the silicon substrate can only be attracted to the bottom of the hole, so the oxidation starts from the bottom of the porous silicon. As the density of the bottom oxide layer continues to increase, the hole injection is completely blocked, and the oxidation is terminated immediately, resulting in incomplete oxidation. In the constant voltage oxidation process, the field strength at the electrolyte / porous silicon interface is strong, and the holes from the silicon substrate are injected into the top of the silicon column, so that the holes are evenly distributed throughout the porous silicon layer, so the oxidation will proceed simultaneously from the entire porous silicon layer, avoiding the oxidation blocking phenomenon, thereby achieving a uniform and thorough oxidation effect.

[0061] A porous silicon-based electron emission source and a method for preparing the same are described above. The method for preparing the porous silicon-based electron emission source provided by the embodiment of the present invention has at least the following beneficial effects:

[0062] Compared with traditional thermal oxidation, high-temperature water vapor annealing or high-temperature thermal carbonization methods, the porous silicon layer is treated with electrochemical oxidation, and the porous silicon layer is placed in an electrolyte. No high-temperature environment is required, and it has the advantages of room temperature, low cost, and large area. Constant-voltage mode electrochemical oxidation is used to passivate the porous silicon layer. Under the action of a constant-voltage electric field, the holes from the silicon wafer can be evenly distributed throughout the porous silicon layer, so that oxidation will proceed from the entire porous silicon layer simultaneously, avoiding oxidation blocking. The process is not limited by the thickness of the porous silicon layer, thereby obtaining a uniform and thorough passivation effect. Constant-voltage mode electrochemical oxidation is used to passivate the porous silicon layer. By reasonably setting process parameters such as voltage, oxidation time, and electrolyte solubility, the highest known electron emission efficiency of a porous silicon cathode electron source is achieved, which can reach 16.8%.

[0063] The porous silicon-based electron emission source 100 can be manufactured by the manufacturing method disclosed in the above embodiment, and thus has the same or similar features and advantages as the above manufacturing method, so it will not be described in detail.

[0064] In addition, an embodiment of the present invention further provides a device for preparing a porous silicon-based electron emission source, including: a porous silicon acquisition device, an electrochemical oxidation device and a thermal annealing device.

[0065] The porous silicon acquisition device is used to acquire the porous silicon layer. In some embodiments, the porous silicon acquisition device can be used to perform step S210 in the above preparation method.

[0066] The electrochemical oxidation device is used to treat the porous silicon layer using an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer. In some embodiments, the electrochemical oxidation device can be used to perform step S220 in the above preparation method.

[0067] The thermal annealing device is used to perform thermal annealing on the porous silicon layer after the electrochemical oxidation treatment. In some embodiments, the thermal annealing device can be used to perform step S230 in the above preparation method.

[0068] As an example, the equipment for preparing the porous silicon-based electron emission source may specifically include an electrolytic cell, an electrolyte, and a constant voltage power supply, but the present invention is not limited thereto. The equipment for preparing the porous silicon-based electron emission source has the same or similar features and advantages as the above-mentioned preparation method, so it will not be described in detail.

[0069] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a porous silicon-based electron emission source, characterized in that: include: obtaining a porous silicon layer; Treating the porous silicon layer by an electrochemical oxidation method in a constant voltage mode to fully and uniformly oxidize the porous silicon layer; The electrochemical oxidation method using a constant voltage mode to treat the porous silicon layer comprises: placing the porous silicon layer in a second electrolyte, and then applying a constant voltage between the porous silicon layer and the second electrolyte; The porous silicon layer is subjected to electrochemical oxidation treatment for a preset time; the second electrolyte includes a sulfuric acid solution, a nitric acid solution or a sodium hydroxide solution, and the solution concentration of the second electrolyte is between 0.1-5 mol / L; the constant voltage does not exceed 100 V, and the preset time does not exceed 60 min; the porous silicon layer is treated by the electrochemical oxidation method in a constant voltage mode, so that the holes from the silicon substrate are evenly distributed in the entire porous silicon layer, and oxidation is carried out simultaneously from the entire porous silicon layer, avoiding oxidation blocking phenomenon, thereby obtaining a uniformly and thoroughly oxidized porous silicon layer; The porous silicon layer after the electrochemical oxidation treatment is thermally annealed.

2. The preparation method according to claim 1, characterized in that: The electrochemical oxidation method using a constant voltage mode to treat the porous silicon layer also includes: During the electrochemical oxidation treatment of the porous silicon layer, a light source is used to irradiate the porous silicon layer to provide holes required for oxidation of the porous silicon layer.

3. The preparation method according to claim 1, characterized in that: The thermal annealing of the porous silicon layer after the electrochemical oxidation treatment comprises: The porous silicon layer is placed in a furnace chamber, annealed at a preset temperature and a preset environment, and then naturally cooled. The preset temperature is between 500-1000 degrees Celsius, the annealing time is no more than 120 minutes, and the preset environment includes annealing the porous silicon layer in an inert gas or vacuum environment.

4. The preparation method according to claim 1, characterized in that: The obtaining of the porous silicon layer comprises: After placing the silicon wafer in the first electrolyte, a specific voltage or a specific current is applied to the silicon wafer for electrochemical etching to obtain the porous silicon layer.

5. The preparation method according to claim 4, characterized in that: The first electrolyte includes hydrofluoric acid or a mixed solution of hydrofluoric acid and ethanol, wherein the proportion of hydrofluoric acid in the mixed solution is not less than 20%; The silicon wafer comprises n-type silicon or p-type silicon, and the resistivity of the silicon wafer is not more than 10 6 Ω·cm; The current density of the specific current is less than 200 mA / cm 2 .

6. The preparation method according to any one of claims 1 to 5, characterized in that: After thermally annealing the porous silicon layer after electrochemical oxidation treatment, the preparation method further comprises: A top electrode is deposited on the surface of the porous silicon layer, and a bottom electrode is deposited on the back side of the silicon wafer.

7. A porous silicon-based electron emission source, comprising a bottom electrode, a silicon substrate, a porous silicon layer and a top electrode stacked in sequence, characterized in that: The porous silicon-based electron emission source is prepared by the preparation method described in any one of claims 1 to 6.

8. A device for preparing a porous silicon-based electron emission source, characterized in that: include: A porous silicon obtaining device, used for obtaining a porous silicon layer; An electrochemical oxidation device, used for treating the porous silicon layer by an electrochemical oxidation method in a constant voltage mode, so as to fully and uniformly oxidize the porous silicon layer; The electrochemical oxidation method using a constant voltage mode to treat the porous silicon layer comprises: placing the porous silicon layer in a second electrolyte, and then applying a constant voltage between the porous silicon layer and the second electrolyte; The porous silicon layer is subjected to electrochemical oxidation treatment for a preset time; the second electrolyte includes a sulfuric acid solution, a nitric acid solution or a sodium hydroxide solution, and the solution concentration of the second electrolyte is between 0.1-5 mol / L; the constant voltage does not exceed 100 V, and the preset time does not exceed 60 min; the porous silicon layer is treated by the electrochemical oxidation method in a constant voltage mode, so that the holes from the silicon substrate are evenly distributed in the entire porous silicon layer, and oxidation is carried out simultaneously from the entire porous silicon layer, avoiding oxidation blocking phenomenon, thereby obtaining a uniformly and thoroughly oxidized porous silicon layer; The thermal annealing equipment is used to perform thermal annealing on the porous silicon layer after the electrochemical oxidation treatment.

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