A method for accessing all I2C slave devices in an A-PHY system

Abstract

The present invention discloses a method for accessing all I2C slave devices in an A-PHY system, and belongs to the field of signal processing. A mapping table of virtual addresses and physical addresses of I2C is provided in a deserializer and a serializer respectively; after the deserializer consults the mapping table according to the I2C address sent by the CPU, it is determined whether the access is to the deserializer itself or to a certain I2C slave device in the A-PHY link; after receiving a data packet sent on the A-PHY link, the serializer consults the virtual address and physical address mapping table on the serializer side according to the decoded address, and determines whether it is to the serializer itself or to a certain I2C slave device hanging under the serializer, so as to complete the CPU's access to any I2C slave device in the A-PHY system. The present invention avoids cumbersome configuration, reduces the burden of the external CPU, and improves the I2C access efficiency; and the mapping table can be configured through a register, which improves flexibility.

Description

Technical Field

[0001] The present invention relates to the technical field of signal processing, and in particular to a method for accessing all I2C slave devices in an A-PHY system. Background Art

[0002] In a MIPI A-PHY system, there are usually multiple I2C slave devices. When the CPU is on the deserializer side, there will be a need to access serializers in different links or I2C slave devices such as sensors attached to serializers through the A-PHY network. The same I2C slave devices in different links usually have the same slave device address. When the CPU needs to access these I2C slave devices, cumbersome configuration is required to successfully access the specified I2C slave device. Summary of the invention

[0003] The object of the present invention is to provide a method for accessing all I2C slave devices in an A-PHY system to solve the problems in the background technology.

[0004] To solve the above technical problems, the present invention provides a method for accessing all I2C slave devices in an A-PHY system, comprising:

[0005] Provide a mapping table between the virtual address and the physical address of I2C in the deserializer and serializer respectively;

[0006] The deserializer consults the mapping table based on the I2C address sent by the CPU to determine whether the access is to the deserializer itself or to an I2C slave device in the A-PHY link;

[0007] After receiving the data packet sent on the A-PHY link, the serializer consults the virtual address and physical address mapping table on the serializer side according to the decoded address to determine whether it is destined for the serializer itself or for an I2C slave device attached to the serializer, so as to complete the CPU's access to any I2C slave device in the A-PHY system.

[0008] In one implementation, when the A-PHY link is used for transmission, the physical address is used in the first A-PHY packet sent, and the transaction object address in the entire I2C transmission is parsed from the mapping table.

[0009] In one embodiment, the virtual address and physical address mapping table on the deserializer side includes a virtual broadcast address. When the CPU wants to access an I2C slave device with the same address, it only needs to issue the virtual broadcast address. The deserializer maps the virtual broadcast address to the corresponding physical address and adjusts the transaction object address in the A-PHY data packet according to the register configuration to determine whether the access is broadcast or multicast.

[0010] In one implementation, there are multiple I2C master devices on the deserializer side to access the serializer and its attached I2C slave devices, and the I2C master device information is recorded in the transaction object address field in the A-PHY data packet.

[0011] In one embodiment, the transaction object address information in the A-PHY data packet used by the serializer when replying to the I2C transmission is consistent with the transaction object address information of the received A-PHY data packet, and the deserializer decides to reply to the correct I2C master device based on the transaction object address information.

[0012] In one implementation, if it is a cascade system of multiple I2C slave devices, the physical address of the serializer side and the virtual address of the downstream deserializer are adjusted to keep them consistent, thereby achieving access to all I2C slave devices in the cascade system.

[0013] The present invention provides a method for accessing all I2C slave devices in an A-PHY system. A set of virtual address and physical address mapping tables is provided in a serializer and a deserializer, and a device address sent by an external I2C master device is mapped to each I2C slave device in the A-PHY system, thereby avoiding cumbersome configuration, reducing the burden of an external CPU, and improving I2C access efficiency. Moreover, the mapping table can be configured through a register, thereby improving flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of a specific implementation structure of a method for accessing all I2C slave devices in an A-PHY system provided by the present invention. DETAILED DESCRIPTION

[0015] The following is a further detailed description of a method for accessing all I2C slave devices in an A-PHY system proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in exact proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0016] The present invention provides a method for accessing all I2C slave devices in an A-PHY system, and provides a mapping table of virtual addresses and physical addresses of I2C in a deserializer and a serializer respectively, and the table is used to characterize the mapping relationship between virtual addresses and physical addresses; the deserializer consults the mapping table according to the I2C address sent by the CPU, and determines whether the access is to the deserializer itself or to a certain I2C slave device in a specific link of the A-PHY network. When the A-PHY link is used for transmission, the physical address used is in the first A-PHY packet sent, and the (transaction object address) TADDR in the entire I2C transmission is parsed by the mapping table.

[0017] After receiving the data packet sent on the A-PHY link, the serializer consults the virtual address and physical address mapping table on the serializer side according to the decoded address to determine whether it is destined for the serializer itself or for an I2C slave device under the serializer. In this way, the CPU can access any I2C slave device in the A-PHY system.

[0018] The virtual address and physical address mapping table on the deserializer side includes the virtual broadcast address. When the CPU wants to access the I2C slave device with the same address, it only needs to issue the virtual broadcast address. The deserializer maps the virtual broadcast address to the corresponding physical address and adjusts the TADDR in the A-PHY data packet according to the register configuration to determine whether the access is broadcast or multicast.

[0019] If there are multiple I2C master devices on the deserializer side accessing the serializer and its connected I2C slave devices, the I2C master device information is recorded in the TADDR field in the A-PHY data packet. The TADDR information in the A-PHY data packet used by the serializer when replying to the I2C transmission should be consistent with the TADDR information in the received A-PHY data packet. Only then can the deserializer decide to reply to the correct I2C master device based on the TADDR information.

[0020] If there are multiple I2C slave devices in the cascade system, you only need to adjust the physical address of the serializer and the virtual address of the downstream deserializer to keep them consistent, and you can access all I2C slave devices in the cascade system. Figure 1 For example, all deserializer addresses are 0x20, serializer address is 0x50, and sensor address is 0x10. When the I2C master accesses, the device address sent is 0x1a. According to the layer-by-layer translation of virtual address and physical address, the A-PHY data packet sent by Des0 (deserializer 0) goes to Ser0 (serializer 0) under PORT0 (port 0). Ser0 sends the access request to Des1 through the I2C bus. Des1 also sends the A-PHY data packet to Ser10 under PORT0. After the mapping of virtual address and physical address, the address sent by Ser10 on the I2C bus is 0x10, and finally the sensor 10 is accessed.

[0021] The present invention can improve the speed at which a CPU accesses all I2C slave devices in an A-PHY system, reduce the burden on the CPU, and provide a good user experience.

[0022] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for accessing all I2C slave devices in an A-PHY system, characterized in that: include: Provide a mapping table between the virtual address and the physical address of I2C in the deserializer and serializer respectively; The deserializer consults the mapping table based on the I2C address sent by the CPU to determine whether the access is to the deserializer itself or to an I2C slave device in the A-PHY link; After receiving the data packet sent on the A-PHY link, the serializer consults the virtual address and physical address mapping table on the serializer side according to the decoded address to determine whether it is destined for the serializer itself or for an I2C slave device under the serializer, so as to complete the CPU's access to any I2C slave device in the A-PHY system; When using the A-PHY link for transmission, the physical address used is in the first A-PHY packet sent, and the transaction object address in the entire I2C transmission is parsed from the mapping table; The virtual address and physical address mapping table on the deserializer side includes a virtual broadcast address. When the CPU wants to access an I2C slave device with the same address, it only needs to issue the virtual broadcast address. The deserializer maps the virtual broadcast address to the corresponding physical address and adjusts the transaction object address in the A-PHY data packet according to the register configuration to determine whether the access is broadcast or multicast. The deserializer side has multiple I2C master devices that access the serializer and its attached I2C slave devices, and the I2C master device information is recorded in the transaction object address field in the A-PHY data packet; If it is a cascade system with multiple I2C slave devices, adjust the physical address of the serializer side and the virtual address of the downstream deserializer to make them consistent, so as to achieve access to all I2C slave devices in the cascade system.

2. The method for accessing all I2C slave devices in an A-PHY system according to claim 1, characterized in that: The transaction object address information in the A-PHY data packet used by the serializer when replying to the I2C master device access is consistent with the transaction object address information of the received A-PHY data packet, and the deserializer decides to reply to the correct I2C master device based on the transaction object address information.

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