Cache replacement method and device based on gated recurrent unit network

Abstract

The present invention relates to the field of computer storage technology, and provides a cache replacement method and device based on a gated recurrent unit network, comprising: obtaining a historical access sequence of a central processing unit; inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; replacing the cache content of the central processing unit according to the prediction result of the next cache access; wherein the cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples. The present invention applies a gated recurrent unit network to a cache replacement system, and by training and learning the historical cache access sequence of the processor, the entire cache replacement system has the ability to recognize the features of the access sequence, and can predict the next access data based on the existing access history, thereby updating the cache queue and realizing a cache replacement with good effectiveness and applicability.

Description

Technical Field

[0001] The present invention relates to the field of computer storage technology, and in particular to a cache replacement method and device based on a gated cycle unit network. Background Art

[0002] For data storage, different storage media have different access speeds. At the same time, with the continuous development of the central processing unit (CPU), the increasingly higher operating clock frequency and chip integration density have rapidly improved the performance of the CPU. Therefore, in the entire computer system, compared with storage media such as memory, the speed of the CPU will be much greater than the speed of the memory. The speed of the memory has become the key point for improving the performance of the entire computer system. In order to further balance the mismatch between the access speeds of the CPU and the memory and improve the speed of accessing data, the CPU has gradually developed level 1, level 2 and even level 3 caches. The main function of cache in a computer system is to solve the unequal relationship between the high-speed processing speed of the CPU and the access speed of the memory, so that the CPU first reads from the cache when accessing data or instructions, and returns immediately after reading, reducing the time to access the memory, thereby improving the overall efficiency.

[0003] Cache replacement and management strategy mainly refers to replacing appropriate data blocks according to the corresponding cache replacement algorithm under the condition of limited cache space, so as to accommodate newly accessed data blocks, improve the hit rate of data in the cache, and complete the update and replacement of the queue in the cache. The choice of a cache replacement method determines the performance of the cache system. The cache stores some frequently accessed data in the memory. The principle of program locality proposes that for a running program, the most recently used data or instructions will always be frequently accessed. A good cache replacement method can effectively manage the data in the cache, retain the most reasonable data, improve the overall cache hit rate, minimize the latency of CPU access, and make full use of the performance of the processor.

[0004] The Least Frequently Used (LFU) and the Least Recently Used (LRU) are two classic algorithms that are currently widely used. Among them, the LRU cache algorithm is mainly based on the historical access sequence of the cached data. Each time, the accessed data is placed at the head of the linked list or queue. When the cache is full, the data at the tail with the longest access time is selected for eviction. However, the LRU cache algorithm is relatively complex to implement. It requires the system to continuously update a data structure sorted by access time. At the same time, for periodic and occasional access data, it will cause "cache pollution" and other problems, and other frequently accessed data will be incorrectly replaced. The LFU cache algorithm mainly counts the access frequency of each cached data, and each time the cached data with the least access frequency is eliminated, and the data with the same access frequency is randomly eliminated. However, because the LFU cache algorithm needs to record the access frequency of each data, it has additional requirements for the size of the cache space, and LFU may have the problem of overflow of the access frequency counter. In addition, when the access mode changes, the access hit rate will drop sharply.

[0005] In addition, for LRU and LFU algorithms, both strategies are heuristic algorithms. With the increase of system complexity and the diversity of memory access in computers, the adaptability of heuristic algorithms is poor. At the same time, these methods perform better in specific scenarios. In the case of a single type of I / O, the cache hit rate is high, but in the case of diverse and complex I / O sequences, the cache hit rate drops seriously.

[0006] In summary, the cache replacement method in the prior art has the problems of low effectiveness and poor adaptability. Summary of the invention

[0007] The present invention provides a cache replacement method and device based on a gated cyclic unit network, which are used to solve the defects of low effectiveness and poor adaptability in the prior art and realize cache replacement with good effectiveness and good applicability.

[0008] The present invention provides a cache replacement method based on a gated cycle unit network, comprising the following steps:

[0009] Get the historical access sequence of the CPU;

[0010] Inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access;

[0011] Replacing the cache content of the central processing unit according to the next cache access prediction result;

[0012] The cache prediction model is obtained by training a gated recurrent unit network using massive historical access sequence samples.

[0013] According to a cache replacement method based on a gated recurrent unit network provided by the present invention, the cache prediction model is obtained by training the gated recurrent unit network using a large number of historical access sequence samples, specifically comprising:

[0014] Acquire a large amount of historical access sequence samples of the central processor;

[0015] Extracting each of the historical access sequence samples using a sliding window of a preset size according to a preset step length to obtain an original data sample, and then obtaining an original data set;

[0016] Each of the original data samples is divided according to a preset ratio to obtain a training data sample, and then a training data set is obtained; wherein the training data sample includes an input sequence and a true output value;

[0017] Building a basic prediction model based on a gated recurrent unit network;

[0018] Inputting the input sequence of the training data samples into the basic prediction model in sequence to obtain the gated recurrent unit network prediction value;

[0019] The predicted value of the gated recurrent unit network is compared with the true output value of the training data sample, and the weights of each layer of the basic prediction model are updated using the cross entropy loss function until a preset end condition is reached to obtain the cache prediction model.

[0020] According to a cache replacement method based on a gated recurrent unit network provided by the present invention, the basic prediction model includes an update gate module, a reset gate module, a candidate hidden state module and a hidden state update module;

[0021] Wherein, the update gate module is used to determine the historical information influence coefficient for updating the current time step, and the historical information influence coefficient is used to describe the influence of the information of the historical time step on the information of the current time step;

[0022] The reset gate module is used to determine the historical information retention coefficient of the current time step, and the historical information retention coefficient is used to describe how much information of the hidden state of the historical time step will be retained when calculating the candidate hidden state;

[0023] The candidate hidden state module is used to calculate the candidate hidden state according to the historical information retention coefficient, the input of the current time step and the hidden state of the previous time step;

[0024] The hidden state updating module is used to perform weighted averaging based on the historical information influence coefficient, the candidate hidden state and the hidden state of the previous time step to obtain the hidden state of the current time step.

[0025] According to a cache replacement method based on a gated recurrent unit network provided by the present invention, each of the original data samples is segmented according to a preset ratio to obtain a training data sample, and the method further includes:

[0026] The similarity of the original data samples is calculated, and the original data samples whose similarity is greater than a preset similarity threshold are deleted.

[0027] According to a cache replacement method based on a gated recurrent unit network provided by the present invention, the original data sample is segmented according to a preset ratio to obtain a training data sample, which specifically includes:

[0028] The last data of the original data sample is used as the true output value, and the remaining data is used as the input sequence to obtain a training data sample.

[0029] According to a cache replacement method based on a gated cyclic unit network provided by the present invention, the cache content of the central processing unit includes a FIFO queue, an LRU queue and a RRIP queue;

[0030] Accordingly, replacing the cache content of the central processing unit according to the next cache access prediction result specifically includes:

[0031] If the data block corresponding to the next cache access prediction result already exists in the RRIP queue, no operation is performed;

[0032] In the case where the data block corresponding to the prediction result of the next cache access does not exist in the RRIP queue, if the RRIP queue is not full, the data block corresponding to the prediction result of the next cache access is stored in the RRIP queue; if the RRIP queue is full or the system actively updates the cache, the cache block with the RRPV value of the RRIP queue being the target value is replaced with the corresponding data block of the prediction result of the next cache access, and its RRPV value is set to 0;

[0033] Among them, the priorities of the FIFO queue, the LRU queue and the RRIP queue decrease in sequence, and the data eliminated by the previous queue enters the next queue, and the RRPV value of the corresponding cache block is set to 0 at the same time; the initial RRPV values ​​of the cache blocks in the queue are all the target values; the target value is related to the size of the cache block, and the RRPV value is used to indicate the dynamic change of the frequency of the cache block being accessed. If the cache block is accessed, its RRPV value is reduced by one.

[0034] The present invention also provides a cache replacement device based on a gated cycle unit network, comprising the following modules:

[0035] A data unit, used to obtain the historical access sequence of the central processor;

[0036] A prediction unit, used for inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access;

[0037] A replacement unit, used for replacing the cache content of the central processing unit according to the next cache access prediction result;

[0038] The training unit is used to obtain the cache prediction model by training based on a gated recurrent unit network using a large amount of historical access sequence samples.

[0039] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, a cache replacement method based on a gated cyclic unit network as described above is implemented.

[0040] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the cache replacement method based on a gated cyclic unit network as described in any one of the above is implemented.

[0041] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the cache replacement method based on a gated cycle unit network as described above is implemented.

[0042] The cache replacement method and device based on the gated recurrent unit network provided by the present invention obtains the historical access sequence of the central processing unit; inputs the historical access sequence into a pre-built cache prediction model to obtain the next cache access prediction result; and replaces the cache content of the central processing unit according to the next cache access prediction result; wherein the cache prediction model is obtained by training the gated recurrent unit network using a large number of historical access sequence samples. The present invention applies the gated recurrent unit network to the cache replacement system, and by training and learning the historical cache access sequence of the processor, the entire cache replacement system has the ability to recognize the characteristics of the access sequence, and can predict the next access data based on the existing access history, thereby updating the cache queue, effectively improving the accuracy of cache prediction and the effectiveness of replacement, and realizing cache replacement with good effectiveness and applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 This is one of the flow charts of the cache replacement method based on the gated cycle unit network provided by the present invention.

[0045] Figure 2 This is the second flow chart of the cache replacement method based on the gated recurrent unit network provided by the present invention.

[0046] Figure 3 This is the third flow chart of the cache replacement method based on the gated recurrent unit network provided by the present invention.

[0047] Figure 4 It is a structural schematic diagram of a cache replacement device based on a gated cyclic unit network provided by the present invention.

[0048] Figure 5 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] Combine the following Figure 1-Figure 3 Describe the cache replacement method based on the gated recurrent unit network of the present invention, Figure 1 is one of the flow charts of the cache replacement method based on the gated cycle unit network provided by the present invention, such as Figure 1 As shown, the method comprises the following steps:

[0051] Step 110: Obtain the historical access sequence of the central processing unit.

[0052] It should be noted that what is obtained is the historical access sequence of the CPU that needs to perform cache replacement. Furthermore, the historical access sequence is the user's recent access sequence (or request sequence) to data stored in the CPU, including the response to the user's access habits and program usage.

[0053] Step 120: Input the historical access sequence into a pre-built cache prediction model to obtain a prediction result for the next cache access.

[0054] It is understood that the traditional cache replacement method will generate more cache misses when facing diverse user operations, which requires wasting computer resources for replacement, slowing down program running speed and increasing computing costs. The present invention uses neural networks for prediction, reduces cache misses, improves computing efficiency and speed, saves costs, and facilitates deployment.

[0055] The present invention applies an improved recurrent neural network (RNN) - gated recurrent unit network (GRU) to the cache replacement system, and obtains a cache prediction model based on the gated recurrent unit network using massive historical access sequence samples for training. The trained cache prediction model can predict the next accessed data by factors such as the sequence characteristics of cache accesses and different access forms and the survival time of data in the cache. It should be pointed out that the recurrent neural network, as a special neural network structure, can be applied to processing data with a temporal relationship or sequence structure such as natural language and audio signals. For the cache replacement method, it can also be similar to an access sequence. By studying the characteristics of the access sequence, the next access data of a certain access sequence can be predicted, and then the content in the cache can be replaced and updated in combination with the cache replacement algorithm.

[0056] In actual application, the historical access sequence obtained in step 110 is input into the cache prediction model, and the next cache access prediction result is output.

[0057] The present invention introduces a gated recurrent neural network with a memory function into the cache prediction process, utilizes the learning and processing capabilities of the neural network for continuous nonlinear data, and effectively improves the accuracy of cache prediction and the effectiveness of replacement.

[0058] Step 130: Replace the cache content of the central processing unit according to the next cache access prediction result.

[0059] In step 130, the cache content is replaced and updated according to the prediction of the next access address output by the trained cache prediction model.

[0060] It needs to be explained that in order to more reliably replace and update the cache content, the cache content of the central processing unit is arranged in a queue, and the cache queue is updated based on the cache prediction model outputting the next cache access prediction result.

[0061] The following further describes the steps for training the cache prediction model. In some embodiments, the cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples, specifically including:

[0062] Step 210: Obtaining a large amount of historical access sequence samples of the central processor;

[0063] Step 220: extract each of the historical access sequence samples using a sliding window of a preset size according to a preset step length to obtain an original data sample, and then obtain an original data set;

[0064] Step 230: Split each of the original data samples according to a preset ratio to obtain training data samples, and then obtain a training data set; wherein the training data samples include input sequences and true output values;

[0065] Step 240: constructing a basic prediction model based on the gated recurrent unit network;

[0066] Step 250: sequentially inputting the input sequence of the training data samples into the basic prediction model to obtain a gated recurrent unit network prediction value;

[0067] Step 260: Compare the predicted value of the gated recurrent unit network with the true output value of the training data sample, and use the cross entropy loss function to update the weights of each layer of the basic prediction model until the preset end condition is reached to obtain the cache prediction model.

[0068] Specifically, in step 210, a plurality of historical access sequence samples of the CPU that needs to perform cache replacement are first obtained. The historical access sequence samples are essentially the same as the historical access sequences in step 110, and the present invention will not be repeated here. In addition, the historical access sequences in step 110 can be directly used as historical access sequence samples to participate in the training of the cache prediction model, such as Figure 2 shown.

[0069] In step 220, the acquired historical access sequence samples are preprocessed to obtain raw data samples, and then the raw data set is obtained. It should be noted that the raw data samples are extracted from the historical access sequence samples using a sliding window, and the main purpose of the preprocessing is to screen and filter the data in the historical access sequence samples. In the specific implementation process, statistics are performed on the historical access sequence samples with a sliding window of size W (preset size) and a step size of s (preset step size) to determine the raw data samples. Among them, assuming that the length of the historical request sequence is L, the subsequences (i.e., raw data samples) collected by the sliding window are (LW) / s+1.

[0070] In step 230, each original data sample is segmented according to a preset ratio to obtain a training data sample, and multiple training data samples constitute a training data set. It should be noted that the purpose of segmentation is to obtain the input sequence and accurate true output value of the model, and the input sequence and the true output value are taken as a training data sample. Further, the training data sample can be recorded as a set of vectors (X, Y), where X is the input sequence, that is, the input of the model, and Y is the true output value that the trained prediction model should have.

[0071] Based on the above embodiments, the method of segmenting the original data samples is further described. In some embodiments, the original data samples are segmented according to a preset ratio to obtain training data samples, specifically including:

[0072] The last data of the original data sample is used as the true output value, and the remaining data is used as the input sequence to obtain a training data sample.

[0073] Specifically, for a series of original data samples obtained in step 220, the size of each data is the length W of the sliding window, the first W-1 items of each original data sample are taken as the input sequence, and the last item is taken as the true output value, which is essentially the predicted target value of the input sequence, to obtain the training data sample. In other words, the entire sequence of training data samples is composed of Composition, among which Y is the target value for training.

[0074] In step 240, a basic prediction model is constructed based on the gated recurrent unit network. It should be noted that the gated recurrent network is a neural network with a memory function, which can continuously learn the user's access characteristics or habits to applications or data, predict the access address at the next moment based on the historical access sequence, and adapt to the changing access behavior. Constructing a basic prediction model based on the gated recurrent unit network can effectively give play to the advantages of the gated recurrent unit network and ensure the accuracy of cache prediction and the effectiveness of replacement.

[0075] In step 250 and step 260, the basic prediction model is trained using the training data set until a preset end condition is reached, and the current basic prediction model is output as a cached prediction model.

[0076] During the training process, the input sequence of each training data sample is used as the input of the basic prediction model to obtain the gated recurrent unit network prediction value output by the basic prediction model. The cross entropy loss function between the true output value corresponding to the input sequence and the gated recurrent unit network prediction value is selected to update the weights of each layer and finally complete the training.

[0077] Further, based on the above embodiments, the construction of a basic prediction model based on a gated recurrent unit network is further described. In some embodiments, the basic prediction model includes an update gate module, a reset gate module, a candidate hidden state module, and a hidden state update module;

[0078] Wherein, the update gate module is used to determine the historical information influence coefficient for updating the current time step, and the historical information influence coefficient is used to describe the influence of the information of the historical time step on the information of the current time step;

[0079] The reset gate module is used to determine the historical information retention coefficient of the current time step, and the historical information retention coefficient is used to describe how much information of the hidden state of the historical time step will be retained when calculating the candidate hidden state;

[0080] The candidate hidden state module is used to calculate the candidate hidden state according to the historical information retention coefficient, the input of the current time step and the hidden state of the previous time step;

[0081] The hidden state updating module is used to perform weighted averaging based on the historical information influence coefficient, the candidate hidden state and the hidden state of the previous time step to obtain the hidden state of the current time step.

[0082] Specifically, each cell in the gated recurrent unit network receives a current input x t , and a hidden state passed down from the previous node h t-1 , this hidden state contains the corresponding information of the previous node. x t and h t-1 , GRU can get the output of the current hidden node y t and the hidden state passed to the next node h t The main components of GRU include update gate and reset gate, which control the flow of information in the hidden state. The present invention divides the basic prediction model into update gate module, reset gate module, candidate hidden state module and hidden state update module according to the calculation process of the gated recurrent unit network.

[0083] 1) The update gate module includes an update gate. How much past information will affect the current time step is determined by the update gate, and its output is recorded as the historical information impact coefficient. In other words, the historical information impact coefficient reflects the impact of the information of the historical time step on the information of the current time step. The calculation formula of the historical information impact coefficient is as follows:

[0084] ;

[0085] in, x t is the input of the current time step, h t-1 is the hidden state at the previous time step, W z and U z are the weight matrices for input and hidden states, respectively, b z is the bias term, σ is the Sigmoid activation function .

[0086] 2) The reset gate module includes a reset gate, which is used to control how much information of the past hidden state will be retained when calculating the candidate hidden state. Its output is recorded as the historical information retention coefficient. In other words, the historical information retention coefficient reflects how much information of the hidden state of the historical time step will be retained when calculating the candidate hidden state. The calculation formula of the historical information retention coefficient is as follows:

[0087] ;

[0088] in, W r and U r are the weight matrices for input and hidden states, respectively, b r is the bias term.

[0089] 3) Candidate hidden state module, used to calculate the candidate hidden state of the current time step. The candidate hidden state represents the possible hidden state of the current time step, which combines the hidden state of the historical time step adjusted by the reset gate and the current input. The calculation formula of the candidate hidden state of the current time step is as follows:

[0090] ;

[0091] in, W h and U h is the weight matrix, b h is the bias term, ⊙ represents element-by-element multiplication, tanh is the hyperbolic tangent function, .

[0092] 4) Hidden state update module, used to calculate the hidden state of the current time step. In the actual calculation process, the update gate is used to perform weighted average of the past hidden state and the candidate hidden state to obtain the hidden state of the current time step (Hidden State Update). The calculation formula is as follows:

[0093] .

[0094] Based on the above embodiments, in order to further improve the effectiveness of the data for training the cache prediction model. In some embodiments, each of the original data samples is segmented according to a preset ratio to obtain a training data sample, and the method also includes:

[0095] The similarity of the original data samples is calculated, and the original data samples whose similarity is greater than a preset similarity threshold are deleted.

[0096] Specifically, the number of collected raw data samples is limited, which cannot effectively train the neural network, and contains many similar sequences. Therefore, in this embodiment, the raw data set is preprocessed, filtered by similarity, and then the training data set is obtained. The data set obtained in this way can reflect the typical characteristics of the visit and improve the effectiveness of the model.

[0097] In some embodiments, the Tanimoto coefficient is used to calculate the similarity of each two sequences, and the value range of T is [0, 1], 1 when there is complete overlap, and 0 when there is no overlap. The closer to 1, the more similar. By calculating the Tanimoto coefficient, the sequences with T greater than the preset similarity threshold are filtered out.

[0098] ;

[0099] In a specific embodiment, the preset similarity threshold is 0.9.

[0100] Furthermore, the replacement of cache contents is further described. In some embodiments, the cache contents of the central processor include a FIFO queue, an LRU queue, and an RRIP queue;

[0101] Accordingly, replacing the cache content of the central processing unit according to the next cache access prediction result specifically includes:

[0102] If the data block corresponding to the next cache access prediction result already exists in the RRIP queue, no operation is performed;

[0103] In the case where the data block corresponding to the prediction result of the next cache access does not exist in the RRIP queue, if the RRIP queue is not full, the data block corresponding to the prediction result of the next cache access is stored in the RRIP queue; if the RRIP queue is full or the system actively updates the cache, the cache block whose RRPV value (Re-Reference Prediction Value) of the RRIP queue is the target value is replaced with the corresponding data block of the prediction result of the next cache access, and its RRPV value is set to 0;

[0104] Among them, the priorities of the FIFO queue, the LRU queue and the RRIP queue decrease in sequence, and the data eliminated by the previous queue enters the next queue, and the RRPV value of the corresponding cache block is set to 0 at the same time; the initial RRPV values ​​of the cache blocks in the queue are all the target values; the target value is related to the size of the cache block, and the RRPV value is used to indicate the dynamic change of the frequency of the cache block being accessed. If the cache block is accessed, its RRPV value is reduced by one.

[0105] Specifically, in this embodiment, it is stipulated that the entire cache is composed of three cache queues. The first-level cache queue is updated in FIFO (First In First Out) mode, which is called FIFO queue; the second-level cache queue is updated in LRU (Least Recently Used) mode, which is called LRU queue; the third-level cache queue is updated in RRIP (Re-Reference Interval Prediction) mode, which is called RRIP queue. It should be noted that the re-reference interval prediction algorithm uses M bits to store the RRPV value of each data. The RRPV value changes dynamically with the frequency of each data being accessed, and the data with the RRPV value equal to is replaced each time.

[0106] Based on the above embodiment, the update process of the multi-level queue is as follows: Figure 3 That is to say, each replacement data is the data eliminated by the first two levels of queues, which can improve the efficiency of cache replacement, reduce the efficiency decline of the entire cache replacement system due to the instability of the prediction algorithm, and improve the stability of the system.

[0107] It should be emphasized that the data predicted by the trained gated recurrent network (i.e., cache prediction model) will provide a basis for updating the last-level cache queue (i.e., RRIP queue), ensuring a high cache hit rate under different access modes.

[0108] The queue update method is explained as follows: the data predicted by the gated recurrent network, that is, the data block corresponding to the prediction result of the next cache access, if it already exists in the cache queue, no operation will be performed; if the data block corresponding to the prediction result of the next cache access does not exist in the cache queue, the predicted result will be stored in the cache queue. If the cache is full or the system is actively updated, the evicted data block will be calculated and replaced according to the cache replacement strategy.

[0109] The cache replacement strategy is as follows: the next cache access prediction result will be used as an important reference item for the last level queue update, and the cache block will be selected for replacement based on the target value. It should be noted that the target value is related to the size of the cache block. In the initial state, all RRPV values ​​are target values. Once a cache block is hit, the RRPV value of the cache block is set to 0; once a cache block is missing, a cache block that has been accessed for a long time will be selected for replacement.

[0110] In one embodiment, M bits are used to store the RRPV value of each cache block, and the RRPV value changes dynamically with the frequency at which each data is accessed. For example, if the M value is set to 2 and the RRPV value is 0, it means that the cache block has been recently accessed, indicating that the user will soon access the cache block again; if the RRPV value is 3, it means that the cache block has not been accessed recently and will not be accessed in a short time; if the RRPV value is 1 or 2, it means that the cache block is more likely to be accessed. It should be noted that in the initial state, all RRPV values ​​are 3.

[0111] Based on the above embodiment, when the cache is full or the system is actively updating, the target value is set to the size of the cache block plus 1. In the actual operation process, the cache block whose RRPV value is the target value is searched, and if there is only one cache block that meets the conditions, it is replaced with the corresponding data block of the next cache access prediction result, and its RRPV value is set to 2. If there are 0 cache blocks that meet the conditions, the RRPV values ​​of all cache blocks are increased by 1 until a cache block with an RRPV value of the target value is found. If there are multiple cache blocks that meet the conditions, the first cache block with an RRPV value of 3 found will be replaced in order.

[0112] In a specific embodiment, the M value is set to 2, and a block with an RRPV value of 3 is first searched for replacement, and its RRPV value is set to 2; if a cache block with an RRPV value of 3 is not found, the RRPV values ​​of all cache blocks are increased by 1 until a cache block with an RRPV value of 3 is found.

[0113] The embodiment of the present invention uses the result of model prediction as an important reference during cache replacement and update, and only updates the last-level cache queue, thereby ensuring the reliability of the overall system.

[0114] Based on the above embodiment, it should be emphasized that there are two situations for updating the last-level cache queue (i.e., RRIP queue). The first is that the data eliminated by the previous-level queue enters the RRIP queue, and its RRPV value is set to 0. The second is that when the cache is full or the entire system needs to actively update the cache, the historical access sequence is predicted through a gated loop network to predict the next possible access value, and it is added to the RRIP queue and its RRPV is set to 0. At the same time, the block with an RRPV value of 3 is searched and replaced to complete the queue update.

[0115] The cache replacement method based on the gated recurrent unit network provided by the present invention obtains the historical access sequence of the central processing unit; inputs the historical access sequence into a pre-built cache prediction model to obtain the next cache access prediction result; and replaces the cache content of the central processing unit according to the next cache access prediction result; wherein the cache prediction model is obtained by training the gated recurrent unit network using a large number of historical access sequence samples. The present invention applies the gated recurrent unit network to the cache replacement system, and by training and learning the historical cache access sequence of the processor, the entire cache replacement system has the ability to recognize the characteristics of the access sequence, and can predict the next access data based on the existing access history, thereby updating the cache queue, effectively improving the accuracy of cache prediction and the effectiveness of replacement, and realizing cache replacement with good effectiveness and applicability.

[0116] The cache replacement device based on the gated cycle unit network provided by the present invention is described below. The cache replacement device based on the gated cycle unit network described below and the cache replacement method based on the gated cycle unit network described above can be referred to each other. Figure 4 As shown, the device includes the following modules:

[0117] Data unit 410, used to obtain the historical access sequence of the central processor;

[0118] A prediction unit 420, configured to input the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access;

[0119] A replacement unit 430, configured to replace the cache content of the central processing unit according to the next cache access prediction result;

[0120] The training unit 440 is used to perform training based on a gated recurrent unit network using a large amount of historical access sequence samples to obtain the cache prediction model.

[0121] According to a cache replacement device based on a gated recurrent unit network provided by the present invention, the cache prediction model is obtained by training the gated recurrent unit network using a large number of historical access sequence samples, specifically comprising:

[0122] Acquire a large amount of historical access sequence samples of the central processor;

[0123] Extracting each of the historical access sequence samples using a sliding window of a preset size according to a preset step length to obtain an original data sample, and then obtaining an original data set;

[0124] Each of the original data samples is divided according to a preset ratio to obtain a training data sample, and then a training data set is obtained; wherein the training data sample includes an input sequence and a true output value;

[0125] Building a basic prediction model based on a gated recurrent unit network;

[0126] Inputting the input sequence of the training data samples into the basic prediction model in sequence to obtain the gated recurrent unit network prediction value;

[0127] The predicted value of the gated recurrent unit network is compared with the true output value of the training data sample, and the weights of each layer of the basic prediction model are updated using the cross entropy loss function until a preset end condition is reached to obtain the cache prediction model.

[0128] According to a cache replacement device based on a gated recurrent unit network provided by the present invention, the basic prediction model includes an update gate module, a reset gate module, a candidate hidden state module and a hidden state update module;

[0129] Wherein, the update gate module is used to determine the historical information influence coefficient for updating the current time step, and the historical information influence coefficient is used to describe the influence of the information of the historical time step on the information of the current time step;

[0130] The reset gate module is used to determine the historical information retention coefficient of the current time step, and the historical information retention coefficient is used to describe how much information of the hidden state of the historical time step will be retained when calculating the candidate hidden state;

[0131] The candidate hidden state module is used to calculate the candidate hidden state according to the historical information retention coefficient, the input of the current time step and the hidden state of the previous time step;

[0132] The hidden state updating module is used to perform weighted averaging based on the historical information influence coefficient, the candidate hidden state and the hidden state of the previous time step to obtain the hidden state of the current time step.

[0133] According to a cache replacement device based on a gated recurrent unit network provided by the present invention, each of the original data samples is segmented according to a preset ratio to obtain a training data sample, and the method further includes:

[0134] The similarity of the original data samples is calculated, and the original data samples whose similarity is greater than a preset similarity threshold are deleted.

[0135] According to a cache replacement device based on a gated recurrent unit network provided by the present invention, the original data sample is segmented according to a preset ratio to obtain a training data sample, specifically comprising:

[0136] The last data of the original data sample is used as the true output value, and the remaining data is used as the input sequence to obtain a training data sample.

[0137] According to a cache replacement device based on a gated cyclic unit network provided by the present invention, the cache content of the central processing unit includes a FIFO queue, an LRU queue and a RRIP queue;

[0138] Accordingly, replacing the cache content of the central processing unit according to the next cache access prediction result specifically includes:

[0139] If the data block corresponding to the next cache access prediction result already exists in the RRIP queue, no operation is performed;

[0140] In the case where the data block corresponding to the prediction result of the next cache access does not exist in the RRIP queue, if the RRIP queue is not full, the data block corresponding to the prediction result of the next cache access is stored in the RRIP queue; if the RRIP queue is full or the system actively updates the cache, the cache block with the RRPV value of the RRIP queue being the target value is replaced with the corresponding data block of the prediction result of the next cache access, and its RRPV value is set to 0;

[0141] Among them, the priorities of the FIFO queue, the LRU queue and the RRIP queue decrease in sequence, and the data eliminated by the previous queue enters the next queue, and the RRPV value of the corresponding cache block is set to 0 at the same time; the initial RRPV values ​​of the cache blocks in the queue are all the target values; the target value is related to the size of the cache block, and the RRPV value is used to indicate the dynamic change of the frequency of the cache block being accessed. If the cache block is accessed, its RRPV value is reduced by one.

[0142] The cache replacement device based on the gated recurrent unit network provided by the present invention obtains the historical access sequence of the central processing unit; inputs the historical access sequence into a pre-built cache prediction model to obtain the next cache access prediction result; and replaces the cache content of the central processing unit according to the next cache access prediction result; wherein the cache prediction model is obtained by training the gated recurrent unit network using a large number of historical access sequence samples. The present invention applies the gated recurrent unit network to the cache replacement system, and by training and learning the historical cache access sequence of the processor, the entire cache replacement system has the ability to recognize the characteristics of the access sequence, and can predict the next access data based on the existing access history, thereby updating the cache queue, effectively improving the accuracy of cache prediction and the effectiveness of replacement, and realizing cache replacement with good effectiveness and applicability.

[0143] Figure 5 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 communicate with each other through the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute a cache replacement method based on a gated recurrent unit network, the method comprising: obtaining a historical access sequence of a central processing unit; inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; replacing the cache content of the central processing unit according to the prediction result of the next cache access; wherein the cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples.

[0144] In addition, the logic instructions in the above-mentioned memory 530 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0145] On the other hand, the present invention also provides a computer program product, which includes a computer program, and the computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the cache replacement method based on the gated recurrent unit network provided by the above methods, and the method includes: obtaining a historical access sequence of a central processing unit; inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; replacing the cache content of the central processing unit according to the prediction result of the next cache access; wherein the cache prediction model is obtained by training a gated recurrent unit network using massive historical access sequence samples.

[0146] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the cache replacement method based on a gated recurrent unit network provided by the above-mentioned methods, the method comprising: obtaining a historical access sequence of a central processing unit; inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; replacing the cache content of the central processing unit according to the prediction result of the next cache access; wherein the cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples.

[0147] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0148] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0149] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A cache replacement method based on a gated recurrent unit network, characterized in that: include: Get the historical access sequence of the CPU; Inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; Replacing the cache content of the central processing unit according to the next cache access prediction result; The cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples; The cache contents of the CPU include FIFO queue, LRU queue and RRIP queue; Accordingly, replacing the cache content of the central processing unit according to the next cache access prediction result specifically includes: If the data block corresponding to the next cache access prediction result already exists in the RRIP queue, no operation is performed; In the case where the data block corresponding to the prediction result of the next cache access does not exist in the RRIP queue, if the RRIP queue is not full, the data block corresponding to the prediction result of the next cache access is stored in the RRIP queue; if the RRIP queue is full or the system actively updates the cache, the cache block with the RRPV value of the RRIP queue being the target value is replaced with the corresponding data block of the prediction result of the next cache access, and its RRPV value is set to 0; Among them, the priorities of the FIFO queue, the LRU queue and the RRIP queue decrease in sequence, and the data eliminated by the previous queue enters the next queue, and the RRPV value of the corresponding cache block is set to 0 at the same time; the initial RRPV values ​​of the cache blocks in the queue are all the target values; the target value is related to the size of the cache block, and the RRPV value is used to indicate the dynamic change of the frequency of the cache block being accessed. If the cache block is accessed, its RRPV value is reduced by one.

2. The cache replacement method based on gated cycle unit network according to claim 1, characterized in that: The cache prediction model is obtained by training a gated recurrent unit network using a large number of historical access sequence samples, specifically including: Acquire a large amount of historical access sequence samples of the central processor; Extracting each of the historical access sequence samples using a sliding window of a preset size according to a preset step length to obtain an original data sample, and then obtaining an original data set; Each of the original data samples is divided according to a preset ratio to obtain a training data sample, and then a training data set is obtained; wherein the training data sample includes an input sequence and a true output value; Building a basic prediction model based on a gated recurrent unit network; Inputting the input sequence of the training data samples into the basic prediction model in sequence to obtain the gated recurrent unit network prediction value; The predicted value of the gated recurrent unit network is compared with the true output value of the training data sample, and the weights of each layer of the basic prediction model are updated using the cross entropy loss function until a preset end condition is reached to obtain the cache prediction model.

3. The cache replacement method based on gated cycle unit network according to claim 2, characterized in that: The basic prediction model includes an update gate module, a reset gate module, a candidate hidden state module and a hidden state update module; Wherein, the update gate module is used to determine the historical information influence coefficient for updating the current time step, and the historical information influence coefficient is used to describe the influence of the information of the historical time step on the information of the current time step; The reset gate module is used to determine the historical information retention coefficient of the current time step, and the historical information retention coefficient is used to describe how much information of the hidden state of the historical time step will be retained when calculating the candidate hidden state; The candidate hidden state module is used to calculate the candidate hidden state according to the historical information retention coefficient, the input of the current time step and the hidden state of the previous time step; The hidden state updating module is used to perform weighted averaging based on the historical information influence coefficient, the candidate hidden state and the hidden state of the previous time step to obtain the hidden state of the current time step.

4. The cache replacement method based on gated cycle unit network according to claim 2, characterized in that: The step of dividing each of the original data samples according to a preset ratio to obtain a training data sample further includes: The similarity of the original data samples is calculated, and the original data samples whose similarity is greater than a preset similarity threshold are deleted.

5. The cache replacement method based on gated cycle unit network according to claim 2, characterized in that: The original data samples are divided according to a preset ratio to obtain training data samples, which specifically includes: The last data of the original data sample is used as the true output value, and the remaining data is used as the input sequence to obtain a training data sample.

6. A cache replacement device based on a gated recurrent unit network, characterized in that: include: A data unit, used to obtain the historical access sequence of the central processor; A prediction unit, used for inputting the historical access sequence into a pre-built cache prediction model to obtain a prediction result of the next cache access; A replacement unit, used for replacing the cache content of the central processing unit according to the next cache access prediction result; A training unit, used for training the cache prediction model based on a gated recurrent unit network using a large amount of historical access sequence samples; The cache contents of the CPU include FIFO queue, LRU queue and RRIP queue; Accordingly, replacing the cache content of the central processing unit according to the next cache access prediction result specifically includes: If the data block corresponding to the next cache access prediction result already exists in the RRIP queue, no operation is performed; In the case where the data block corresponding to the prediction result of the next cache access does not exist in the RRIP queue, if the RRIP queue is not full, the data block corresponding to the prediction result of the next cache access is stored in the RRIP queue; if the RRIP queue is full or the system actively updates the cache, the cache block with the RRPV value of the RRIP queue being the target value is replaced with the corresponding data block of the prediction result of the next cache access, and its RRPV value is set to 0; Among them, the priorities of the FIFO queue, the LRU queue and the RRIP queue decrease in sequence, and the data eliminated by the previous queue enters the next queue, and the RRPV value of the corresponding cache block is set to 0 at the same time; the initial RRPV values ​​of the cache blocks in the queue are all the target values; the target value is related to the size of the cache block, and the RRPV value is used to indicate the dynamic change of the frequency of the cache block being accessed. If the cache block is accessed, its RRPV value is reduced by one.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the cache replacement method based on the gated cycle unit network as described in any one of claims 1 to 5 is implemented.

8. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the cache replacement method based on a gated cycle unit network as claimed in any one of claims 1 to 5 is implemented.

9. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the cache replacement method based on a gated cycle unit network as claimed in any one of claims 1 to 5 is implemented.

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