Piezoelectric MEMS resonator and manufacturing method thereof, and electronic device

By using SOI substrate and acoustic resonance cavity design in piezoelectric MEMS resonator, the problems of process complexity and high production cost are solved, the anti-interference ability is improved, and the device performance is improved.

CN118611614BActive Publication Date: 2024-12-27HEFEI OUYIRUI CORE TECH CO LTD
View PDF 9 Cites 0 Cited by

Patent Information

Application Number
CN202411088618.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-09
Publication Date
2024-12-27
Estimated Expiration
2044-08-09

AI Technical Summary

Technical Problem

The existing piezoelectric MEMS resonators have high process complexity, high production and manufacturing costs, and insufficient interfering capabilities of lateral propagation of mechanical waves, which affects device performance.

Method used

Using SOI substrate, annular grooves and release grooves are formed by etching, silicon oxide is filled, acoustic resonance cavity is formed, and a vacuum cavity is released on the side walls to ensure the integrity of the piezoelectric film and reduce interference.

Benefits of technology

It reduces process complexity and production cost, improves resistance to lateral crosstalk, and improves the overall performance of piezoelectric MEMS resonators.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN118611614B_ABST
    Figure CN118611614B_ABST
Patent Text Reader

Abstract

The invention relates to the technical field of semiconductor devices. In order to solve the technical problems of high cost and lateral crosstalk of current piezoelectric MEMS resonators, a piezoelectric MEMS resonator and a manufacturing method thereof and an electronic device are proposed. The method comprises: providing an SOI substrate; etching an upper silicon layer to form a first annular groove and a second annular groove; filling the first and second annular grooves with silicon oxide; forming a piezoelectric sensing structure in an area within the outer edge of the second annular groove; etching all the remaining silicon of the upper silicon layer in an area within the inner edge of the first annular groove to form a patterned cavity, in which at least one release hole is formed at at least one silicon segment; etching an oxide layer and a lower silicon layer under the release groove so that the etched chamber and the release groove together form an acoustic resonance cavity; vacuuming the space under the piezoelectric sensing structure, above the oxide layer and within the inner edge of the second annular groove and sealing all the release holes with a dielectric material to form a vacuum cavity.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a method for manufacturing a piezoelectric MEMS resonator, a piezoelectric MEMS resonator and an electronic device. Background Art

[0002] Piezoelectric MEMS (Micro-Electro-Mechanical System) resonator is a typical MEMS structure sensor that can be used in filters, clock crystals, fingerprint detection, gas detection, etc. Especially with the improvement of the properties of its core piezoelectric material, its application can be more extensive.

[0003] Current piezoelectric MEMS resonators generally use back cavities or closed cavities, which have high process complexity and high production costs. In particular, when forming a cavity on the front of a silicon wafer through a release process, it is necessary to form a release hole on the piezoelectric film. The release hole structure will destroy the integrity of the piezoelectric film, further causing the properties of the piezoelectric film material to deteriorate. In addition, the transversely propagating mechanical waves generated by the piezoelectric MEMS resonator during operation will interfere with adjacent devices. Therefore, its ability to resist transverse crosstalk also needs to be improved. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a piezoelectric MEMS resonator and a manufacturing method thereof, and an electronic device, which can reduce process complexity and production costs, and greatly improve the performance of the piezoelectric MEMS resonator and the overall product constituted by it.

[0005] The technical solution adopted by the present invention is as follows:

[0006] A method for manufacturing a piezoelectric MEMS resonator comprises the following steps: providing an SOI (Silicon-On-Insulator, silicon on insulator, a semiconductor substrate structure) substrate, wherein the SOI substrate comprises a lower silicon layer, an oxide layer and an upper silicon layer from bottom to top, the materials of the lower silicon layer and the upper silicon layer are silicon, and the material of the oxide layer is silicon oxide; etching the upper silicon layer to form a first annular groove and a second annular groove, wherein the second annular groove is located within the first annular groove, the depth of the first annular groove is equal to the thickness of the upper silicon layer as a whole, and the second annular groove has at least one section whose depth is less than the thickness of the upper silicon layer and the depth of the part other than the at least one section is equal to the thickness of the upper silicon layer, so as to retain at least one silicon section; filling the first annular groove and the second annular groove with silicon oxide; A second annular groove; forming a piezoelectric sensing structure in the area within the outer edge of the second annular groove; etching all remaining silicon of the upper silicon layer in the area within the inner edge of the first annular groove to form a patterned cavity, in which a release groove is formed between the inner edge of the first annular groove and the outer edge of the second annular groove, and at least one release hole is formed at the at least one silicon segment; etching the oxide layer and the lower silicon layer under the release groove, wherein the etching depth of the lower silicon layer is less than the thickness of the lower silicon layer, and the etching width of the lower silicon layer is greater than the width of the release groove, so that the etched chamber and the release groove together form an acoustic resonance cavity; vacuuming the space under the piezoelectric sensing structure, above the oxide layer, and within the inner edge of the second annular groove, and sealing all the release holes with dielectric materials to form a vacuum cavity.

[0007] The first annular groove and the second annular groove are polygonal rings or circular rings.

[0008] The acoustic resonance cavity is a Helmholtz resonance structure.

[0009] A piezoelectric sensing structure is formed in the area within the outer edge of the second annular groove, specifically including: depositing a lower electrode metal in the area within the outer edge of the second annular groove to form a lower electrode; depositing a piezoelectric material in the area within the outer edge of the second annular groove and on the lower electrode to form a piezoelectric film; depositing an upper electrode metal on the piezoelectric film to form an upper electrode, wherein the lower electrode, the piezoelectric film and the upper electrode together constitute the piezoelectric sensing structure.

[0010] The material of the lower electrode and the upper electrode is Mo or Pt.

[0011] The dielectric material also covers the inner wall of the acoustic resonance cavity.

[0012] The method for manufacturing the piezoelectric MEMS resonator further includes: depositing Pad metal to form a Pad.

[0013] The cross section of the chamber etched out by etching the lower silicon layer below the release groove is trapezoidal.

[0014] A piezoelectric MEMS resonator is manufactured by the manufacturing method of the piezoelectric MEMS resonator.

[0015] An electronic device comprises the above-mentioned piezoelectric MEMS resonator.

[0016] Beneficial effects of the present invention:

[0017] The present invention can ensure the integrity of the piezoelectric film and reduce process complexity and production costs by releasing silicon on the side wall to form a vacuum cavity. In addition, by forming an acoustic resonance cavity, the interference of the transversely propagating mechanical waves generated by the piezoelectric MEMS resonator during operation on adjacent devices can be reduced, the ability to resist transverse crosstalk can be improved, and the performance of the piezoelectric MEMS resonator and the overall product constituted by it can be further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a flow chart of a method for manufacturing a piezoelectric MEMS resonator according to an embodiment of the present invention;

[0019] Figure 2 A schematic diagram of the layer structure of an SOI substrate according to an embodiment of the present invention;

[0020] Figure 3 A top view of a piezoelectric MEMS resonator according to an embodiment of the present invention;

[0021] Figure 4 A cross-sectional view of a semi-finished product cut along the position AA' after the upper silicon layer is first etched according to an embodiment of the present invention;

[0022] Figure 5 A cross-sectional view of a semi-finished product after the annular groove is filled along the position of A-A' according to an embodiment of the present invention;

[0023] Figure 6 A cross-sectional view of a semi-finished product after forming a piezoelectric sensing structure along the position of AA' according to an embodiment of the present invention;

[0024] Figure 7 A cross-sectional view of a semi-finished product cut along the line AA' after the upper silicon layer is etched again according to an embodiment of the present invention;

[0025] Figure 8 A cross-sectional view of a semi-finished product after forming an acoustic resonance cavity along the position of AA' according to one embodiment of the present invention;

[0026] Fig. 9A cross-sectional view of a piezoelectric MEMS resonator cut along line AA' according to an embodiment of the present invention;

[0027] Fig.10 A cross-sectional view of a semi-finished product after the upper silicon layer is first etched along the position BB' according to an embodiment of the present invention;

[0028] Fig.11 A cross-sectional view of a semi-finished product after the annular groove is filled along the position of BB' according to an embodiment of the present invention;

[0029] Fig.12 A cross-sectional view of a semi-finished product after forming a piezoelectric sensing structure along the position of BB' according to an embodiment of the present invention;

[0030] Fig.13 A cross-sectional view of a semi-finished product after the upper silicon layer is etched again along the position BB' according to an embodiment of the present invention;

[0031] Fig.14 A cross-sectional view of a semi-finished product after forming an acoustic resonance cavity along the position of BB' according to an embodiment of the present invention;

[0032] Fig.15 The figure is a cross-sectional view of a piezoelectric MEMS resonator cut along the line BB' according to one embodiment of the present invention.

[0033] Reference numerals:

[0034] Lower silicon layer 1, oxide layer 2, upper silicon layer 3, first annular groove 4, second annular groove 5, silicon segment 6, SiO2 inner wall 7, SiO2 outer wall 8, lower electrode 9, piezoelectric film 10, upper electrode 11, patterned cavity 12, release groove 13, release hole 14, acoustic resonance cavity 15, dielectric material 16, vacuum cavity 17. DETAILED DESCRIPTION

[0035] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. The same fillings in the figures represent the same materials. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] like Figures 1 to 15 As shown, the method for manufacturing a piezoelectric MEMS resonator according to an embodiment of the present invention comprises the following steps:

[0037] S1, providing an SOI substrate, wherein the SOI substrate comprises, from bottom to top, a lower silicon layer 1, an oxide layer 2 and an upper silicon layer 3, the material of the lower silicon layer 1 and the upper silicon layer 3 is silicon, and the material of the oxide layer 2 is silicon oxide.

[0038] The layer structure of SOI substrate is as follows Figure 2 As shown, the silicon oxide may be SiO2.

[0039] It should be understood that the SOI substrate may also be replaced by a Si-SiO2-Si structure formed by bonding.

[0040] S2, etching the upper silicon layer 3 to form a first annular groove 4 and a second annular groove 5, wherein the second annular groove 5 is located within the first annular groove 4, the depth of the first annular groove 4 is equal to the thickness of the upper silicon layer 3 as a whole, and the second annular groove 5 has at least one section whose depth is less than the thickness of the upper silicon layer 3, and the depth of the part other than the at least one section is equal to the thickness of the upper silicon layer 3, so as to retain at least one silicon segment 6.

[0041] Figure 3 FIG. 1 is a top view of a piezoelectric MEMS resonator according to an embodiment of the present invention (in order to avoid affecting the position of the release groove 13, the dielectric material is hidden in the figure, and the white hexagon in the figure is the position of the release groove 13 (i.e., the upper half of the acoustic resonance cavity 15)). The following is a diagram of the various stages in step S2 and subsequent steps. Figure 3 The cross-sectional view of the corresponding semi-finished product is cut at the position A-A' and the position B-B' to explain step S2 and subsequent steps in detail. Figures 4 to 9 For along Figure 3 The cross-sectional view of the corresponding semi-finished product is cut at the position of A-A'. Figures 10 to 15 For along Figure 3 A cross-sectional view of the corresponding semi-finished product cut at the position BB'.

[0042] Step S2 is equivalent to etching the upper silicon layer 3 at the position of the first annular groove 4 until the oxide layer 2 is exposed; etching the upper silicon layer 3 at the position of the second annular groove 5 until the oxide layer 2 is exposed except for the position of the reserved silicon segment 6, and the oxide layer 2 is not exposed at the position of the reserved silicon segment 6. Figure 3 For example, the structure formed after executing step S2 can be referred to as Figure 4 and Fig.10 .

[0043] In one embodiment of the present invention, the first annular groove 4 and the second annular groove 5 may be polygonal rings or circular rings. Figure 3 Take the hexagonal ring as an example.

[0044] S3, filling the first annular groove 4 and the second annular groove 5 with silicon oxide.

[0045] In one embodiment of the present invention, the filler filling the first annular groove 4 and the second annular groove 5 is the same material as the oxide layer 2, and may also be SiO2. After the filling is completed, the upper surface of the filled area may be polished by a CMP (Chemical Mechanical Polishing) process.

[0046] The structure formed after executing step S2 can be referred to Figure 5 and Fig.11 At this point, the SiO2 inner wall 7 and the SiO2 outer wall 8 can be formed at the second annular groove 5 and the first annular groove 4 respectively, and the inside of the SiO2 inner wall 7 and the space between the SiO2 inner wall 7 and the SiO2 outer wall 8 are filled with silicon connected through the retained silicon segment 6.

[0047] S4, forming a piezoelectric sensing structure in the area within the outer edge of the second annular groove 5.

[0048] Specifically, a lower electrode metal can be deposited in an area within the outer edge of the second annular groove 5 to form a lower electrode 9, a piezoelectric material can be deposited in an area within the outer edge of the second annular groove 5 and on the lower electrode 9 to form a piezoelectric film 10, and then an upper electrode metal can be deposited on the piezoelectric film 10 to form an upper electrode 11, wherein the lower electrode 9, the piezoelectric film 10 and the upper electrode 11 together constitute a piezoelectric sensing structure.

[0049] The lower electrode 9 may cover part or all of the area within the outer edge of the second annular groove 5. Of course, when the lower electrode 9 only covers part of the area within the inner edge of the second annular groove 5, the piezoelectric film 10 should cover the outside of the inner edge of the second annular groove 5, so that the piezoelectric sensing structure closes the subsequent vacuum cavity.

[0050] The upper electrode 11 can also be patterned according to actual needs.

[0051] The structure formed after executing step S4 can be referred to Figure 6 and Fig.12 .

[0052] In one embodiment of the present invention, the material of the lower electrode 9 and the upper electrode 11 may be Mo or Pt.

[0053] S5, etching all the remaining silicon of the upper silicon layer 3 in the area within the inner edge of the first annular groove 4 to form a patterned cavity 12, in which a release groove 13 is formed between the inner edge of the first annular groove 4 and the outer edge of the second annular groove 5, and at least one release hole 14 is formed at at least one silicon segment 6.

[0054] Based on the inner and outer wall structures formed in step S3 and the oxide layer 2 of the SOI substrate, the silicon in the structure is etched away in step S5, thereby forming a patterned cavity 12. It should be understood that during etching, at least one release hole 14 can release the silicon in the SiO2 inner wall 7, and the release groove 13 can release the silicon in the release groove 13 and the silicon released from the release hole 14.

[0055] Preferably, two silicon segments 6 are reserved in step S2 to form two release holes 14 , thereby not only avoiding excessive release holes 14 but also facilitating the release of silicon compared with one release hole 14 .

[0056] The structure formed after executing step S5 can be referred to Figure 7 and Fig.13 .

[0057] S6, etching the oxide layer 2 and the lower silicon layer 1 under the release groove 13, wherein the etching depth of the lower silicon layer 1 is less than the thickness of the lower silicon layer 1, and the etching width of the lower silicon layer 1 is greater than the width of the release groove 13, so that the etched chamber and the release groove 13 together form an acoustic resonance cavity 15.

[0058] During etching, the etched silicon oxide and silicon can be released through the release groove 13. The cavity formed by etching the lower silicon layer 1 should have a space significantly larger than the release groove 13, so that the formed acoustic resonance cavity 15 is a Helmholtz resonance structure.

[0059] In an embodiment of the present invention, the etching width of the oxide layer 2 can be suitable for the width of the release groove 13, for example, the same as the width of the release groove 13; the etching width of the oxide layer 2 can also be suitable for the chamber formed by etching the lower silicon layer 1, for example, forming a large spatial structure together with the chamber.

[0060] The structure formed after executing step S6 can be referred to Figure 8 and Fig.14 .like Figure 8 and Fig.14 As shown, the cross section of the chamber etched out of the lower silicon layer below the release groove 13 may be a trapezoid.

[0061] S7 , vacuum treatment is performed on the space below the piezoelectric sensor structure, above the oxide layer 2 , and within the inner edge of the second annular groove 5 , and all release holes are sealed with a dielectric material 16 to form a vacuum cavity 17 .

[0062] In one embodiment of the present invention, the space formed by the piezoelectric sensing structure, the oxide layer 2 and the SiO2 inner wall 7 can be evacuated, and the dielectric material 16 can be deposited to laterally block all the release holes 14 to close the space and form a vacuum chamber 17.

[0063] Furthermore, the dielectric material 16 may also cover the inner wall of the acoustic resonance cavity 15 .

[0064] The structure formed after executing step S7 can be referred to Fig. 9 and Fig.15 .

[0065] Furthermore, in one embodiment of the present invention, after step S7, a Pad metal may be deposited to form a Pad. Thus, a complete piezoelectric MEMS resonator is obtained.

[0066] According to the manufacturing method of the piezoelectric MEMS resonator of the embodiment of the present invention, by etching annular grooves and retaining silicon segments on the SOI substrate, and subsequent deposition, etching and other processes, silicon can be released on the side wall to form a vacuum cavity, which can ensure the integrity of the piezoelectric film and reduce the process complexity and production costs. In addition, by forming an acoustic resonance cavity, the interference of the laterally propagating mechanical waves generated by the piezoelectric MEMS resonator during operation on adjacent devices can be reduced, the ability to resist lateral crosstalk can be improved, and the performance of the piezoelectric MEMS resonator and the overall product constituted by it can be further improved.

[0067] Based on the manufacturing method of the piezoelectric MEMS resonator of the above embodiment, the present invention further provides a piezoelectric MEMS resonator.

[0068] The piezoelectric MEMS resonator of the embodiment of the present invention is manufactured by the manufacturing method of the piezoelectric MEMS resonator of any of the above embodiments, and its structure includes a vacuum cavity and an acoustic resonance cavity, and the side of the vacuum cavity has a release hole blocked by a dielectric material. Its further specific structure can refer to the embodiment of the manufacturing method of the piezoelectric MEMS resonator and Figure 3 , Fig. 9 and Fig.15 , I will not go into details here.

[0069] The piezoelectric MEMS resonator according to the embodiment of the present invention has low process complexity and manufacturing cost, and the performance of the piezoelectric MEMS resonator and the overall product it constitutes is good.

[0070] Based on the piezoelectric MEMS resonator of the above embodiment, the present invention further provides an electronic device.

[0071] The electronic device of the embodiment of the present invention includes the piezoelectric MEMS resonator of any of the above embodiments of the present invention. The electronic device of the embodiment of the present invention can be a device including components such as filters and clock crystals used therein, and can specifically be a fingerprint detection device, a gas detection device, and the like.

[0072] The electronic device according to the embodiment of the present invention has lower manufacturing cost and better performance.

[0073] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. "Multiple" means two or more, unless otherwise clearly and specifically defined.

[0074] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0075] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0076] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0077] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0078] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0079] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0080] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0081] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0082] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A method for manufacturing a piezoelectric MEMS resonator, characterized in that: The following steps are involved: Providing an SOI substrate, wherein the SOI substrate comprises, from bottom to top, a lower silicon layer, an oxide layer and an upper silicon layer, the material of the lower silicon layer and the upper silicon layer is silicon, and the material of the oxide layer is silicon oxide; Etching the upper silicon layer to form a first annular groove and a second annular groove, wherein the second annular groove is located within the first annular groove, the depth of the first annular groove as a whole is equal to the thickness of the upper silicon layer, and the depth of at least one section of the second annular groove is less than the thickness of the upper silicon layer, and the depth of the portion other than the at least one section is equal to the thickness of the upper silicon layer, so as to retain at least one silicon section; filling the first annular groove and the second annular groove with silicon oxide; forming a piezoelectric sensing structure in a region within an outer edge of the second annular groove; Etching all the remaining silicon of the upper silicon layer in the area within the inner edge of the first annular groove to form a patterned cavity, in which a release groove is formed between the inner edge of the first annular groove and the outer edge of the second annular groove, and at least one release hole is formed at the at least one silicon segment; Etching the oxide layer and the lower silicon layer below the release groove, wherein the etching depth of the lower silicon layer is less than the thickness of the lower silicon layer, and the etching width of the lower silicon layer is greater than the width of the release groove, so that the etched cavity and the release groove together form an acoustic resonance cavity; The space below the piezoelectric sensing structure, above the oxide layer, and within the inner edge of the second annular groove is vacuum treated, and all the release holes are sealed with dielectric material to form a vacuum cavity.

2. The method for manufacturing a piezoelectric MEMS resonator according to claim 1, characterized in that: The first annular groove and the second annular groove are polygonal rings or circular rings.

3. The method for manufacturing a piezoelectric MEMS resonator according to claim 1, characterized in that: The acoustic resonance cavity is a Helmholtz resonance structure.

4. The method for manufacturing a piezoelectric MEMS resonator according to claim 1, characterized in that: A piezoelectric sensing structure is formed in the area within the outer edge of the second annular groove, specifically comprising: Depositing a lower electrode metal in a region within the outer edge of the second annular groove to form a lower electrode; Depositing a piezoelectric material in a region within the outer edge of the second annular groove and on the lower electrode to form a piezoelectric film; An upper electrode metal is deposited on the piezoelectric film to form an upper electrode, wherein the lower electrode, the piezoelectric film and the upper electrode together constitute the piezoelectric sensing structure.

5. The method for manufacturing a piezoelectric MEMS resonator according to claim 4, characterized in that: The material of the lower electrode and the upper electrode is Mo or Pt.

6. The method for manufacturing a piezoelectric MEMS resonator according to claim 1, characterized in that: The dielectric material also covers the inner wall of the acoustic resonance cavity.

7. The method for manufacturing a piezoelectric MEMS resonator according to claim 1, characterized in that: The cross section of the chamber etched out by etching the lower silicon layer below the release groove is trapezoidal.

8. A piezoelectric MEMS resonator, characterized in that: The piezoelectric MEMS resonator is manufactured by the manufacturing method of any one of claims 1 to 7.

9. An electronic device, characterized in that: Comprising a piezoelectric MEMS resonator according to claim 8.

Citation Information

Patent Citations

  • Bulk acoustic wave resonator and manufacturing method thereof

    CN112039480A

  • Film bulk acoustic resonator and preparation method thereof

    CN113328722A

  • Bulk acoustic wave resonator, preparation method thereof and filter

    CN116961613A

  • Formation method of via stud, and semiconductor structure

    JP2001351977A

  • Method of manufacturing BAW resonance device

    JP2010147871A