An integrated heterojunction trench gate field effect transistor
By introducing hexagonal trench and heterojunction diodes into the trench gate field effect transistor, the problem of insufficient device shutdown loss and voltage withstand voltage is solved, the current density and reliability are improved, and the application range is expanded.
Patent Information
- Application Number
- CN202411139251.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-20
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2044-08-20
AI Technical Summary
Existing trench gate field effect transistors have problems such as large loss, small current density and insufficient withstand voltage when the device is turned off, which limits their switching frequency and application range.
An integrated heterojunction trench gate field effect transistor is designed to increase channel area, reduce on-resistance, and introduce heterojunction diodes into the device by setting hexagonal trench and notch-shaped structures in the traditional structure. , improves the performance of the body diode, reduces the reverse recovery charge and turn on voltage.
It effectively reduces the switching loss of the device, improves the current density and device reliability, and increases the switching frequency and application range.
Smart Images
Figure CN118658884B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor technology, and in particular to an integrated heterojunction trench gate field effect transistor. Background Art
[0002] Trench gate field effect transistor (MOSFET) has the advantages of voltage control, lower on-resistance, low gate-drain charge density, low drive power, low switching loss and high input impedance, and high packaging density, and is a typical core device in power devices. Trench gate field effect transistor has attracted widespread attention from researchers because it can reduce the switching loss of the device on the basis of reducing the on-resistance, and at the same time improve its ability to withstand reverse breakdown voltage, thereby improving the reliability of the device.
[0003] With the rapid development of trench gate field effect transistors, their advantages such as low on-resistance, low driving power, low on-voltage drop and low switching loss have made trench gate field effect transistors more and more respected and concerned. Although the current density is increased and the withstand voltage is improved based on the application of trench gate and P-type shielding layer, if the P-type shielding layer is used, the current density will be relatively reduced and the withstand voltage will be increased. In addition, a large number of unbalanced carriers stored in the drift region when the device is turned off will cause the MOSFET device to have a long turn-off tail phenomenon, increase the switching loss of the device, and limit the switching frequency and application range of the MOSFET. The trade-off relationship between withstand voltage and on-resistance of MOSFET devices further limits the development of MOSFET. At the same time, with the continuous expansion of the application range of MOSFET, many new applications have put forward higher requirements on the unit area, working efficiency and reliability of MOSFET devices. Therefore, the research on the problems of slow turn-off speed, low current density and large on-resistance of MOSFET is of great significance. Summary of the invention
[0004] In view of the above-mentioned deficiencies in the prior art, the present invention provides an integrated heterojunction trench gate field effect transistor (MOSFET) which solves the problems of large turn-off loss, low current density and withstand voltage in conventional trench gate field effect transistor structures.
[0005] The technical solution of the present invention is achieved in this way:
[0006] An integrated heterojunction trench gate field effect transistor comprises an n-type silicon substrate, a first conductive type field stop layer and a first conductive type semiconductor drift region which are sequentially stacked from bottom to top, a plurality of sequentially arranged conductive modules are provided on the first conductive type semiconductor drift region, and two adjacent conductive modules are symmetrically arranged, and the conductive modules comprise a second conductive type electric field shielding region a, a second conductive type semiconductor deep well region, a second conductive type electric field shielding region b and a portion of a second conductive material which are sequentially arranged from outside to inside;
[0007] Wherein, a second conductive type hole injection region and a first conductive type electron emission region are provided on the upper surface of the second conductive type semiconductor deep well region, a first conductive type trench polysilicon region is embedded between the second conductive type semiconductor deep well region and the second conductive type electric field shielding region b, and first conductive type semiconductor regions are provided in the grooves on both sides of the top of the second conductive material, and the upper surfaces of the second conductive type electric field shielding region a, the second conductive type hole injection region, the first conductive type electron emission region, the first conductive type trench polysilicon region, the second conductive type electric field shielding region b, the first conductive type semiconductor region, and the second conductive type conductive material are all located on the same horizontal plane;
[0008] Part of the first conductive type trench polysilicon region is embedded in and directly contacts the second conductive type electric field shielding region b.
[0009] The beneficial effects of the above scheme are as follows: on the basis of the traditional trench gate MOSFET device structure, a hexagonal trench is set to increase the device channel area, thereby increasing the current density and reducing the on-resistance. At the same time, the setting of the "gap" structure and the P-type shielding layer delay the electric field strength of the gate, improve the reliability of the device, set an integrated heterojunction diode, improve the body diode, significantly reduce the reverse recovery charge and reverse turn-on voltage of the device, improve the switching characteristics, and thus reduce the total switching loss.
[0010] Optionally, a first electrode is provided on the upper surface of the first conductive type trench polysilicon region, a first conductive type insulating material gate oxide layer is provided on the outer wall of the first conductive type trench polysilicon region, the first conductive type trench polysilicon region is in direct contact with the first conductive type insulating material gate oxide layer and the first electrode, and the structure of the first conductive type trench polysilicon region is hexagonal, and the bottom is a notch-type structure, that is, there is a "notch"-type structure at the bottom, and the first conductive type insulating material gate oxide layer isolates the first conductive type trench polysilicon region from other conductive regions.
[0011] The beneficial effect of the above scheme is: through the above technical scheme, the electric field under the trench gate can be dispersed, reducing the risk of breakdown at the bottom of the gate, wherein the "notch" type trench can concentrate the electric field there and be absorbed by the electric field shielding layer that runs through its structure, so that the gate electric field is further reduced and the reliability of the device is improved. On the other hand, the hexagonal trench increases the channel density, increases the current density, and reduces the on-resistance.
[0012] Optionally, a second electrode c is provided on the upper surfaces of the second conductive type electric field shielding region a, the second conductive type semiconductor deep well region and the first conductive type electron emission region, and the second electrode c is in direct contact with them, and a second electrode d is provided on the second conductive type electric field shielding region b, the first conductive type semiconductor region and the second type of conductive material.
[0013] The beneficial effect of the above scheme is: through the above technical scheme, the first conductive and second conductive types of regions in the source area of the device are short-circuited, effectively preventing the parasitic transistor from being turned on. At the same time, the second electrode c is in direct contact with the second type of conductive material area to form the cathode of the special diode, thereby accelerating the reverse recovery speed of the device and improving the performance of the device body diode.
[0014] Optionally, the second conductive type electric field shielding region b is in direct contact with the second conductive type hole injection region, the second conductive type semiconductor deep well region, the first conductive type semiconductor region, the second type of conductive material and the first conductive type semiconductor drift region, and the second conductive type electric field shielding region b is in partial contact with the first conductive type trench polysilicon region.
[0015] The beneficial effect of the above scheme is: through the above technical scheme, the electric field can be delayed, the electric field near the bottom of the trench polysilicon gate can be shielded, the electric field of the current path not covered by the shielding layer can be reduced, the breakdown of the trench gate can be prevented, and the reliability of the device gate can be improved. At the same time, better protection is provided for the reverse withstand voltage of the device cell, and the breakdown voltage of the device can be adjusted by adjusting the concentration of this area.
[0016] Optionally, the second conductive material is in direct contact with the first conductive type semiconductor region, the second conductive type electric field shielding region a, the second conductive type electric field shielding region b and the first conductive type semiconductor drift region, and the second conductive material is a special material of the second conductive type, different from silicon carbide.
[0017] The beneficial effect of the above scheme is: through the above technical scheme, the device integrates a heterojunction diode. Due to the influence of its material and structure, the excess carriers in the drift region will flow out of the heterojunction faster during reverse recovery, making the heterojunction diode faster than an ordinary body diode, with a smaller voltage drop and smaller switching loss. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0019] Figure 1 A schematic diagram of the structure of a trench field effect transistor with an integrated heterojunction diode according to an embodiment;
[0020] Figure 2 FIG. 1 is a top view of a trench field effect transistor with an integrated heterojunction diode according to an embodiment, wherein the dotted line E is the Figure 1 The section line of
[0021] Figure 3 for Figure 1 Schematic diagram of the extended structure;
[0022] Figure 4 is a schematic diagram of the principle of Example 1, in which there are flow paths of electron current and hole current and carriers in the drift region;
[0023] Figure 5 It is a structural schematic diagram of Example 2;
[0024] Figure 6 is a top view of the layout of Example 2, wherein the dotted line E' is Figure 5 The section line of
[0025] Figure 7 A comparison diagram of the electric field intensity distribution curves at the bottom of the trench gate of Example 2 and Example 1;
[0026] Figure 8 It is a comparison diagram of the transmission characteristic curves of the devices in Example 2 and Example 1.
[0027] Figure Number:
[0028] 1. First conductivity type trench polysilicon region; 2. First conductivity type electron emission region; 3. Second conductivity type hole injection region; 4. First conductivity type semiconductor region; 5. Second conductivity type semiconductor deep well region; 6. Second conductive material; 71. Second conductive type electric field shielding region a; 72. Second conductive type electric field shielding region b; 8. First conductive type semiconductor drift region; 9. First conductive type field stop layer; 10. N-type silicon substrate; 11. First conductive material gate oxide layer; 101. First electrode; 1021. Second electrode c; 1022. Second electrode d; 103. Third electrode. DETAILED DESCRIPTION
[0029] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.
[0030] In the description of the present invention, it is necessary to understand that the terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0031] Embodiment 1:
[0032] like Figure 1-Figure 4 As shown, this embodiment is used to provide an integrated heterojunction trench gate field effect transistor, comprising an n-type silicon substrate 10, a first conductive type field stop layer 9 and a first conductive type semiconductor drift region 8 stacked in sequence from bottom to top, a plurality of conductive modules arranged in sequence are provided on the first conductive type semiconductor drift region 8, and two adjacent conductive modules are symmetrically arranged, and the conductive modules include a second conductive type electric field shielding region a71, a second conductive type semiconductor deep well region 5, a second conductive type electric field shielding region b72 and a portion of the second conductive material 6 arranged in sequence from outside to inside;
[0033] Among them, a second conductive type hole injection region 3 and a first conductive type electron emission region 2 are provided on the upper surface of the second conductive type semiconductor deep well region 5, a first conductive type trench polysilicon region 1 is embedded between the second conductive type semiconductor deep well region 5 and the second conductive type electric field shielding region b72, a first conductive type semiconductor region 4 is provided in the grooves on both sides of the top of the second conductive material 6, and the second conductive type electric field shielding region a71, the second conductive type hole injection region 3, the first conductive type electron emission region 2, the first conductive type trench polysilicon region 1, the second conductive type electric field shielding region b72, the first conductive type semiconductor region 4 and the upper surface of the second conductive type conductive material 6 are all located on the same horizontal plane;
[0034] Part of the first conductive type trench polysilicon region 1 is embedded in and directly contacts the second conductive type electric field shielding region b72.
[0035] In this embodiment, through the above-mentioned technical solution, the electric field can be delayed, the electric field near the bottom of the trench polysilicon gate can be shielded, the electric field of the current path not covered by the shielding layer can be reduced, the breakdown of the trench gate can be prevented, the reliability of the device gate can be improved, and at the same time, better protection can be provided for the reverse withstand voltage of the device cell, and the breakdown voltage of the device can be adjusted by adjusting the concentration of this area.
[0036] Secondly, in the present embodiment, a first electrode 101 is provided on the upper surface of the first conductive type trench polysilicon region 1, a first type insulating material gate oxide layer 11 is provided on the outer wall of the first conductive type trench polysilicon region 1, the first conductive type trench polysilicon region 1 is in direct contact with the first type insulating material gate oxide layer 11 and the first electrode 101, and the first conductive type trench polysilicon region 1 has a hexagonal structure and a notch-type structure at the bottom.
[0037] In this embodiment, through the above-mentioned technical solution, the electric field under the trench gate can be dispersed, reducing the risk of breakdown at the bottom of the gate. The "notch" type trench can concentrate the electric field there and be absorbed by the electric field shielding layer that runs through its structure, so that the gate electric field is further reduced and the reliability of the device is improved. On the other hand, the hexagonal trench increases the channel density, increases the current density, and reduces the on-resistance.
[0038] Secondly, in this embodiment, a second electrode c1021 is provided on the upper surface of the second conductive type electric field shielding region a71, the second conductive type semiconductor deep well region 5 and the first conductive type electron emission region 2, and a second electrode d1022 is provided on the second conductive type electric field shielding region b72, the first conductive type semiconductor region 4 and the second type conductive material 6.
[0039] In this embodiment, through the above-mentioned technical solution, the first conductive type semiconductor region 4 and the second conductive type region in the source area of the device are short-circuited, effectively preventing the parasitic transistor from being turned on. At the same time, the second electrode c1021 is in direct contact with the second type of conductive material region to form the cathode of a special diode, thereby accelerating the reverse recovery speed of the device and improving the performance of the device body diode.
[0040] Secondly, in the present embodiment, the second conductive type electric field shielding region b72 is in direct contact with the second conductive type semiconductor deep well region 5, the first conductive type semiconductor region 4, the second type conductive material 6 and the first conductive type semiconductor drift region 8, and the second conductive type electric field shielding region b72 is in partial contact with the first conductive type trench polysilicon region 1.
[0041] Through the above technical solution, the electric field can be delayed, the electric field near the bottom of the trench polysilicon gate can be shielded, the electric field of the current path not covered by the shielding layer can be reduced, the breakdown of the trench gate can be prevented, the reliability of the device gate can be improved, and at the same time, better protection can be provided for the reverse withstand voltage of the device cell. The breakdown voltage of the device can be adjusted by adjusting the concentration of this area.
[0042] Secondly, in this embodiment, the second conductive material 6 is in direct contact with the first conductive type semiconductor region 4, the second conductive type electric field shielding region a71, the second conductive type electric field shielding region b72 and the first conductive type semiconductor drift region 8, and the second conductive material is a special material of the second conductive type, which is different from silicon carbide.
[0043] Through the above technical solution, a heterojunction diode is integrated into the device. Due to the influence of its material and structure, the excess carriers in the drift region will flow out of the heterojunction faster during reverse recovery, making the heterojunction diode faster than an ordinary body diode, with a smaller voltage drop and smaller switching loss.
[0044] Different from the common primitive cell structure and distribution, the transistor primitive cells are arranged symmetrically rather than continuously and sequentially.
[0045] In one embodiment 1 of the present invention, when the device is turned on, that is, the first electrode 101 is applied with a positive voltage, the second electrode c1021 and the second electrode d1022 are connected to a zero potential, and the third electrode 103 is connected to a positive high voltage. Figure 1 As shown, at this time, the second conductive type semiconductor deep well region 5 near the first type insulating material gate oxide layer 11 at the top of the transistor forms an inversion layer, so that the first conductive type electron emission region 2 emits electrons through the inversion layer channel into the first conductive type semiconductor drift region 8 under the condition of external voltage (the third electrode is connected to a forward high voltage), and then passes through the first conductive type field stop layer 9, and finally goes to the drain of the third electrode 103. The specific current path is as follows Figure 4 As shown in the black line with a downward arrow in the figure, the black line with a downward arrow starts from the first conductive type electron emission region 2 and passes through the second conductive type semiconductor deep well region 5, the first conductive type semiconductor drift region 8 and the first conductive type field stop layer 9 in sequence, thereby turning on the device. At this time, there are both electrons and holes in the drift region, as shown in FIG. Figure 4 The dots in the figure are carriers, but at this time the device is a unipolar carrier conduction transistor, that is, only electrons are used as the conduction working carriers of the device.
[0046] Most of the excess holes and electrons are extracted by the integrated body diode at the moment of shutdown, that is, the first electrode 101 is connected to zero potential or negative potential, the second electrode c1021 and the second electrode d1022 are connected to zero potential, and the third electrode 103 is still connected to a forward high voltage. Since the integrated heterojunction diode can increase the carrier mobility and the conduction voltage drop, and because of the second conductive material, a path that is more conducive to the flow of holes is formed in this region, so carriers are more easily extracted through the heterojunction diode region. Therefore, most of the excess carriers in the drift region pass from the first conductive type semiconductor drift region 8 through the heterojunction diode formed by the second type conductive material 6, and finally go to the second electrode c1021 and the second electrode d1022. At this time, the current direction in the device is consistent with the direction when it is turned on, and the hole flow direction is as follows: Figure 4 As shown by the black dotted line in the middle, the current does not become zero until the carrier extraction is completed. This carrier extraction time is the reverse recovery time. Due to the integrated heterojunction diode, the carrier mobility is greater and the carrier extraction is faster, which speeds up the reverse recovery of the device, shortens the reverse recovery time of the device, and improves the performance of the device body diode, thereby reducing the turn-off loss of the device.
[0047] Embodiment 2:
[0048] like Figure 5-Figure 6As shown, the grounding voltage conditions and mechanisms of each electrode of the device when it is turned on and off are consistent with those in Example 1, but the electric field peak value and current density are different. In order to further prevent the electric field breakdown of the peak at the bottom of the gate, the six corners at the bottom of each hexagonal gate trench in Example 2 are doped with a portion of P-type ions. When the electrons pass through this area, a portion of them will be neutralized, which slightly reduces the current density of the device, but weakens the electric field strength a lot. In this way, the electric field at the bottom of the gate can be weakened, further avoiding breakdown, and improving the withstand voltage and reliability of the device. Figure 7 and Figure 8 As shown, Figure 7 This is a schematic diagram of different electric field magnitudes at different distances from the device unit cell. Figure 8 The following are schematic diagrams of the transfer characteristic curves of the device primitive cells of the two embodiments. The slope of the curve is the inverse of the resistance. The greater the slope, the smaller the resistance. It can be seen from the figure that Figure 7 The peak electric field of Example 2 is obviously lower than that of Example 1, and is less likely to break down, but the current density is smaller, which means that the on-resistance is slightly larger, that is, Figure 8 The slope of the embodiment 2 is smaller than that of the embodiment 1, and the device structure can be selected according to actual requirements, wherein: Figure 7 The horizontal axis represents the electric field strength, and the vertical axis represents the distance from the top to the bottom of the device; Figure 8 The horizontal axis represents the source-drain voltage, and the vertical axis represents the device on-current.
[0049] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. An integrated heterojunction trench gate field effect transistor, characterized in that: The invention comprises an n-type silicon substrate (10), a first conductive type field stop layer (9) and a first conductive type semiconductor drift region (8) which are stacked in sequence from bottom to top, a plurality of conductive modules arranged in sequence are provided on the first conductive type semiconductor drift region (8), and two adjacent conductive modules are arranged symmetrically, the conductive modules comprising a second conductive type electric field shielding region a (71), a second conductive type semiconductor deep well region (5), a second conductive type electric field shielding region b (72) and a portion of a second conductive material (6) which are arranged in sequence from outside to inside; wherein a second conductive type hole injection region (3) and a first conductive type electron emission region (2) are provided on the upper surface of the second conductive type semiconductor deep well region (5); a first conductive type trench polysilicon region (1) is embedded between the second conductive type semiconductor deep well region (5) and the second conductive type electric field shielding region b (72); a first conductive type semiconductor region (4) is provided in the grooves on both sides of the top of the second conductive material (6); and the upper surfaces of the second conductive type electric field shielding region a (71), the second conductive type hole injection region (3), the first conductive type electron emission region (2), the first conductive type trench polysilicon region (1), the second conductive type electric field shielding region b (72), the first conductive type semiconductor region (4) and the second conductive material (6) are all located on the same horizontal plane; Part of the first conductivity type trench polysilicon region (1) is embedded in and directly contacts the second conductivity type electric field shielding region b (72); The second type of conductive material (6) provided inside the integrated heterojunction trench gate field effect transistor is a special material of the second conductive type, which is different from silicon carbide, thereby integrating a heterojunction diode inside the integrated heterojunction trench gate field effect transistor.
2. The integrated heterojunction trench gate field effect transistor according to claim 1, characterized in that: A first electrode (101) is provided on the upper surface of the first conductive type trench polysilicon region (1), a first type insulating material gate oxide layer (11) is provided on the outer side wall of the first conductive type trench polysilicon region (1), the first conductive type trench polysilicon region (1) is in direct contact with the first type insulating material gate oxide layer (11) and the first electrode (101), and the first conductive type trench polysilicon region (1) has a hexagonal structure and a notch-shaped structure at the bottom.
3. The integrated heterojunction trench gate field effect transistor according to claim 1, characterized in that: A second electrode c (1021) is provided on the upper surfaces of the second conductive type electric field shielding region a (71), the second conductive type semiconductor deep well region (5) and the first conductive type electron emission region (2), and a second electrode d (1022) is provided on the second conductive type electric field shielding region b (72), the first conductive type semiconductor region (4) and the second type conductive material (6).
4. The integrated heterojunction trench gate field effect transistor according to claim 1, characterized in that: The second conductive type electric field shielding region b (72) is in direct contact with the second conductive type semiconductor deep well region (5), the first conductive type semiconductor region (4), the second type conductive material (6) and the first conductive type semiconductor drift region (8), and the second conductive type electric field shielding region b (72) is in partial contact with the first conductive type trench polysilicon region (1).
5. The integrated heterojunction trench gate field effect transistor according to claim 1, characterized in that: The second type of conductive material (6) is in direct contact with the first conductive type semiconductor region (4), the second conductive type electric field shielding region a (71), the second conductive type electric field shielding region b (72) and the first conductive type semiconductor drift region (8).